FPGAs 101: Everything you need to know to get started

Smith

Brief Table of Contents

Front matter

Copyright

About the Author

Acknowledgments

About This Book

Acronyms

Chapter 1. Getting Started

Chapter 2. Simple Designs

Chapter 3. FPGA Development Phases

Chapter 4. Design

Chapter 5. Simulation

Chapter 6. Synthesis

Chapter 7. Implementation

Chapter 8. Programming

Table of Contents

Front matter

Copyright

About the Author

Acknowledgments

About This Book

Acronyms

Chapter 1. Getting Started

1.1. Introduction

1.1.1. VHDL

1.2. Reserved Words

1.3. Tips for Writing Good Code

1.3.1. Tip 1. Use Comments to Convey Information about the Code

1.3.2. Tip 2. Indent for Clarity and Readability

1.3.3. Tip 3. Use Standard Format Convention

1.3.4. Tip 4. Include a Header Section

1.3.5. Tip 5. Use Brief Descriptive Names

1.4. HDL Text Editors

1.4.1. Standalone Text Editor

1.4.2. Fee-Based Text Editor

1.5. Editor Features

1.5.1. Syntax Color Highlighting

1.5.2. Language Templates

1.5.3. Row and Column Editor

1.5.4. Comment/Uncomment Selected Text

1.5.5. Indent/Unindent Selected Text

1.5.6. Predefined Font Convention

1.6. Signals

1.6.1. Signal Data Types

1.6.2. Signal Names

1.7. File Structure

1.7.1. Optional Header Section

1.7.2. Library Declaration

1.7.3. Entity Section

1.7.4. Architecture Section

1.8. Starter Tips

1.9. Chapter Overview

Chapter 2. Simple Designs

2.1. Introduction

2.2. Starter Template

2.3. Mathematical Functions

2.4. Logic Gate

Lines 16–19. Logic Operations

2.5. D Flip-Flop

2.6. Latch

2.7. Shift Register

2.8. Comparator

Line 14. Compare Statement

2.9. Binary Counter

2.10. Conversion Functions

Additional Library Packages Added

2.11. Read File

2.12. Write File

2.13. Chapter Overview

Key Simple Design Points

Chapter 3. FPGA Development Phases

3.1. Introduction

3.2. What Is a Field Programmable Gate Array?

3.3. I/O Interfaces

3.4. Basic Logic Building Blocks

3.5. Ability to Interconnect

3.6. Programmable Logic Device Options

3.7. FPGA Development Phases

3.8. Chapter Overview

Chapter 4. Design

4.1. Introduction

4.2. What Is the Design Phase?

4.3. Design Package

4.4. Evaluating the Design Package

4.4.1. Package Analysis

4.4.2. Getting Clarification

4.4.3. Organization

4.5. Predesign Decisions

4.5.1. Design Format

4.5.2. FPGA Manufacturer

4.5.3. Development Tools

4.6. Creating Design Options

4.7. Automatic Code Generators

4.8. Manual Code Generation

4.8.1. Design Package

4.9. Chapter Overview

Chapter 5. Simulation

5.1. Introduction

5.2. What Is Simulation?

5.3. Simulation Tools

5.4. Levels of Simulation

5.5. Test Cases

5.6. Stimulus

5.6.1. Interactive Stimulus

5.6.2. Graphical Test Bench

5.6.3. HDL Testbench

5.6.5. Simulation Phase Outputs

5.6.6. Automatic Testbench

5.6.7. Capture Data

5.7. Simulation Tutorial

5.8. Chapter Overview

Chapter 6. Synthesis

6.1. Introduction

6.2. What Is Design Synthesis?

6.2.1. Design Check and Resource Association

6.2.2. Optimization

6.2.3. Technology Mapping

6.3. Synthesis Phase Tools

6.3.1. Vendors and Features

6.3.2. Synthesis Tool Setup

6.4. Synthesis Input

6.5. Synthesis Output Files

6.5.1. Netlists

6.5.2. Status Reports

6.5.3. Schematic Views

6.5.4. Technology Schematic View

6.6. Synthesis Tutorial

6.7. Chapter Overview

Chapter 7. Implementation

7.1. Introduction

7.2. What Is Implementation?

7.2.1. Translate

7.2.2. Map

7.2.3. Place and Route

7.2.4. Generate Program File

7.3. Implementation Tools

7.4. Implementation Inputs

7.5. Implementation Outputs

7.6. Implementation Tutorial

7.7. Chapter Overview

Chapter 8. Programming

8.1. Introduction

8.2. What Is Programming?

8.3. Tools and Hardware

8.3.1. Joint Test Advisory Group

8.3.2. In-System Programming

8.3.3. Third Party Programmers

8.4. Hardware Configuration

8.5. Programming Tutorial

8.6. Chapter Overview

Front matter

FPGAs 101

FPGAs 101

Everything you need to know to get started

Gina R. Smith

Copyright

Newnes is an imprint of Elsevier

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The Boulevard, Langford Lane, Kidlington, Oxford, OX5 1GB, UK

© 2010 Elsevier Inc. All rights reserved.

No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying, recording, or any information storage and retrieval system, without permission in writing from the publisher. Details on how to seek permission, further information about the Publisher's permissions policies and our arrangements with organizations such as the Copyright Clearance Center and the Copyright Licensing Agency, can be found at our website, www.elsevier.com/permissions. This book and the individual contributions contained in it are protected under copyright by the Publisher (other than as may be noted herein).

Notices

Knowledge and best practice in this field are constantly changing. As new research and experience broaden our understanding, changes in research methods, professional practices, or medical treatment may become necessary.

Practitioners and researchers must always rely on their own experience and knowledge in evaluating and using any information, methods, compounds, or experiments described herein. In using such information or methods they should be mindful of their own safety and the safety of others, including parties for whom they have a professional responsibility.

To the fullest extent of the law, neither the Publisher nor the authors, contributors, or editors, assume any liability for any injury and/or damage to persons or property as a matter of products liability, negligence or otherwise, or from any use or operation of any methods, products, instructions, or ideas contained in the material herein.

Library of Congress Cataloging-in-Publication Data

Smith, Gina R.

FPGAs 101: Everything you need to know to get started / Gina R. Smith.

p. cm.

Includes bibliographical references and index.

ISBN 978-1-85617-706-1 (alk. paper)

1.Field programmable gate arrays. 2. Programmable array logic. 3. VHDL (Computer hardware description language) 4. Digital electronics. I. Title.

TK7895.G36S6525 2010

621.39′5–dc22

2009041496

British Library Cataloguing-in-Publication Data

A catalogue record for this book is available from the British Library.

ISBN: 978-1-85617-706-1

For information on all Newnes publications, visit our website, www.elsevierdirect.com

10 11 12 9 8 7 6 5 4 3 2 1

Printed in the United States of America

About the Author

Gina R. Smith is the CEO and founder of Brown-Smith RDL Inc., located in Maryland. She is a Senior Electrical/Systems Engineer with an Associate's degree in Applied Science in Electronic Engineering Technology, a B.S. degree in Electrical Engineering, magna cum laude, and an M.S. degree in Systems Engineering with honors, from Johns Hopkins University. Through her company, Gina provides systems engineering and FPGA consulting services. Her accomplishments include a Technical Merit Award from Northrop Grumman, for one of her high-voltage designs. She wrote The Art of FPGA Construction, published in Embedded Systems Design, January 2008. She is a member of the International Council on Systems Engineering, Women in Defense, and National Defense Industrial Association. She has numerous years experience as a design and project engineer and technical leader. She worked in the fields of avionics, chemistry and biology, primary and secondary surveillance radar systems, information, friend or foe technology, and various other military and defense systems.

Gina has one daughter, Rebecca C. Smith, and lives in Maryland. She enjoys snow skiing, NASCAR, hiking, cooking, and fishing.

Gina can be reached via email at gina.smith@bsrdl.com.

Acknowledgments

I thank my daughter, Rebecca C. Smith, who is always so patient, loving, supportive, and understanding with me. She is my true source of motivation. I also thank my mother, Rebecca B. Smith, sisters Julie P. Webb and Sharon C. Smith, and my brother Maurice R. Smith for all their support and encouragement during this project. I am truly an engineer and not a writer. Without the support of my daughter and family, this book journey would have been almost impossible. Many thanks for the technical support I received from Mike Hines, Livia Castrucci, Christopher Loberg, Lawrence Wilson at Tektronix, Scott Silver at The Moving Pixel Company, and Brian Jacobsen at Synopsys for getting me a temporary license. Thanks to Xilinx, Altera, and ModelSim for letting me use their material.

I dedicate this book to my dad, who was my hero and number 1 supporter. He is one of heaven's angels.[¹] I love and miss him very much.

¹ James Wellington Smith, June 4, 1932–July 21, 2007

About This Book

This book describes the field programmable gate array (FPGA) development process in five development phases: design, synthesis, simulation, implementation, and programming. Each phase is presented in an easy-to-read and easy-to-understand format with examples, helpful tips, and step-by-step tutorials for the synthesis, implementation, simulation, and programming phases. The reader is provided Web addresses for the tools used in the tutorials. This book makes it easy for beginners to learn and understand how to create, modify, and work with FPGA designs. Experienced engineers will find it to be a good reference manual. A primer and some simple digital designs have been provided for those with no programming knowledge. It provides some basic information about writing, reading, and understanding high-level design languages, coding, and other tips. The primer may not be necessary for all readers, but as my mother always says, It is better to have it and not need it than need it and not have it.

Acronyms

ABEL

advanced Boolean equation language

AHDL

Altera hardware description language

ALM

adaptive logic module

B.E.S.T

behavior extracting synthesis technology

BGA

ball grid array

CAN

controller area network

CIC

cascaded integrator comb

CLB

configurable logic block

CTRL

control

DFF

D flip-flop

DoD

Department of Defense

DRC

design rule check

DSP

digital signal processor

EDIF

electronic digital interchange format

FBGA

fine-pitch ball grid array

FFT

fast Fourier transform

FIR

finite impulse response

FPGA

field programmable gate array

FSM

finite state machine

GTL

gunning transceiver logic

GUI

graphical user interface

HDL

hardware description language

HSTL

high-speed transceiver logic

IEEE

Institute of Electrical and Electronics Engineers

IFF

information, friend or foe

I/O

input/output

IOB

I/O block

IOE

I/O element

IP

intellectual property

ISE

Integrated Software Environment

ISP

in-system programming

JTAG

Joint Test Advisory Group

LDT

lightning data transport

LED

light emitting diodes

LSB

least significant bit

LUT

look-up table

LVCMOS

low-voltage CMOS

LVDS

low-voltage differential signaling

LVTTL

low-voltage transistor-transistor logic

MSB

most significant bit

NCD

native circuit description

NGC

native generic compiler

NGD

native generic database

OTP

one-time programming

PAR

place and route

PCI

peripheral component interconnect

PROM

programmable read only memory

QoR

quality of results

RAM

random access memory

RTL

register transfer level

SPI

serial peripheral interface

SRAM

Static random access memory

Std

standard

TCK

test clock

TDI

test data in

TDO

test data out

TMS

test mode select

TQFP

thin quad flat pack

TRST

test reset

VHDL

very high speed integrated circuit hardware description language

XST

Xilinx Synthesis Technology

Chapter 1. Getting Started

1.1. Introduction

This chapter is a primer that provides beginners with some background information that will help in understanding the field programmable gate array (FPGA) development process described in this book. The FPGA process can be confusing and frustrating, making it more difficult to learn or understand, especially if you do not have at least a basic understanding of some background concepts. So, it is my hope this primer will fill in some, if not all, of the gaps. I am a firm believer that we can always learn something new; so for experienced engineers, I believe this book will be both a good refresher and an opportunity to learn something new. The chapter also provides some helpful hints and tips that I found to be useful over the years. I hope they will prove beneficial to you.

Some basic examples are provided to help you better understand hardware description language (HDL) and the FPGA development process. This primer is not meant to teach you all the ins and outs of writing HDL code but to help you better understand some of the terminology as you read the later chapters on the FPGA development process.

In this chapter, you will learn

HDL coding.

Tips for writing code.

HDL editor features.

HDL file structure.

1.1.1. VHDL

VHDL is a high-level hardware description language used to describe digital circuits that can be programmed into an FPGA. It is a softwarelike programming language that some people, myself included, refer to as firmware. It was developed based on a need by the U.S. Department of Defense (DoD). In 1987, the Institute of Electrical and Electronics Engineers (IEEE) adopted VHDL as a standard, which was released as IEEE Standard (Std) 1076–1987 or VHDL-87. About every five years, the IEEE Standards Committee is supposed to reconvene to review, enhance, and make other modifications to the language. VHDL is also available as VHDL-93, VHDL-2000, VHDL-2002, and VHDL-2008.

VHDL is not case sensitive and requires no special formatting, such as spaces, tabs, or indentations. Each line of code or statement must end with a semicolon, ;. Filename extensions can be either .vhd or .vhdl.

1.2. Reserved Words

Reserved words are words that are defined by the language. Of the many reserved words, you will use some more often than others. Some common VHDL reserved words are shown in Table 1-1. Because VHDL is not case sensitive, reserved words may be in any case.

Table 1-1. VHDL Reserved Words

1.3. Tips for Writing Good Code

Over my many years as a digital designer, I had the opportunity to write many lines of code as well as review, modify, and inherit others' code. Through these sometimes hard experiences, I have developed some tips for writing good code. Some of the tips come from trying to remember code I previously wrote or understanding someone's code. As you become more experienced, you will discover tips that make writing, modifying, and reviewing code much easier.

1.3.1. Tip 1. Use Comments to Convey Information about the Code

Comments are a very important part of coding. You should provide comments as a way of conveying pertinent information about the line or section of code, see Example 1-1. It is so easy to remember all the ins and outs of your code while you are developing it but not so easy if you have to revisit the same code several weeks or months later. It can be even more difficult when you try to understand someone else's code.

Example 1-1. Good and Bad Code Comments

Count <= NumberOfBaskets; -- number of baskets = 5

-- count equals number of baskets

-- count <= NumberOfBaskets;

Good Comment.

Number of baskets = 5 is a good comment, because it defines the actual value being assigned to Count. There is no need to search through the code or another file to find the actual