Rapid Thermal Processing for Future Semiconductor Devices

2001

RTP2001 Organization

Chairperson: Y. Yasuda (Nagoya Univ.)

Vice chairperson: J. Murota (Tohoku Univ.)

Steering Committee:

S. Zaima (Nagoya Univ.)

A. Agarwal (Axcelis Technol.)

J. Hata (Tokyo Electron Ltd.)

S. Hirokawa (Canon Sales Co., Inc.)

I. Kawai (Applied Materials Japan Inc.)

Y. Mimura (Ushio Inc.)

O. Takai (Nagoya Univ.)

L. Yasue (Dainippon Screen MFG. Co., Ltd.)

K. Yoneda (Matsushita Electronics Corp.)

Program Committee:

H. Fukuda (Muroran Inst, of Technol.)

A. Agarwal (Axcelis Technol.)

K. Ando (NEC Corp.)

Y. Kunii (Hitachi Kokusai Electric Inc.)

S. Miyazaki (Hiroshima Univ.)

Y. Nakata (Altedec Co., Ltd.)

N. Shah (Axcelis Technol.)

K. Suguro (Toshiba Corp.)

K. Takasaki (Fujitsu Lab., Ltd.)

Y. Tanabe (Hitachi, Ltd.)

J. Tsuchimoto (Mitsubishi Electric Corp.)

Advisory Committee:

Y. Shiraki (Univ. of Tokyo)

A. Hiraki (Kouchi Inst, of Technol.)

T. Hara (Hosei Univ.)

Supported Organizations:

Applied Materials Japan Inc.

ASM Japan K.K.

Canon Sales Co., Ltd.

Hitachi Kokusai Electric Inc.

Koyo Thermo Systems Co., Ltd.

Mattson Technology Japan

NEC Corp.

Sumitomo Heavy Industries, Ltd.

Universal Systems Co., Ltd.

Ushio Inc.

RTP2001 Secretariat:

K. Fukozu (SIPEC Corp.)

N. Yamamoto (SIPEC Corp.)

Role of Rapid Thermal Processing in the Development of Disruptive and Non-disruptive Technologies for Semiconductor Manufacturing in the 21st Century

Rajendra Singh†, Mohammed Fakhruddin and Kelvin F. Poole,     Center for Silicon Nanoelectronics, and Holcombe Department of Electrical and Computer Engineering, Clemson University, Clemson, SC 29634–0915, U. S. A. E-mail address: srajend@clemson.edu

1. Introduction

Rapid thermal processing, popularly known as RTP has been around for more than two decades. In the context of silicon integrated circuit manufacturing, the equipment manufacturers and R&D groups from chip manufacturers as well as from universities have demonstrated a number of advantages over conventional furnace processing. As of today, RTP has not penetrated deep in Silicon IC manufacturing as it was forecasted and predicted by industry experts. Other than silicon ICs, the market size is very small. From the business point of view, the current status of RTP market is not very surprising since we operate in a world where only one out of 10 predicted markets ever come to fruition [1]. The introduction of 300 mm wafers in manufacturing (potential of 450 mm diameter wafer in future manufacturing), 70 nm gate length transistors in current 130 nm silicon integrated circuit manufacturing, the announcement of industrial researchers [2–3] for fabricating 15–20 nm gate length transistors, non-silicon IC technologies (display, storage, photovoltaics, optoelectronics etc.) and the issue of bringing disruptive technologies in production are some interesting issues that need to be considered for overall future of RTP. Thus, it is important to examine RTP technology from the current and future semiconductor manufacturing needs. In this paper, we have attempted to predict the future role of RTP in disruptive and non-disruptive semiconductor technologies.

2. Global Picture of Semiconductor Manufacturing

An examination of the growth of the semiconductor industry shows that the ability to reduce the feature size (leading to lower cost/per function) is largely responsible for the sustained growth in the last four decades. The market size in 1959 was less than $1 B and the current market size is about $200 B. In spite of several negative growth cycles, over the last 40 years the semiconductor industry has maintained 17 % compound annual growth rate [4]. The overall semiconductor market consists of silicon ICs for low-power applications as well as for power-electronics, micro electro mechanical systems (MEMS), compound semiconductor ICs, optical devices and optoelectronics, flat panel display, solar cells as well as disruptive technologies. In principle RTP has potential to meet thermal processing and chemical vapor deposition (CVD) needs of all the above-mentioned technologies. However, our discussion in this paper is focused mainly on silicon ICs for low power applications and disruptive technologies. In a recent paper we have discussed the role of RTP for photovoltaic applications [5].

In recent years researchers are raising an open question about how far the feature size reduction trends of silicon based CMOS will continue [6–7]. Alternate device structures (e.g. single electron transistors (SETs)), alternate materials (e.g. carbon nanotubes, magnetic materials, biological materials), molecular electronics, optical switches, quantum computers etc. have been proposed as an answer to the question, what after silicon CMOS?. Careful examination of all the published results show that none of the proposed solutions can lead to manufacturing. The best results published to date involve the use of self-assembled monolayers of conjugated polymers in a vertical CMOS structure [8]. Due to small channel length (‘1–2 nm), the drain current is higher than the smallest silicon based CMOS reported to date. However, due the unstable nature of the organic semiconductor, the drain was deposited at 100K. Thus, from defects and reliability considerations [9], it is unlikely that the work reported in reference 8 can lead to manufacturing. The feature sizes of Si CMOS in 1980 and year 2000 were about 2 micron, and 0.2 micron respectively. It is expected that by the year 2020, the feature of Si CMOS will be about 20 nm.

3. Current Trends in Semiconductor Manufacturing

During the last 40 years, due to increased wafer size, decreased line widths and larger capacities in wafer out per month have driven a decrease in capital cost per normalized unit (e.g. cost per transistor of an IC chip). However, the cost of semiconductor facilities is increasing exponentially with time. In recent years, the most difficult challenge for IC manufacturer is to meet the demands of time-to-market of a particular product. The current mega fabs are dominated by batch processing. In future, batch processing will play a reduced role in mega fabs. The agile manufacturing based on mini fabs will be driven by shorter products life and dominated by single wafer processing. In the context of current manufacturing trends the key features of agile manufacturing are [10]: (i) driven by quick turn around time and low-cost, (ii) small size fab supported by a virtual fab, (iii) multi-task and muti-functional tools, (iii) minimization and smoothing of raw process