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CCPR2L T2CON TRISC B5 B4 PWM1 PWM2 TMR2IF RP1 RP0 EQU 0x08 EQU 0x88 EQU 0x03 EQU 0x0b EQU 0x9F EQU 0x11 EQU 0x8c EQU 0x0c EQU 0x92 EQU 0x17 EQU 0x15 EQU 0x1D EQU 0x1B EQU 0x12 EQU 0x87 EQU 0x05 EQU 0x04 EQU 0x01 EQU 0x02 EQU 0x01 EQU 6 EQU 5 ;Bit 6 and 5 for bank selection in STATUS register. ;To select bank 0, RP1 = 0 and RP0 = 0 {PORTA and PORTB} ; bank 1 ; bank1 ; bank1
;To select bank 1, RP1 = 0 and RP0 = 1 {TRISA,TRISB & ADCON1} ;To select bank 2, RP1 = 1 and RP0 = 0 ;To select bank 3, RP1 = 1 and RP0 = 1 CBLOCK 0x20 FIFTY EIGHTY TWENTY ENDC ;end of ram block ; RAM AREA for USE at address 20h
;========================================================= org 0x0000 ;line 1 GOTO START ;line 2 ($0000) ;========================================================= ; 16F877 Clock Frequency = 20 MHz ; Tosc = 1/[Clock Frequency] = 0.05us ; PWM Period = 2000Hz = 0.5 ms ; TMR2 Prescale = 16 ; PR2 = (period / [4*Tosc*Prescale]) - 1 = 155.25 ; = 155 ; = 0x9b ; PWM Ducty Cycle = 50% of the PWM period ; = 0.5 *(0.5ms)= 250us ; ---> PWM Duty Cycle / (Tosc * Prescale) ; = [250u]/[0.05u*16] = 312.5 = 313 = 0x139
; CCPR1L CCP1CON ; 76|5432|10 76|54|3210 ; 01|0011|10 |01| ; CCPR1L:CCP1CON<5:4>=(PWM Duty Cycle)/(Tosc*Prescale)= 139h ; CCPR1L = 0x4e ; CCP1CON<5:4> = b'01' ;PWMDucty Cycle = 80% of the PWM period ; = 0.8 *(0.5ms)= 400us ; ---> PWM Duty Cycle / (Tosc * Prescale) ; = [400u]/[0.05u*16] = 500 = 0x1F4 ; ; CCPR1L CCP1CON ; 76|5432|10 76|54|3210 ; 01|1111|01 |00| ; CCPR1L:CCP1CON<5:4>=(PWM Duty Cycle)/(Tosc*Prescale)= 139h ; CCPR1L = 0x7d ; CCP1CON<5:4> = b'00' ;PWMDucty Cycle = 20% of the PWM period ; = 0.2 *(0.5ms)= 100us ; ---> PWM Duty Cycle / (Tosc * Prescale) ; = [250u]/[0.05u*16] = 125 =0x7d ; ; CCPR1L CCP1CON
; 76|5432|10 76|54|3210 ; 00|0111|11 |01| ; CCPR1L:CCP1CON<5:4>=(PWM Duty Cycle)/(Tosc*Prescale)= 139h ; CCPR1L = 0x1F ; CCP1CON<5:4> = b'01'
org 0x0005 START BANKSEL ADCON1 ;Load literal value=6 into W register ;Move the literal value into ADCON1 register. ;move binary value 11111111 to register W ;Now All PORTA bits are set as INPUT
banksel CCP1CON banksel CCP2CON clrf clrf clrf clrf clrf movlw movwf CCP1CON CCP2CON TMR2 INTCON PIR1 0x4e FIFTY ;50% Duty Cycle
;PWM Period Setting banksel PR2 movlw 0x9b movwf PR2 ;2000Hz(0.5ms)Period
BTFSS PORTD,2 GOTO RIGHT GOTO STOP STOP banksel FIFTY ;PWM Duty Cycle movf FIFTY, W ;Move 50% Duty Data to W reg.
movwf CCPR1L bcf bsf CCP1CON, B5 CCP1CON, B4 ;Under PWM mode ;2 LSB's of PWM duty cycle; the other 8bits ;are located at CCPR1L banksel TRISC bcf TRISC, PWM2 ;TRISC Setting for output ;set PORTC.2 as output
banksel T2CON movlw 0x07 movwf T2CON bankselCCP1CON bsf bsf CCP1CON, 0x03 CCP1CON, 0x02 ;TMR2 Turn On and ;TMR2 Prescale 16 ;CCP1CON Module Setting ;PWM Turn ON ;11xx<3:0> is PWM mode
movwf CCPR2L bcf bsf CCPR1L bankselTRISC bcf TRISC, PWM1 ;TRISC Setting for output ;set PORTC.2 as output CCP2CON, B5 CCP2CON, B4 ;Under PWM mode ;2 LSB's of PWM duty cycle; the other 8bits are located at
banksel T2CON movlw 0x07 movwf T2CON ;TMR2 Turn On and ;TMR2 Prescale 16
GOTO TEST LEFT banksel EIGHTY ;PWM Duty Cycle movf EIGHTY, W ;Move 50% Duty Data to W reg.
movwf CCPR1L bcf bsf CCPR1L banksel TRISC bcf TRISC, PWM2 ;TRISC Setting for output ;set PORTC.2 as output CCP1CON, B5 CCP1CON, B4 ;Under PWM mode ;2 LSB's of PWM duty cycle; the other 8bits are located at
banksel T2CON movlw 0x07 movwf T2CON banksel CCP1CON bsf ;TMR2 Turn On and ;TMR2 Prescale 16 ;CCP1CON Module Setting
bsf CCPR1L
CCP2CON, B4
banksel T2CON movlw 0x07 movwf T2CON banksel CCP2CON bsf bsf ;TMR2 Turn On and ;TMR2 Prescale 16 ;CCP1CON Module Setting
GOTO TEST MID banksel TWENTY ;PWM Duty Cycle movf TWENTY, W ;Move 50% Duty Data to W reg.
movwf CCPR1L bcf bsf CCPR1L banksel TRISC bcf TRISC, PWM2 ;TRISC Setting for output ;set PORTC.2 as output CCP1CON, B5 CCP1CON, B4 ;Under PWM mode ;2 LSB's of PWM duty cycle; the other 8bits are located at
banksel T2CON movlw 0x07 movwf T2CON banksel CCP1CON ;TMR2 Turn On and ;TMR2 Prescale 16 ;CCP1CON Module Setting
bsf bsf
movwf CCPR2L bcf bsf CCPR1L banksel TRISC bcf TRISC, PWM1 banksel T2CON movlw 0x07 movwf T2CON banksel CCP2CON bsf bsf CCP2CON, 0x03 CCP2CON, 0x02 ;TMR2 Turn On and ;TMR2 Prescale 16 ;CCP1CON Module Setting ;PWM Turn ON ;11xx<3:0> is PWM mode ;TRISC Setting for output ;set PORTC.2 as output CCP2CON, B5 CCP2CON, B4 ;Under PWM mode ;2 LSB's of PWM duty cycle; the other 8bits are located at
GOTO TEST
;PWM Duty Cycle movf TWENTY, W ;Move 50% Duty Data to W reg.
movwf CCPR1L
bcf bsf
CCP1CON, B5 CCP1CON, B4
;Under PWM mode ;2 LSB's of PWM duty cycle; the other 8bits ;are located at CCPR1L
banksel T2CON movlw 0x07 movwf T2CON banksel CCP1CON bsf bsf ;TMR2 Turn On and ;TMR2 Prescale 16 ;CCP1CON Module Setting
CCP1CON, 0x03 ;PWM Turn ON CCP1CON, 0x02 ;11xx<3:0> is PWM mode TWENTY ;Move 50% Duty Data to W reg.
BANKSEL movf
TWENTY, W
movwf CCPR2L bcf bsf CCP2CON, B5 CCP2CON, B4 ;Under PWM mode ;2 LSB's of PWM duty cycle; the other 8bits ;are located at CCPR1L banksel TRISC bcf TRISC, PWM1 ;TRISC Setting for output ;set PORTC.2 as output
banksel T2CON movlw 0x07 movwf T2CON banksel CCP2CON bsf ;TMR2 Turn On and ;TMR2 Prescale 16 ;CCP1CON Module Setting
bsf