David Cruz Ramos AL12505867 Fsica 1 Operaciones con vectores

Cuadro comparativo de circuitos di ita!es Diagrama 1 2 3 Funcin Procesador de datos Timer Memoria multifuncional Seal Digital Digital Digital Tipo Conbinacional Secuencial Programado

4 5 ! " # Contador Biestable Flip flop

Digital

Conbinacional Secuencial Conbinacinal Programable

Digital

Secuencial

"o!a para !a actividad 2 de !a unidad 1 de#er$s ana!izar !os si uientes dia ramas% esto es% e&p!icar su 'uncionamiento sus se(a!es% ) determinar *u+ tipo de sistema es e! *ue se est$ presentando ,com#inaciona!% secuencia! o pro ramado-% e!a#orar un cuadro comparativo en e! *ue se inte ren !os dia ramas ana!izados.

1 2 / 0 5 7 6 8

E l

I2C Memory Test

8Ais samp!e sAoBs tAe 'unctionin o' tAe a 20C00A 72C seria! memor). 8Ae source code Brites a series o' va!ues to address 0&0100E0&010F and tAen reads tAem #acG a ain veri')in eacA #)te as it is read. 7' an error occurs tAen tAe error code is Britten to 6ort D and tAe <tatus ,RA0- !ine is to !ed. A sBitcA on RA5 contro!s BAetAer or not tAe Brite portion o' tAe test is per'ormed. DAen tAe sBitcA is c!osed on!) a read test is done. 8Ais can #e used to veri') memor) persistence.

52 R2
65LL56 1/ 10 1 2 / 0 5 6 7 8 2 10 O<C1@CLM7> O<C2@CLMO58 4CLR@9pp@8"9 RH0@7>8 RH1 RH2 RH/@6;4 RH0 RH5 RH6@6;C RH7@6;D // /0 /5 /6 /7 /8 /2 00 15 16 17 18 2/ 20 25 26 12 20 21 22 27 28 22 /0 D0 D1 D2 D/ D0 D5 D6 D7

<8A85<

DR783 434ORFN

RA0@A>0 RA1@A>1 RA2@A>2@9R3FE RA/@A>/@9R3FC RA0@80CM7 RA5@A>0@<< RC0@81O<O@81CM7 RC1@81O<7@CC62 R30@A>5@RD RC2@CC61 R31@A>6@DR RC/@<CM@<CL R32@A>7@C< RC0@<D7@<DA RC5@<DO RC6@8=@CM RC7@R=@D8 RD0@6<60 RD1@6<61 RD2@6<62 RD/@6<6/ RD0@6<60 RD5@6<65 RD6@6<66 RD7@6<67 67C16F877

R1
65LL56 <CM <DA

R/
65LL56

51
6 5 7 <CM <DA D6 20C00A A1 A2 2 /

DK0..7L 3rrCode

SEQUENTI L L!"IC CI#CUITS $ #S %LI&$%L!&

U1 SET

0
>A>D

Q-OUTPUT

U2 RESET

0
>A>D

Q-OUTPUT

8Ae R< ,resetEset- '!ipE'!op is tAe simp!est !o ic circuit tAat can e&Ai#it memor) #eAaviour. 7' tAe <38 input is cAan ed to !o ic 0% tAe 1 output #ecomes set to !o ic 1. D Aen tAe <38 input returns to !o ic 1% tAe 1 output Jremem#ersJ its state. <imi!ar!)% tAe R3<38 input Bi!! c!ear tAe 1 output to !o ic 0. 8Ae circuits a#i!it) to remem#er its state derives 'rom tAe 'eed#acG connections 'rom eacA >A>D ate to tAe otAer.

749' EasyHDLModel
8Ais samp!e sAoBs a 702/ counter mode!!ed usin an 3as)"DL script. 8Ae script is a comp!ete mode! o' #otA tAe 'unctiona! as Be!! as timin #eAaviour o' tAe 702/. For anotAer e&amp!e o' 3as)"DL mode!!in see tAe 70252.D<> samp!e 'i!e.
?<CR768 6RO;RA4 702/ AL7A< RA:R0,1-% RH:R0,276RO6 7>78:0 86RO6 8DRA% 8DRH% 8DRC% 8DRD 86RO6 8DL"1A% 8DL"1H% 8DL"1C% 8DL"1D 86RO6 8D"L1A% 8D"L1H% 8D"L1C% 8D"L1D 67> CMA% CMH% RA% RH 67> 1A%1H%1C%1D 7>8 counta : 7>78 O 1% count# : 7>78 PP 1 CLOCM 10 1 R3<38 2 / R0,1R0,2702/ 6R7478793:D7;78AL <CR768:702/

51
CMA CMH 1A 1H 1C 1D 12 2 8 11

A H C D

4A6 O> 9AL53 CA<3 702/ I 8DRA:26n I 8DRH:26n I 8DRC:26n I 8DRD:26n 8DL"1A:10n I 8D"L1A:12n I 8DL"1H:10n I 8D"L1H:10n 8DL"1C:21n I 8D"L1C:2/n I 8DL"1D:/0n I 8D"L1D:/0n HR3AM 3>D4A6 7F 3987D:37QHOO8 1A : counta O 1 1H : count# O 1 1C : count# O 2 1D : count# O 0 3L<7F RA O RH counta : 0 1A : FAL<3 AF83R 8DRA count# : 0 1H : FAL<3 AF83R 8DRH 1C : FAL<3 AF83R 8DRC 1D : FAL<3 AF83R 8DRD 3L<3 7F CMA:>3;3D;3 counta : countaC1 1A : counta O 1 AF83R 8DL"1A%8D"L1A 3>D7F 7F CMH:>3;3D;3 count# : count#C1 1H : count# O 1 AF83R 8DL"1H%8D"L1H 1C : count# O 2 AF83R 8DL"1C%8D"L1C 1D : count# O 0 AF83R 8DL"1D%8D"L1D 3>D7F 3>D7F ?3>D<CR768

749' EasyHDLModel
E l e c t r o n i c s
La#center 3!ectronics% 5/E55 4ain <treet% ;rassin ton% >ortA ForGsAire% HD2/ 5AA Fa&I C00 ,0-1756 752857 8e!I C00 ,0-1756 75/000 http://www.labcenter.co.uk/ 3mai!I info@labcenter.co.uk DDDI