Lab 4: Rudimentary Adder Circuits

Kevin Bradshaw
ECEN 248: Introduction to Digital Design, Section 302
TA: Daniel Mcbride
Due date: July 8th, 2014

Objectives:
The purpose of this lab is to better understand how to implement circuits that add signed and
unsigned bits. These circuits are known as adders and can be combined to build larger adders
that represent large amounts of bits being manipulated mathematically. A half adder, full adder,
and ripple carry adder was designed, constructed, and tested to show the students understanding
of binary operations.

Design
Using the information given in the Pre-Lab, the circuits in Figure 1, 2, and 3 were designed using
truth tables and binary addition concepts. The outputs in each circuit led to LED's that
represented the sum and carry's of all the binary addition possibilities with the number of inputs
provided. If the LED was on, the bit was recorded as 1, and if it was off, the bit was recorded as
0.
Figure 1:
Half Adder

Figure 2:
Full Adder

Figure 3:
Ripple Carry Adder

Results
The adders built had to be revised from original designs in the pre-lab because of the number of
inputs being used. In the pre-lab, an adder with gates that had up to three inputs was used. While
making the circuit, the gates being used only had two inputs available. By changing the designs,
more wires and gates had to be used but they were all able to work. The updated designs are the
designs included in Figure 1, 2, and 3. These designs still used the same Karnaugh Maps from
the pre-lab because each design was only enhanced by the Associate Property.

Post-Lab Questions
1. Determine the worst case propagation delay for your full adder design. Assume each gate has
the same delay of 1 unit. Show the maximum delay path in your schematic. The maximum delay
path is known as the critical path for that particular combinational block.
The worst case propagation delay would be an adder with 5 levels, or 5 delay units. The circuit
for this type of delay is the same for the design implemented in Figure 3. The maximum delay

path would be 3 units with a carry look ahead. This is illustrated on page 140 of the textbook for
this course, 'Digital Design,' by Morris Mano.
2. Design a 2-bit carry ripple adder assuming you only have half adder circuits and OR gates to
work with. Draw up a schematic for your design using half adder building blocks and OR gates.
Be sure the clearly label all inputs and outputs of your blocks
Conveniently, the circuit designed in lab only consisted of half adders and OR gates. The
following image is a clarification with each part labeled and the critical path highlighted.

Conclusion
In this lab, in order to demonstrate working knowledge of each adder circuit, every design was
built, tested and performed for the TA to see. Each adder was tested by its particular truth table
and proved by Boolean arithmetic. This lab helped us understand how each gate in a logic circuit
can build towards a central purpose such as a binary adder. After building the ripple carry adder
circuit the first time, the truth table wasn't matching correctly for the truth table that was
expected. This was resolved by testing different parts of the adder separately until the issue was

found. Understanding how to do this is critical in circuit design because of the many possibilities
of how to design one circuit, in this instance, an adder.

Student Feedback
1. What did you like most about the lab assignment and why? What did you like least about it
and why?
I liked this lab because it was straight from design to implementation. We were given an
objective and from there, our own design implementations could be used. What I didn't like was
that there wasn't very much time to build each individual circuit.
2. Were there any sections of the lab manual that were unclear? The lab could have been more
clear on the designs for the adders. For example, some designs could include multiple input gates
but in the lab, we are limited to using only gates with two inputs.
3. What suggestions do you have to improve the overall lab assignment?
To improve the lab assignment, there should be more time for the students to test each individual
circuit. For students that are learning the fundamentals, there are going to be lots of problems and
so we shouldn't be rushed to finish. Learning about these circuits in lecture and in the book is
necessary but if we can't implement them, then we wouldn't truly be learning for a purpose.