Ecsyll2010 (VTUPlanet - Com) Syllabus

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NEERING MATHEMATICS - III \par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb
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x100 10MAT31\tab \up0 \expndtw-2\charscalex100 IA Marks\tab \up0 \expndtw-2\char
scalex100 :\tab \up0 \expndtw-2\charscalex100 25\par\pard\li2829\sb0\sl-230\slmu
lt0\fi0\tx4264\tx4737\tx6537\tx7977\tx8759 \up0 \expndtw-2\charscalex100 Hrs/ We

ek\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 04\tab
\up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 :\tab
\up0 \expndtw-2\charscalex100 03\par\pard\li2829\sb0\sl-228\slmult0\fi0\tx4264\
tx4737\tx6537\tx7977\tx8659 \up0 \expndtw-2\charscalex100 Total Hrs.\tab \up0 \e
xpndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 52\tab \up0 \expndtw2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw
-2\charscalex100 100\par\pard\ql \li5570\sb0\sl-230\slmult0 \par\pard\ql\li5570\
sb16\sl-230\slmult0 \up0 \expndtw-4\charscalex100 PART-A \par\pard\ql \li2829\sb
230\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT-1 \par\pard\ql \li2829\sb1
0\sl-230\slmult0 \up0 \expndtw-4\charscalex100 Fourier series \par\pard\qj \li28
29\ri2674\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5
\fs20 Convergence and divergence of infinite series of positive terms, definitio
n \up0 \expndtw-4\charscalex100 and illustrative examples* \par\pard\ql \li2829\
sb1\sl-193\slmult0 \up0 \expndtw-3\charscalex100 Periodic functions, Dirichlet\u
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638\sb29\sl-240\slmult0\tx4046 \up0 \expndtw-2\charscalex100 of period \tab \up0
\expndtw-2\charscalex100 and arbitrary period, half range Fourier series. Compl
ex form \line\up0 \expndtw-3\charscalex100 of Fourier Series. Practical harmon
ic analysis. \par\pard\li2829\sb13\sl-230\slmult0\fi5553 \up0 \expndtw0\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 7 Hours\par\pard\li2829\sb1\sl-230\slmult0\fi0
\up0 \expndtw0\charscalex100 UNIT-2\par\pard\li2829\sb0\sl-230\slmult0\fi0 \up0
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30\slmult0\fi0 \up0 \expndtw0\charscalex100 Inverse transforms\par\pard\li2829\s
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imensional wave and heat equations, two \up0 \expndtw0\charscalex103 dimensional
Laplace\u8217?s equation by the method of separation of variables, \up0 \expndt
w0\charscalex105 Solution of all these equations with specified boundary
conditions. \up0 \expndtw-4\charscalex100 D\u8217?Alembert\u8217?s solution of
one dimensional wave equation. \par\pard\ql \li8383\sb11\sl-230\slmult0 \up0 \ex
pndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hours \par\pard\ql \li2829\s
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fs24 \u-4035?\ul0\nosupersub\cf6\f7\fs24 ax\ul0\nosupersub\cf7\f8\fs24 \u-4053?
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harscalex100 \ul0\nosupersub\cf9\f10\fs22 y\ul0\nosupersub\cf10\f11\fs22 \u-4035
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rsub\cf10\f11\fs22 \u-4053?\tab \dn2 \expndtw-7\charscalex100 \ul0\nosupersub\cf
9\f10\fs22 b x \ul0\nosupersub\cf10\f11\fs22 \u-4053?\ul0\nosupersub\cf9\f10\fs2
2 c\ul0\nosupersub\cf8\f9\fs22 ,\tab \dn2 \expndtw0\charscalex100 \ul0\nosupers
ub\cf13\f14\fs18 y \ul0\nosupersub\cf14\f15\fs18 \u-4035?\ul0\nosupersub\cf13\f1
4\fs18 a e\tab \dn2 \expndtw0\charscalex100 \ul0\nosupersub\cf11\f12\fs18 , y
\tab \dn2 \expndtw-4\charscalex100 \ul0\nosupersub\cf14\f15\fs18 \u-4035?\tab \d
n2 \expndtw0\charscalex100 \ul0\nosupersub\cf13\f14\fs18 ax\par\pard\li2829\sb0\
sl-180\slmult0\fi0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Opti
mization: Linear programming, mathematical formulation of linear\par\pard\
sect\sectd\sbknone\cols2\colno1\colw4826\colsr40\colno2\colw6894\colsr160\ql \li
2829\sb1\sl-221\slmult0 \up0 \expndtw0\charscalex100 programming problem\par\pa

rd\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pa
rd\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql \li2829\sb6\sl-230\slmult0 \up0 \e
xpndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT-5\par\pard\ql \li2829\sb
0\sl-230\slmult0 \up0 \expndtw-2\charscalex100 Numerical Methods - 1\par\pard\co
lumn \ql \li20\sb1\sl-221\slmult0 \up0 \expndtw0\charscalex103 \ul0\nosupersub\c
f4\f5\fs20 (LPP), Graphical method and simplex method.\par\pard\ql \li5575\
sb0\sl-230\slmult0 \par\pard\ql \li3537\sb7\sl-230\slmult0 \up0 \expndtw-2\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 7 Hours\par\pard\ql \li729\sb1\sl-230\slmul
t0 \up0 \expndtw-2\charscalex100 PART-B \par\pard\sect\sectd\sbknone \qj \li2829
\ri2675\sb0\sl-220\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\f
s20 Numerical Solution of algebraic and transcendental equations: Regula-falsi \
line \up0 \expndtw-3\charscalex100 method, Newton - Raphson method. Iterative me
thods of solution of a system \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\
ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb99\sl-184\slmult0 \up0 \expnd
tw-2\charscalex100 \ul0\nosupersub\cf1\f2\fs16 5 \par\pard\sect\sectd\fs24\paper
w11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg2}{\bkmkend Pg2}\par\pard\qj \li
2829\sb0\sl-220\slmult0 \par\pard\qj\li2829\ri2675\sb119\sl-220\slmult0 \up0 \ex
pndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 of equations: Gauss-seidel and
Relaxation methods. Largest eigen value and \up0 \expndtw-4\charscalex100 the c
orresponding eigen vector by Rayleigh\u8217?s power method. \par\pard\ql \li8383
\sb12\sl-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6
Hours \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb220\sl-230\
slmult0 \up0 \expndtw-2\charscalex100 UNIT-6 \par\pard\ql \li2829\sb10\sl-230\sl
mult0 \up0 \expndtw-2\charscalex100 Numerical Methods - 2 \par\pard\qj \li2829\r
i2674\sb0\sl-233\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs
20 Finite differences: Forward and backward differences, Newton\u8217?s forward
and \up0 \expndtw-3\charscalex100 backward interpolation formulae. Divided d
ifferences - Newton\u8217?s divided \up0 \expndtw0\charscalex104 difference
formula, Lagrange\u8217?s interpolation formula and inverse \up0 \exp
ndtw-4\charscalex100 interpolation formula. \par\pard\qj \li2829\sb0\sl-220\slmu
lt0 \par\pard\qj\li2829\ri2676\sb6\sl-220\slmult0 \up0 \expndtw-2\charscalex100
Numerical integration: Simpson\u8217?s one-third, three-eighth and Weddle\u8217?
s rules \up0 \expndtw-4\charscalex100 (All formulae/rules without proof) \par\pa
rd\ql \li8383\sb12\sl-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\
cf3\f4\fs20 7 Hours \par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-2\ch
arscalex100 UNIT-7 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\chars
calex100 Numerical Methods - 3 \par\pard\qj \li2829\ri2676\sb13\sl-230\slmult0 \
up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Numerical solutions of
PDE - finite difference approximation to derivatives, \up0 \expndtw-1\charscalex
100 Numerical solution of two dimensional Laplace\u8217?s equation, one dimensio
nal \up0 \expndtw-4\charscalex100 heat and wave equations \par\pard\ql \li8383\s
b1\sl-217\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Ho
urs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb3\sl-230\slmul
t0 \up0 \expndtw-2\charscalex100 UNIT-8 \par\pard\ql \li2829\sb10\sl-230\slmult0
\up0 \expndtw-4\charscalex100 Difference Equations and Z-Transorms \par\pard\qj
\li2829\ri2675\sb0\sl-233\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub
\cf4\f5\fs20 Difference equations: Basic definition; Z-transforms - definition,
standard Z-\line \up0 \expndtw-3\charscalex100 transforms, damping rule, shiftin
g rule, initial value and final value theorems. \line \up0 \expndtw0\charscalex1
03 Inverse Z-transform. Application of Z-transforms to solve difference \
line \up0 \expndtw-2\charscalex100 equations. \par\pard\ql \li8383\sb1\sl-202\sl
mult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hours \par\par
d\ql \li2829\sb15\sl-230\slmult0 \up0 \expndtw-3\charscalex100 Note: * In the ca
se of illustrative examples, questions are not to be set. \par\pard\ql \li2829\s
b230\sl-230\slmult0 \up0 \expndtw-4\charscalex100 Text Books: \par\pard\ql \li32
35\sb0\sl-220\slmult0 \par\pard\ql\li3235\ri3200\sb19\sl-220\slmult0\tx3595 \up0
\expndtw-3\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\ul0\nosupersub\cf15\f16
\fs20 \ul0\nosupersub\cf4\f5\fs20 B.S. Grewal, Higher Engineering Mathematics,
Latest edition, \line\tab \up0 \expndtw-4\charscalex100 Khanna Publishers. \par
\pard\ql \li3235\ri3324\sb20\sl-220\slmult0\tx3595 \up0 \expndtw-3\charscalex100

2.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20 Erwin Kreyszig, A
dvanced Engineering Mathematics, Latest \line\tab \up0 \expndtw-4\charscalex100
edition, Wiley Publications. \par\pard\ql \li2829\sb12\sl-230\slmult0 \up0 \expn
dtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Reference Books: \par\pard\ql \l
i3235\sb0\sl-220\slmult0 \par\pard\ql\li3235\ri2691\sb19\sl-220\slmult0\tx3595 \
up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\ul0\nosupersub\cf15\
f16\fs20 \ul0\nosupersub\cf4\f5\fs20 B.V. Ramana, Higher Engineering Mathemati
cs, Latest edition, Tata \line\tab \up0 \expndtw-4\charscalex100 Mc. Graw Hill P
ublications. \par\pard\ql \li3235\ri2945\sb20\sl-220\slmult0\tx3595 \up0 \expndt
w-3\charscalex100 2.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20
Peter V. O\u8217?Neil, Engineering Mathematics, CENGAGE Learning \line\tab \up0
\expndtw-4\charscalex100 India Pvt Ltd.Publishers. \par\pard\ql \li5834\sb0\sl-1
84\slmult0 \par\pard\ql\li5834\sb66\sl-184\slmult0 \up0 \expndtw-2\charscalex100
\ul0\nosupersub\cf1\f2\fs16 6 \par\pard\sect\sectd\fs24\paperw11900\paperh16840
\pard\sb0\sl-240{\bkmkstart Pg3}{\bkmkend Pg3}\par\pard\ql \li3235\sb0\sl-230\sl
mult0 \par\pard\ql\li3235\sb100\sl-230\slmult0 \up0 \expndtw-3\charscalex100 \ul
0\nosupersub\cf4\f5\fs20 3. \par\pard\qj \li4298\sb0\sl-220\slmult0 \par\pard\qj
\li4298\ri4142\sb19\sl-220\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub
\cf3\f4\fs20 ANALOG ELECTRONIC CIRCUITS \line \up0 \expndtw-4\charscalex100 (Com
mon to EC/TC/EE/IT/BM/ML) \par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb
18\sl-230\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8760 \up0 \expndtw-2\charsca
lex100 Sub Code\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscal
ex100 10ES32\tab \up0 \expndtw-2\charscalex100 IA Marks\tab \up0 \expndtw-2\char
scalex100 :\tab \up0 \expndtw-2\charscalex100 25\par\pard\li2829\sb0\sl-230\slmu
lt0\fi0\tx4264\tx4737\tx6537\tx7977\tx8759 \up0 \expndtw-2\charscalex100 Hrs/ We
ek\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 04\tab
\up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 :\tab
\up0 \expndtw-2\charscalex100 03\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx4264\
tx4737\tx6537\tx7977\tx8659 \up0 \expndtw-2\charscalex100 Total Hrs.\tab \up0 \e
xpndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 52\tab \up0 \expndtw2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw
-2\charscalex100 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\
sb0\sl-230\slmult0 \par\pard\ql\li2829\sb34\sl-230\slmult0 \up0 \expndtw-4\chars
calex100 UNIT 1: \par\pard\qj \li2829\ri2677\sb0\sl-240\slmult0\fi0 \up0 \expndt
w-1\charscalex100 Diode Circuits:\ul0\nosupersub\cf4\f5\fs20 Diode Resistance,
Diode equivalent circuits, Transition and \line \up0 \expndtw-1\charscalex100 di
ffusion capacitance, Reverse recovery time, Load line analysis, Rectifiers, \par
\pard\li2829\sb1\sl-214\slmult0\fi0\tx7919 \up0 \expndtw-2\charscalex100 Clipper
s and clampers.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6
Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb6\sl-230\slmult
0 \up0 \expndtw-4\charscalex100 UNIT 2: \par\pard\qj \li2829\ri2675\sb0\sl-230\s
lmult0 \up0 \expndtw0\charscalex100 Transistor Biasing\ul0\nosupersub\cf4\f5\fs2
0 : Operating point, Fixed bias circuits, Emitter stabilized \line \up0 \expndtw
-1\charscalex100 biased circuits, Voltage divider biased, DC bias with v
oltage feedback, \line \up0 \expndtw-1\charscalex100 Miscellaneous bias configu
rations, Design operations, Transistor switching \par\pard\li2829\sb1\sl-226\slm
ult0\fi0\tx7919 \up0 \expndtw-2\charscalex100 networks, PNP transistors, Bias st
abilization.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs
\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb4\sl-230\slmult0 \
up0 \expndtw-4\charscalex100 UNIT 3: \par\pard\ql \li2829\ri2924\sb0\sl-226\slmu
lt0 \up0 \expndtw-4\charscalex100 Transistor at Low Frequencies:\ul0\nosupersub\
cf4\f5\fs20 BJT transistor modeling, CE Fixed bias \line \up0 \expndtw-3\charsc
alex100 configuration, Voltage divider bias, Emitter follower, CB configuration,
\line \up0 \expndtw-3\charscalex100 Collector feedback configuration, Analysis
of circuits r\ul0\sub\cf17\f18\fs19 e\ul0\nosupersub\cf4\f5\fs20 model; analysi
s of \line \up0 \expndtw-4\charscalex100 CE configuration using h- parameter mod
el; Relationship between h-\par\pard\li2829\sb13\sl-230\slmult0\fi0\tx7790 \up0
\expndtw-2\charscalex100 parameter model of CE,CC and CE configuration.\tab \up0
\expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\
sb222\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT 4: \par\pard\qj \li2829\

ri2674\sb0\sl-240\slmult0 \up0 \expndtw-2\charscalex100 Transistor Frequency R
esponse\ul0\nosupersub\cf4\f5\fs20 : General frequency considerations, low \
line \up0 \expndtw-2\charscalex100 frequency response, Miller effect capacit
ance, High frequency response, \par\pard\li2829\sb1\sl-214\slmult0\fi0\tx7850
\up0 \expndtw-2\charscalex100 multistage frequency effects.\tab \up0 \expndtw-2
\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb0\sl-230\
slmult0 \par\pard\ql\li2829\sb226\sl-230\slmult0 \up0 \expndtw-4\charscalex100 U
NIT 5: \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex103 (a)
General Amplifiers\ul0\nosupersub\cf4\f5\fs20 : Cascade connections, Cascod
e connections, \par\pard\li2829\sb20\sl-230\slmult0\fi0\tx7869 \up0 \expndtw-2\
charscalex100 Darlington connections.\tab \up0 \expndtw-2\charscalex100 \ul0\nos
upersub\cf3\f4\fs20 3 Hrs\par\pard\qj \li2829\ri2675\sb0\sl-240\slmult0\fi50 \up
0 \expndtw0\charscalex101 (b) Feedback Amplifier: \ul0\nosupersub\cf4\f5\fs20 Fe
edback concept, Feedback connections type, \line \up0 \expndtw0\charscalex102 Pr
actical feedback circuits. Design procedures for the feedback amplifiers. \par\p
ard\ql \li7862\sb1\sl-209\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\
cf3\f4\fs20 4 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb
4\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT 6: \par\pard\ql \li5834\sb0\
sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl
-184\slmult0 \par\pard\ql\li5834\sb96\sl-184\slmult0 \up0 \expndtw-2\charscalex1
00 \ul0\nosupersub\cf1\f2\fs16 7 \par\pard\sect\sectd\fs24\paperw11900\paperh168
40\pard\sb0\sl-240{\bkmkstart Pg4}{\bkmkend Pg4}\par\pard\qj \li2829\sb0\sl-230\
slmult0 \par\pard\qj\li2829\ri2647\sb100\sl-230\slmult0\fi0 \up0 \expndtw0\chars
calex102 \ul0\nosupersub\cf3\f4\fs20 Power Amplifiers\ul0\nosupersub\cf4\f5\fs2
0 : Definitions and amplifier types, series fed class A \line \up0 \expn
dtw0\charscalex103 amplifier, Transformer coupled Class A amplifiers, Clas
s B amplifier \line \up0 \expndtw-2\charscalex100 operations, Class B amplifie
r circuits, Amplifier distortions.
Designing of \par\pard\li2829\sb2\sl-230\s
lmult0\fi0\tx7852 \up0 \expndtw-2\charscalex100 Power amplifiers.\tab \up0 \expn
dtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb218\
sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 7: \par\pard\qj \li2829\ri2674
\sb19\sl-220\slmult0\fi0 \up0 \expndtw0\charscalex100 Oscillators: \ul0\nosupers
ub\cf4\f5\fs20 Oscillator operation,\ul0\nosupersub\cf3\f4\fs20 \ul0\nosupe
rsub\cf4\f5\fs20 Phase shift Oscillator, Wienbridge \line \up0 \expndtw1\charscalex100 Oscillator, Tuned Oscillator circuits, Crystal Oscillator. (BJT
Version Only) \par\pard\li2879\sb14\sl-230\slmult0\fi0\tx7850 \up0 \expndtw-2\ch
arscalex100 Simple design methods of Oscillators.\tab \up0 \expndtw-2\charscalex
100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \pa
r\pard\ql\li2829\sb218\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 8: \par
\pard\qj \li2829\ri2674\sb19\sl-220\slmult0\fi0 \up0 \expndtw0\charscalex101 FET
Amplifiers: \ul0\nosupersub\cf4\f5\fs20 FET small signal model, Biasing of FET,
Common drain \line \up0 \expndtw-2\charscalex100 common gate configurations, MO
SFETs, FET amplifier networks. \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3
\f4\fs20 6 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb2\s
l-230\slmult0 \up0 \expndtw-4\charscalex100 TEXT BOOK: \par\pard\ql \li2829\ri26
44\sb19\sl-220\slmult0\tx3189\tx3189 \up0 \expndtw-3\charscalex100 \ul0\nosupers
ub\cf4\f5\fs20 1. \tab \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf3\f4\fs20
\u8220?Electronic Devices and Circuit Theory\u8221?, \ul0\nosupersub\cf4\f5\fs20
Robert L. Boylestad and \line\tab \up0 \expndtw-3\charscalex100 Louis Nashelsky
, PHI/Pearson Eduication. 9\ul0\super\cf17\f18\fs19 TH\ul0\nosupersub\cf4\f5\f
s20 Edition. \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb2\sl
-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE
BOOKS: \par\pard\li2829\sb12\sl-230\slmult0\fi0\tx3189 \up0 \expndtw0\charscale
x100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw0\charscalex100 \ul0\nosupe
rsub\cf3\f4\fs20 \u8216?Integrated Electronics\u8217?, \ul0\nosupersub\cf4\f5\fs
20 Jacob Millman & Christos C. Halkias, Tata -\par\pard\li2829\sb0\sl-228\slmu
lt0\fi359 \up0 \expndtw0\charscalex100 McGraw Hill, 2\ul0\super\cf17\f18\fs19 nd
\ul0\nosupersub\cf4\f5\fs20 Edition, 2010\par\pard\li2829\sb1\sl-230\slmult0\fi
0\tx3189 \up0 \expndtw0\charscalex100 2.\tab \up0 \expndtw0\charscalex100 \ul0\n
osupersub\cf3\f4\fs20 \u8220?Electronic Devices and Circuits\u8221?,\ul0\nosuper

sub\cf4\f5\fs20 David A. Bell, PHI, 4\ul0\super\cf17\f18\fs19 th\ul0\nosupersu
b\cf4\f5\fs20 Edition,\par\pard\li2829\sb1\sl-230\slmult0\fi360 \up0 \expndtw0\
charscalex100 2004\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx3189 \up0 \expndtw0\
charscalex100 3.\tab \up0 \expndtw0\charscalex100 \u8220?\ul0\nosupersub\cf3\f4\
fs20 Analog
Electronics Circuits: A Simplified
Approach\u8221?\ul0\no
supersub\cf4\f5\fs20 , U.B.\par\pard\li2829\sb1\sl-230\slmult0\fi359 \up0 \expn
dtw0\charscalex100 Mahadevaswamy, Pearson/Saguine, 2007.\par\pard\li2829\sb0\sl230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult
0\par\pard\li2829\sb4\sl-230\slmult0\fi2378 \up0 \expndtw-2\charscalex100 \ul0\n
osupersub\cf3\f4\fs20 LOGIC DESIGN\par\pard\li2829\sb0\sl-230\slmult0\fi1545 \up
0 \expndtw-2\charscalex100 (Common to EC/TC/EE/IT/BM/ML)\par\pard\li2829\sb0\sl230\slmult0\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\t
x8760 \up0 \expndtw-2\charscalex100 Sub Code\tab \up0 \expndtw-2\charscalex100 :
\tab \up0 \expndtw-2\charscalex100 10ES33\tab \up0 \expndtw-2\charscalex100 IA M
arks\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 25\pa
r\pard\li2829\sb0\sl-228\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8759 \up0 \ex
pndtw-2\charscalex100 Hrs/ Week\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \ex
pndtw-2\charscalex100 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \
expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 03\par\pard\li2829\s
b1\sl-230\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8659 \up0 \expndtw-2\charsca
lex100 Total Hrs.\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charsc
alex100 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\char
scalex100 :\tab \up0 \expndtw-2\charscalex100 100\par\pard\ql \li2829\sb0\sl-230
\slmult0 \par\pard\ql\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb0\sl-230\s
lmult0 \par\pard\ql\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb45\sl-230\sl
mult0 \up0 \expndtw-4\charscalex100 UNIT 1: \par\pard\qj \li2829\ri2674\sb0\sl-2
30\slmult0 \up0 \expndtw-2\charscalex100 Principles of combinational logic-1:
\ul0\nosupersub\cf4\f5\fs20 Definition of combinational logic, \line \up0 \
expndtw0\charscalex100 Canonical forms, Generation of switching equations
from truth tables, \line \up0 \expndtw-2\charscalex100 Karnaugh maps-3, 4 and
5 variables, Incompletely specified functions (Don\u8217?t \par\pard\li2829\sb1\
sl-226\slmult0\fi0\tx8176 \up0 \expndtw-2\charscalex100 Care terms), Simplifying
Max term equations.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs
20 6 Hrs\par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb8\sl-184\s
lmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf1\f2\fs16 8 \par\pard\sec
t\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg5}{\bkmkend Pg
5}\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb0\sl-230\slmult0
\par\pard\ql\li2829\sb90\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosu
persub\cf3\f4\fs20 UNIT 2: \par\pard\qj \li2829\ri2674\sb19\sl-220\slmult0 \up0
\expndtw0\charscalex100 Principles of combinational Logic-2: \ul0\nosupersub\
cf4\f5\fs20 Quine-McCluskey minimization \line \up0 \expndtw0\charscalex100 te
chnique- Quine-McCluskey using don\u8217?t care terms, Reduced Prime \par
\pard\li2829\sb12\sl-230\slmult0\fi0\tx8059 \up0 \expndtw-1\charscalex100 Implic
ant Tables, Map entered variables.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupe
rsub\cf3\f4\fs20 7 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb6\sl
-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 UNIT 3:\par\pard\li2829\sb0\sl-22
6\slmult0\fi50\tx7048 \up0 \expndtw-1\charscalex100 Analysis and design of c
ombinational logic\tab \up0 \expndtw-1\charscalex100 - I: \ul0\nosupersub\cf4\
f5\fs20 General approach,\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx8068 \up0 \
expndtw-1\charscalex100 Decoders-BCD decoders, Encoders.\tab \up0 \expndtw-1\cha
rscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\li2829\sb5\sl-230\slmult0\
fi0 \up0 \expndtw-1\charscalex100 UNIT 4:\par\pard\li2829\sb1\sl-221\slmult0\fi0
\up0 \expndtw0\charscalex100 Analysis and design of combinational logic II:\ul0\nosupersub\cf4\f5\fs20 Digital multiplexers-\par\pard\li2829\sb3\sl
-230\slmult0\fi0 \up0 \expndtw0\charscalex100 Using multiplexers as Boolean func
tion generators. Adders and subtractors-\par\pard\li2829\sb0\sl-230\slmult0\fi0\
tx8500 \up0 \expndtw-1\charscalex100 Cascading full adders, Look ahead carr
y, Binary comparators.\tab \up0 \expndtw-1\charscalex100 Design\par\pard\li282
9\sb1\sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 methods of building block
s of combinational logics.\par\pard\li2829\sb5\sl-230\slmult0\fi5352 \up0 \expnd

tw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\li2829\sb228\sl-230
\slmult0\fi0 \up0 \expndtw0\charscalex100 UNIT 5:\par\pard\li2829\sb0\sl-226\slm
ult0\fi0\tx4670\tx4898 \up0 \expndtw0\charscalex100 Sequential Circuits\tab \up
0 \expndtw0\charscalex100 -\tab \up0 \expndtw0\charscalex100 1:\ul0\nosupersub\c
f4\f5\fs20 Basic Bistable Element, Latches, SR Latch,\par\pard\li2829\sb4
1\sl-229\slmult0\fi0\tx7180\tx7696 \dn4 \expndtw0\charscalex100 Application of S
R Latch, A Switch Debouncer, The\tab \up4 \expndtw0\charscalex100 \ul0\nosupersu
b\cf18\f19\fs21 S R\tab \dn4 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs2
0 Latch, The gated\par\pard\qj \li2829\ri2674\sb31\sl-230\slmult0 \up0 \expndtw2\charscalex100 SR Latch, The gated D Latch, The Master-Slave Flip-Flops (PulseTriggered \line \up0 \expndtw-3\charscalex100 Flip-Flops): The Master-Slave S
R Flip-Flops, The Master-Slave JK Flip-\line \up0 \expndtw-3\charscalex100
Flop, Edge Triggered Flip-Flop: The Positive Edge-Triggered D Flip-Flop, \par\pa
rd\li2829\sb14\sl-230\slmult0\fi0\tx8071 \up0 \expndtw-2\charscalex100 NegativeEdge Triggered D Flip-Flop.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf
3\f4\fs20 7 Hrs\par\pard\ql \li2879\sb0\sl-230\slmult0 \par\pard\ql\li2879\sb216
\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT 6: \par\pard\ql \li2829\sb10\
sl-230\slmult0\tx9001 \up0 \expndtw-2\charscalex100 Sequential Circuits - 2:\
ul0\nosupersub\cf4\f5\fs20 Characteristic Equations, Registers, Counters \t
ab \up0 \expndtw-2\charscalex100 -\par\pard\qj \li2829\ri2674\sb0\sl-230\slmult0
\up0 \expndtw0\charscalex100 Binary Ripple Counters, Synchronous Binary counter
s, Counters based on \line \up0 \expndtw-2\charscalex100 Shift Registers, Design
of a Synchronous counters, Design of a Synchronous \line \up0 \expndtw-3\charsc
alex100 Mod-6 Counter using clocked JK Flip-Flops Design of a Synchronous Mod-6
\par\pard\li2829\sb3\sl-230\slmult0\fi0\tx8044 \up0 \expndtw-2\charscalex100 Cou
nter using clocked D, T, or SR Flip-Flops\tab \up0 \expndtw-2\charscalex100 \ul0
\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\q
l\li2829\sb217\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT 7: \par\pard\ql
\li2829\sb10\sl-230\slmult0\tx4555 \up0 \expndtw-3\charscalex100 Sequential De
sign \tab \up0 \expndtw0\charscalex100 - I: \ul0\nosupersub\cf4\f5\fs20 Introd
uction, Mealy and Moore Models, State \par\pard\ql \li2829\sb1\sl-217\slmul
t0 \up0 \expndtw-4\charscalex100 Machine Notation, Synchronous Sequential Circui
t Analysis and Design. \par\pard\ql \li8032\sb13\sl-230\slmult0 \up0 \expndtw-4\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb230\sl-23
0\slmult0 \up0 \expndtw-4\charscalex100 UNIT 8: \par\pard\ql \li2829\sb1\sl-217\
slmult0 \up0 \expndtw-2\charscalex100 Sequential Design - II: \ul0\nosupersub\cf
4\f5\fs20 Construction of state Diagrams, Counter Design. \par\pard\ql \li7869
Hrs \par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-4\charscalex100 TEX
T BOOKS: \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\
slmult0 \par\pard\ql\li5834\sb20\sl-184\slmult0 \up0 \expndtw-2\charscalex100 \u
l0\nosupersub\cf1\f2\fs16 9
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}}\par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart P
g6}{\bkmkend Pg6}\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb101\sl-23
0\slmult0\fi0\tx3189 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.
\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Digital Lo
gic Applications and Design\u8221?\ul0\nosupersub\cf4\f5\fs20 , John M Yar
brough,\par\pard\li2829\sb1\sl-230\slmult0\fi360 \up0 \expndtw0\charscalex100 Th
omson Learning, 2001.\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx3189 \up0 \expndt
w0\charscalex100 2.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20
\u8220?Digital Principles and Design \u8220?,\ul0\nosupersub\cf4\f5\fs20 Donal
d D Givone, Tata McGraw Hill\par\pard\li2829\sb0\sl-230\slmult0\fi360 \up0 \expn
dtw0\charscalex100 Edition, 2002.\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li
2829\sb4\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\
fs20 REFERENCE BOOKS:\par\pard\li2829\sb0\sl-225\slmult0\fi0\tx3189 \up0 \expndt
w0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw0\charscalex100
\ul0\nosupersub\cf3\f4\fs20 \u8220?Fundamentals of logic design\u8221?,\ul0\
nosupersub\cf4\f5\fs20 Charles H Roth, Jr; Thomson\par\pard\li2829\sb2\sl230\slmult0\fi360 \up0 \expndtw0\charscalex100 Learning, 2004.\par\pard\li2829\s
b0\sl-230\slmult0\fi0\tx3189 \up0 \expndtw0\charscalex100 2.\tab \up0 \expndtw0\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Logic and computer design F
undamentals\u8221?,\ul0\nosupersub\cf4\f5\fs20 Mono and Kim,\par\pard\li2829
\sb0\sl-230\slmult0\fi360 \up0 \expndtw0\charscalex100 Pearson, Second edition,
2001.\par\pard\li2829\sb0\sl-228\slmult0\fi0\tx3189 \up0 \expndtw0\charscalex100
3.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Logic De
sign\u8221?, \ul0\nosupersub\cf4\f5\fs20 Sudhakar Samuel, Pearson/Saguine, 200
7\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard
\li2829\sb7\sl-230\slmult0\fi2054 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\
cf3\f4\fs20 NETWORK ANALYSIS\par\pard\li2829\sb1\sl-230\slmult0\fi1545 \up0 \exp
ndtw-2\charscalex100 (Common to EC/TC/EE/IT/BM/ML)\par\pard\li2829\sb228\sl-230\
slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8760 \up0 \expndtw-2\charscalex100 Sub
Code\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 10ES
34\tab \up0 \expndtw-2\charscalex100 IA Marks\tab \up0 \expndtw-2\charscalex100
:\tab \up0 \expndtw-2\charscalex100 25\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx
4264\tx4737\tx6537\tx7977\tx8759 \up0 \expndtw-2\charscalex100 Hrs/ Week\tab \up
0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 04\tab \up0 \expn
dtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \exp
ndtw-2\charscalex100 03\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx4264\tx4737\tx6
537\tx7977\tx8659 \up0 \expndtw-2\charscalex100 Total Hrs.\tab \up0 \expndtw-2\c
harscalex100 :\tab \up0 \expndtw-2\charscalex100 52\tab \up0 \expndtw-2\charscal
ex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charsca
lex100 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb0\sl-230
lmult0 \par\pard\ql\li2829\sb44\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNI
T 1: \par\pard\qj \li2829\ri2674\sb0\sl-230\slmult0\fi0 \up0 \expndtw-1\charscal
ex100 Basic Concepts\ul0\nosupersub\cf4\f5\fs20 : Practical sources, Sou
rce transformations, Network \line \up0 \expndtw0\charscalex100 reduction us
ing Star - Delta transformation, Loop and node analysis With \line \up0 \expnd
tw0\charscalex100 linearly dependent and independent sources for DC and
AC networks, \par\pard\li2829\sb1\sl-227\slmult0\fi0\tx8260 \up0 \expndtw-2\cha
rscalex100 Concepts of super node and super mesh.\tab \up0 \expndtw-2\charscalex
100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb0\sl-221\slmult0 \up
0 \expndtw-4\charscalex100 UNIT 2: \par\pard\qj \li2829\ri2675\sb0\sl-230\slmult
0 \up0 \expndtw-2\charscalex100 Network Topology: \ul0\nosupersub\cf4\f5\fs20
Graph of a network, Concept of tree and co-tree, \line \up0 \expndtw0\
charscalex100 incidence matrix, tie-set, tie-set and cut-set schedules, F
ormulation of \line \up0 \expndtw0\charscalex100 equilibrium equations in ma

trix form, Solution of resistive networks,\par\pard\sect\sectd\sbknone\cols
2\colno1\colw5309\colsr160\colno2\colw6291\colsr160\ql \li2829\sb10\sl-230\slmul
t0 \up0 \expndtw-5\charscalex100 Principle of duality\ul0\nosupersub\cf3\f4\fs
20 .\par\pard\ql \li2829\sb5\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 3
:\par\pard\ql \li2829\sb1\sl-221\slmult0 \up0 \expndtw0\charscalex103 Network T
heorems - 1:\par\pard\ql \li2829\sb2\sl-230\slmult0 \up0 \expndtw-2\charscalex
100 \ul0\nosupersub\cf4\f5\fs20 theorems.\par\pard\ql \li2829\sb0\sl-230\slmult0
\par\pard\ql \li2829\sb6\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosu
persub\cf3\f4\fs20 UNIT 4:\par\pard\ql \li2829\sb0\sl-230\slmult0 \up0 \expndtw2\charscalex100 Network Theorems - II:\par\pard\column \ql \li2826\sb10\sl-230\s
lmult0 \up0 \expndtw-2\charscalex100 7 Hrs\par\pard\ql \li20\sb228\sl-230\slmult
0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Superposition, Recip
rocity and Millman\u8217?s\par\pard\ql \li2766\sb0\sl-230\slmult0 \up0 \expndt
w-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\sect\sectd\sbknone
\ql \li2829\sb1\sl-203\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4
\f5\fs20 Thevinin\u8217?s and Norton\u8217?s theorems; Maximum Power trans
fer theorem \par\pard\ql \li8181\sb15\sl-230\slmult0 \up0 \expndtw-4\charscalex
100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li5834\sb0\sl-184\slmult0 \p
ar\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par
\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb132\sl-184\slmult0 \up0
\expndtw-3\charscalex100 \ul0\nosupersub\cf1\f2\fs16 10 \par\pard\sect\sectd\fs
24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg7}{\bkmkend Pg7}\par\par
d\qj \li2829\sb0\sl-220\slmult0 \par\pard\qj\li2829\ri3201\sb119\sl-220\slmult0
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT 5: Resonant Circu
its: \ul0\nosupersub\cf4\f5\fs20 Series and parallel resonance, frequency\up0 \e
xpndtw-2\charscalex100 response of series and Parallel circuits, Q -factor, Band
width. \par\pard\ql \li2829\sb12\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \u
l0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \
expndtw-2\charscalex100 UNIT 6: \par\pard\qj \li2829\ri2674\sb0\sl-230\slmult0 \
up0 \expndtw0\charscalex102 Transient behavior and initial conditions\ul0\nosupe
rsub\cf4\f5\fs20 :
Behavior of circuit elements \line \up0 \expndtw0\charscal
ex100 under switching condition and their Representation, evaluation of initial
and \line \up0 \expndtw-2\charscalex100 final conditions in RL, RC and RLC circu
its for AC and DC excitations. \par\pard\ql \li8231\sb0\sl-230\slmult0 \up0 \exp
ndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb23
sl-217\slmult0 \up0 \expndtw-3\charscalex100 Laplace Transformation & Applica
tions\ul0\nosupersub\cf4\f5\fs20 : Solution of
networks, step, \par\pard
\li2829\sb14\sl-230\slmult0\fi0\tx8121 \up0 \expndtw-2\charscalex100 ramp and im
pulse responses, waveform Synthesis.\tab \up0 \expndtw-2\charscalex100 \ul0\nos
upersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb229\sl-230\slmult0 \up0 \expndtw
-4\charscalex100 UNIT 8: \par\pard\qj \li2829\ri2674\sb0\sl-240\slmult0 \up0 \ex
pndtw-2\charscalex100 Two port network parameters:\ul0\nosupersub\cf4\f5\fs20
Definition of z, y, h and transmission \line \up0 \expndtw-2\charscalex
100 parameters, modeling with these parameters, relationship between parameters
\par\pard\li2829\sb1\sl-207\slmult0\fi0\tx8131 \up0 \expndtw-1\charscalex100 set
s.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\
li2829\sb0\sl-230\slmult0\par\pard\li2829\sb9\sl-230\slmult0\fi0 \up0 \expndtw-1
\charscalex100 TEXT BOOKS:\par\pard\li2829\sb0\sl-226\slmult0\fi0\tx3189 \up0 \e
xpndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charsc
alex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Network Analysis\u8221?, \ul0\nosuper
sub\cf4\f5\fs20 M. E. Van Valkenburg, PHI / Pearson Education,\par\pard\li2829
\sb1\sl-228\slmult0\fi359 \up0 \expndtw-1\charscalex100 3\ul0\super\cf17\f18\fs1
9 rd\ul0\nosupersub\cf4\f5\fs20 Edition. Reprint 2002.\par\pard\li2829\sb1\sl-2
30\slmult0\fi0\tx3189 \up0 \expndtw-1\charscalex100 2.\tab \up0 \expndtw-1\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Networks and systems\u8221?, \ul0\no
supersub\cf4\f5\fs20 Roy Choudhury, 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub
\cf4\f5\fs20 edition, 2006 re-print,\par\pard\li2829\sb1\sl-230\slmult0\fi360
\up0 \expndtw-1\charscalex100 New Age International Publications.\par\pard\ql \l
i2829\sb219\sl-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\

fs20 REFERENCE BOOKS\ul0\nosupersub\cf4\f5\fs20 : \par\pard\ql \li3189\ri2830\sb
19\sl-220\slmult0\tx3492 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs
20 1. \u8220?Engineering Circuit Analysis\u8221?,\ul0\nosupersub\cf4\f5\fs20 Ha
yt, Kemmerly and DurbinTMH \line\tab \up0 \expndtw-4\charscalex100 7\ul0\super\c
f17\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 Edition, 2010 \par\pard\ql \li3189\s
b12\sl-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 2.
\u8220?Basic Engineering Circuit Analysis\u8221?\ul0\nosupersub\cf4\f5\fs20 , J.
David Irwin / \par\pard\ql \li3491\sb1\sl-217\slmult0 \up0 \expndtw-4\charscale
x100 R. Mark Nelms, John Wiley, 8\ul0\super\cf17\f18\fs19 th\ul0\nosupersub\cf4\
f5\fs20 ed, 2006. \par\pard\ql \li3189\ri3469\sb21\sl-220\slmult0\tx3532 \up0 \
expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 3.\u8220? Fundamentals of El
ectric Circuits\u8221?\ul0\nosupersub\cf4\f5\fs20 , Charles K Alexander \line\ta
b \up0 \expndtw-4\charscalex100 and Mathew N O Sadiku, Tata McGraw-Hill, 3 ed, 2
009. \par\pard\ql \li4245\sb0\sl-230\slmult0 \par\pard\ql\li4245\sb0\sl-230\slmu
lt0 \par\pard\ql\li4245\sb0\sl-230\slmult0 \par\pard\ql\li4245\sb0\sl-230\slmult
0 \par\pard\ql\li4245\sb12\sl-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nos
upersub\cf3\f4\fs20 ELECTRONIC INSTRUMENTATION \par\pard\ql \li4535\sb1\sl-217\s
lmult0 \up0 \expndtw-4\charscalex100 (Common to EC/TC/IT/BM/ML) \par\pard\li2829
\sb0\sl-230\slmult0\par\pard\li2829\sb18\sl-230\slmult0\fi0\tx4264\tx4737\tx6537
\tx7977\tx8760 \up0 \expndtw-2\charscalex100 Sub Code\tab \up0 \expndtw-2\charsc
alex100 :\tab \up0 \expndtw-2\charscalex100 10IT35\tab \up0 \expndtw-2\charscale
x100 IA Marks\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex
100 25\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8759
\up0 \expndtw-2\charscalex100 Hrs/ Week\tab \up0 \expndtw-2\charscalex100 :\tab
\up0 \expndtw-2\charscalex100 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\t
ab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 03\par\pard
\li2829\sb1\sl-230\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8659 \up0 \expndtw2\charscalex100 Total Hrs.\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw
-2\charscalex100 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expnd
tw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 100\par\pard\ql \li5834\s
b0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0
\sl-184\slmult0 \par\pard\ql\li5834\sb120\sl-184\slmult0 \up0 \expndtw-3\charsca
lex100 \ul0\nosupersub\cf1\f2\fs16 11 \par\pard\sect\sectd\fs24\paperw11900\pape
rh16840\pard\sb0\sl-240{\bkmkstart Pg8}{\bkmkend Pg8}\par\pard\ql \li2829\sb0\sl
-230\slmult0 \par\pard\ql\li2829\sb100\sl-230\slmult0 \up0 \expndtw0\charscalex1
01 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1: \par\pard\ql \li2829\sb1\sl-217\slmult0
\up0 \expndtw-2\charscalex100 Introduction \par\pard\qj \li2829\ri2678\sb21\sl220\slmult0 \up0 \expndtw0\charscalex100 (a) Measurement Errors:\ul0\nosupersub\
cf4\f5\fs20 Gross errors and systematic errors, Absolute and \up0 \expndtw-1\ch
arscalex100 relative errors, Accuracy, Precision, Resolution and Significant fig
ures. \par\pard\qj \li2829\ri2674\sb12\sl-230\slmult0 \up0 \expndtw0\charscalex1
02 \ul0\nosupersub\cf3\f4\fs20 (b)\ul0\nosupersub\cf4\f5\fs20 \ul0\nosupersub\c
f3\f4\fs20 Voltmeters and Multimeters\ul0\nosupersub\cf4\f5\fs20 Introducti
on, Multirange voltmeter, \up0 \expndtw0\charscalex100 Extending voltmeter ran
ges, Loading, AC voltmeter using Rectifiers - Half \up0 \expndtw-4\charscalex100
wave and full wave, Peak responding and True RMS voltmeters. \par\pard\ql \li82
31\sb1\sl-217\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20
3 + 4 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb3\sl-230
\slmult0 \up0 \expndtw0\charscalex100 UNIT - 2: \par\pard\ql \li2829\sb10\sl-230
\slmult0 \up0 \expndtw-4\charscalex100 Digital Instruments \par\pard\qj \li2829\
ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs
20 Digital Voltmeters - Introduction, DVM\u8217?s based on
V - T, V - F
and \line \up0 \expndtw-2\charscalex100 Successive approximation principles,
Resolution and sensitivity, General \line \up0 \expndtw-2\charscalex100 spec
ifications, Digital Multi-meters, \ul0\nosupersub\cf3\f4\fs20 \ul0\nosupersub
\cf4\f5\fs20
Digital\ul0\nosupersub\cf3\f4\fs20 \ul0\nosupersub\cf4\f5\fs20
frequency meters, Digital \par\pard\li2829\sb2\sl-230\slmult0\fi0\tx8119 \up0
\expndtw-2\charscalex100 measurement of time.\tab \up0 \expndtw-2\charscalex100
\ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\p
ard\ql\li2829\sb218\sl-230\slmult0 \up0 \expndtw0\charscalex100 UNIT - 3: \par\p

ard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-4\charscalex100 Oscilloscopes \
par\pard\qj \li2829\ri2675\sb0\sl-240\slmult0 \up0 \expndtw-1\charscalex100 \ul0
\nosupersub\cf4\f5\fs20 Introduction, Basic principles, CRT features, Block diag
ram and working of \line \up0 \expndtw-2\charscalex100 each block, Typical CR
T connections, Dual beam and dual trace CROs, \par\pard\li2829\sb1\sl-206\
slmult0\fi0\tx8174 \up0 \expndtw-2\charscalex100 Electronic switch.\tab \up0 \ex
pndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb5\
sl-230\slmult0 \up0 \expndtw0\charscalex100 UNIT - 4: \par\pard\ql \li2829\sb1\s
l-217\slmult0 \up0 \expndtw-4\charscalex100 Special Oscilloscopes \par\pard\ql \
li2829\sb13\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\
fs20 Delayed time-base oscilloscopes, Analog
storage, Sampling and Digi
tal \par\pard\li2829\sb2\sl-230\slmult0\fi0\tx8025 \up0 \expndtw-2\charscalex100
storage oscilloscopes.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4
\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb0\sl-23
0\slmult0 \par\pard\ql\li2829\sb218\sl-230\slmult0 \up0 \expndtw0\charscalex100
UNIT - 5: \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-4\charscalex100
Signal Generators \par\pard\qj \li2829\ri2675\sb0\sl-230\slmult0 \up0 \expndtw1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Introduction, Fixed and variable A
F oscillator, Standard signal generator, \line \up0 \expndtw-1\charscalex100 L
aboratory type signal generator, AF sine and Square wave generator, \li
ne \up0 \expndtw-2\charscalex100 Function generator, Square and Pulse generator,
Sweep frequency generator, \par\pard\li2829\sb0\sl-230\slmult0\fi0\tx8174 \up0
\expndtw-2\charscalex100 Frequency synthesizer.\tab \up0 \expndtw-2\charscalex10
0 \expndtw0\charscalex100 UNIT - 6: \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0
\expndtw-4\charscalex100 Measurement of resistance, inductance and capacitance
\par\pard\qj \li2829\ri2989\sb21\sl-220\slmult0 \up0 \expndtw-4\charscalex100 \u
l0\nosupersub\cf4\f5\fs20 Whetstone\u8217?s bridge, Kelvin Bridge; AC bridges, C
apacitance Comparison \line \up0 \expndtw-4\charscalex100 Bridge, Maxwell\u8217?
s bridge, Wein\u8217?s bridge, Wagner\u8217?s earth connection \par\pard\ql \li8
131\sb12\sl-230\slmult0 \up0 \expndtw-4\charscalex100 5\ul0\nosupersub\cf3\f4\fs
20 Hrs \par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw0\charscalex100 U
NIT - 7: \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-4\charscalex100 T
ransducers - I \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb47\
sl-184\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf1\f2\fs16 12 \par
\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg9}{\b
kmkend Pg9}\par\pard\qj \li2829\sb0\sl-230\slmult0 \par\pard\qj\li2829\ri3399\sb
100\sl-230\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Int
roduction, Electrical transducers, Selecting a transducer, Resistive \line \up0
\expndtw-2\charscalex100 transducer, Resistive position transducer, Strain gauge
s, Resistance \line \up0 \expndtw-2\charscalex100 thermometer, Thermistor, Induc
tive transducer, Differential output \par\pard\li2829\sb2\sl-230\slmult0\fi0\tx8
114 \up0 \expndtw-2\charscalex100 transducers and LVDT.\tab \up0 \expndtw-2\char
scalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-228\slmul
t0 \up0 \expndtw0\charscalex101 UNIT - 8: \par\pard\ql \li2829\sb0\sl-219\slmult
0 \up0 \expndtw-2\charscalex100 Miscellaneous Topics \par\pard\qj \li2829\ri2675
\sb12\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex100 (a)\ul0\nosupersub\cf4\f5\
fs20 \ul0\nosupersub\cf3\f4\fs20 Transducers - II\ul0\nosupersub\cf4\f5\fs20
-Piezoelectric transducer, Photoelectric transducer, \up0 \expndtw0\charsc
alex103 Photovoltaic transducer, Semiconductor photo devices, Temperat
ure \up0 \expndtw-2\charscalex100 transducers-RTD, Thermocouple . \par\pard\qj \
li2829\ri2674\sb0\sl-240\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\c
f3\f4\fs20 (b) Display devices:\ul0\nosupersub\cf4\f5\fs20 Digital display syst
em, classification of display, Display \up0 \expndtw-2\charscalex100 devices, LE
Ds, LCD displays. \par\pard\ql \li2829\sb1\sl-193\slmult0 \up0 \expndtw-2\charsc
alex100 \ul0\nosupersub\cf3\f4\fs20 (c)\ul0\nosupersub\cf4\f5\fs20 Bolometer an
d RF power measurement using Bolometer \par\pard\ql \li2829\sb17\sl-230\slmult0
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 (d)\ul0\nosupersub\cf4
\f5\fs20 Introduction to Signal conditioning. \par\pard\li2829\sb2\sl-230\slmul
t0\fi0\tx8191 \up0 \expndtw-2\charscalex100 (e) Introduction to LabView.\tab \up

0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 10 Hrs\par\pard\li2829\sb
0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb3\sl-230\s
lmult0\fi0 \up0 \expndtw-1\charscalex100 TEXT BOOKS:\par\pard\li2829\sb0\sl-226\
slmult0\fi0\tx3189 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\
tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Electronic
Instrumentation\u8221?, \ul0\nosupersub\cf4\f5\fs20 H. S. Kalsi, TMH, 3\ul0\su
per\cf17\f18\fs19 rd\ul0\nosupersub\cf4\f5\fs20
2010\par\pard\li2829\sb1\sl-2
30\slmult0\fi0\tx3189 \up0 \expndtw-1\charscalex100 2.\tab \up0 \expndtw-1\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Electronic Instrumentation and Measu
rements\u8221?, \ul0\nosupersub\cf4\f5\fs20 David A Bell, PHI\par\pard\li2829\sb
1\sl-230\slmult0\fi360 \up0 \expndtw-1\charscalex100 / Pearson Education, 2006.\
par\pard\li2829\sb5\sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 \ul0\nosupe
rsub\cf3\f4\fs20 REFERENCE BOOKS:\par\pard\li2829\sb1\sl-221\slmult0\fi0\tx3189
\up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1
\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Principles of measurement syst
ems\u8221?, \ul0\nosupersub\cf4\f5\fs20 John P. Beately, 3\ul0\super\cf17\f18\f
s19 rd\ul0\nosupersub\cf4\f5\fs20 Edition,\par\pard\li2829\sb2\sl-230\slmult0\f
i360 \up0 \expndtw-1\charscalex100 Pearson Education, 2000\par\pard\li2829\sb6\s
l-230\slmult0\fi0\tx3239 \up0 \expndtw-1\charscalex100 2.\tab \up0 \expndtw-1\ch
arscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Modern electronic instrumentati
on and measuring techniques\u8221?,\par\pard\li2829\sb0\sl-225\slmult0\fi360
\up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Cooper D & A D Helfric
k, PHI, 1998.\par\pard\li2829\sb2\sl-230\slmult0\fi0\tx3189 \up0 \expndtw-1\char
scalex100 3.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Elect
ronics & electrical measurements, \ul0\nosupersub\cf4\f5\fs20 A K Sawhney, , Dha
npat Rai\par\pard\li2829\sb0\sl-230\slmult0\fi360 \up0 \expndtw-1\charscalex100
& sons, 9\ul0\super\cf17\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 edition.\par\pa
rd\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\
sb95\sl-230\slmult0\fi2354 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\
fs20 FIELD THEORY\par\pard\li2829\sb0\sl-230\slmult0\fi1867 \up0 \expndtw-2\char
scalex100 (Common to EC/TC/ML/EE)\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li
2829\sb1\sl-230\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8760 \up0 \expndtw-2\c
harscalex100 Sub Code\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\ch
arscalex100 10ES36\tab \up0 \expndtw-2\charscalex100 IA Marks\tab \up0 \expndtw2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 25\par\pard\li2829\sb0\sl-23
0\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8759 \up0 \expndtw-2\charscalex100 H
rs/ Week\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 0
4\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100
:\tab \up0 \expndtw-2\charscalex100 03\par\pard\li2829\sb1\sl-230\slmult0\fi0\t
x4264\tx4737\tx6537\tx7977\tx8659 \up0 \expndtw-2\charscalex100 Total Hrs.\tab \
up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 52\tab \up0 \ex
pndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \e
xpndtw-2\charscalex100 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\l
i2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb31\sl-230\slmult0 \up0 \expndtw-4
\charscalex100 UNIT 1: \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-4\c
harscalex100 a. Coulomb\u8217?s Law and electric field intensity\ul0\nosupersub\
cf4\f5\fs20 : Experimental law of \par\pard\ql \li2829\sb13\sl-230\slmult0 \up0
\expndtw-3\charscalex100 Coulomb, Electric field intensity, Field due to continu
ous volume charge \par\pard\li2829\sb10\sl-230\slmult0\fi0\tx7454 \up0 \expndtw2\charscalex100 distribution, Field of a line charge.\tab \up0 \expndtw-2\charsc
alex100 \ul0\nosupersub\cf3\f4\fs20 3 Hrs\par\pard\qj \li2829\ri2675\sb202\sl-24
0\slmult0\fi0 \up0 \expndtw-1\charscalex100 b\ul0\nosupersub\cf4\f5\fs20 . \ul0\
nosupersub\cf3\f4\fs20 Electric flux density, Gauss\u8217? law and divergence:\u
l0\nosupersub\cf4\f5\fs20 Electric flux density, \line \up0 \expndtw-3\charscal
ex100 Gauss\u8217? law, Divergence, Maxwell\u8217?s First equation(Electros
tatics),
vector \par\pard\ql \li5834\sb87\sl-184\slmult0 \up0 \expndtw-3\char
scalex100 \ul0\nosupersub\cf1\f2\fs16 13 \par\pard\sect\sectd\fs24\paperw11900\p
aperh16840\pard\sb0\sl-240{\bkmkstart Pg10}{\bkmkend Pg10}\par\pard\li2829\sb0\s
l-230\slmult0\par\pard\li2829\sb183\sl-230\slmult0\fi0\tx3962\tx7435 \up0 \expnd
tw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 operator\tab \up0 \expndtw-2\char

scalex100 and divergence theorem.\tab \up0 \expndtw-2\charscalex100 3 \ul0\nosup
ersub\cf3\f4\fs20 Hrs\par\pard\ql \li2829\sb227\sl-230\slmult0 \up0 \expndtw-2\c
harscalex100 UNIT 2: \par\pard\qj \li2829\ri2675\sb0\sl-233\slmult0 \up0 \expndt
w0\charscalex100 a\ul0\nosupersub\cf4\f5\fs20 . \ul0\nosupersub\cf3\f4\fs20 En
ergy and potential :\ul0\nosupersub\cf4\f5\fs20 Energy expended in moving a poi
nt charge in an \up0 \expndtw0\charscalex103 electric field, The line integr
al, Definition of potential difference and \up0 \expndtw0\charscalex100 Pot
ential, The potential field of a point charge and system of charges,
\up0 \expndtw-2\charscalex100 Potential gradient , Energy density in an electros
tatic field. \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 4 Hrs \pa
r\pard\qj \li2829\ri2675\sb218\sl-230\slmult0 \up0 \expndtw0\charscalex103 b. Co
nductors, dielectrics and capacitance:\ul0\nosupersub\cf4\f5\fs20 Current and c
urrent density, \line \up0 \expndtw0\charscalex105 Continuity of current, met
allic conductors, Conductor properties and \line \up0 \expndtw-1\charscalex1
00 boundary conditions, boundary conditions for perfect Dielectrics, capacitance
\par\pard\li2829\sb2\sl-230\slmult0\fi0\tx7924 \up0 \expndtw-2\charscalex100 an
d examples.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 4 Hrs\
par\pard\ql \li2829\sb218\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 3: \
par\pard\qj \li2829\ri2675\sb19\sl-220\slmult0\fi0 \up0 \expndtw-2\charscalex100
Poisson\u8217?s and Laplace\u8217?s equations: \ul0\nosupersub\cf4\f5\fs20 Deri
vations of\ul0\nosupersub\cf3\f4\fs20 \ul0\nosupersub\cf4\f5\fs20 Poisson\u8217
?s and Laplace\u8217?s \line \up0 \expndtw-2\charscalex100 Equations, Uniqueness
theorem, Examples of the solutions of Laplace\u8217?s and \par\pard\li2829\sb14
\sl-230\slmult0\fi0\tx7864 \up0 \expndtw-2\charscalex100 Poisson\u8217?s equatio
ns.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard
\ql \li2829\sb228\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT 4: \par\pard
\qj \li2829\ri2675\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex100 The steady ma
gnetic field:\ul0\nosupersub\cf4\f5\fs20 Biot-Savart law, Ampere\u8217?s circui
tal law, Curl, \line \up0 \expndtw-1\charscalex100 Stokes\u8217? theorem, magnet
ic flux and flux density, scalar and Vector magnetic \par\pard\li2829\sb1\sl-208
\slmult0\fi0\tx7859 \up0 \expndtw-2\charscalex100 potentials.\tab \up0 \expndtw2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230
lmult0 \up0 \expndtw-4\charscalex100 UNIT 5: \par\pard\qj \li2829\ri2677\sb0\sl240\slmult0 \up0 \expndtw-2\charscalex100 a. Magnetic forces:\ul0\nosupersub\c
f4\f5\fs20 Force on a moving charge and differential current \line \up0
\expndtw-2\charscalex100 element, Force between differential current elements,
Force and torque on a \par\pard\li2829\sb1\sl-208\slmult0\fi0\tx8054 \up0 \expnd
tw-2\charscalex100 closed circuit.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupe
rsub\cf3\f4\fs20 4 Hrs\par\pard\qj \li2829\ri2676\sb222\sl-230\slmult0 \up0 \exp
ndtw0\charscalex100 b.\ul0\nosupersub\cf4\f5\fs20 \ul0\nosupersub\cf3\f4\fs20 M
agnetic\ul0\nosupersub\cf4\f5\fs20 \ul0\nosupersub\cf3\f4\fs20 materials and in
ductance: \ul0\nosupersub\cf4\f5\fs20 Magnetization and permeability, \up0 \expn
dtw-2\charscalex100 Magnetic boundary conditions, Magnetic circuit, Potential en
ergy and forces \up0 \expndtw-4\charscalex100 on magnetic materials, Inductance
and Mutual Inductance. \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20
4 Hrs \par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-4\charscalex100 U
NIT 6: \par\pard\ql \li2829\sb10\sl-230\slmult0\tx8726 \up0 \expndtw0\charscalex
100 Time varying fields and Maxwell\u8217?s equations\ul0\nosupersub\c
f4\f5\fs20 : Faraday\u8217?s \tab \up0 \expndtw-4\charscalex100 law, \par\pard
\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-3\charscalex100 displacement curren
t, Maxwell\u8217?s equation in point and Integral form, retarded \par\pard\li282
9\sb16\sl-230\slmult0\fi0\tx8109 \up0 \expndtw-2\charscalex100 potentials.\tab \
up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li28
29\sb227\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT 7: \par\pard\qj \li28
29\ri2675\sb0\sl-240\slmult0 \up0 \expndtw-1\charscalex100 Uniform plane wave:
\ul0\nosupersub\cf4\f5\fs20 Wave propagation in free space and dielectri
cs, \line \up0 \expndtw-1\charscalex100 Poynting\u8217?s theorem and wave power,
propagation in good conductors - (skin \par\pard\li2829\sb1\sl-208\slmult0\fi0\
tx8102 \up0 \expndtw-2\charscalex100 effect).\tab \up0 \expndtw-2\charscalex100

\ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb222\sl-230\slmult0 \up0
\expndtw-4\charscalex100 UNIT 8: \par\pard\ql \li5834\sb148\sl-184\slmult0 \up0
\expndtw-3\charscalex100 \ul0\nosupersub\cf1\f2\fs16 14
{\shp {\*\shpinst\shpleft3544\shptop554\shpright3911\shpbottom832\shpfhdr0\shpbx
page\shpbypage\shpwr3\shpwrk0\shpfblwtxt1\shpz60\shplid0
}
}}
}
g11}{\bkmkend Pg11}\par\pard\qj \li2829\sb0\sl-220\slmult0 \par\pard\qj\li2829\r
fs20 Plane waves at boundaries and in dispersive media:\ul0\nosupersub\cf4\f5\fs
20 Reflection of uniform \line \up0 \expndtw-1\charscalex100 plane waves at nor
mal incidence, SWR, Plane wave propagation in general \par\pard\li2829\sb14\sl-2
30\slmult0\fi0\tx8119 \up0 \expndtw-2\charscalex100 directions.\tab \up0 \expndt
w-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-2
0 TEXT BOOK: \par\pard\ql \li2829\ri2750\sb19\sl-220\slmult0\tx3189 \up0 \expndt
w-2\charscalex100 1. \u8220?Engineering Electromagnetics\u8221?, \ul0\nosupersu
b\cf4\f5\fs20 William H Hayt Jr. and John A Buck\ul0\nosupersub\cf3\f4\fs20 , \
line\tab \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Tata McGraw-H
ill, 7\ul0\super\cf17\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 edition, 2006 \par
\pard\ql \li2829\sb12\sl-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupers
ub\cf3\f4\fs20 REFERENCE BOOKS\ul0\nosupersub\cf4\f5\fs20 : \par\pard\li2829\sb2
\sl-230\slmult0\fi0\tx3189 \up0 \expndtw0\charscalex100 1.\tab \up0 \expndtw0\ch
arscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Electromagnetics with Applicati
ons\u8221?, \ul0\nosupersub\cf4\f5\fs20 John Krauss and Daniel A\par\pard\l
i2829\sb0\sl-228\slmult0\fi360 \up0 \expndtw0\charscalex100 Fleisch, McGraw-Hill
, 5\ul0\super\cf17\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 edition, 1999\par\par
d\li2829\sb2\sl-230\slmult0\fi0\tx3189 \up0 \expndtw0\charscalex100 2.\tab \up0
\expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Electromagnetic Waves
And Radiating Systems,\u8221? \ul0\nosupersub\cf4\f5\fs20 Edward C. Jordan\par\
pard\li2829\sb0\sl-230\slmult0\fi360 \up0 \expndtw0\charscalex100 and Keith G Ba
lmain, Prentice - Hall of India / Pearson Education, 2\ul0\super\cf17\f18\fs19 n
d\par\pard\li2829\sb1\sl-230\slmult0\fi360 \up0 \expndtw0\charscalex100 \ul0\nos
upersub\cf4\f5\fs20 edition, 1968.Reprint 2002\par\pard\li2829\sb0\sl-230\slmult
0\fi0\tx3189 \up0 \expndtw0\charscalex100 3.\tab \up0 \expndtw0\charscalex100 \u
l0\nosupersub\cf3\f4\fs20 \u8220?Field and Wave Electromagnetics\u8221?, \ul0
\nosupersub\cf4\f5\fs20 David K Cheng, Pearson\par\pard\li2829\sb0\sl-230\sl
mult0\fi359 \up0 \expndtw0\charscalex100 Education Asia, 2\ul0\super\cf17\f18\fs
19 nd\ul0\nosupersub\cf4\f5\fs20 edition, - 1989, Indian Reprint - 2001.\par\pa
sb4\sl-230\slmult0\fi1696 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\f
s20 ANALOG ELECTRONICS LAB\par\pard\li2829\sb0\sl-230\slmult0\fi1545 \up0 \expnd
tw-2\charscalex100 (Common to EC/TC/EE/IT/BM/ML)\par\pard\li2829\sb229\sl-230\sl
mult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8760 \up0 \expndtw-2\charscalex100 Sub C
ode\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 10ESL3
7\tab \up0 \expndtw-2\charscalex100 IA Marks\tab \up0 \expndtw-2\charscalex100 :
\tab \up0 \expndtw-2\charscalex100 25\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx4
264\tx4737\tx6537\tx7977\tx8759 \up0 \expndtw-2\charscalex100 Hrs/ Week\tab \up0
\expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 03\tab \up0 \expnd
tw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expn
dtw-2\charscalex100 03\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx4264\tx6537\tx79
77\tx8759 \up0 \expndtw-2\charscalex100 Total Hrs.\tab \up0 \expndtw-2\charscale
x100 :\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscal
ex100 :\tab \up0 \expndtw-2\charscalex100 50\par\pard\qj \li2829\sb0\sl-240\slmu
lt0 \par\pard\qj\li2829\ri2643\sb6\sl-240\slmult0\fi0 \up0 \expndtw-1\charscalex
100 NOTE:\ul0\nosupersub\cf4\f5\fs20
Use the Discrete components to test th
e circuits. LabView can be \up0 \expndtw-3\charscalex100 used for the verifica
tion and testing along with the above. \par\pard\qj \li2829\sb0\sl-220\slmult0 \
par\pard\qj\li2829\ri2675\sb17\sl-220\slmult0 \up0 \expndtw0\charscalex106 1. W
iring of RC coupled Single stage FET & BJT amplifier and \line \up0 \e
xpndtw-3\charscalex100 determination of the gain-frequency response, input and o
utput impedances. \par\pard\qj \li2829\sb0\sl-230\slmult0 \par\pard\qj\li2829\ri
2675\sb2\sl-230\slmult0 \up0 \expndtw-3\charscalex100 2. Wiring of BJT Darlingto
n Emitter follower with and without bootstrapping \up0 \expndtw-3\charscalex100
and determination of
the gain, input and output impedances (Single circuit)
\up0 \expndtw-3\charscalex100 (One Experiment) \par\pard\qj \li2829\ri2674\sb230
\sl-230\slmult0 \up0 \expndtw0\charscalex100 3. Wiring of a two stage BJT
Voltage series feed back amplifier and \up0 \expndtw-1\charscalex100 deter
mination of the gain, Frequency response, input and output impedances \up0 \expn
dtw-4\charscalex100 with and without feedback (One Experiment) \par\pard\qj \li2
829\ri2674\sb222\sl-240\slmult0 \up0 \expndtw-1\charscalex100 4. Wiring and Test
ing for the performance of BJT-RC Phase shift Oscillator \up0 \expndtw-4\charsca
lex100 for f\ul0\sub\cf17\f18\fs19 0\ul0\nosupersub\cf4\f5\fs20 \u8804? 10 KHz
\par\pard\qj \li2829\sb0\sl-220\slmult0 \par\pard\qj\li2829\ri2674\sb17\sl-220\s
lmult0\fi0 \up0 \expndtw-3\charscalex100 5. Testing for the performance of BJT Hartley & Colpitts Oscillators \ul0\nosupersub\cf3\f4\fs20
\ul0\nosupersub\
cf4\f5\fs20
for \up0 \expndtw-4\charscalex100 RF range f\ul0\sub\cf17\f18\fs1
9 0\ul0\nosupersub\cf4\f5\fs20 \u8805?100KHz. \par\pard\ql \li5834\sb0\sl-184\s
lmult0 \par\pard\ql\li5834\sb6\sl-184\slmult0 \up0 \expndtw-3\charscalex100 \ul0
\nosupersub\cf1\f2\fs16 15 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\par
d\sb0\sl-240{\bkmkstart Pg12}{\bkmkend Pg12}\par\pard\ql \li2829\sb0\sl-230\slmu
lt0 \par\pard\ql\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb90\sl-230\slmul
t0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf4\f5\fs20 6. Testing for the
performance of BJT -Crystal Oscillator for f\ul0\sub\cf17\f18\fs19 0\ul0\nosuper
sub\cf4\f5\fs20 > 100 KHz \par\pard\qj \li2829\ri2675\sb19\sl-220\slmult0 \up0
\expndtw-2\charscalex100 7 Testing of Diode clipping (Single/Double ended) circu
its for peak clipping, \up0 \expndtw-4\charscalex100 peak detection \par\pard\ql
\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb2\sl-230\slmult0 \up0 \expndtw
-2\charscalex100 8. Testing of Clamping circuits: positive clamping /negative
clamping. \par\pard\qj \li2829\ri2675\sb19\sl-220\slmult0 \up0 \expndtw0\charsca
lex104 9. Testing of a transformer less Class - B push pull power amplifier and
\up0 \expndtw-4\charscalex100 determination of its conversion efficiency. \par\
pard\qj \li2829\sb0\sl-230\slmult0 \par\pard\qj\li2829\ri2675\sb2\sl-230\slmult0
\up0 \expndtw0\charscalex100 10. Testing of Half wave, Full wave and Bridge Rec
tifier circuits with and \up0 \expndtw0\charscalex100 without Capacitor filter
. Determination of ripple factor, regulation and \up0 \expndtw-4\charscale
x100 efficiency \par\pard\qj \li2829\ri2675\sb222\sl-240\slmult0 \up0 \expndtw-1
\charscalex100 11. Verification of Thevinin\u8217?s Theorem and Maximum P
ower Transfer \up0 \expndtw-4\charscalex100 theorem for DC Circuits. \par\pard\
ql \li2829\sb229\sl-230\slmult0 \up0 \expndtw-4\charscalex100 12. Characteristic

s of Series and Parallel resonant circuits. \par\pard\ql \li4975\sb230\sl-230\sl
mult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 LOGIC DESIGN LAB
\par\pard\ql \li4375\sb1\sl-217\slmult0 \up0 \expndtw-4\charscalex100 (Common t
o EC/TC/EE/IT/BM/ML) \par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb18\sl
-230\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8760 \up0 \expndtw-2\charscalex10
0 Sub Code\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100
10ESL38\tab \up0 \expndtw-2\charscalex100 IA Marks\tab \up0 \expndtw-2\charscal
ex100 :\tab \up0 \expndtw-2\charscalex100 25\par\pard\li2829\sb0\sl-230\slmult0\
fi0\tx4264\tx4737\tx6537\tx7977\tx8759 \up0 \expndtw-2\charscalex100 Hrs/ Week\t
ab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 03\tab \up0
\expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 :\tab \up
0 \expndtw-2\charscalex100 03\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx4264\tx65
37\tx7977\tx8759 \up0 \expndtw-2\charscalex100 Total Hrs.\tab \up0 \expndtw-2\ch
arscalex100 :\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\c
harscalex100 :\tab \up0 \expndtw-2\charscalex100 50\par\pard\li2829\sb0\sl-230\s
lmult0\par\pard\li2829\sb41\sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 NOT
E:\ul0\nosupersub\cf4\f5\fs20
Use discrete components to test and verify the
logic gates. LabView\par\pard\li2829\sb1\sl-230\slmult0\fi0 \up0 \expndtw-2\cha
rscalex100 can be used for designing the gates along with the above.\par\pard\li
2829\sb228\sl-230\slmult0\fi0\tx3189 \up0 \expndtw-2\charscalex100 1.\tab \up0 \
expndtw-2\charscalex100 Simplification, realization of Boolean expressions using
logic\par\pard\li2829\sb0\sl-230\slmult0\fi360 \up0 \expndtw-2\charscalex100 ga
tes/Universal gates.\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx3189 \up0 \expndtw
-2\charscalex100 2.\tab \up0 \expndtw-2\charscalex100 Realization of Half/Full a
dder and Half/Full Subtractors using logic\par\pard\li2829\sb0\sl-230\slmult0\fi
360 \up0 \expndtw-2\charscalex100 gates.\par\pard\li2829\sb1\sl-230\slmult0\fi0\
tx3189 \up0 \expndtw-2\charscalex100 3.\tab \up0 \expndtw-2\charscalex100 (i) Re
alization of parallel adder/Subtractors using 7483 chip\par\pard\li2829\sb0\sl-2
30\slmult0\fi352 \up0 \expndtw-2\charscalex100 (ii) BCD to Excess-3 code convers
ion and vice versa.\par\pard\li2829\sb0\sl-228\slmult0\fi0\tx3189 \up0 \expndtw2\charscalex100 4.\tab \up0 \expndtw-2\charscalex100 Realization of Binary to Gr
ay code conversion and vice versa\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx3189
\up0 \expndtw-2\charscalex100 5.\tab \up0 \expndtw-2\charscalex100 MUX/DEMUX - u
se of 74153, 74139 for arithmetic circuits and code\par\pard\li2829\sb1\sl-230\s
lmult0\fi360 \up0 \expndtw-2\charscalex100 converter.\par\pard\li2829\sb0\sl-230
\slmult0\fi0\tx3189 \up0 \expndtw-2\charscalex100 6.\tab \up0 \expndtw-2\charsca
lex100 Realization of One/Two bit comparator and study of 7485 magnitude\par\par
d\li2829\sb1\sl-230\slmult0\fi360 \up0 \expndtw-2\charscalex100 comparator.\par\
pard\li2829\sb0\sl-230\slmult0\fi0\tx3189 \up0 \expndtw-2\charscalex100 7.\tab \
up0 \expndtw-2\charscalex100 Use of a) Decoder chip to drive LED display and b)
Priority encoder.\par\pard\li2829\sb0\sl-228\slmult0\fi0\tx3189 \up0 \expndtw-2\
charscalex100 8.\tab \up0 \expndtw-1\charscalex100 Truth table verification of F
lip-Flops: (i) JK Master slave (ii) T type and\par\pard\ql \li3189\sb1\sl-211\sl
mult0 \up0 \expndtw-4\charscalex100 (iii) D type. \par\pard\ql \li2829\ri3308\sb
22\sl-220\slmult0\tx3189\tx3189 \up0 \expndtw-3\charscalex100 9. \tab \up0 \expn
dtw-3\charscalex100 Realization of 3 bit counters as a sequential circuit and MO
D - N \line\tab \up0 \expndtw-3\charscalex100 counter design (7476, 7490, 74192,
74193). \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb6\sl-184\
slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf1\f2\fs16 16 \par\pard\s
ect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg13}{\bkmkend
Pg13}\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb100\sl-230\s
lmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 10.\ul0\nosuper
sub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20 Shift left; Shift right, SIPO, S
ISO, PISO, PIPO operations using 74S95. \par\pard\ql \li2829\sb1\sl-217\slmult0
\up0 \expndtw-2\charscalex100 11.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\
cf4\f5\fs20 Wiring and testing Ring counter/Johnson counter. \par\pard\ql \li28
29\sb13\sl-230\slmult0 \up0 \expndtw-2\charscalex100 12.\ul0\nosupersub\cf15\f16
\fs20 \ul0\nosupersub\cf4\f5\fs20 Wiring and testing of Sequence generator. \p
ar\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \pa
r\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\

pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pa
rd\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard
\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\q
l\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\
li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li
5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li58
\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\s
\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\s
l-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-18
4\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\
slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\sl
mult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmu
0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0
\par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \p
\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\p
ard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\par
d\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\
ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql
-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 17 \par\pard\sect\sectd\fs24\paperw
11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg14}{\bkmkend Pg14}\par\pard\ql \l
i4211\sb0\sl-230\slmult0 \par\pard\ql\li4211\sb0\sl-230\slmult0 \par\pard\ql\li4
1\sb0\sl-230\slmult0 \par\pard\ql\li4211\sb140\sl-230\slmult0 \up0 \expndtw-1\ch
arscalex100 \ul0\nosupersub\cf3\f4\fs20 ENGINEERING MATHEMATICS - IV \par\pard\l
i2829\sb0\sl-230\slmult0\par\pard\li2829\sb12\sl-230\slmult0\fi0\tx4264\tx4737\t
x6537\tx7977\tx8760 \up0 \expndtw-2\charscalex100 Sub Code\tab \up0 \expndtw-2\c
harscalex100 :\tab \up0 \expndtw-2\charscalex100 10MAT41\tab \up0 \expndtw-2\cha
rscalex100 IA Marks\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\char
scalex100 25\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\
tx8759 \up0 \expndtw-2\charscalex100 Hrs/ Week\tab \up0 \expndtw-2\charscalex100
:\tab \up0 \expndtw-2\charscalex100 04\tab \up0 \expndtw-2\charscalex100 Exam H
ours\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 03\pa
r\pard\li2829\sb0\sl-230\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8659 \up0 \ex
pndtw-2\charscalex100 Total Hrs.\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \e
xpndtw-2\charscalex100 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0
\expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 100\par\pard\ql \li
70\sb18\sl-230\slmult0 \up0 \expndtw-2\charscalex100 PART-A \par\pard\ql \li2829
\sb230\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT-1 \par\pard\ql \li2829\
sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 Numerical Methods- 1 \par\pard
\qj \li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosupers
ub\cf4\f5\fs20 Numerical solution of ordinary differential equations of first or
der and first \line \up0 \expndtw0\charscalex100 degree; Picard\u8217?s method,
Taylor\u8217?s series method, modified Euler\u8217?s method, \line \up0 \expndtw
-1\charscalex100 Runge-kutta method of fourth-order. Milne\u8217?s and Ada
ms \up0 \expndtw-1\charscalex100 - Bashforth \par\pard\ql \li2829\sb1\sl-205\sl
mult0 \up0 \expndtw-4\charscalex100 predictor and corrector methods (No derivati
ons of formulae). \par\pard\ql \li8383\sb15\sl-230\slmult0 \up0 \expndtw-4\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 6 Hours \par\pard\ql \li2829\sb230\sl-230\s
lmult0 \up0 \expndtw-2\charscalex100 UNIT-2 \par\pard\ql \li2829\sb10\sl-230\slm
ult0 \up0 \expndtw-2\charscalex100 Numerical Methods - 2 \par\pard\ql \li2829\ri
0 Numerical solution of simultaneous first order ordinary differen
tial \up0 \expndtw-4\charscalex100 equations: Picard\u8217?s method, Runge-Kutta

method of fourth-order. \line \up0 \expndtw-1\charscalex100 Numerical solution
of second order ordinary differential equations: Picard\u8217?s \up0 \expndtw-4\
charscalex100 method, Runge-Kutta method and Milne\u8217?s method. \par\pard\ql
\li8383\sb5\sl-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\
fs20 6 Hours \par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-2\charscale
x100 UNIT-3 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex1
00 Complex variables - 1 \par\pard\ql \li2829\ri2675\sb0\sl-226\slmult0 \up0 \ex
pndtw0\charscalex103 \ul0\nosupersub\cf4\f5\fs20 Function of a complex varia
ble, Analytic functions-Cauchy-Riemann \up0 \expndtw-3\charscalex100 equations
in cartesian and polar forms. Properties of analytic functions. \line \up0 \exp
ndtw0\charscalex104 Application to flow problems- complex potential, veloc
ity potential, \up0 \expndtw-4\charscalex100 equipotential lines, stream functi
ons, stream lines. \par\pard\ql \li8383\sb5\sl-230\slmult0 \up0 \expndtw-4\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 7 Hours \par\pard\ql \li2829\sb230\sl-230\s
lmult0 \up0 \expndtw-2\charscalex100 UNIT-4 \par\pard\ql \li2829\sb10\sl-230\slm
ult0 \up0 \expndtw-2\charscalex100 Complex variables - 2 \par\pard\ql \li2829\sb
1\sl-217\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Confor
mal Transformations: Bilinear Transformations. Discussion of\par\pard\
sect\sectd\sbknone\cols3\colno1\colw4967\colsr20\colno2\colw2003\colsr20\colno3\
colw4760\colsr160\ql \li2829\sb118\sl-230\slmult0\tx4421 \up0 \expndtw-2\charsca
lex100 Transformations: \tab \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf9\f1
0\fs22 w \ul0\nosupersub\cf10\f11\fs22 \u-4035?\ul0\nosupersub\cf9\f10\fs22 z\p
ar\pard\column \ql \li20\sb8\sl-253\slmult0\tx824 \up0 \expndtw-3\charscalex100
\ul0\nosupersub\cf8\f9\fs22 2\tab \up0 \expndtw-3\charscalex100 \ul0\nosupersub\
cf9\f10\fs22 z\par\pard\ql \li156\sb0\sl-198\slmult0\tx946 \up0 \expndtw0\charsc
alex106 \ul0\nosupersub\cf8\f9\fs22 , w = \up0 \expndtw-3\charscalex100 \ul0\nos
upersub\cf9\f10\fs22 e\tab \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf8\f9\
fs22 , \up0 \expndtw0\charscalex103 \ul0\nosupersub\cf9\f10\fs22 w \ul0\nosupers
ub\cf10\f11\fs22 \u-4035?\ul0\nosupersub\cf9\f10\fs22 z \up0 \expndtw-3\charsca
lex100 \ul0\nosupersub\cf10\f11\fs22 \u-4053? \up0 \expndtw-3\charscalex100 \ul0
\nosupersub\cf8\f9\fs22 ( \up0 \expndtw-5\charscalex100 \ul0\nosupersub\cf9\f10\
fs22 a\par\pard\column \ql \li20\sb8\sl-253\slmult0 \up0 \expndtw-3\charscalex10
0 \ul0\nosupersub\cf8\f9\fs22 2\par\pard\ql \li205\sb0\sl-198\slmult0\tx839 \up0
\expndtw-3\charscalex100 / \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf9\f1
0\fs22 z \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf8\f9\fs22 )\tab \up0 \e
xpndtw0\charscalex103 \ul0\nosupersub\cf4\f5\fs20 Complex line \par\pard\sect\
sectd\sbknone \ql \li2829\sb0\sl-180\slmult0 \up0 \expndtw-4\charscalex100 integ
rals- Cauchy\u8217?s theorem and Cauchy\u8217?s integral formula. \par\pard\ql \
li8383\sb14\sl-207\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\
fs20 7 Hours \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb28\sl
-184\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf1\f2\fs16 18
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g15}{\bkmkend Pg15}\par\pard\ql \li5575\sb0\sl-230\slmult0 \par\pard\ql\li5575\s
l-230\slmult0 \par\pard\ql\li5575\sb90\sl-230\slmult0 \up0 \expndtw-2\charscalex
100 \ul0\nosupersub\cf3\f4\fs20 PART-B \par\pard\ql \li2829\sb230\sl-230\slmult0
\up0 \expndtw-2\charscalex100 UNIT-5 \par\pard\ql \li2829\sb10\sl-230\slmult0 \
up0 \expndtw-2\charscalex100 Special Functions \par\pard\qj \li2829\ri2674\sb0\s
l-230\slmult0 \up0 \expndtw0\charscalex103 \ul0\nosupersub\cf4\f5\fs20 Solution
of Laplace equation in cylindrical and spherical systems leading \line \up0 \exp
ndtw0\charscalex102 Bessel\u8217?s and Legendre\u8217?s differential equations,
Series solution of Bessel\u8217?s \line \up0 \expndtw-3\charscalex100 differenti
al equation leading to Bessel function of first kind. Orthogonal \line
\up0 \expndtw-2\charscalex100 property of Bessel functions.
Series soluti
on of Legendre\u8217?s differential \line \up0 \expndtw-4\charscalex100 equat
ion leading to Legendre polynomials, Rodrigue\u8217?s formula. \par\pard\ql \li8
7 Hours \par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-2\charscalex100
UNIT-6 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-4\charscalex100 Pr
obability Theory - 1 \par\pard\qj \li2829\ri2674\sb13\sl-230\slmult0 \up0 \expnd
tw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Probability of an event, emph
erical and axiomatic definition, probability \up0 \expndtw0\charscalex103 as
sociated with set theory, addition law, conditional probability, \
up0 \expndtw-4\charscalex100 multiplication law, Baye\u8217?s theorem. \par\pard
\ql \li8383\sb1\sl-217\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3
\f4\fs20 6 Hours \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb3
\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT-7 \par\pard\ql \li2829\sb10\s
l-230\slmult0 \up0 \expndtw-4\charscalex100 Probability Theory- 2 \par\pard\qj \
li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\c
f4\f5\fs20 Random variables (discrete and continuous), probability density
function, \up0 \expndtw-2\charscalex100 cumulative density function. Probabilit
y distributions - Binomial and Poisson \up0 \expndtw-3\charscalex100 distributio
ns; Exponential and normal distributions. \par\pard\ql \li8383\sb0\sl-230\slmult
0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hours \par\pard\ql
\li2829\sb230\sl-230\slmult0 \up0 \expndtw-3\charscalex100 UNIT-\par\pard\ql \l
i2829\sb1\sl-217\slmult0 \up0 \expndtw-4\charscalex100 Sampling Theory \par\pard
\qj \li2829\ri2674\sb21\sl-220\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupe
rsub\cf4\f5\fs20 Sampling, Sampling distributions, standard error, test of
hypothesis for \line \up0 \expndtw-3\charscalex100 means, confidence limits
for means, student\u8217?s t-distribution. Chi \up0 \expndtw-4\charscalex1
00 -Square \par\pard\ql \li2829\sb12\sl-230\slmult0 \up0 \expndtw-4\charscalex10
0 distribution as a test of goodness of fit \par\pard\ql \li8383\sb1\sl-217\slmu
lt0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hours \par\pard\
ql \li2829\sb13\sl-230\slmult0 \up0 \expndtw-4\charscalex100 Text Books: \par\pa

rd\ql \li3235\ri3200\sb0\sl-240\slmult0\tx3595 \up0 \expndtw-3\charscalex100 \ul
0\nosupersub\cf4\f5\fs20 1.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5
\fs20 B.S. Grewal, Higher Engineering Mathematics, Latest edition, \line\tab \u
p0 \expndtw-4\charscalex100 Khanna Publishers \par\pard\ql \li3235\ri3324\sb0\sl
-240\slmult0\tx3595 \up0 \expndtw-3\charscalex100 2.\ul0\nosupersub\cf15\f16\fs2
0 \ul0\nosupersub\cf4\f5\fs20 Erwin Kreyszig, Advanced Engineering Mathematics
, Latest \line\tab \up0 \expndtw-4\charscalex100 edition, Wiley Publications. \p
ar\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \pa
pard\ql\li5834\sb133\sl-184\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersu
b\cf1\f2\fs16 19 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-2
40{\bkmkstart Pg16}{\bkmkend Pg16}\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\p
d\ql\li2829\sb100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\c
f3\f4\fs20 Reference Book: \par\pard\ql \li3235\ri2691\sb0\sl-240\slmult0\tx3595
\up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\ul0\nosupersub\cf1
5\f16\fs20 \ul0\nosupersub\cf4\f5\fs20 B.V. Ramana, Higher Engineering Mathema
tics, Latest edition, Tata \line\tab \up0 \expndtw-2\charscalex100 Mc. Graw Hill
Publications. \par\pard\ql \li3235\ri2945\sb0\sl-240\slmult0\tx3595 \up0 \expnd
tw-3\charscalex100 2.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20
Peter V. O\u8217?Neil, Engineering Mathematics, CENGAGE Learning \line\tab \up0
\expndtw-4\charscalex100 India Pvt Ltd.Publishers. \par\pard\ql \li4826\sb0\sl230\slmult0 \par\pard\ql\li4826\sb0\sl-230\slmult0 \par\pard\ql\li4826\sb191\sl230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 MICROCONTR
OLLERS \par\pard\ql \li4375\sb1\sl-217\slmult0 \up0 \expndtw-4\charscalex100 (Co
mmon to EC/TC/EE/IT/BM/ML) \par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\s
b19\sl-230\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8760 \up0 \expndtw-2\charsc
alex100 Sub Code\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charsca
lex100 10ES42\tab \up0 \expndtw-2\charscalex100 IA Marks\tab \up0 \expndtw-2\cha
rscalex100 :\tab \up0 \expndtw-2\charscalex100 25\par\pard\li2829\sb1\sl-230\slm
ult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8759 \up0 \expndtw-2\charscalex100 Hrs/ W
eek\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 04\tab
\up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 :\ta
b \up0 \expndtw-2\charscalex100 03\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx4264
\tx4737\tx6537\tx7977\tx8659 \up0 \expndtw-2\charscalex100 Total Hrs.\tab \up0 \
expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 52\tab \up0 \expndtw
-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndt
w-2\charscalex100 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829
\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb33\sl-230\slmult0 \up0 \expndtw-4\char
scalex100 UNIT 1\ul0\nosupersub\cf4\f5\fs20 : \par\pard\qj \li2829\ri2672\sb0\sl
-230\slmult0 \up0 \expndtw-2\charscalex100 Microprocessors and microcontroller
.
Introduction, Microprocessors and \up0 \expndtw0\charscalex100 Microcontr
ollers, RISC & CISC CPU Architectures, Harvard & Von\up0 \expndtw-4\char
scalex100 Neumann CPU architecture, Computer software. \par\pard\qj \li2829\ri29
27\sb9\sl-220\slmult0 \up0 \expndtw-3\charscalex100 The 8051 Architecture: Intro
duction, Architecture of 8051, Pin diagram of \up0 \expndtw-4\charscalex100 8051
, Memory organization, External Memory interfacing, Stacks. \par\pard\ql \li84
6 Hrs \par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-4\charscalex100 U
NIT 2: \par\pard\qj \li2829\ri2675\sb0\sl-240\slmult0 \up0 \expndtw-2\charscalex
100 \ul0\nosupersub\cf4\f5\fs20 Addressing Modes: Introduction, Instruction synt
ax, Data types, Subroutines, \line \up0 \expndtw-3\charscalex100 Addressing mod
es: Immediate addressing \up0 \expndtw-3\charscalex100 , Register addressing
, Direct \par\pard\qj \li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw-2\charsca
lex100 addressing, Indirect addressing, relative addressing, Absolute addr
essing, \up0 \expndtw-2\charscalex100 Long addressing, Indexed addressing, B
it inherent addressing, bit direct \up0 \expndtw-4\charscalex100 addressing.
\par\pard\ql \li2829\sb1\sl-206\slmult0 \up0 \expndtw-4\charscalex100 Instructi
on set: Instruction timings, 8051 instructions: Data transfer \par\pard\ql \li28
29\sb7\sl-215\slmult0 \up0 \expndtw-4\charscalex100 instructions, Arithmetic ins

tructions, Logical instructions, Branch \par\pard\ql \li2829\sb13\sl-230\slmult0
\tx8380 \up0 \expndtw-4\charscalex100 instructions, Subroutine instructions, Bit
manipulation instruction. \tab \up0 \expndtw-4\charscalex100 6\ul0\nosupersub\c
f3\f4\fs20 Hrs \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-4\charscal
ex100 UNIT 3\ul0\nosupersub\cf4\f5\fs20 : \par\pard\ql \li2829\sb13\sl-230\slmul
t0 \up0 \expndtw-2\charscalex100 8051 programming: Assembler directives, Assem
bly language programs and \par\pard\li2829\sb7\sl-230\slmult0\fi0\tx8241 \up0 \e
xpndtw-2\charscalex100 Time delay calculations.\tab \up0 \expndtw-2\charscalex10
0 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb1\sl-221\slmult0 \up0
\expndtw-4\charscalex100 UNIT 4\ul0\nosupersub\cf4\f5\fs20 : \par\pard\qj \li282
9\ri2673\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex103 8051 Interfacing and
Applications: Basics of I/O concepts, I/O Port \line \up0 \expndtw-1\char
scalex100 Operation, Interfacing 8051 to LCD, Keyboard, parallel and serial
ADC, \line \up0 \expndtw-2\charscalex100 DAC, Stepper motor interfacing and DC
motor interfacing and programming \par\pard\ql \li8133\sb0\sl-230\slmult0 \par\p
ard\ql\li8133\sb12\sl-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\
cf3\f4\fs20 7 Hrs \par\pard\ql \li5834\sb168\sl-184\slmult0 \up0 \expndtw-3\char
aperh16840\pard\sb0\sl-240{\bkmkstart Pg17}{\bkmkend Pg17}\par\pard\ql \li2829\s
b0\sl-230\slmult0 \par\pard\ql\li2829\sb100\sl-230\slmult0 \up0 \expndtw-2\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 UNIT 5: \par\pard\qj \li2829\ri3011\sb0\sl240\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 8051 Inter
rupts and Timers/counters: Basics of interrupts, 8051 interrupt \line \up0 \expn
dtw-2\charscalex100 structure, Timers and Counters, 8051 timers/counters, progra
mming 8051 \par\pard\li2829\sb1\sl-208\slmult0\fi0\tx8102 \up0 \expndtw-2\charsc
alex100 timers in assembly and C .\tab \up0 \expndtw-2\charscalex100 \ul0\nosupe
rsub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb7\sl-224\slmult0 \up0 \expndtw-2\ch
arscalex100 UNIT 6: \par\pard\qj \li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw
-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 8051 Serial Communication: Data
communication, Basics of Serial Data \up0 \expndtw-1\charscalex100 Communic
ation, 8051 Serial Communication, connections to RS-232, Serial \up0 \expndtw2\charscalex100 communication Programming in assembly and C. \par\pard\li2829\sb
4\sl-230\slmult0\fi0\tx8085 \up0 \expndtw-1\charscalex100 8255A Programmable P
eripheral Interface:, Architecture of\tab \up0 \expndtw-1\charscalex100 8255A
, I/O\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx8102 \up0 \expndtw-1\charscalex1
00 addressing,, I/O devices interfacing with 8051 using 8255A.\tab \up0 \expndtw
-1\charscalex100 6\ul0\nosupersub\cf3\f4\fs20 Hrs\par\pard\ql \li3189\sb0\sl-23
0\slmult0 \par\pard\ql\li3189\sb0\sl-230\slmult0 \par\pard\ql\li3189\sb218\sl-23
0\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Course Aim The MSP430 microcontroller is ideally suited for \par\pard\ql \li3189\ri2729\sb
12\sl-228\slmult0 \up0 \expndtw-2\charscalex100 development of low-power embedde
d systems that must run on batteries \line \up0 \expndtw-2\charscalex100 for man
y years. There are also applications where MSP430 \line \up0 \expndtw-2\charscal
ex100 microcontroller must operate on energy harvested from the environment. \li
ne \up0 \expndtw-1\charscalex100 This is possible due to the ultra-low power ope
ration of MSP430 and the \line \up0 \expndtw-2\charscalex100 fact that it provid
es a complete system solution including a RISC CPU, \line \up0 \expndtw-2\charsc
alex100 flash memory, on-chip data converters and on-chip peripherals. \par\pard
\ql \li2829\sb11\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf
3\f4\fs20 UNIT 7: \par\pard\qj \li2829\ri2739\sb0\sl-230\slmult0 \up0 \expndtw-2
\charscalex100 Motivation for MSP430microcontrollers\ul0\nosupersub\cf4\f5\fs20
- Low Power embedded systems, \line \up0 \expndtw-1\charscalex100 On-chip perip
herals (analog and digital), low-power RF capabilities. Target \line \up0 \expnd
tw-1\charscalex100 applications (Single-chip, low cost, low power, high performa
nce system \par\pard\li2829\sb1\sl-230\slmult0\fi0\tx7819 \up0 \expndtw-2\charsc
alex100 design).\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 2
Hrs\par\pard\qj \li2829\ri2900\sb0\sl-240\slmult0 \up0 \expndtw-2\charscalex100
MSP430 RISC CPU architecture,\ul0\nosupersub\cf4\f5\fs20 Compiler-friendly fea
tures, Instruction \line \up0 \expndtw-1\charscalex100 set, Clock system, Memory
subsystem. Key differentiating factors between \par\pard\li2829\sb1\sl-204\slmu

lt0\fi0\tx7814 \up0 \expndtw-4\charscalex100 different MSP430 families.\tab \up0
\expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 2 Hrs\par\pard\qj \li282
9\ri2891\sb13\sl-220\slmult0 \up0 \expndtw-4\charscalex100 Introduction to Code
Composer Studio \ul0\nosupersub\cf4\f5\fs20 (CCS v4). Understanding how to \up0
\expndtw-4\charscalex100 use CCS for Assembly, C, Assembly+C projects for MSP430
\par\pard\li2829\sb13\sl-230\slmult0\fi0\tx7941 \up0 \expndtw-3\charscalex100 m
icrocontrollers. Interrupt programming.\tab \up0 \expndtw-3\charscalex100 3 \ul
0\nosupersub\cf3\f4\fs20 Hrs\par\pard\ql \li2829\sb1\sl-216\slmult0 \up0 \expnd
tw-2\charscalex100 Digital I/O - I/O ports\ul0\nosupersub\cf4\f5\fs20 programmi
ng using C and assembly, Understanding \par\pard\li2829\sb15\sl-230\slmult0\fi0\
tx7881 \up0 \expndtw-2\charscalex100 the muxing scheme of the MSP430 pins.\tab \
29\sb228\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT 8\ul0\nosupersub\cf4\
f5\fs20 : \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-4\charscalex100
\ul0\nosupersub\cf3\f4\fs20 On-chip peripherals. Watchdog Timer, Comparator\ul0\
nosupersub\cf4\f5\fs20 , Op-Amp, Basic \par\pard\ql \li2829\sb13\sl-230\slmult0
\up0 \expndtw-3\charscalex100 Timer, Real Time Clock (RTC), ADC, DAC, SD16, LCD,
DMA. \ul0\nosupersub\cf3\f4\fs20 2 Hrs \par\pard\ql \li2829\sb1\sl-217\slmult
0 \up0 \expndtw-4\charscalex100 Using the Low-power features of MSP430\ul0\nosup
ersub\cf4\f5\fs20 . Clock system, low-power \par\pard\qj \li2829\ri2746\sb21\sl220\slmult0\fi0 \up0 \expndtw-3\charscalex100 modes, Clock request feature, Lowpower programming and Interrupt. \ul0\nosupersub\cf3\f4\fs20 2 Hrs \line \up0 \e
xpndtw-4\charscalex100 Interfacing LED, LCD, External memory.\ul0\nosupersub\cf4
\f5\fs20 Seven segment LED modules \par\pard\li2829\sb12\sl-230\slmult0\fi0\tx8
181 \up0 \expndtw-1\charscalex100 interfacing. Example - Real-time clock.\tab \u
p0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 2 Hrs\par\pard\qj \li282
9\ri2865\sb0\sl-240\slmult0 \up0 \expndtw-3\charscalex100 Case Studies of applic
ations of MSP430 \ul0\nosupersub\cf4\f5\fs20 - Data acquisition system, Wired \l
ine \up0 \expndtw-4\charscalex100 Sensor network, Wireless sensor network with C
hipcon RF interfaces. \par\pard\ql \li8270\sb1\sl-193\slmult0 \up0 \expndtw-4\ch
arscalex100 \ul0\nosupersub\cf3\f4\fs20 3 \ul0\nosupersub\cf4\f5\fs20 Hrs \par\p
ard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb51\sl-184\slmult0 \up0 \
expndtw-3\charscalex100 \ul0\nosupersub\cf1\f2\fs16 21 \par\pard\sect\sectd\fs24
\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg18}{\bkmkend Pg18}\par\par
d\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb100\sl-230\slmult0 \up0 \e
xpndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 TEXT BOOKS: \par\pard\ql \li2
829\ri2675\sb230\sl-230\slmult0\tx3189\tx3189\tx3189 \up0 \expndtw-3\charscalex1
00 \ul0\nosupersub\cf4\f5\fs20 1. \tab \up0 \expndtw-3\charscalex100 \ul0\nosupe
rsub\cf3\f4\fs20 \u8220?The 8051 Microcontroller and Embedded Systems - using as
sembly \line\tab \up0 \expndtw0\charscalex101 and C \u8221?-, \ul0\nosupersub\c
f4\f5\fs20 Muhammad Ali
Mazidi and Janice Gillespie Mazidi and \line \tab \u
p0 \expndtw-4\charscalex100 Rollin D. McKinlay; PHI, 2006 / Pearson, 2006 \par\p
ard\ql \li2829\sb1\sl-217\slmult0\tx3340 \up0 \expndtw-3\charscalex100 2. \tab \
up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?MSP430 Microcont
roller Basics\u8221?, \ul0\nosupersub\cf4\f5\fs20 John Davies, Elsevier, 2010 \p
ar\pard\ql \li6892\sb13\sl-230\slmult0 \up0 \expndtw-4\charscalex100 (Indian edi
tion available) \par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-4\charsc
alex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS: \par\pard\ql \li3189\sb230\
sl-230\slmult0\tx3549 \up0 \expndtw-3\charscalex100 1. \tab \up0 \expndtw-4\char
scalex100 \u8220?The 8051 Microcontroller Architecture, Programming & \par\p
ard\qj \li3590\ri2756\sb0\sl-240\slmult0\fi2 \up0 \expndtw-4\charscalex100 Appli
cations\u8221?, \ul0\nosupersub\cf4\f5\fs20 2e Kenneth J. Ayala ;, Penram Intern
ational, 1996 / \up0 \expndtw-4\charscalex100 Thomson Learning 2005. \par\pard\q
l \li3189\sb1\sl-193\slmult0\tx3549 \up0 \expndtw-3\charscalex100 2. \tab \up0 \
expndtw-3\charscalex100 \u8220?\ul0\nosupersub\cf3\f4\fs20 The 8051 Microcontrol
ler\u8221?, \ul0\nosupersub\cf4\f5\fs20 V.Udayashankar and \par\pard\ql \li363
1\sb17\sl-230\slmult0 \up0 \expndtw-4\charscalex100 MalikarjunaSwamy, TMH, 2009
\par\pard\li3189\sb2\sl-230\slmult0\fi0\tx3549 \up0 \expndtw-2\charscalex100 3.\
tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 MSP430 Teaching CD
-ROM,\ul0\nosupersub\cf4\f5\fs20 Texas Instruments, 2008 (can be\par\pard\li318

9\sb0\sl-228\slmult0\fi400 \up0 \expndtw-2\charscalex100 requested \ul0\nosupers
ub\cf21\f22\fs20 http://www.uniti.in\ul0\nosupersub\cf4\f5\fs20 )\par\pard\li31
89\sb7\sl-230\slmult0\fi0\tx3647 \up0 \expndtw-2\charscalex100 4.\tab \up0 \expn
dtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Microcontrollers: Architecture,
Programming, Interfacing and\par\pard\li3189\sb0\sl-225\slmult0\fi359 \up0 \expn
dtw-2\charscalex100 System Design\u8221?,\ul0\nosupersub\cf4\f5\fs20 Raj Kamal,
\u8220?Pearson Education, 2005\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li282
9\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb5\sl-2
30\slmult0\fi2121 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 CONT
ROL SYSTEMS\par\pard\li2829\sb1\sl-230\slmult0\fi1545 \up0 \expndtw-2\charscalex
100 (Common to EC/TC/EE/IT/BM/ML)\par\pard\li2829\sb230\sl-230\slmult0\fi0\tx426
4\tx4737\tx6537\tx7977\tx8760 \up0 \expndtw-2\charscalex100 Sub Code\tab \up0 \e
xpndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 10ES43\tab \up0 \expn
dtw-2\charscalex100 IA Marks\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expnd
tw-2\charscalex100 25\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx4264\tx4737\tx653
7\tx7977\tx8759 \up0 \expndtw-2\charscalex100 Hrs/ Week\tab \up0 \expndtw-2\char
scalex100 :\tab \up0 \expndtw-2\charscalex100 04\tab \up0 \expndtw-2\charscalex1
00 Exam Hours\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex
100 03\par\pard\li2829\sb0\sl-228\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8659
\up0 \expndtw-2\charscalex100 Total Hrs.\tab \up0 \expndtw-2\charscalex100 :\ta
b \up0 \expndtw-2\charscalex100 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\
tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 100\par\pa
rd\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb46\sl-230\slmult0 \up0 \e
xpndtw-4\charscalex100 UNIT 1: \par\pard\ql \li2829\ri2674\sb0\sl-226\slmult0 \u
p0 \expndtw0\charscalex100 Modeling of Systems: \ul0\nosupersub\cf4\f5\fs20 In
troduction to Control Systems, Types of Control \line \up0 \expndtw-4\charscalex
100 Systems, Effect of Feedback Systems, Differential equation of Physical \line
\up0 \expndtw-1\charscalex100 Systems -Mechanical systems, Friction, Translati
onal systems (Mechanical \line \up0 \expndtw-3\charscalex100 accelerometer, s
ystems excluded), Rotational systems, Gear trains, Electrical \par\pard\li2829\s
b11\sl-230\slmult0\fi0\tx8215 \up0 \expndtw-2\charscalex100 systems, Analogous s
ystems.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\
pard\ql \li2829\sb224\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT 2: \par\
pard\qj \li2829\ri2674\sb0\sl-240\slmult0 \up0 \expndtw-2\charscalex100 Block di
agrams and signal flow graphs:\ul0\nosupersub\cf4\f5\fs20 Transfer functions, B
lock diagram \line \up0 \expndtw-2\charscalex100 algebra, Signal Flow graphs (St
ate variable formulation excluded),\ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\
ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb21\sl-230\slmult0 \up0 \expn
dtw-4\charscalex100 UNIT 3: \par\pard\qj \li2829\ri2674\sb10\sl-230\slmult0 \up0
\expndtw0\charscalex100 Time Response of feed back control systems\ul0\nosupers
ub\cf4\f5\fs20 : Standard test signals, Unit \line \up0 \expndtw0\charscalex10
0 step response of First and second order systems, Time respon
se \line \up0 \expndtw-1\charscalex100 specifications, Time response specificati
ons of second order systems, steady \par\pard\ql \li5834\sb128\sl-184\slmult0 \u
p0 \expndtw-3\charscalex100 \ul0\nosupersub\cf1\f2\fs16 22 \par\pard\sect\sectd\
fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg19}{\bkmkend Pg19}\par
\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb100\sl-230\slmult0 \up
0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 - state errors and error c
onstants. Introduction to PID Controllers(excluding \par\pard\li2829\sb2\sl-230\
slmult0\fi0\tx8220 \up0 \expndtw-2\charscalex100 design)\tab \up0 \expndtw-2\cha
rscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb218\sl-230\sl
mult0 \up0 \expndtw-2\charscalex100 UNIT 4: \par\pard\qj \li2829\ri2826\sb19\sl220\slmult0\fi0 \up0 \expndtw-1\charscalex100 Stability analysis:\ul0\nosupersub
\cf4\f5\fs20 Concepts of stability, Necessary conditions for Stability, \line \
up0 \expndtw-1\charscalex100 Routh- stability criterion, Relative stability anal
ysis; More on the Routh \par\pard\li2829\sb13\sl-230\slmult0\fi0\tx8152 \up0 \ex
pndtw-2\charscalex100 stability criterion.\tab \up0 \expndtw-2\charscalex100 \ul
0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\
ql\li2829\sb219\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 5: \par\pard\q
l \li2829\sb10\sl-230\slmult0 \up0 \expndtw0\charscalex107 Root-Locus Techniqu

es\ul0\nosupersub\cf4\f5\fs20 : Introduction, The root locus concepts,
\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx8152 \up0 \expndtw-2\charscalex100 Co
nstruction of root loci.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f
4\fs20 6 Hrs\par\pard\ql \li2829\sb219\sl-230\slmult0 \up0 \expndtw-2\charscalex
100 UNIT 6: \par\pard\qj \li2829\ri2674\sb10\sl-230\slmult0 \up0 \expndtw0\chars
calex102 Frequency domain analysis: \ul0\nosupersub\cf4\f5\fs20 Correlation
between time and frequency \line \up0 \expndtw0\charscalex100 response, Bode
plots,
Experimental determination of transfer functions, \line \up0 \ex
pndtw0\charscalex100 Assessment of relative stability using Bode Plots.\ul0\nosu
persub\cf3\f4\fs20 \ul0\nosupersub\cf4\f5\fs20 Introduction to lead, lag \par\p
ard\li2829\sb1\sl-230\slmult0\fi0\tx8152 \up0 \expndtw-2\charscalex100 and leadlag compensating networks (excluding design).\tab \up0 \expndtw-2\charscalex100
\expndtw-2\charscalex100 UNIT 7: \par\pard\qj \li2829\ri2675\sb10\sl-230\slmult0
\up0 \expndtw0\charscalex104 Stability in the frequency domain:\ul0\nosupersub\
cf4\f5\fs20 Introduction to Polar Plots, (Inverse \line \up0 \expndtw-1\charsc
alex100 Polar Plots excluded) Mathematical preliminaries, Nyquist Stability crit
erion, \line \up0 \expndtw-2\charscalex100 Assessment of relative stability
using Nyquist criterion, \up0 \expndtw-2\charscalex100 (Systems with \par\par
d\li2829\sb1\sl-230\slmult0\fi0\tx8123 \up0 \expndtw-2\charscalex100 transportat
ion lag excluded).\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20
7 Hrs\par\pard\ql \li2829\sb0\sl-229\slmult0 \up0 \expndtw-2\charscalex100 UNIT
8: \par\pard\qj \li2829\ri2651\sb0\sl-240\slmult0\fi0 \up0 \expndtw0\charscalex
104 Introduction to State variable analysis: \ul0\nosupersub\cf4\f5\fs20 Concept
s of\ul0\nosupersub\cf3\f4\fs20 \ul0\nosupersub\cf4\f5\fs20 state, state variab
le \line \up0 \expndtw-2\charscalex100 and state models for electrical systems,
Solution of state equations. \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \l
i2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb201\sl-230\slmult0 \up0 \expndtw2\charscalex100 TEXT BOOK : \par\pard\qj \li2829\ri2677\sb19\sl-220\slmult0 \up0
\expndtw0\charscalex100 1. J. Nagarath and M.Gopal\ul0\nosupersub\cf4\f5\fs20 ,
\u8220?Control Systems Engineering\u8221?, New Age \up0 \expndtw-3\charscalex1
00 International (P) Limited, Publishers, Fourth edition - 2005 \par\pard\ql \li
2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb2\sl-230\slmult0 \up0 \expndtw-4\c
harscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS: \par\pard\li2829\sb0\s
l-230\slmult0\par\pard\li2829\sb11\sl-230\slmult0\fi0\tx3189 \up0 \expndtw-1\cha
rscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex100 \ul0
\nosupersub\cf3\f4\fs20 \u8220?Modern Control Engineering \u8220?, \ul0\nosupers
ub\cf4\f5\fs20 K. Ogata, Pearson Education Asia/\par\pard\li2829\sb0\sl-230\slmu
lt0\fi359 \up0 \expndtw-1\charscalex100 PHI, 4\ul0\super\cf17\f18\fs19 th\ul0\no
supersub\cf4\f5\fs20 Edition, 2002.\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx31
89 \up0 \expndtw-1\charscalex100 2.\tab \up0 \expndtw-1\charscalex100 \ul0\nosup
ersub\cf3\f4\fs20 \u8220?Automatic Control Systems\u8221?,\ul0\nosupersub\cf4\f5
\fs20
Benjamin C. Kuo, John Wiley India\par\pard\li2829\sb0\sl-230\slmult0\fi
359 \up0 \expndtw-1\charscalex100 Pvt. Ltd., 8\ul0\super\cf17\f18\fs19 th\ul0\no
supersub\cf4\f5\fs20 Edition, 2008.\par\pard\ql \li2829\ri2674\sb0\sl-240\slmul
t0\tx3189\tx3189 \up0 \expndtw-3\charscalex100 3. \tab \up0 \expndtw0\charscalex
100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Feedback and Control System\u8221?, \
ul0\nosupersub\cf4\f5\fs20
Joseph J Distefano III et al., \line\tab \up0
\expndtw-4\charscalex100 Schaum\u8217?s Outlines, TMH, 2\ul0\super\cf17\f18\fs1
9 nd\ul0\nosupersub\cf4\f5\fs20 Edition 2007. \par\pard\ql \li5834\sb0\sl-184\s
lmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slm
ult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb151\sl-184\slm
ult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf1\f2\fs16 23 \par\pard\sect
\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg20}{\bkmkend Pg
20}\par\pard\ql \li4907\sb0\sl-230\slmult0 \par\pard\ql\li4907\sb100\sl-230\slmu
lt0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 SIGNALS & SYSTEMS
\par\pard\ql \li4535\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 (Common to
EC/TC/IT/BM/ML) \par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb20\sl-230
\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8760 \up0 \expndtw-2\charscalex100 Su
b Code\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 10E

C44\tab \up0 \expndtw-2\charscalex100 IA Marks\tab \up0 \expndtw-2\charscalex100
:\tab \up0 \expndtw-2\charscalex100 25\par\pard\li2829\sb0\sl-228\slmult0\fi0\t
x4264\tx4737\tx6537\tx7977\tx8759 \up0 \expndtw-2\charscalex100 Hrs/ Week\tab \u
p0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 04\tab \up0 \exp
ndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \ex
pndtw-2\charscalex100 03\par\pard\li2829\sb2\sl-230\slmult0\fi0\tx4264\tx4737\tx
6537\tx7977\tx8659 \up0 \expndtw-2\charscalex100 Total Hrs.\tab \up0 \expndtw-2\
charscalex100 :\tab \up0 \expndtw-2\charscalex100 52\tab \up0 \expndtw-2\charsca
lex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charsc
alex100 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb0\sl-23
UNIT 1: \par\pard\qj \li2829\ri2674\sb0\sl-240\slmult0\fi0 \up0 \expndtw-1\chars
calex100 Introduction\ul0\nosupersub\cf4\f5\fs20 : Definitions of a signal and
a system, classification of signals, \line \up0 \expndtw-1\charscalex100 basic
Operations on signals, elementary signals, Systems viewed as \par\pard\l
i2829\sb1\sl-213\slmult0\fi0\tx7763 \up0 \expndtw-2\charscalex100 Interconnectio
ns of operations, properties of systems.\tab \up0 \expndtw-2\charscalex100 \ul0\
nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql
-2\charscalex100 UNIT 2: \par\pard\qj \li2829\ri2674\sb19\sl-220\slmult0 \up0 \e
xpndtw0\charscalex101 Time-domain representations for LTI systems - 1:\ul0\nosup
ersub\cf4\f5\fs20 Convolution, impulse \up0 \expndtw-2\charscalex100 response r
epresentation, Convolution Sum and Convolution Integral. \par\pard\ql \li7931\sb
12\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hr
s \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 UNIT 3:
\par\pard\qj \li2829\ri2674\sb21\sl-220\slmult0 \up0 \expndtw0\charscalex101 Tim
e-domain representations for LTI systems - 2:\ul0\nosupersub\cf4\f5\fs20 Proper
ties of impulse \line \up0 \expndtw-1\charscalex100 response representation, Dif
ferential and difference equation Representations, \par\pard\li2829\sb16\sl-230\
slmult0\fi0\tx8174 \up0 \expndtw-2\charscalex100 Block diagram representations.\
tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql
\li2829\sb226\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 4: \par\pard\qj
\li2829\ri2676\sb0\sl-240\slmult0 \up0 \expndtw-1\charscalex100 Fourier represe
ntation for signals - 1:\ul0\nosupersub\cf4\f5\fs20 Introduction, Discret
e time and \line \up0 \expndtw-2\charscalex100 continuous time Fourier seri
es \up0 \expndtw-2\charscalex100 (derivation of series excluded) and their
\par\pard\li2829\sb1\sl-209\slmult0\fi0\tx8181 \up0 \expndtw-2\charscalex100 pro
perties .\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\pa
r\pard\ql \li2829\sb221\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 5: \pa
r\pard\qj \li2829\ri2675\sb19\sl-220\slmult0 \up0 \expndtw0\charscalex103 Fourie
r representation for signals - 2: \ul0\nosupersub\cf4\f5\fs20 Discrete and con
tinuous Fourier \up0 \expndtw-1\charscalex100 transforms(derivations of transfor
ms are excluded) and their properties. \par\pard\ql \li8181\sb12\sl-230\slmult0
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li
2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 UNIT 6: \par\pard\qj \li28
29\ri2675\sb13\sl-230\slmult0 \up0 \expndtw0\charscalex100 Applications of Fouri
er representations: \ul0\nosupersub\cf4\f5\fs20 Introduction, Frequency response
\line \up0 \expndtw0\charscalex100 of LTI systems, Fourier transform representa
tion of periodic signals, Fourier \line \up0 \expndtw0\charscalex100 transform
representation of discrete time signals. Sampling theorm and \par\pard\li
2829\sb2\sl-230\slmult0\fi0\tx8164 \up0 \expndtw0\charscalex100 Nyquist rate.\ta
b \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\li2829
\sb0\sl-230\slmult0\par\pard\li2829\sb6\sl-230\slmult0\fi0 \up0 \expndtw0\charsc
alex100 UNIT 7:\par\pard\li2829\sb0\sl-226\slmult0\fi0\tx4387\tx6213 \up0 \expnd
tw0\charscalex100 Z-Transforms -\tab \up0 \expndtw0\charscalex100 1: \ul0\nosup
ersub\cf4\f5\fs20
Introduction, Z\tab \up0 \expndtw0\charscalex100 - trans
form, properties of ROC,\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx8071 \up0 \
expndtw0\charscalex100 properties of Z - transforms,\ul0\nosupersub\cf3\f4\fs20
\ul0\nosupersub\cf4\f5\fs20 inversion of Z - transforms.\tab \up0 \expndtw0\cha

mult0 \up0 \expndtw-2\charscalex100 UNIT 8: \par\pard\ql \li2829\sb10\sl-230\slm
ult0\tx4106\tx4341 \up0 \expndtw-2\charscalex100 Z-transforms \tab \up0 \expndtw
-2\charscalex100 -\tab \up0 \expndtw0\charscalex103 2:\ul0\nosupersub\cf4\f5\fs2
0 Transform analysis of LTI Systems, unilateral Z-\par\pard\ql \li5834\s
b128\sl-184\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 24
\par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg
21}{\bkmkend Pg21}\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb101\sl-2
30\slmult0\fi0\tx8195 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20
Transform and its application to solve difference equations.\tab \up0 \expndtw-2
slmult0 \par\pard\ql\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb49\sl-230\s
lmult0 \up0 \expndtw-2\charscalex100 TEXT BOOK \par\pard\ql \li2829\ri2885\sb0\s
l-220\slmult0\tx3131 \up0 \expndtw-2\charscalex100 1.
Simon Haykin, \ul0\nosu
persub\cf4\f5\fs20 \u8220?Signals and Systems\u8221?, John Wiley India Pvt. Ltd.
, 2\ul0\super\cf17\f18\fs19 nd \line\tab \up0 \expndtw-4\charscalex100 \ul0\nosu
persub\cf4\f5\fs20 Edn, 2008. \par\pard\ql \li2829\ri3090\sb19\sl-220\slmult0\tx
3081 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 2. Michael Robert
s, \ul0\nosupersub\cf4\f5\fs20 \u8220?Fundamentals of Signals & Systems\u8221?,
2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 ed, Tata \line\tab \up0
\expndtw-4\charscalex100 McGraw-Hill, 2010 \par\pard\ql \li2879\sb0\sl-230\slmu
lt0 \par\pard\ql\li2879\sb2\sl-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\no
supersub\cf3\f4\fs20 REFERENCE BOOKS\ul0\nosupersub\cf4\f5\fs20 : \par\pard\ql \
li2829\ri2674\sb10\sl-230\slmult0\tx3189\tx3189\tx3189 \up0 \expndtw-3\charscale
x100 1. \tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Alan V Op
penheim, Alan S, Willsky and A Hamid Nawab,\ul0\nosupersub\cf4\f5\fs20 \u8220?S
ignals \line\tab \up0 \expndtw0\charscalex100 and Systems\u8221? Pearson Educati
on Asia / PHI, 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 edition,
1997. Indian \line \tab \up0 \expndtw-4\charscalex100 Reprint 2002 \par\pard\l
i2829\sb7\sl-230\slmult0\fi0\tx3189 \up0 \expndtw0\charscalex102 2.\tab \up0 \ex
pndtw0\charscalex102 \ul0\nosupersub\cf3\f4\fs20 H. P Hsu, R. Ranjan\ul0\nosuper
sub\cf4\f5\fs20 , \u8220?Signals and Systems\u8221?, Scham\u8217?s outlines, TMH
,\par\pard\li2829\sb1\sl-230\slmult0\fi360 \up0 \expndtw0\charscalex102 2006\par
\pard\li2829\sb0\sl-230\slmult0\fi0\tx3189 \up0 \expndtw0\charscalex102 3.\tab \
up0 \expndtw0\charscalex102 \ul0\nosupersub\cf3\f4\fs20 B. P. Lathi\ul0\nosupers
ub\cf4\f5\fs20 , \u8220?Linear Systems and Signals\u8221?, Oxford University Pr
ess,\par\pard\li2829\sb0\sl-230\slmult0\fi360 \up0 \expndtw0\charscalex102 2005\
par\pard\li2829\sb0\sl-228\slmult0\fi0\tx3189\tx6818 \up0 \expndtw0\charscalex10
2 4.\tab \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf3\f4\fs20 Ganesh Rao
and Satish Tunga\ul0\nosupersub\cf4\f5\fs20 ,\tab \up0 \expndtw0\charscalex
102 \u8220?Signals and
Systems\u8221?,\par\pard\li2829\sb2\sl-230\slmult0\f
i359 \up0 \expndtw0\charscalex102 Pearson/Sanguine Technical Publishers, 2004\pa
r\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2
829\sb51\sl-230\slmult0\fi1869 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3
\f4\fs20 FUNDAMENTALS OF HDL\par\pard\li2829\sb1\sl-230\slmult0\fi1706 \up0 \exp
ndtw-2\charscalex100 (Common to EC/TC/IT/BM/ML)\par\pard\li2829\sb228\sl-230\slm
ult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8760 \up0 \expndtw-2\charscalex100 Sub Co
de\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 10EC45\
tab \up0 \expndtw-2\charscalex100 IA Marks\tab \up0 \expndtw-2\charscalex100 :\t
ab \up0 \expndtw-2\charscalex100 25\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx426
4\tx4737\tx6537\tx7977\tx8759 \up0 \expndtw-2\charscalex100 Hrs/ Week\tab \up0 \
expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 04\tab \up0 \expndtw
-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndt
w-2\charscalex100 03\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx4264\tx4737\tx6537
\tx7977\tx8659 \up0 \expndtw-2\charscalex100 Total Hrs.\tab \up0 \expndtw-2\char
scalex100 :\tab \up0 \expndtw-2\charscalex100 52\tab \up0 \expndtw-2\charscalex1
00 Exam Marks\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex
100 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb42\sl-230\s
lmult0 \up0 \expndtw-4\charscalex100 UNIT 1: \par\pard\qj \li2829\ri2675\sb0\sl220\slmult0\fi100 \up0 \expndtw0\charscalex101 Introduction: \ul0\nosupersub\cf4
\f5\fs20 Why HDL? , A Brief History of HDL, Structure of HDL \line \up0 \expndt
w-1\charscalex100 Module,
Operators, Data types, Types of Descriptions,
simulation and \par\pard\li2829\sb19\sl-230\slmult0\fi0\tx7869 \up0 \expndtw-2
\charscalex100 synthesis, Brief comparison of VHDL and Verilog\tab \up0 \expndtw
-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb222\sl230\slmult0 \up0 \expndtw-4\charscalex100 UNIT 2: \par\pard\ql \li2829\sb10\sl-2
30\slmult0 \up0 \expndtw0\charscalex100 Data -Flow Descriptions:\ul0\nosupersub\
cf4\f5\fs20 Highlights of Data-Flow Descriptions, Structure \par\pard\li2829\sb
0\sl-230\slmult0\fi0\tx7900 \up0 \expndtw-1\charscalex100 of Data-Flow Descripti
on, Data Type - Vectors.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f
100 UNIT 3: \par\pard\qj \li2829\ri2675\sb0\sl-240\slmult0 \up0 \expndtw-2\chars
calex100 Behavioral Descriptions: \ul0\nosupersub\cf4\f5\fs20 Behavioral Desc
ription highlights, structure of \line \up0 \expndtw-3\charscalex100 HDL beha
vioral Description, The VHDL variable -Assignment Statement, \par\pard\li2829\s
b1\sl-218\slmult0\fi0\tx7951 \up0 \expndtw-2\charscalex100 sequential statements
.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\q
l \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb3\sl-230\slmult0 \up0 \expndt
w-4\charscalex100 UNIT 4: \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\l
fs16 25 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmks
tart Pg22}{\bkmkend Pg22}\par\pard\qj \li2829\sb0\sl-220\slmult0 \par\pard\qj\li
2829\ri2675\sb119\sl-220\slmult0\fi0 \up0 \expndtw0\charscalex100 \ul0\nosupersu
b\cf3\f4\fs20 Structural Descriptions\ul0\nosupersub\cf4\f5\fs20 : Highlights of
structural Description, Organization \line \up0 \expndtw0\charscalex100 of the
structural Descriptions, Binding, state Machines, Generate, Generic, \par\pard\l
i2829\sb14\sl-230\slmult0\fi0\tx7869 \up0 \expndtw-2\charscalex100 and Parameter
statements.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs
\par\pard\qj \li2829\sb0\sl-240\slmult0 \par\pard\qj\li2829\ri2674\sb200\sl-240\
slmult0 \up0 \expndtw-1\charscalex100 UNIT 5: Procedures, Tasks, and Functi
ons: \ul0\nosupersub\cf4\f5\fs20 Highlights of Procedures, \up0 \expndtw-2\ch
arscalex100 tasks, and Functions, Procedures and tasks, Functions. \par\pard\ql
fs20 Advanced HDL Descriptions: \ul0\nosupersub\cf4\f5\fs20 File Processing, Exa
mples of File Processing \par\pard\ql \li7951\sb13\sl-230\slmult0 \up0 \expndtw2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb0\sl-23
UNIT 6: \par\pard\qj \li2829\ri2675\sb19\sl-220\slmult0 \up0 \expndtw0\charscal
ex102 Mixed -Type Descriptions: \ul0\nosupersub\cf4\f5\fs20 Why Mixed-Type Desc
ription? VHDL User\up0 \expndtw-2\charscalex100 Defined Types, VHDL Packages, Mi
xed-Type Description examples \par\pard\ql \li7970\sb12\sl-230\slmult0 \up0 \exp
ndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb23
sl-217\slmult0 \up0 \expndtw-2\charscalex100 Mixed -Language Descriptions: \ul0\
nosupersub\cf4\f5\fs20 Highlights of Mixed-Language \par\pard\qj \li2829\ri2845\
sb13\sl-230\slmult0 \up0 \expndtw-2\charscalex100 Description, How to invoke One
language from the Other, Mixed-language \line \up0 \expndtw-2\charscalex100 Des
cription Examples, Limitations of Mixed-Language Description. \ul0\nosupersub\c
f3\f4\fs20 7 Hrs \line \up0 \expndtw-3\charscalex100 UNIT 8: \par\pard\qj \li28
29\ri2671\sb0\sl-240\slmult0 \up0 \expndtw-1\charscalex100 Synthesis Basics: \ul
0\nosupersub\cf4\f5\fs20 Highlights of Synthesis, Synthesis information from Ent
ity \line \up0 \expndtw-2\charscalex100 and Module, Mapping Process and Always i
n the Hardware Domain. \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20
6 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb201\sl-230\
slmult0 \up0 \expndtw-2\charscalex100 TEXT BOOKS: \par\pard\li2829\sb12\sl-230\s
lmult0\fi0\tx3189 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\t
ab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 HDL Programming (
VHDL and Verilog\ul0\nosupersub\cf4\f5\fs20 )- Nazeih M.Botros- John\par\pa
rd\li2829\sb0\sl-228\slmult0\fi360 \up0 \expndtw-2\charscalex100 Weily India Pvt
. Ltd. 2008.\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb7\sl-230\slmul
t0\fi0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS

:\par\pard\li2829\sb0\sl-225\slmult0\fi0\tx3189 \up0 \expndtw-2\charscalex100 \u
l0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\c
f3\f4\fs20 Fundamentals of HDL\ul0\nosupersub\cf4\f5\fs20 - Cyril P.R. Pearso
n/Sanguin 2010.\par\pard\li2829\sb2\sl-230\slmult0\fi0\tx3189\tx4269 \up0 \expnd
tw-2\charscalex100 2.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\f
s20 VHDL\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 -Douglas
perry-Tata McGraw-Hill\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx3189 \up0 \expnd
s20 A Verilog HDL Primer\ul0\nosupersub\cf4\f5\fs20 - J.Bhaskar - BS Publication
s\par\pard\li2829\sb0\sl-228\slmult0\fi0\tx3189 \up0 \expndtw-2\charscalex100 4.
\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Circuit Design wi
th VHDL\ul0\nosupersub\cf4\f5\fs20 -Volnei A.Pedroni-PHI\par\pard\ql \li5834\sb0
lt0 \par\pard\ql\li5834\sb127\sl-184\slmult0 \up0 \expndtw-1\charscalex100 \ul0\
nosupersub\cf1\f2\fs16 26 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard
\sb0\sl-240{\bkmkstart Pg23}{\bkmkend Pg23}\par\pard\qj \li4463\sb0\sl-220\slmul
t0 \par\pard\qj\li4463\ri4308\sb119\sl-220\slmult0 \up0 \expndtw-4\charscalex100
\ul0\nosupersub\cf3\f4\fs20 LINEAR IC\u8217?s & APPLICATIONS \line \up0 \expndt
w-4\charscalex100 (Common to EC/TC/IT/BM/ML) \par\pard\li2829\sb0\sl-230\slmult0
\par\pard\li2829\sb19\sl-230\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8760 \up0
\expndtw-2\charscalex100 Sub Code\tab \up0 \expndtw-2\charscalex100 :\tab \up0
\expndtw-2\charscalex100 10EC46\tab \up0 \expndtw-2\charscalex100 IA Marks\tab \
up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 25\par\pard\li2
829\sb0\sl-228\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8759 \up0 \expndtw-2\ch
arscalex100 Hrs/ Week\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\ch
arscalex100 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\
charscalex100 :\tab \up0 \expndtw-2\charscalex100 03\par\pard\li2829\sb2\sl-230\
slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8659 \up0 \expndtw-2\charscalex100 Tot
al Hrs.\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 52
\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100
:\tab \up0 \expndtw-2\charscalex100 100\par\pard\ql \li2829\sb214\sl-230\slmult0
\up0 \expndtw-4\charscalex100 UNIT 1: \par\pard\qj \li2829\ri2674\sb10\sl-230\s
lmult0 \up0 \expndtw-3\charscalex100 Operational Amplifier Fundamentals\ul0\no
supersub\cf4\f5\fs20 : Basic Op-Amp circuit, Op-Amp \line \up0 \expndtw-2\ch
arscalex100 parameters - Input and output voltage, CMRR and PSRR, offset voltage
s and \line \up0 \expndtw-1\charscalex100 currents, Input and output impedances,
Slew rate and Frequency limitations; \line \up0 \expndtw-2\charscalex100 Op-Amp
s as DC Amplifiers- Biasing Op-Amps, Direct coupled -Voltage \line \up0 \
expndtw-2\charscalex100 Followers, Non-inverting Amplifiers, Inverting a
mplifiers, Summing \par\pard\li2829\sb2\sl-230\slmult0\fi0\tx7627 \up0 \expndt
w-2\charscalex100 amplifiers, Difference amplifier.\tab \up0 \expndtw-2\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2930\sb218\sl-230\slmult0
\up0 \expndtw-4\charscalex100 UNIT 2: \par\pard\qj \li2829\ri2673\sb10\sl-230\s
lmult0 \up0 \expndtw0\charscalex101 Op-Amps as AC Amplifiers:\ul0\nosupersub\cf4
\f5\fs20 Capacitor coupled Voltage Follower, High \line \up0 \expndtw0\charscal
ex100 input impedance - Capacitor coupled Voltage Follower, Capacitor coupled \
line \up0 \expndtw0\charscalex100 Non-inverting Amplifiers, High input impedance
- Capacitor coupled Non-\line \up0 \expndtw-1\charscalex100 inverting Amplifie
rs, Capacitor coupled Inverting amplifiers, setting the \line \up0 \expndt
w-1\charscalex100 upper cut-off frequency, Capacitor coupled Difference amplifie
r, Use of a \par\pard\li2829\sb0\sl-230\slmult0\fi0\tx7864 \up0 \expndtw-2\chars
calex100 single polarity power supply.\tab \up0 \expndtw-2\charscalex100 \ul0\no
supersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb220\sl-230\slmult0 \up0 \expndt
w-4\charscalex100 UNIT 3: \par\pard\qj \li2829\ri2674\sb10\sl-230\slmult0 \up0 \
expndtw0\charscalex102 Op-Amps frequency response and compensation:\ul0\nosu

persub\cf4\f5\fs20 Circuit stability, \line \up0 \expndtw-2\charscalex100 Fre
quency and phase response, Frequency compensating methods, Band \line \up
0 \expndtw-2\charscalex100 width, Slew rate effects, Z\ul0\sub\cf17\f18\fs19
in \ul0\nosupersub\cf4\f5\fs20 Mod compensation, and circuit stability \p
ar\pard\li2829\sb0\sl-230\slmult0\fi0\tx7869 \up0 \expndtw-2\charscalex100 preca
utions.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\
pard\ql \li2829\sb220\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT 4: \par\
pard\qj \li2829\ri2674\sb19\sl-220\slmult0 \up0 \expndtw-1\charscalex100 OP-AMP
Applications: \ul0\nosupersub\cf4\f5\fs20 Voltage sources, current sources and c
urrent sinks, \line \up0 \expndtw-1\charscalex100 Current amplifiers, instrument
ation amplifier, precision rectifiers, Limiting \par\pard\li2829\sb14\sl-230\slm
ult0\fi0\tx8020 \up0 \expndtw-2\charscalex100 circuits.\tab \up0 \expndtw-2\char
t0 \par\pard\ql\li2829\sb218\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT 5
: \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-4\charscalex100 More ap
plications: \ul0\nosupersub\cf4\f5\fs20 Clamping circuits, Peak detectors, sampl
e and hold \par\pard\qj \li2829\ri2806\sb0\sl-240\slmult0 \up0 \expndtw-2\charsc
alex100 circuits, V to I and I to V converters, Log and antilog amplifiers, Mu
ltiplier \line \up0 \expndtw-3\charscalex100 and divider, Triangular / rectangul
ar wave generators, Wave form generator \par\pard\li2829\sb1\sl-206\slmult0\fi0\
tx8147 \up0 \expndtw-2\charscalex100 design, phase shift oscillator, Wein bridge
oscillator.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs
par\pard\ql\li2829\sb5\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT 6: \par
\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\
pard\ql\li5834\sb80\sl-184\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub
\cf1\f2\fs16 27 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-24
0{\bkmkstart Pg24}{\bkmkend Pg24}\par\pard\qj \li2829\sb0\sl-220\slmult0 \par\pa
rd\qj\li2829\ri2674\sb119\sl-220\slmult0 \up0 \expndtw0\charscalex103 \ul0\nosup
ersub\cf3\f4\fs20 Non-linear circuit applications:\ul0\nosupersub\cf4\f5\fs20
crossing detectors, inverting Schmitt \line \up0 \expndtw-1\charscalex100 t
rigger circuits, Monostable & Astable multivibrator, Active Filters\ul0\nosupers
ub\cf3\f4\fs20 -\ul0\nosupersub\cf4\f5\fs20 First and \par\pard\li2829\sb14\sl230\slmult0\fi0\tx7838 \up0 \expndtw-2\charscalex100 second order Low pass & Hig
h pass filters.\tab \up0 \expndtw-2\charscalex100 6\ul0\nosupersub\cf3\f4\fs20
Hrs\par\pard\ql \li2829\sb228\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT
7: \par\pard\qj \li2829\ri2674\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex102 V
oltage Regulators: \ul0\nosupersub\cf4\f5\fs20 Introduction,\ul0\nosupersub\c
f3\f4\fs20 \ul0\nosupersub\cf4\f5\fs20 Series Op-Amp regulator, IC Voltage \up0
\expndtw-2\charscalex100 regulators, 723 general purpose regulator, Switching r
egulator. \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\p
ard\ql \li2829\sb211\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 8: \par\p
ard\qj \li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosup
ersub\cf4\f5\fs20 Other Linear IC applications: 555 timer - Basic timer circuit,
555 timer used \line \up0 \expndtw0\charscalex100 as astable and monostable
multivibrator, Schmitt trigger; PLL-operating \line \up0 \expndtw0\charscale
x100 principles, Phase detector / comparator, VCO; D/A and A/ D converters -\par
\pard\li2829\sb1\sl-230\slmult0\fi0\tx7891 \up0 \expndtw-2\charscalex100 Basic D
AC Techniques, AD converters.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\
cf3\f4\fs20 7 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\
slmult0\par\pard\li2829\sb6\sl-230\slmult0\fi0 \up0 \expndtw-2\charscalex100 TEX
T BOOKS:\par\pard\li2829\sb1\sl-221\slmult0\fi0\tx3189 \up0 \expndtw-2\charscale
x100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-2\charscalex100 \ul0\nosup
ersub\cf3\f4\fs20 \u8220?Operational Amplifiers and Linear IC\u8217?s\u8221?, \u
l0\nosupersub\cf4\f5\fs20 David A. Bell\ul0\nosupersub\cf3\f4\fs20 , \ul0\nosupe
rsub\cf4\f5\fs20 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 editio
n,\par\pard\li2829\sb3\sl-230\slmult0\fi350 \up0 \expndtw-2\charscalex100 PHI/Pe
arson, 2004\par\pard\ql \li2829\ri2674\sb8\sl-220\slmult0\tx3189\tx3189 \up0 \ex
pndtw-3\charscalex100 2. \tab \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf3\
f4\fs20 \u8220?Linear Integrated Circuits\u8221?, \ul0\nosupersub\cf4\f5\fs20 D.

Roy Choudhury and Shail B. Jain\ul0\nosupersub\cf3\f4\fs20 , \ul0\nosupersub\cf
4\f5\fs20 2\ul0\super\cf17\f18\fs19 nd \line\tab \up0 \expndtw-3\charscalex100 \
ul0\nosupersub\cf4\f5\fs20 edition, Reprint 2006, New Age International \par\par
d\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb2\sl-230\slmult0 \up0 \exp
ndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS: \par\pard\qj \
li3189\ri2674\sb19\sl-220\slmult0 \up0 \expndtw0\charscalex100 1. \u8220?Opamps
- Design, Applications and Trouble Shooting\u8221?, \ul0\nosupersub\cf4\f5\fs20
Terrell, \up0 \expndtw-4\charscalex100 Elsevier, 3\ul0\super\cf17\f18\fs19 rd\ul
0\nosupersub\cf4\f5\fs20 ed. 2006. \par\pard\li3189\sb13\sl-230\slmult0\fi0\tx3
472 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 2.\tab \up0 \expnd
tw-1\charscalex100 \u8220?Operational Amplifiers\u8221?, \ul0\nosupersub\cf4\f5
\fs20 George Clayton and Steve Winder,\par\pard\li3189\sb1\sl-230\slmult0\f
i0 \up0 \expndtw-1\charscalex100 Elsever\par\pard\li3189\sb0\sl-230\slmult0\fi41
0 \up0 \expndtw-1\charscalex100 5\ul0\super\cf17\f18\fs19 th\ul0\nosupersub\cf4\
f5\fs20 ed., 2008\par\pard\li3189\sb0\sl-228\slmult0\fi0 \up0 \expndtw-1\charsc
alex100 \ul0\nosupersub\cf3\f4\fs20 3. \u8220?Operational Amplifiers and Linear
Integrated Circuits\u8221?, \ul0\nosupersub\cf4\f5\fs20 Robert.\par\pard\li3189\
sb1\sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 F. Coughlin & Fred.F. Drisc
oll\ul0\nosupersub\cf3\f4\fs20 , \ul0\nosupersub\cf4\f5\fs20 PHI/Pearson, 2006\p
ar\pard\li3189\sb6\sl-230\slmult0\fi0\tx3564 \up0 \expndtw-1\charscalex100 \ul0\
nosupersub\cf3\f4\fs20 4.\tab \up0 \expndtw-1\charscalex100 \u8220?Design with
Operational Amplifiers and Analog Integrated\par\pard\li3189\sb0\sl-225\slm
ult0\fi0 \up0 \expndtw-1\charscalex100 Circuits\u8221?, \ul0\nosupersub\cf4\f5\f
s20 Sergio Franco\ul0\nosupersub\cf3\f4\fs20 , \ul0\nosupersub\cf4\f5\fs20 TMH,
3e, 2005\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\p
ar\pard\li2829\sb5\sl-230\slmult0\fi1764 \up0 \expndtw-2\charscalex100 \ul0\nosu
persub\cf3\f4\fs20 MICROCONTROLLERS LAB\par\pard\li2829\sb0\sl-230\slmult0\fi154
5 \up0 \expndtw-2\charscalex100 (Common to EC/TC/EE/IT/BM/ML)\par\pard\li2829\sb
0\sl-230\slmult0\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx4264\tx4737\tx6537\tx7
977\tx8760 \up0 \expndtw-2\charscalex100 Sub Code\tab \up0 \expndtw-2\charscalex
100 :\tab \up0 \expndtw-2\charscalex100 10ESL47\tab \up0 \expndtw-2\charscalex10
0 IA Marks\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100
25\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8759 \u
p0 \expndtw-2\charscalex100 Hrs/ Week\tab \up0 \expndtw-2\charscalex100 :\tab \u
p0 \expndtw-2\charscalex100 03\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab
\up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 03\par\pard\li
2829\sb1\sl-230\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\tx8759 \up0 \expndtw-2\c
harscalex100 Total Hrs.\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\
charscalex100 42\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 50\par\pard\ql \li5047\sb0\s
100 I. PROGRAMMING \par\pard\ql \li2829\sb0\sl-220\slmult0 \par\pard\ql\li2829\r
i2674\sb19\sl-220\slmult0\tx3069 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\c
f4\f5\fs20 1. Data Transfer - Block move, Exchange, Sorting, Finding largest ele
ment in \line\tab \up0 \expndtw-3\charscalex100 an array. \par\pard\ql \li5834\s
b0\sl-184\slmult0 \par\pard\ql\li5834\sb6\sl-184\slmult0 \up0 \expndtw-3\charsca
rh16840\pard\sb0\sl-240{\bkmkstart Pg25}{\bkmkend Pg25}\par\pard\ql \li2829\sb0\
sl-220\slmult0 \par\pard\ql\li2829\ri2677\sb119\sl-220\slmult0\tx3069 \up0 \expn
dtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 2. Arithmetic Instructions - Add
ition/subtraction, multiplication and division, \line\tab \up0 \expndtw-1\charsc
alex100 square, Cube - (16 bits Arithmetic operations - bit addressable). \par\p
ard\ql \li2829\sb12\sl-230\slmult0 \up0 \expndtw-6\charscalex100 3. Counters.
\par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-3\charscalex100 4. Boole
an & Logical Instructions (Bit manipulations). \par\pard\ql \li2829\sb13\sl-230\
slmult0 \up0 \expndtw-2\charscalex100 5. Conditional CALL & RETURN. \par\pard\ql
\li2829\ri2676\sb0\sl-240\slmult0\tx3069 \up0 \expndtw0\charscalex103 6. Code c
onversion: BCD - ASCII; ASCII - Decimal; Decimal - ASCII; \line\tab \up0 \exp
ndtw-2\charscalex100 HEX - Decimal and Decimal - HEX . \par\pard\ql \li2829\ri26
74\sb0\sl-240\slmult0\tx3069 \up0 \expndtw-1\charscalex100 7. Programs to genera

te delay, Programs using serial port and on-Chip timer / \line\tab \up0 \expndtw
-2\charscalex100 counter. \par\pard\ql \li2829\sb0\sl-180\slmult0 \up0 \expndtw3\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Note: Programming exercise is to b
e done on both 8051 & MSP430. \par\pard\ql \li5078\sb11\sl-230\slmult0 \up0 \exp
ndtw-2\charscalex100 II. INTERFACING: \par\pard\qj \li2829\ri2675\sb0\sl-240\slm
ult0 \up0 \expndtw0\charscalex103 \ul0\nosupersub\cf4\f5\fs20 Write C programs t
o interface 8051 chip to Interfacing modules to develop \up0 \expndtw-2\charscal
ex100 single chip solutions. \par\pard\ql \li2829\ri2675\sb0\sl-240\slmult0\tx30
69 \up0 \expndtw-1\charscalex100 8. Simple Calculator using 6 digit seven segmen
t displays and Hex Keyboard \line\tab \up0 \expndtw-1\charscalex100 interface to
8051. \par\pard\ql \li2829\sb0\sl-180\slmult0 \up0 \expndtw-3\charscalex100 9.
Alphanumeric LCD panel and Hex keypad input interface to 8051. \par\pard\ql \
li2829\sb11\sl-230\slmult0 \up0 \expndtw-2\charscalex100 10. External ADC and Te
mperature control interface to 8051. \par\pard\ql \li2829\ri2674\sb0\sl-240\slmu
lt0\tx3189 \up0 \expndtw0\charscalex100 11. Generate different waveforms Sine, S
quare, Triangular, Ramp etc. using \line\tab \up0 \expndtw-2\charscalex100 DAC i
nterface to 8051; change the frequency and amplitude. \par\pard\ql \li2829\sb1\s
l-193\slmult0 \up0 \expndtw-2\charscalex100 12. Stepper and DC motor control int
erface to 8051. \par\pard\ql \li2829\sb17\sl-230\slmult0 \up0 \expndtw-2\charsca
lex100 13. Elevator interface to 8051. \par\pard\ql \li5500\sb230\sl-230\slmult0
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 HDL LAB \par\pard\ql
\li4535\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 (Common to EC/TC/IT/BM/
ML) \par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb19\sl-230\slmult0\fi0\
tx4264\tx4737\tx6537\tx7977\tx8760 \up0 \expndtw-2\charscalex100 Sub Code\tab \u
p0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 10ECL48\tab \up0
\expndtw-2\charscalex100 IA Marks\tab \up0 \expndtw-2\charscalex100 :\tab \up0
\expndtw-2\charscalex100 25\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx4264\tx4737
\tx6537\tx7977\tx8759 \up0 \expndtw-2\charscalex100 Hrs/ Week\tab \up0 \expndtw2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 03\tab \up0 \expndtw-2\chars
calex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\char
scalex100 03\par\pard\li2829\sb0\sl-228\slmult0\fi0\tx4264\tx4737\tx6537\tx7977\
tx8759 \up0 \expndtw-2\charscalex100 Total Hrs.\tab \up0 \expndtw-2\charscalex10
0 :\tab \up0 \expndtw-2\charscalex100 42\tab \up0 \expndtw-2\charscalex100 Exam
Marks\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 50\p
ar\pard\ql \li2829\sb216\sl-230\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosupe
rsub\cf4\f5\fs20 Note: Programming can be done using any compiler.
Do
wnload the \par\pard\li2829\sb11\sl-230\slmult0\fi0\tx4091\tx4799\tx5399\tx6984
\tx8028\tx8901 \up0 \expndtw-2\charscalex100 programs\tab \up0 \expndtw-2\charsc
alex100 on\tab \up0 \expndtw-2\charscalex100 a\tab \up0 \expndtw-2\charscalex100
FPGA/CPLD\tab \up0 \expndtw-2\charscalex100 boards\tab \up0 \expndtw-2\charscal
ex100 such\tab \up0 \expndtw-2\charscalex100 as\par\pard\qj \li2829\ri2675\sb0\s
l-233\slmult0 \up0 \expndtw0\charscalex102 Apex/Acex/Max/Spartan/Sinfi/TK Base
or equivalent and performance \line \up0 \expndtw0\charscalex104 testing may
be done using 32 channel pattern generator and logic analyzer \line \up0 \expnd
tw0\charscalex100 apart from verification by simulation with tools such as Alter
a/Modelsim or \line \up0 \expndtw-2\charscalex100 equivalent. \par\pard\ql \li28
PROGRAMMING (using VHDL /Verilog) \par\pard\li2829\sb0\sl-230\slmult0\par\pard\l
i2829\sb18\sl-230\slmult0\fi0\tx3189 \up0 \expndtw-2\charscalex100 \ul0\nosupers
ub\cf4\f5\fs20 1.\tab \up0 \expndtw-2\charscalex100 Write HDL code to realize al
l the logic gates\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx3189 \up0 \expndtw-2\
charscalex100 2.\tab \up0 \expndtw-2\charscalex100 Write a HDL program for the f
ollowing combinational designs\par\pard\li2829\sb0\sl-228\slmult0\fi359\tx3549 \
up0 \expndtw-2\charscalex100 a.\tab \up0 \expndtw-2\charscalex100 2 to 4 decoder
\par\pard\li2829\sb1\sl-230\slmult0\fi359\tx3549 \up0 \expndtw-2\charscalex100 b
.\tab \up0 \expndtw-2\charscalex100 8 to 3 (encoder without priority & with prio
rity)\par\pard\li2829\sb1\sl-230\slmult0\fi359\tx3549 \up0 \expndtw-2\charscalex
100 c.\tab \up0 \expndtw-2\charscalex100 8 to 1 multiplexer\par\pard\li2829\sb0\
sl-230\slmult0\fi359\tx3549 \up0 \expndtw-2\charscalex100 d.\tab \up0 \expndtw-2
\charscalex100 4 bit binary to gray converter\par\pard\ql \li3189\sb1\sl-216\slm

ult0 \up0 \expndtw-1\charscalex100 e.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosuper
sub\cf4\f5\fs20 Multiplexer, de-multiplexer, comparator. \par\pard\ql \li5834\
calex100 \ul0\nosupersub\cf1\f2\fs16 29
}
g26}{\bkmkend Pg26}\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb101\sl230\slmult0\fi0\tx3189 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20
2.\tab \up0 \expndtw-1\charscalex100 Write a HDL code to describe the functions
of a Full Adder Using three\par\pard\li2829\sb1\sl-230\slmult0\fi360 \up0 \expn
dtw-1\charscalex100 modeling styles.\par\pard\li2829\sb230\sl-230\slmult0\fi0\tx
3189 \up0 \expndtw-1\charscalex100 3.\tab \up0 \expndtw-1\charscalex100 Write a
model for 32 bit ALU using the schematic diagram shown below\par\pard\li2829\sb0
\sl-228\slmult0\fi0\tx4989 \up0 \expndtw-1\charscalex100 A (31:0)\tab \up0 \expn
dtw-1\charscalex100 B (31:0)\par\pard\ql \li6213\sb0\sl-230\slmult0 \par\pard\ql
\li6213\sb0\sl-230\slmult0 \par\pard\ql\li6213\sb111\sl-230\slmult0 \up0 \expndt
w-2\charscalex100 Opcode (3:0) \par\pard\ql \li6213\sb0\sl-230\slmult0 \par\pard
l\li6213\sb20\sl-230\slmult0 \up0 \expndtw-2\charscalex100 Enable \par\pard\ql \
li6518\sb90\sl-230\slmult0 \up0 \expndtw-3\charscalex100 Out \par\pard\ql \li282
9\ri2782\sb2\sl-240\slmult0\tx3189 \up0 \expndtw0\charscalex100 \ul0\nosupersub\
cf22\f23\fs20 \u-3913?\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20
ALU should use combinational logic to calculate an output based on the \line
\tab \up0 \expndtw-2\charscalex100 four bit op-code input. \par\pard\ql \li2829\
ri2839\sb0\sl-240\slmult0\tx3189 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf
22\f23\fs20 \u-3913?\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20
ALU should pass the result to the out bus when enable line in high, and \line\
tab \up0 \expndtw-2\charscalex100 tri-state the out bus when the enable line is
low. \par\pard\ql \li2829\ri2780\sb17\sl-220\slmult0\tx3189 \up0 \expndtw0\chars
calex100 \ul0\nosupersub\cf22\f23\fs20 \u-3913?\ul0\nosupersub\cf15\f16\fs20 \u
l0\nosupersub\cf4\f5\fs20
ALU should decode the 4 bit op-code according to th
e given in example \line\tab \up0 \expndtw-2\charscalex100 below. \par\pard\li42
52\sb0\sl-230\slmult0\par\pard\li4252\sb25\sl-230\slmult0\fi0\tx5548 \up0 \expnd
tw-2\charscalex100 OPCODE\tab \up0 \expndtw-2\charscalex100 ALU OPERATION\par\pa
rd\li4252\sb10\sl-230\slmult0\fi463\tx5548 \up0 \expndtw-2\charscalex100 1.\tab
\up0 \expndtw-2\charscalex100 A + B\par\pard\li4252\sb10\sl-230\slmult0\fi463\tx
5548 \up0 \expndtw-2\charscalex100 2.\tab \up0 \expndtw-2\charscalex100 A - B\pa
r\pard\li4252\sb10\sl-230\slmult0\fi463\tx5548 \up0 \expndtw-2\charscalex100 3.\
tab \up0 \expndtw-2\charscalex100 A Complement\par\pard\li4252\sb10\sl-230\slmul
t0\fi463\tx5548 \up0 \expndtw-2\charscalex100 4.\tab \up0 \expndtw-2\charscalex1
00 A * B\par\pard\li4252\sb10\sl-230\slmult0\fi463\tx5548 \up0 \expndtw-2\charsc
alex100 5.\tab \up0 \expndtw-2\charscalex100 A AND B\par\pard\li4252\sb10\sl-230
\slmult0\fi463\tx5548 \up0 \expndtw-2\charscalex100 6.\tab \up0 \expndtw-2\chars
calex100 A OR B\par\pard\li4252\sb10\sl-230\slmult0\fi463\tx5548 \up0 \expndtw-2
\charscalex100 7.\tab \up0 \expndtw-2\charscalex100 A NAND B\par\pard\li4252\sb1
0\sl-230\slmult0\fi463\tx5548 \up0 \expndtw-2\charscalex100 8.\tab \up0 \expndtw
-2\charscalex100 A XOR B\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb58
\sl-230\slmult0\fi0\tx3189 \up0 \expndtw0\charscalex100 4.\tab \up0 \expndtw0\ch
arscalex100 Develop the HDL code for the following flip-flops, SR, D, JK, T.\par
\pard\li2829\sb0\sl-228\slmult0\fi0\tx3189\tx3950\tx6895 \up0 \expndtw0\charscal

ex100 5.\tab \up0 \expndtw0\charscalex100 Design\tab \up0 \expndtw0\charscalex10
0 4 bit binary, BCD counters\tab \up0 \expndtw0\charscalex100 (Synchrono
us reset and\par\pard\ql \li3189\sb2\sl-230\slmult0 \up0 \expndtw-4\charscal
ex100 Asynchronous reset) and \u8220?any sequence\u8221? counters \par\pard\qj \
li2829\sb0\sl-220\slmult0 \par\pard\qj\li2829\ri2675\sb19\sl-220\slmult0\fi0 \up
0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 INTERFACING \ul0\nosupers
ub\cf4\f5\fs20 (at least four of the following must be covered using \
up0 \expndtw-4\charscalex100 VHDL/Verilog) \par\pard\ql \li2829\ri2674\sb224\sl240\slmult0\tx3189\tx3189 \up0 \expndtw-3\charscalex100 1. \tab \up0 \expndtw-4\
charscalex100 Write HDL code to display messages on the given seven segment disp
lay \line\tab \up0 \expndtw-4\charscalex100 and LCD and accepting Hex key pad in
put data. \par\pard\ql \li2829\sb229\sl-230\slmult0\tx3189 \up0 \expndtw-3\chars
calex100 2. \tab \up0 \expndtw-4\charscalex100 Write HDL code to control speed,
direction of DC and Stepper motor. \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\
pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb120\sl-184\slmult0 \up0
\expndtw-3\charscalex100 \ul0\nosupersub\cf1\f2\fs16 30
}
}}
}
}}
}
}}
}
}}
}
}}
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}}
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}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
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}
}}
}
}}
\sn geoRight}{\sv 2624}}{\sp{\sn geoBottom}{\sv 1889}}{\sp{\sn shapePath}{\sv 4}
}
{\sp{\sn pSegmentInfo}{\sv 2;9;16384;45824;1;45824;1;45824;1;45824;32768}}

{\sp{\sn fFillOK}{\sv 1}}{\sp{\sn fFilled}{\sv 0}}{\sp{\sn lineWidth}{\sv 7541}}
{\sp{\sn lineType}{\sv 0}}{\sp{\sn fArrowheadsOK}{\sv 1}}{\sp{\sn fBehindDocumen
t}{\sv 1}}{\sp{\sn lineColor}{\sv 0}}
}}
bxpage\shpbypage\shpwr3\shpwrk0\shpfblwtxt1\shpz458\shplid84{\sp{\sn shapeType}{
\sv 20}}{\sp{\sn fBehindDocument}{\sv 1}}{\sp{\sn lineColor}{\sv 0}}{\sp{\sn lin
eWidth}{\sv 7541}}
g27}{\bkmkend Pg27}\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb101\sl230\slmult0\fi0\tx3189 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20
3.\tab \up0 \expndtw-1\charscalex100 Write HDL code to accept 8 channel Analog
signal, Temperature sensors\par\pard\li2829\sb1\sl-230\slmult0\fi359 \up0 \expnd
tw-1\charscalex100 and display the data on LCD panel or Seven segment display.\p
ar\pard\li2829\sb230\sl-230\slmult0\fi0\tx3189\tx7845 \up0 \expndtw-1\charscalex
100 4.\tab \up0 \expndtw-1\charscalex100 Write HDL code to generate differe
nt waveforms\tab \up0 \expndtw-1\charscalex100 (Sine, Square,\par\pard\li2829\
sb0\sl-228\slmult0\fi360 \up0 \expndtw-1\charscalex100 Triangle, Ramp etc.,) usi
ng DAC change the frequency and amplitude.\par\pard\li2829\sb0\sl-230\slmult0\pa
r\pard\li2829\sb2\sl-230\slmult0\fi0\tx3189 \up0 \expndtw-1\charscalex100 5.\tab
\up0 \expndtw-1\charscalex100 Write HDL code to simulate Elevator operations\pa
r\pard\li2829\sb3\sl-230\slmult0\fi0\tx3189 \up0 \expndtw-1\charscalex100 6.\tab
\up0 \expndtw-1\charscalex100 Write HDL code to control external lights using r
elays.\par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slm
ult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmul
t0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0
\par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \
par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \pa
\up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 31
}

b100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 V
SEMESTER \par\pard\ql \li3974\sb110\sl-230\slmult0 \up0 \expndtw-2\charscalex100
\ul0\nosupersub\cf3\f4\fs20 MANAGEMENT \ul0\nosupersub\cf23\f24\fs22 & \ul0\nos
upersub\cf3\f4\fs20 ENTREPRENEURSHIP \par\pard\li2776\sb0\sl-230\slmult0\par\par
d\li2776\sb8\sl-230\slmult0\fi0\tx4864\tx7180\tx8620 \up0 \expndtw-2\charscalex1
00 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\charscalex100 :
\ul0\nosupersub\cf3\f4\fs20 10AL51\tab \up0 \expndtw-2\charscalex100 \ul0\nosupe
rsub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2776
\sb0\sl-228\slmult0\fi0\tx7180\tx8620 \up0 \expndtw-2\charscalex100 No. of Lectu
re Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw2\charscalex100 : 03\par\pard\li2776\sb1\sl-230\slmult0\fi0\tx4864\tx7180\tx8620
\up0 \expndtw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\cha
rscalex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2
\charscalex100 : 100\par\pard\ql \li5227\sb0\sl-230\slmult0 \par\pard\ql\li5227\
sb0\sl-230\slmult0 \par\pard\ql\li5227\sb104\sl-230\slmult0 \up0 \expndtw-2\char
scalex100 \ul0\nosupersub\cf3\f4\fs20 MANAGEMENT \par\pard\ql \li2829\sb130\sl-2
30\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 1 \par\pard\qj \li2829\ri2674\sb
0\sl-230\slmult0 \up0 \expndtw0\charscalex101 MANAGEMENT: \ul0\nosupersub\cf4\f5
\fs20 Introduction - Meaning - nature and characteristics of \line \up0 \expnd
tw-1\charscalex100 Management, Scope and functional areas of Management - Manage
ment as a \line \up0 \expndtw-1\charscalex100 Science, Art or Profession Man
agement \ul0\nosupersub\cf24\f25\fs19 & \ul0\nosupersub\cf4\f5\fs20 Administra
tion \up0 \expndtw-1\charscalex100 - Roles of \par\pard\qj \li2829\ri2674\sb0\
sl-240\slmult0 \up0 \expndtw0\charscalex100 Management, Levels of Manageme
nt, Development of Management \line \up0 \expndtw-2\charscalex100 ThoughtEarly Management Approaches-Modern Management Approaches. \par\pard\ql \li8121\s
b1\sl-206\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hr
s \par\pard\ql \li2829\sb7\sl-215\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 2
\par\pard\ql \li2829\sb4\sl-217\slmult0\tx9002 \up0 \expndtw0\charscalex103 PLA
NNING:\ul0\nosupersub\cf4\f5\fs20 Nature, importance and purpose of plann
ing process \tab \up0 \expndtw-2\charscalex100 -\par\pard\qj \li2829\ri2675\sb2
1\sl-220\slmult0 \up0 \expndtw0\charscalex100 Objectives - Types of plans (Meani
ng only) - Decision making - Importance \line \up0 \expndtw-1\charscalex100 of p
lanning - steps in planning \ul0\nosupersub\cf25\f26\fs21 & \ul0\nosupersub\cf4\
f5\fs20 planning premises - Hierarchy of plans. \par\pard\ql \li8169\sb12\sl-230
\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pa
rd\ql \li2829\sb170\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 3 \par\p
ard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex102 ORGANISING AND ST
AFFING:\ul0\nosupersub\cf4\f5\fs20 Nature and purpose of organization -\par\pa
rd\li2829\sb10\sl-230\slmult0\fi0\tx5152\tx7351\tx8999 \up0 \expndtw-1\charscale
x100 Principles of organization\tab \up0 \expndtw0\charscalex101 - Types of
organization\tab \up0 \expndtw-1\charscalex100 - Departmentation\tab \up0 \exp
ndtw0\charscalex101 -\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx3986 \up0 \expndt
w0\charscalex101 Committees\tab \up0 \expndtw0\charscalex101 - Centralisation
Vs Decentralisation of authority and\par\pard\qj \li2829\ri2678\sb0\sl
-240\slmult0 \up0 \expndtw0\charscalex100 responsibility - Span of control - MBO
and MBE (Meaning only) Nature and \up0 \expndtw-1\charscalex100 importance of S
taffing - Process of Selection \ul0\nosupersub\cf26\f27\fs19 & \ul0\nosupersub\c
f4\f5\fs20 Recruitment (in brief). \par\pard\ql \li8212\sb1\sl-208\slmult0 \up0
\expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\
sb154\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 4 \par\pard\qj \li2829
\ri2675\sb0\sl-240\slmult0\fi0 \up0 \expndtw-1\charscalex100 DIRECTING \ul0\nosu
persub\cf27\f28\fs22 & \ul0\nosupersub\cf3\f4\fs20 CONTROLLING:\ul0\nosupersub
\cf4\f5\fs20 Meaning and nature of directing -\line \up0 \expndtw-1\chars
calex100 Leadership styles, Motivation Theories, Communication \up0 \expndtw
-1\charscalex100 - Meaning and \par\pard\qj \li2829\ri2675\sb0\sl-240\slmult0
\up0 \expndtw0\charscalex100 importance - Coordination, meaning and importance a
nd Techniques of Co -\line \up0 \expndtw0\charscalex100 ordination. Meaning and
steps in controlling - Essentials of a sound control \par\pard\li2829\sb1\sl-190
\slmult0\fi0\tx8294 \up0 \expndtw-2\charscalex100 system - Methods of establishi

ng control.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\
par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\l
i2829\sb128\sl-230\slmult0\fi2027 \up0 \expndtw0\charscalex100 ENTREPRENEURSHIP\
par\pard\li2829\sb114\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex100 UNIT - 5\p
ar\pard\li2829\sb0\sl-225\slmult0\fi0 \up0 \expndtw0\charscalex100 ENTREPRENEUR:
\ul0\nosupersub\cf4\f5\fs20 Meaning of Entrepreneur; Evolution of the Concept,\
par\pard\li2829\sb2\sl-230\slmult0\fi0\tx8692 \up0 \expndtw0\charscalex100 Funct
ions of an Entrepreneur, Types of Entrepreneur, Intrapreneur\tab \up0 \ex
pndtw0\charscalex100 - an\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx7533\tx7852
\up0 \expndtw0\charscalex100 emerging
Class.
Concept
of
Entrepreneur
ship\tab \up0 \expndtw0\charscalex100 -\tab \up0 \expndtw0\charscalex100 Evoluti
on
of\par\pard\ql \li5834\sb10\sl-184\slmult0 \up0 \expndtw-1\charscalex100 \
ul0\nosupersub\cf1\f2\fs16 32
bxpage\shpbypage\shpwr3\shpwrk0\shpfblwtxt1\shpz246\shplid0{\sp{\sn shapeType}{\
sv 20}}{\sp{\sn fBehindDocument}{\sv 1}}{\sp{\sn lineColor}{\sv 0}}{\sp{\sn line
Width}{\sv 18812}}
i2684\sb119\sl-220\slmult0 \up0 \expndtw0\charscalex106 \ul0\nosupersub\cf4\f5\f
s20 Entrepreneurship,
Development
of
Entrepreneurship;
Stages
in
\line \up0 \expndtw0\charscalex103 entrepreneurial process; Role of entrepreneur
s in Economic Development; \par\pard\li2829\sb14\sl-230\slmult0\fi0\tx8241 \up0
\expndtw-2\charscalex100 Entrepreneurship in India; Entrepreneurship - its Barri
ers.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\par
d\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb118\sl-230\slmult0 \up0 \e
xpndtw-2\charscalex100 UNIT - 6 \par\pard\qj \li2829\ri2674\sb0\sl-230\slmult0 \
up0 \expndtw0\charscalex103 SMALL SCALE INDUSTRY:\ul0\nosupersub\cf4\f5\fs20
Definition; Characteristics; Need and \line \up0 \expndtw0\charscalex105 rat
ionale: Objectives; Scope; role of SSI in Economic Development. \line \u
p0 \expndtw0\charscalex103 Advantages of SSI Steps to start an SSI - Government
policy towards SSI; \line \up0 \expndtw0\charscalex104 Different Policies of S.S
.I.; Government Support for S.S.I. during 5 year \line \up0 \expndtw0\charscal
ex100 plans, Impact of Liberalization, Privatization, Globalization on S.S.I., E
ffect \line \up0 \expndtw-1\charscalex100 of WTO/GATT Supporting Agencies of
Government for S.S.I Meaning; \line \up0 \expndtw-1\charscalex100 Nature of
Support; Objectives; Functions; Types of Help; Ancillary Industry \par\pard\li2
829\sb1\sl-225\slmult0\fi0\tx8123 \up0 \expndtw-2\charscalex100 and Tiny Industr
y (Definition only).\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs
20 7 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb105\sl-230
\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 7 \par\pard\qj \li2829\ri2703\sb19
\sl-220\slmult0 \up0 \expndtw0\charscalex100 INSTITUTIONAL SUPPORT:\ul0\nosupers
ub\cf4\f5\fs20 Different Schemes; TECKSOK; KIADB; \line \up0 \expndtw-2\charsca
lex100 KSSIDC; KSIMC; DIC Single Window Agency: SISI; NSIC; SIDBI; KSFC. \par\pa
rd\ql \li8121\sb12\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\
scalex100 UNIT - 8 \par\pard\qj \li2829\ri2701\sb0\sl-230\slmult0 \up0 \expndtw0
\charscalex106 PREPARATION OF PROJECT:\ul0\nosupersub\cf4\f5\fs20
Meaning
of Project; Project \line \up0 \expndtw0\charscalex103 Identification; Pr
oject Selection; Project Report; Need and Significance of \line \up0 \expndtw0\c
harscalex100 Report; Contents; formulation; Guidelines by Planning Commiss
ion for \line \up0 \expndtw0\charscalex106 Project report; Network Analysis;
Errors of Project Report; Project \line \up0 \expndtw-1\charscalex100 Appr
aisal. Identification of Business Opportunities \up0 \expndtw0\charscalex100
- Market Feasibility \par\pard\ql \li2829\sb0\sl-230\slmult0 \up0 \expndtw-1\
charscalex100 Study; Technical Feasibility Study; Financial Feasibility St
udy \ul0\nosupersub\cf29\f30\fs22 & \ul0\nosupersub\cf4\f5\fs20 Social \par\pa
rd\li2829\sb9\sl-230\slmult0\fi0\tx8243 \up0 \expndtw-2\charscalex100 Feasibilit
y Study.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par

0 \expndtw-2\charscalex100 TEXT BOOKS: \par\pard\qj \li3232\ri2684\sb0\sl-220\sl
mult0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\ul0\nosupersub
\cf3\f4\fs20 Principles of Management\ul0\nosupersub\cf4\f5\fs20 - P. C.
Tripathi, P. N. Reddy; Tata \up0 \expndtw-2\charscalex100 McGraw Hill, 4\ul0
\super\cf17\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 Edition, 2010 \par\pard\ql \
li3232\sb11\sl-230\slmult0\tx8990 \up0 \expndtw0\charscalex100 2.\ul0\nosupersub
\cf3\f4\fs20 Dynamics of Entrepreneurial Development \ul0\nosupersub\cf23\f24
\fs22 & \ul0\nosupersub\cf3\f4\fs20 Management \tab \up0 \expndtw-2\charscalex
100 \ul0\nosupersub\cf4\f5\fs20 -\par\pard\ql \li3232\sb1\sl-217\slmult0 \up0 \e
xpndtw-2\charscalex100 Vasant Desai Himalaya Publishing House. \par\pard\li3232\
sb19\sl-230\slmult0\fi0\tx6307\tx8990 \up0 \expndtw-1\charscalex100 3.\ul0\nosup
ersub\cf3\f4\fs20 Entrepreneurship Development\tab \up0 \expndtw-1\charscalex10
0 \ul0\nosupersub\cf4\f5\fs20 - Small Business Enterprises\tab \up0 \expndtw1\charscalex100 -\par\pard\li3232\sb0\sl-230\slmult0\fi0 \up0 \expndtw-1\charsca
lex100 Poornima M Charantimath - Pearson Education - 2006.\par\pard\li2877\sb0\s
l-230\slmult0\par\pard\li2877\sb167\sl-230\slmult0\fi0 \up0 \expndtw-1\charscale
x100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS:\par\pard\li2877\sb0\sl-225\slm
ult0\fi360\tx3597\tx6295 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs
20 1.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Management
Fundamentals\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Concepts, Application, Skill\par\pard\li2877\sb2\sl-230\slmult0\fi720 \up0 \
expndtw-1\charscalex100 Development Robert Lusier - Thomson.\par\pard\li2877\sb0
\sl-228\slmult0\fi359\tx3597 \up0 \expndtw-1\charscalex100 2.\tab \up0 \expndtw1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Entrepreneurship Development\ul0\nos
upersub\cf4\f5\fs20 - S S Khanka - S Chand \ul0\nosupersub\cf31\f32\fs21 & \ul0
\nosupersub\cf4\f5\fs20 Co.\par\pard\li2877\sb1\sl-230\slmult0\fi360\tx3597 \up0
\expndtw-1\charscalex100 3.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\c
f3\f4\fs20 Management\ul0\nosupersub\cf4\f5\fs20 - Stephen Robbins - Pearson
Education /PHI -17\ul0\super\cf17\f18\fs19 th\par\pard\ql \li3597\sb1\sl-221\s
lmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Edition, 2003.
\par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb66\sl-184\slmult0
\up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 33 \par\pard\sect\sect
d\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg30}{\bkmkend Pg30}\p
ar\pard\ql \li4432\sb0\sl-230\slmult0 \par\pard\ql\li4432\sb100\sl-230\slmult0 \
up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 DIGITAL SIGNAL PROCESSI
NG \par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb2\sl-230\slmult0\fi0\tx
4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Sub
ject Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC52
\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0
\expndtw-2\charscalex100 : 25\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx7077\tx8
517 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw
-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li28
29\sb0\sl-228\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Tot
al no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \
li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb221\sl-230\slmult0 \up0 \expndtw
-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\ql \li2829\sb10\
sl-230\slmult0\tx5445 \up0 \expndtw0\charscalex101 \ul0\nosupersub\cf4\f5\fs20 D
iscrete Fourier Transforms \tab \up0 \expndtw0\charscalex103 (DFT): Frequency
domain sampling and \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\c
harscalex104 reconstruction of discrete time signals. DFT as a linear transforma
tion, its \par\pard\li2829\sb13\sl-230\slmult0\fi0\tx8049 \up0 \expndtw-2\charsc
alex100 relationship with other transforms.\tab \up0 \expndtw-2\charscalex100 \u
l0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \e
xpndtw-2\charscalex100 UNIT - 2 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \ex
pndtw0\charscalex105 \ul0\nosupersub\cf4\f5\fs20 Properties of DFT, multiplicati
on of two DFTs- the circular convolution, \par\pard\li2829\sb15\sl-230\slmult0\
fi0\tx8059 \up0 \expndtw-2\charscalex100 additional DFT properties.\tab \up0 \ex
pndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb22
8\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 3 \par\pard\ql \li2829\sb1

\sl-217\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Use of
DFT in linear filtering, overlap-save and overlap-add method. \par\pard\ql \li2
829\sb13\sl-230\slmult0 \up0 \expndtw0\charscalex100 Direct computation of DFT,
need for efficient computation of the DFT (FFT \par\pard\li2829\sb2\sl-230\slmul
t0\fi0\tx8102 \up0 \expndtw-2\charscalex100 algorithms).\tab \up0 \expndtw-2\cha
mult0 \up0 \expndtw-2\charscalex100 UNIT - 4 \par\pard\qj \li2829\ri2673\sb19\sl
-220\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 Radix-2 FF
T algorithm for the computation of DFT and IDFT-decimation-\line \up0 \expndtw0\
charscalex100 in-time and decimation-in-frequency algorithms. Goertzel algo
rithm, and \par\pard\li2829\sb13\sl-230\slmult0\fi0\tx8174 \up0 \expndtw-2\char
scalex100 chirp-z transform.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\c
f3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb229\sl-230\slmult0 \up0 \expndtw-2\charsc
alex100 UNIT - 5 \par\pard\ql \li2829\sb1\sl-217\slmult0\tx8966 \up0 \expndtw0\c
harscalex105 \ul0\nosupersub\cf4\f5\fs20 IIR filter design: Characteristics
of commonly used analog filters \tab \up0 \expndtw-2\charscalex100 -\par\par
d\ql \li2829\sb13\sl-230\slmult0 \up0 \expndtw0\charscalex106 Butterworth and
Chebysheve filters, analog to analog frequency \par\pard\li2829\sb1\
sl-230\slmult0\fi0\tx8186 \up0 \expndtw-4\charscalex100 transformations.\tab \up
0 \expndtw-4\charscalex100 6 \ul0\nosupersub\cf3\f4\fs20 Hrs\par\pard\ql \li28
29\sb219\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 6 \par\pard\qj \li2
829\ri2672\sb19\sl-220\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4
\f5\fs20 Implementation of discrete-time systems: Structures for IIR and FIR sys
tems-\line \up0 \expndtw-1\charscalex100 direct form I and direct form II
systems, cascade, lattice and parallel \par\pard\li2829\sb12\sl-230\slmult0
\fi0\tx8222 \up0 \expndtw-2\charscalex100 realization.\tab \up0 \expndtw-2\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb230\sl-230\slmu
lt0 \up0 \expndtw-2\charscalex100 UNIT - 7 \par\pard\qj \li2829\ri2674\sb0\sl-24
0\slmult0 \up0 \expndtw0\charscalex105 \ul0\nosupersub\cf4\f5\fs20 FIR filter de
sign: Introduction to FIR filters, design of FIR filters using -\line \up0 \exp
ndtw0\charscalex100 Rectangular, Hamming, Bartlet and Kaiser windows, FIR filter
design using \par\pard\li2829\sb1\sl-206\slmult0\fi0\tx8270 \up0 \expndtw-2\cha
rscalex100 frequency sampling technique.\tab \up0 \expndtw-2\charscalex100 \ul0\
nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql
\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\l
harscalex100 \ul0\nosupersub\cf1\f2\fs16 34
Width}{\sv 18812}}
b0\sl-230\slmult0 \par\pard\ql\li2829\sb90\sl-230\slmult0 \up0 \expndtw-2\charsc
alex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 8 \par\pard\qj \li2829\ri2674\sb14\sl
-226\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Design o
f IIR filters from analog filters (Butterworth and Chebyshev) -\line \u
p0 \expndtw-1\charscalex100 impulse invariance method. Mapping of transfer funct
ions: Approximation of \line \up0 \expndtw-2\charscalex100 derivative \up0 \expn
dtw0\charscalex104 (backward difference and bilinear transformation) method
, \line \up0 \expndtw-1\charscalex100 Matched z transforms, Verification for sta
bility and linearity during mapping \par\pard\ql \li8102\sb11\sl-230\slmult0 \up
0 \expndtw-3\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li282
9\sb230\sl-230\slmult0 \up0 \expndtw-2\charscalex100 TEXT BOOK: \par\pard\li2829
\sb2\sl-230\slmult0\fi360\tx3549\tx6254 \up0 \expndtw-1\charscalex100 \ul0\nosup
ersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs
20 Digital
signal
processing\tab \up0 \expndtw-1\charscalex100 \ul0\nosupe
rsub\cf4\f5\fs20 - \ul0\nosupersub\cf3\f4\fs20
Principles
Algorithms
&\
par\pard\li2829\sb0\sl-228\slmult0\fi720 \up0 \expndtw-1\charscalex100 Applicati

ons\ul0\nosupersub\cf4\f5\fs20 , Proakis & Monalakis, Pearson education, 4\ul0\s
uper\cf17\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 Edition,\par\pard\li2829\sb2\s
l-230\slmult0\fi720 \up0 \expndtw-1\charscalex100 New Delhi, 2007.\par\pard\li28
29\sb0\sl-230\slmult0\par\pard\li2829\sb5\sl-230\slmult0\fi0 \up0 \expndtw-1\cha
rscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS:\par\pard\li2829\sb0\sl-2
0 1.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Discrete Tim
e Signal Processing\ul0\nosupersub\cf4\f5\fs20 , Oppenheim & Schaffer, PHI,
\par\pard\li2829\sb1\sl-230\slmult0\fi720 \up0 \expndtw-1\charscalex100 2003.\pa
r\pard\li2829\sb0\sl-228\slmult0\fi359\tx3549 \up0 \expndtw-1\charscalex100 2.\t
ab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Digital Signal Pro
cessing\ul0\nosupersub\cf4\f5\fs20 , S. K. Mitra, Tata Mc-Graw Hill, 3\ul
0\super\cf17\f18\fs19 rd\par\pard\li2829\sb2\sl-230\slmult0\fi719 \up0 \expndtw1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Edition, 2010.\par\pard\li2829\sb0\s
l-230\slmult0\fi359\tx3549 \up0 \expndtw-1\charscalex100 3.\tab \up0 \expndtw-1\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 Digital Signal Processing\ul0\nosupers
ub\cf4\f5\fs20 , Lee Tan: Elsivier publications, 2007\par\pard\li2829\sb0\sl-230
\slmult0\par\pard\li2829\sb1\sl-230\slmult0\fi1799 \up0 \expndtw-2\charscalex100
ANALOG COMMUNICATION\par\pard\li2829\sb228\sl-230\slmult0\fi0\tx4917\tx7077\tx8
517 \up0 \expndtw-2\charscalex100 Subject Code\tab \up0 \expndtw-2\charscalex100
: \ul0\nosupersub\cf3\f4\fs20 10EC53\tab \up0 \expndtw-2\charscalex100 \ul0\nos
upersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2
829\sb1\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex100 No. of Le
cture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expnd
tw-2\charscalex100 : 03\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx4917\tx7077\tx8
517 \up0 \expndtw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\
charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndt
w-2\charscalex100 : 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li28
harscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\qj \li2829\ri2674\sb
0\sl-226\slmult0 \up0 \expndtw0\charscalex102 RANDOM PROCESS:\ul0\nosupersub\cf
4\f5\fs20 Random variables: Several random variables. \line \up0 \expndtw0
\charscalex105 Statistical averages: Function of Random variables, moments
, Mean, \line \up0 \expndtw0\charscalex100 Correlation and Covariance function:
Principles of autocorrelation function, \line \up0 \expndtw0\charscalex100 cros
s - correlation functions. Central limit theorem, Properties of Gaussian \par\pa
rd\li2829\sb9\sl-230\slmult0\fi0\tx8181 \up0 \expndtw-2\charscalex100 process.\t
ab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \
li2829\sb226\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 2 \par\pard\qj
\li2829\ri2674\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex100 AMPLITUDE
MODU
LATION: \ul0\nosupersub\cf4\f5\fs20
Introduction,
AM:
Time-Domain \line
\up0 \expndtw-2\charscalex100 description, Frequency \up0 \expndtw0\charscalex
100 - Domain description. Generation of AM wave: \par\pard\qj \li2829\ri26
74\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex100 square law modulator, switchi
ng modulator. Detection of AM waves: square \line \up0 \expndtw0\charscalex106 l
aw detector, envelop detector. Double side band suppressed carrier \line
\up0 \expndtw-2\charscalex100 modulation \up0 \expndtw0\charscalex102 (DSBSC):
Time-Domain description, Frequency-Domain \line \up0 \expndtw0\charscalex1
02 representation, Generation of DSBSC waves: balanced modulator, ring \l
ine \up0 \expndtw-2\charscalex100 modulator. Coherent detection of DSBSC modulat
ed waves. Costas loop. \par\pard\ql \li8171\sb1\sl-206\slmult0 \up0 \expndtw-2\c
harscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li5834\sb0\sl-184\s
lmult0 \par\pard\ql\li5834\sb89\sl-184\slmult0 \up0 \expndtw-1\charscalex100 \ul
0\nosupersub\cf1\f2\fs16 35

}
}}
Width}{\sv 18812}}
alex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 3 \par\pard\ql \li2829\sb10\sl-230\sl
mult0\tx6696 \up0 \expndtw0\charscalex100 SINGLE SIDE-BAND MODULATION \tab \
up0 \expndtw0\charscalex102 (SSB):\ul0\nosupersub\cf4\f5\fs20
Quadrature ca
rrier \par\pard\qj \li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex10
5 multiplexing, Hilbert transform, properties of Hilbert transform, Pre-\
line \up0 \expndtw0\charscalex104 envelope, Canonical representation of band pas
s signals, Single side-band \line \up0 \expndtw0\charscalex100 modulation, Freq
uency-Domain description of SSB wave, Time-Domain \line \up0 \expndtw0\char
scalex102 description. Phase discrimination method for generating an SSB modulat
ed \line \up0 \expndtw-1\charscalex100 wave, Time-Domain description. Phase disc
rimination method for generating \par\pard\li2829\sb2\sl-230\slmult0\fi0\tx8260
\up0 \expndtw-2\charscalex100 an SSB modulated wave. Demodulation of SSB waves.\
\li2829\sb228\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 4 \par\pard\qj
\li2829\ri2674\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex100 VESTIGIAL SIDE-B
AND MODULATION (VSB):\ul0\nosupersub\cf4\f5\fs20 Frequency - Domain \line \up0
\expndtw0\charscalex100 description, Generation of VSB modulated wave,
Time \up0 \expndtw0\charscalex100 - Domain \par\pard\qj \li2829\ri2674\sb0\
sl-240\slmult0 \up0 \expndtw0\charscalex103 description, Envelop detection of V
SB wave plus carrier, Comparison of \line \up0 \expndtw0\charscalex100 amplitu
de modulation techniques, Frequency translation, Frequency division \par\pard\li
2829\sb1\sl-184\slmult0\fi0\tx8337 \up0 \expndtw-2\charscalex100 multiplexing, A
pplication: Radio broadcasting, AM radio.\tab \up0 \expndtw-2\charscalex100 \ul0
\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\q
l\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb6\sl-230\slmult0 \up0 \expndtw
-2\charscalex100 UNIT - 5 \par\pard\qj \li2829\ri2667\sb0\sl-240\slmult0 \up0 \e
xpndtw-3\charscalex100 ANGLE MODULATION (FM)-I: \ul0\nosupersub\cf4\f5\fs20 Ba
sic definitions, FM, narrow band FM, \line \up0 \expndtw-3\charscalex100 wide ba
nd FM, transmission bandwidth of FM waves, generation of FM \par\pard\li2829
\sb1\sl-206\slmult0\fi0\tx8371 \up0 \expndtw-2\charscalex100 waves: indirect FM
and direct FM.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 H
rs\par\pard\ql \li2829\sb225\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 6 \par\pard\qj \li2829\ri2675\sb10\sl-230\slmult0 \up0 \expndtw-1\charscalex100
ANGLE MODULATION (FM)-II: \ul0\nosupersub\cf4\f5\fs20 Demodulation of FM waves,
FM stereo \line \up0 \expndtw-1\charscalex100 multiplexing, Phase-locked loop
, Nonlinear model of the phase - locked \line \up0 \expndtw-1\charscalex1
00 loop, Linear model of the phase - locked loop, Nonlinear effects in FM \par\
pard\li2829\sb0\sl-230\slmult0\fi0\tx8414 \up0 \expndtw-2\charscalex100 systems.
\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql
\li2829\sb220\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 7 \par\pard\q
j \li2829\ri2674\sb19\sl-220\slmult0\fi0 \up0 \expndtw0\charscalex106 NOISE: \ul
0\nosupersub\cf4\f5\fs20 Introduction, shot noise, thermal noise, white n
oise, Noise \line \up0 \expndtw0\charscalex100 equivalent bandwidth, Narrow ban
dwidth,
Noise Figure, Equivalent noise \par\pard\li2829\sb14\sl-230\slmult0\f
i0\tx8373 \up0 \expndtw-2\charscalex100 temperature, cascade connection of two-p
ort networks.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hr
s\par\pard\ql \li2829\sb228\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 8 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex101 NOISE I
N CONTINUOUS WAVE MODULATION SYSTEMS: \par\pard\qj \li2829\ri2675\sb21\s
l-220\slmult0 \up0 \expndtw0\charscalex103 \ul0\nosupersub\cf4\f5\fs20 Introduct
ion, Receiver model, Noise in DSB-SC receivers, Noise in SSB \line \up0 \expn
dtw0\charscalex103 receivers, Noise in AM receivers, Threshold effect, Noise in
FM receivers, \par\pard\li2829\sb14\sl-230\slmult0\fi0\tx8426 \up0 \expndtw-2\ch
arscalex100 FM threshold effect, Pre-emphasis and De-emphasis in FM,.\tab \up0 \
expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\li2829\sb0\sl
-230\slmult0\par\pard\li2829\sb3\sl-230\slmult0\fi0 \up0 \expndtw-2\charscalex10
0 TEXT BOOKS:\par\pard\li2829\sb0\sl-226\slmult0\fi360\tx3549 \up0 \expndtw-2\ch
arscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-2\charscalex100 \ul
0\nosupersub\cf3\f4\fs20 Communication Systems\ul0\nosupersub\cf4\f5\fs20 , Simo
n Haykins, 5\ul0\super\cf17\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 Edition, Joh
n Willey,\par\pard\li2829\sb1\sl-230\slmult0\fi720 \up0 \expndtw-2\charscalex100
India Pvt. Ltd, 2009.\par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li583
4\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb79\sl-184\slmult0 \up0 \expndtw-1\cha
rscalex100 \ul0\nosupersub\cf1\f2\fs16 36 \par\pard\sect\sectd\fs24\paperw11900\
paperh16840\pard\sb0\sl-240{\bkmkstart Pg33}{\bkmkend Pg33}\par\pard\li3189\sb0\
sl-230\slmult0\par\pard\li3189\sb101\sl-230\slmult0\fi0\tx3549 \up0 \expndtw0\ch
arscalex101 \ul0\nosupersub\cf4\f5\fs20 2.\tab \up0 \expndtw0\charscalex101 \ul0
\nosupersub\cf3\f4\fs20 An Introduction to Analog and Digital Communication\ul0\
nosupersub\cf4\f5\fs20 , Simon\par\pard\ql \li3549\sb1\sl-216\slmult0 \up0 \expn
dtw-2\charscalex100 Haykins, John Wiley India Pvt. Ltd., 2008 \par\pard\ql \li28
rscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS: \par\pard\ql \li3189\ri2
617\sb19\sl-220\slmult0\tx3549\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosuper
sub\cf4\f5\fs20 1. \tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20
Modern digital and analog Communication systems\ul0\nosupersub\cf4\f5\fs20 B.
P. Lathi, \line\tab \up0 \expndtw-5\charscalex100 Oxford University Press., 4\ul
0\super\cf17\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20
ed, 2010, \par\pard\li3
189\sb13\sl-230\slmult0\fi0\tx3549 \up0 \expndtw0\charscalex100 2.\tab \up0 \exp
ndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Communication Systems\ul0\nosup
ersub\cf4\f5\fs20 , Harold P.E, Stern Samy and
A\par\pard\li3189\sb1\sl
-230\slmult0\fi360 \up0 \expndtw0\charscalex100 Mahmond, Pearson Edn, 2004.\par\
pard\li3189\sb0\sl-230\slmult0\fi0\tx3549 \up0 \expndtw0\charscalex100 3.\tab \u
p0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Communication Systems\ul
0\nosupersub\cf4\f5\fs20 : Singh and Sapre\ul0\nosupersub\cf3\f4\fs20 : \ul0\
nosupersub\cf4\f5\fs20 Analog and digital\par\pard\li3189\sb0\sl-230\slmult0\
fi359 \up0 \expndtw0\charscalex100 TMH 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupers
ub\cf4\f5\fs20 , Ed 2007.\par\pard\li2855\sb0\sl-230\slmult0\par\pard\li2855\sb
0\sl-230\slmult0\par\pard\li2855\sb4\sl-230\slmult0\fi1742 \up0 \expndtw-2\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 MICROWAVES AND RADAR\par\pard\li2855\sb226\
sl-230\slmult0\fi0\tx4943\tx7103\tx8544 \up0 \expndtw-2\charscalex100 \ul0\nosup
ersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nosupers
ub\cf3\f4\fs20 10EC54\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\f
s20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2855\sb0\sl-230\s
lmult0\fi0\tx7103\tx8543 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week :
00 : 03\par\pard\li2855\sb0\sl-228\slmult0\fi0\tx4943\tx7103\tx8543 \up0 \expndt
w-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 :
52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex10
0 : 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb221\sl-230\
slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\
pard\ql \li2829\ri2693\sb14\sl-226\slmult0 \up0 \expndtw-2\charscalex100 MICROWA
VE TRANSMISSION LINES:\ul0\nosupersub\cf4\f5\fs20 Introduction, transmission li
nes \line \up0 \expndtw-1\charscalex100 equations and solutions, reflection and
transmission coefficients, standing \line \up0 \expndtw-2\charscalex100 waves an
d SWR, line impedance and line admittance. Smith chart, \line \up0 \expndtw-2\ch
arscalex100 impedance matching using single stubs, Microwave coaxial connectors.
\par\pard\ql \li7811\sb11\sl-230\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nos

upersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndt
w-2\charscalex100 UNIT - 2 \par\pard\qj \li2829\ri2675\sb0\sl-230\slmult0 \up0 \
expndtw0\charscalex100 MICROWAVE WAVEGUIDES AND COMPONENTS:\ul0\nosupersub\cf
4\f5\fs20 Introduction, \up0 \expndtw-1\charscalex100 rectangular waveguides,
circular waveguides, microwave cavities, microwave \up0 \expndtw-2\charscalex100
hybrid circuits, directional couplers, circulators and isolators. \par\pard\ql
fs20 6 Hrs \par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-2\charscalex1
00 UNIT - 3 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex10
0 MICROWAVE DIODES\ul0\nosupersub\cf4\f5\fs20 , \par\pard\qj \li2829\ri2674\sb13
\sl-230\slmult0 \up0 \expndtw0\charscalex102 Transfer electron devices: Introduc
tion, GUNN effect diodes - GaAs diode, \up0 \expndtw0\charscalex103 RWH theory,
Modes of operation, Avalanche transit time devices: READ \up0 \expndtw-2\charsca
lex100 diode, IMPATT diode, BARITT diode, Parametric amplifiers \par\pard\li2829
\sb2\sl-230\slmult0\fi0\tx8126 \up0 \expndtw-2\charscalex100 Other diodes: PIN d
iodes, Schottky barrier diodes.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersu
b\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb218\sl-230\slmult0 \up0 \expndtw-2\cha
rscalex100 UNIT - 4 \par\pard\qj \li2829\ri2674\sb19\sl-220\slmult0 \up0 \expndt
w0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Microwave network theory and pa
ssive devices. Symmetrical Z and Y \line \up0 \expndtw0\charscalex100 param
eters, for reciprocal Networks, S matrix representation of multi port \par\pard\
li2829\sb13\sl-230\slmult0\fi0\tx8164 \up0 \expndtw-2\charscalex100 networks.\ta
b \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \l
6 37
Width}{\sv 18812}}
mult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Microwave passiv
e devices, Coaxial connectors and adapters, Phase shifters, \par\pard\li2829\sb2
\sl-230\slmult0\fi0\tx8123 \up0 \expndtw-2\charscalex100 Attenuators, Waveguide
Tees, Magic tees.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20
6 Hrs\par\pard\ql \li2829\sb218\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNI
T - 6 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-3\charscalex100 STR
IP LINES:\ul0\nosupersub\cf4\f5\fs20 Introduction, Microstrip lines, Parallle st
rip lines, Coplanar \par\pard\li2829\sb2\sl-230\slmult0\fi0\tx8114 \up0 \expndtw
-2\charscalex100 strip lines, Shielded strip Lines.\tab \up0 \expndtw-2\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \
par\pard\ql\li2829\sb228\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT - 7 \
par\pard\qj \li2829\ri2675\sb0\sl-240\slmult0 \up0 \expndtw-2\charscalex100 AN I
NTRODUCTION TO RADAR:\ul0\nosupersub\cf4\f5\fs20 Basic Radar, The simple form o
f the \line \up0 \expndtw-2\charscalex100 Radar equation, Radar block diagra
m, Radar frequencies, application of \par\pard\li2829\sb1\sl-208\slmult0\fi0
\tx8203 \up0 \expndtw-1\charscalex100 Radar, the origins of Radar.\tab \up0 \exp
ndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\li2829\sb0\sl-23
0\slmult0\par\pard\li2829\sb9\sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 U
NIT - 8\par\pard\li2829\sb1\sl-221\slmult0\fi0 \up0 \expndtw-1\charscalex100 MTI
AND PULSE DOPPLER RADAR:\ul0\nosupersub\cf4\f5\fs20 Introduction to Doppler an
d MTI\par\pard\li2829\sb3\sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 Radar
, delay line Cancellers, digital MTI processing, Moving target detector,\par\par
d\li2829\sb0\sl-230\slmult0\fi0\tx8236 \up0 \expndtw-1\charscalex100 pulse Doppl
er Radar.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\pa
r\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb1\sl-230\slmult0\fi0 \up0 \ex
pndtw-1\charscalex100 TEXT BOOKS\ul0\nosupersub\cf4\f5\fs20 :\par\pard\li2829\sb

0\sl-228\slmult0\fi360\tx3549 \up0 \expndtw-1\charscalex100 1.\tab \up0 \expndtw
-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Microwave Devices and circuits\ul0\
nosupersub\cf4\f5\fs20 - Liao / Pearson Education.\par\pard\li2829\sb1\sl-230\sl
mult0\fi360\tx3549 \up0 \expndtw-1\charscalex100 2.\tab \up0 \expndtw-1\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 Introduction to Radar systems\ul0\nosupersub\c
f4\f5\fs20 -Merrill I Skolnik, 3\ul0\super\cf17\f18\fs19 rd\ul0\nosupersub\cf4\
f5\fs20 Ed, TMH,\par\pard\li2829\sb1\sl-230\slmult0\fi720 \up0 \expndtw-1\chars
calex100 2001.\par\pard\li2829\sb0\sl-230\slmult0\fi360\tx3549 \up0 \expndtw-1\c
harscalex100 3.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Mi
crowave Engineering\ul0\nosupersub\cf4\f5\fs20 - Annapurna Das, Sisir K Das TMH
\par\pard\li2829\sb1\sl-230\slmult0\fi720 \up0 \expndtw-1\charscalex100 Publicat
ion, 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 , 2010.\par\pard\l
i2829\sb0\sl-230\slmult0\par\pard\li2829\sb3\sl-230\slmult0\fi0 \up0 \expndtw-1\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOK:\par\pard\li2829\sb0\sl
-225\slmult0\fi360\tx3549 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\f
s20 1.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Microwave E
ngineering\ul0\nosupersub\cf4\f5\fs20 - David M Pozar, John Wiley India Pvt.\pa
r\pard\li2829\sb2\sl-230\slmult0\fi720 \up0 \expndtw-1\charscalex100 Ltd., 3\ul0
\super\cf17\f18\fs19 rd\ul0\nosupersub\cf4\f5\fs20 Edn, 2008.\par\pard\li2829\s
b0\sl-230\slmult0\par\pard\li2829\sb5\sl-230\slmult0\fi1238 \up0 \expndtw-1\char
scalex100 \ul0\nosupersub\cf3\f4\fs20 INFORMATION THEORY AND CODING\par\pard\li2
829\sb224\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-1\charscalex100
\ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-1\charscalex100 : \ul
0\nosupersub\cf3\f4\fs20 10EC55\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersu
b\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-1\charscalex100 : 25\par\pard\li2829\sb
0\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \expndtw-1\charscalex100 No. of Lecture
Hrs/Week : 04\tab \up0 \expndtw-1\charscalex100 Exam Hours\tab \up0 \expndtw-1\c
harscalex100 : 03\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \u
p0 \expndtw-3\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-1\charsc
alex100 : 52\tab \up0 \expndtw-1\charscalex100 Exam Marks\tab \up0 \expndtw-1\ch
arscalex100 : 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb2
29\sl-230\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT
- 1 \par\pard\qj \li2829\ri2673\sb0\sl-233\slmult0 \up0 \expndtw-1\charscalex10
0 INFORMATION THEORY:\ul0\nosupersub\cf4\f5\fs20
Introduction, Measure
of information, \line \up0 \expndtw-2\charscalex100 Average information cont
ent of symbols in long independent sequences, \line \up0 \expndtw-2\charsc
alex100 Average information content of symbols in long dependent sequences. Mark
-\line \up0 \expndtw-2\charscalex100 off statistical model for information sourc
e, Entropy and information rate of \par\pard\li2829\sb1\sl-217\slmult0\fi0\tx811
4 \up0 \expndtw-2\charscalex100 mark-off source.\tab \up0 \expndtw-2\charscalex1
00 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li5834\sb0\sl-184\slmult0 \par
\pard\ql\li5834\sb35\sl-184\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersu
b\cf1\f2\fs16 38
Width}{\sv 18812}}
-220\slmult0 \up0 \expndtw0\charscalex100 SOURCE CODING:\ul0\nosupersub\cf4\f5\f
s20 Encoding of the source output, Shannon\u8217?s encoding \line \up0 \expndtw
-1\charscalex100 algorithm. Communication Channels, Discrete communication
channels, \par\pard\li2829\sb12\sl-230\slmult0\fi0\tx8253 \up0 \expndtw-2\charsc
alex100 Continuous channels.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\c
f3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb22
0\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT - 3 \par\pard\qj \li2829\ri2
674\sb19\sl-220\slmult0 \up0 \expndtw-2\charscalex100 FUNDAMENTAL LIMITS ON
PERFORMANCE: \ul0\nosupersub\cf4\f5\fs20 Source coding \line \up0 \expndtw

-1\charscalex100 theorem, Huffman coding, Discrete memory less Chann
els, Mutual \par\pard\li2829\sb12\sl-230\slmult0\fi0\tx8304 \up0 \expndtw-2\ch
arscalex100 information, Channel Capacity.\tab \up0 \expndtw-2\charscalex100 \ul
0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \ex
pndtw-4\charscalex100 UNIT - 4 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \exp
ndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 Channel coding theorem, Differen
tial entropy and mutual information for \par\pard\li2829\sb15\sl-230\slmult0\fi
0\tx8299 \up0 \expndtw-2\charscalex100 continuous ensembles, Channel capacity Th
eorem.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\p
ard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb0\sl-230\slmult0 \par\pa
rd\ql\li2829\sb188\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT - 5 \par\pa
rd\qj \li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw-1\charscalex100 INTRODUCTI
ON TO ERROR CONTROL CODING:\ul0\nosupersub\cf4\f5\fs20 Introduction, \line
\up0 \expndtw-2\charscalex100 Types of errors, examples, Types of codes
Linear Block Codes: Matrix \line \up0 \expndtw-2\charscalex100 description, E
rror detection and correction, Standard arrays and table look up \par\pard\li282
9\sb1\sl-223\slmult0\fi0\tx8248 \up0 \expndtw-2\charscalex100 for decoding.\tab
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2
arscalex100 UNIT - 6 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\cha
rscalex100 \ul0\nosupersub\cf4\f5\fs20 Binary Cycle Codes, Algebraic structures
of cyclic codes, Encoding using an \par\pard\li2829\sb7\sl-230\slmult0\fi0\tx821
5 \up0 \expndtw-2\charscalex100 (n-k) bit shift register, Syndrome calculation.
BCH codes.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\p
ar\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb6\sl-230\slmult0 \up
0 \expndtw-4\charscalex100 UNIT - 7 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0
\expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 RS codes, Golay codes, Sho
rtened cyclic codes, Burst error correcting codes. \par\pard\li2829\sb9\sl-230\s
lmult0\fi0\tx8219 \up0 \expndtw-2\charscalex100 Burst and Random Error correctin
g codes.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par
\pard\ql \li2829\sb214\sl-230\slmult0 \up0 \expndtw-3\charscalex100 UNIT - 8 \pa
r\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosuper
sub\cf4\f5\fs20 Convolution Codes, Time domain approach. Transform domain approa
ch. \par\pard\ql \li8282\sb10\sl-230\slmult0 \up0 \expndtw-3\charscalex100 \ul0\
nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\q
l\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb210\sl-230\slmult0 \up0 \expnd
tw-4\charscalex100 TEXT BOOKS: \par\pard\li3189\sb14\sl-230\slmult0\fi0\tx3549 \
up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 Digital and analog communication syste
ms\ul0\nosupersub\cf4\f5\fs20 , K. Sam Shanmugam,\par\pard\li3189\sb1\sl-230\slm
ult0\fi360 \up0 \expndtw-1\charscalex100 John Wiley India Pvt. Ltd, 1996.\par\pa
rd\li3189\sb0\sl-230\slmult0\fi0\tx3549 \up0 \expndtw-1\charscalex100 2.\tab \up
0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Digital communication\ul0
\nosupersub\cf4\f5\fs20 , Simon Haykin, John Wiley India Pvt. Ltd,\par\pard\li31
89\sb1\sl-230\slmult0\fi359 \up0 \expndtw-1\charscalex100 2008.\par\pard\ql \li5
39 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart
Pg36}{\bkmkend Pg36}\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829
\sb100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20
REFERENCE BOOKS: \par\pard\li3189\sb2\sl-230\slmult0\fi0\tx3549 \up0 \expndtw0\c
harscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw0\charscalex100 \ul
0\nosupersub\cf3\f4\fs20 ITC and Cryptography\ul0\nosupersub\cf4\f5\fs20 , Ranja
n Bose, TMH, II edition, 2007\par\pard\li3189\sb0\sl-230\slmult0\fi0\tx3549 \up0
\expndtw0\charscalex100 2.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3
\f4\fs20 Digital Communications\ul0\nosupersub\cf4\f5\fs20 - Glover and Grant\u
l0\nosupersub\cf3\f4\fs20 ; \ul0\nosupersub\cf4\f5\fs20 Pearson Ed. 2\ul0\super\
cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 Ed\par\pard\li3189\sb0\sl-230\slmul
t0\fi360 \up0 \expndtw0\charscalex100 2008.\par\pard\li2829\sb0\sl-230\slmult0\p
ar\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li
2829\sb4\sl-230\slmult0\fi1526 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3
\f4\fs20 FUNDAMENTALS OF CMOS VLSI\par\pard\li2829\sb226\sl-230\slmult0\fi0\tx49
17\tx7077\tx8517 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subje
ct Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC56\t
ab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \
expndtw-2\charscalex100 : 25\par\pard\li2829\sb0\sl-228\slmult0\fi0\tx7077\tx851
7 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2
\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2829
\sb2\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Total
no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\
charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li
2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb229\sl-230\slmult0 \up0 \expndtw-4
\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\qj \li2829\ri2674\
sb0\sl-230\slmult0 \up0 \expndtw-3\charscalex100 BASIC MOS TECHNOLOGY:\ul0\nosup
ersub\cf4\f5\fs20 Integrated circuit\u8217?s era. Enhancement and \line \up0
\expndtw-1\charscalex100 depletion mode MOS transistors. nMOS fabrication.
CMOS fabrication. \line \up0 \expndtw-2\charscalex100 Thermal aspects of proce
ssing. BiCMOS technology. Production of E-beam \par\pard\li2829\sb1\sl-230\slmul
t0\fi0\tx8032 \up0 \expndtw0\charscalex100 masks.\tab \up0 \expndtw0\charscalex1
00 3\ul0\nosupersub\cf3\f4\fs20 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard
\li2829\sb1\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex100 MOS TRANSISTOR THE
ORY:\ul0\nosupersub\cf4\f5\fs20 Introduction, MOS Device Design\par\pard\li
2829\sb0\sl-228\slmult0\fi0 \up0 \expndtw0\charscalex100 Equations, The Compleme
ntary CMOS Inverter - DC Characteristics, Static\par\pard\li2829\sb1\sl-230\slmu
lt0\fi0 \up0 \expndtw0\charscalex100 Load MOS Inverters, The Differential I
nverter, The Transmission Gate,\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx8075
\up0 \expndtw0\charscalex100 Tristate Inverter.\tab \up0 \expndtw0\charscalex10
0 4\ul0\nosupersub\cf3\f4\fs20 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\
li2829\sb5\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex100 UNIT - 2\par\pard\li2
829\sb0\sl-226\slmult0\fi0 \up0 \expndtw0\charscalex100 CIRCUIT DESIGN PROCESSES
:\ul0\nosupersub\cf4\f5\fs20 MOS layers. Stick diagrams. Design\par\pard\li2829
\sb1\sl-228\slmult0\fi0 \up0 \expndtw0\charscalex100 rules and layout - lambda-b
ased design and other rules. Examples. Layout\par\pard\li2829\sb1\sl-230\slmul
t0\fi0\tx8090 \up0 \expndtw0\charscalex100 diagrams. Symbolic diagrams. Tutorial
exercises.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 4 Hrs\p
ar\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx8114
\up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Basic Physical Design o
f Simple logic gates.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs
20 3 Hrs\par\pard\ql \li2829\sb229\sl-230\slmult0 \up0 \expndtw-4\charscalex100
UNIT - 3 \par\pard\qj \li2829\ri2675\sb0\sl-230\slmult0 \up0 \expndtw-3\charscal
ex100 CMOS LOGIC STRUCTURES: \ul0\nosupersub\cf4\f5\fs20 CMOS Complementary Logi
c, Bi CMOS \line \up0 \expndtw-3\charscalex100 Logic, Pseudo-nMOS Logic, Dynamic
CMOS Logic, Clocked CMOS Logic, \line \up0 \expndtw-2\charscalex100 Pass Trans
istor Logic, CMOS Domino Logic Cascaded Voltage Switch \par\pard\li2829\s
b1\sl-230\slmult0\fi0\tx8243 \up0 \expndtw-2\charscalex100 Logic (CVSL).\tab \up
0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2879
\sb229\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT - 4 \par\pard\qj \li282
9\ri2674\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex100 BASIC CIRCUIT CONCEPT
S:\ul0\nosupersub\cf4\f5\fs20 Sheet resistance. Area capacitances. \line \u
p0 \expndtw-1\charscalex100 Capacitance calculations. The delay unit. Inverter d
elays. Driving capacitive \par\pard\li2829\sb1\sl-207\slmult0\fi0\tx8159 \up0 \e
xpndtw-2\charscalex100 loads. Propagation delays. Wiring capacitances.\tab \up0
\expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 3 Hrs\par\pard\ql \li5834\s
lex100 \ul0\nosupersub\cf1\f2\fs16 40
Width}{\sv 18812}}
b100\sl-230\slmult0 \up0 \expndtw0\charscalex101 \ul0\nosupersub\cf3\f4\fs20 SCA
LING OF MOS CIRCUITS: \ul0\nosupersub\cf4\f5\fs20 Scaling models and factors.\ul
0\nosupersub\cf3\f4\fs20 \ul0\nosupersub\cf4\f5\fs20 Limits on \par\pard\li28
29\sb2\sl-230\slmult0\fi0\tx8169 \up0 \expndtw-1\charscalex100 scaling. Limits d
ue to current density and noise.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupers
ub\cf3\f4\fs20 3 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb5\sl-2
30\slmult0\fi0 \up0 \expndtw-1\charscalex100 UNIT - 5\par\pard\li2829\sb1\sl-221
\slmult0\fi0 \up0 \expndtw-1\charscalex100 CMOS SUBSYSTEM DESIGN: \ul0\nosupersu
b\cf4\f5\fs20 Architectural issues. Switch logic. Gate\par\pard\li2829\sb3\sl-23
0\slmult0\fi0 \up0 \expndtw0\charscalex100 logic. Design examples - combinationa
l logic. Clocked circuits. Other system\par\pard\li2829\sb0\sl-230\slmult0\fi0\t
x8171 \up0 \expndtw-1\charscalex100 considerations.\tab \up0 \expndtw-1\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 5 Hrs\par\pard\li2829\sb137\sl-230\slmult0\fi0
\tx8171 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Clocking Strat
egies\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 2 Hrs\par\pa
rd\ql \li2829\sb2\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 6 \par\par
d\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-1\charscalex100 CMOS SUBSYSTEM D
ESIGN PROCESSES:\ul0\nosupersub\cf4\f5\fs20 General considerations. \par\par
d\li2829\sb13\sl-230\slmult0\fi0\tx8171 \up0 \expndtw-2\charscalex100 Process il
lustration. ALU subsystem. Adders. Multipliers.\tab \up0 \expndtw-2\charscalex10
0 \expndtw-2\charscalex100 UNIT - 7 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0
\expndtw-1\charscalex100 MEMORY, REGISTERS AND CLOCK:\ul0\nosupersub\cf4\f5\fs2
0 Timing considerations. Memory \par\pard\li2829\sb12\sl-230\slmult0\fi0\tx8207
\up0 \expndtw-3\charscalex100 elements. Memory cell arrays.\tab \up0 \expndtw
-3\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-23
0\slmult0 \par\pard\ql\li2829\sb1\sl-230\slmult0 \up0 \expndtw-2\charscalex100 U
NIT - 8 \par\pard\qj \li2829\ri2674\sb0\sl-240\slmult0\fi0 \up0 \expndtw-1\chars
calex100 TESTABILITY:\ul0\nosupersub\cf4\f5\fs20 Performance parameters. Lay
out issues. I/O pads. Real \up0 \expndtw-2\charscalex100 estate. System dela
ys. Ground rules for design. Test and testability. \par\pard\ql \li8150\sb1\sl-1
93\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\
pard\ql \li2829\sb17\sl-230\slmult0 \up0 \expndtw-2\charscalex100 TEXT BOOKS: \p
ar\pard\ql \li3189\ri2666\sb0\sl-250\slmult0\tx3549\tx3549\tx3549 \up0 \expndtw2\charscalex100 1. \tab \up0 \expndtw0\charscalex102 CMOS VLSI Design - A Circui
ts and Systems Perspective. 3\ul0\super\cf33\f34\fs19 rd \line\tab \up0 \expndtw
0\charscalex101 \ul0\nosupersub\cf3\f4\fs20 Edition. N.H. Weste and David Harris
. Addison-Wesley, 2005. \line \tab \up0 \expndtw-2\charscalex100 (Refer to \ul0
\nosupersub\cf34\f35\fs24 http://www.cmosvlsi.com\ul0\nosupersub\cf3\f4\fs20 ) \
par\pard\ql \li3189\sb1\sl-206\slmult0\tx3549 \up0 \expndtw-2\charscalex100 \ul0
\nosupersub\cf4\f5\fs20 2. \tab \up0 \expndtw0\charscalex101 \ul0\nosupersub\cf3
\f4\fs20 Principles of CMOS VLSI Design: A Systems Perspective\ul0\nosupersub\cf
4\f5\fs20 , Neil \par\pard\qj \li3549\ri2675\sb0\sl-240\slmult0 \up0 \expndtw0\c
harscalex102 H. E. Weste, K. Eshragian, \ul0\nosupersub\cf35\f36\fs20 and ??? 3\
ul0\super\cf36\f37\fs19 rd\ul0\nosupersub\cf35\f36\fs20 edition\ul0\nosupersub\
cf4\f5\fs20 , Pearson Education \up0 \expndtw-2\charscalex100 (Asia) Pvt. Ltd.,
200?. (\ul0\nosupersub\cf35\f36\fs20 Shift to the latest edition\ul0\nosupersub\
cf4\f5\fs20 .) \par\pard\ql \li3189\ri2675\sb0\sl-240\slmult0\tx3549\tx3549 \up0
\expndtw-2\charscalex100 3. \tab \up0 \expndtw0\charscalex101 \ul0\nosupersub\c
f3\f4\fs20 Basic VLSI Design\ul0\nosupersub\cf4\f5\fs20 - Douglas A. Pucknell &
Kamran Eshraghian, \line\tab \up0 \expndtw-1\charscalex100 PHI 3\ul0\super\cf17
\f18\fs19 rd\ul0\nosupersub\cf4\f5\fs20 Edition (original Edition - 1994), 2005
. \par\pard\ql \li2829\sb195\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\n
osupersub\cf3\f4\fs20 REFERENCE BOOKS: \par\pard\li3189\sb4\sl-230\slmult0\fi0\t
x3549 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expn
dtw0\charscalex100 R. Jacob Baker. CMOS Circuit Design, Layout and Simulation. J
ohn\par\pard\li3189\sb0\sl-230\slmult0\fi360 \up0 \expndtw0\charscalex100 Wiley
India Pvt. Ltd, 2008\par\pard\li3189\sb1\sl-230\slmult0\fi0\tx3549 \up0 \expndtw

0\charscalex100 2.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20
Fundamentals of Semiconductor Devices\ul0\nosupersub\cf4\f5\fs20 , M. K. Achutha
n and K.\par\pard\li3189\sb0\sl-230\slmult0\fi360 \up0 \expndtw0\charscalex100 N
. Bhat, Tata McGraw-Hill Publishing Company Limited, New\par\pard\li3189\
sb1\sl-230\slmult0\fi360 \up0 \expndtw0\charscalex100 Delhi, 2007.\par\pard\li31
89\sb0\sl-230\slmult0\fi0\tx3549 \up0 \expndtw0\charscalex100 3.\tab \up0 \expnd
tw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 CMOS Digital Integrated Circuits:
Analysis and Design\ul0\nosupersub\cf4\f5\fs20 , Sung-\par\pard\li3189\sb0\sl-22
8\slmult0\fi359\tx6376 \up0 \expndtw0\charscalex100 Mo Kang & Yusuf Leblebic
i,\tab \up0 \expndtw0\charscalex100 3\ul0\super\cf17\f18\fs19 rd\ul0\nosupersub\
cf4\f5\fs20 Edition, Tata McGraw-Hill\par\pard\li3189\sb1\sl-230\slmult0\fi3
60 \up0 \expndtw0\charscalex100 Publishing Company Ltd., New Delhi, 2007.\par\pa
rd\li3189\sb1\sl-230\slmult0\fi0\tx3549 \up0 \expndtw0\charscalex100 4.\tab \up0
\expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Analysis and Design of Digi
tal Integrated Circuits \ul0\nosupersub\cf4\f5\fs20 - D.A Hodges,\par\pard\li318
9\sb0\sl-230\slmult0\fi360\tx6348 \up0 \expndtw0\charscalex100 H.G Jackson and
R.A Saleh.\tab \up0 \expndtw0\charscalex100 3\ul0\super\cf17\f18\fs19 rd\ul0\
nosupersub\cf4\f5\fs20 Edition, Tata McGraw-Hill\par\pard\ql \li3549\sb1\sl211\slmult0 \up0 \expndtw-2\charscalex100 Publishing Company Limited, New Delhi,
2007. \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\sl
0\nosupersub\cf1\f2\fs16 41 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pa
rd\sb0\sl-240{\bkmkstart Pg38}{\bkmkend Pg38}\par\pard\ql \li3691\sb0\sl-230\slm
ult0 \par\pard\ql\li3691\sb100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0
\nosupersub\cf3\f4\fs20 DIGITAL SIGNAL PROCESSING LABORATORY \par\pard\li2829\sb
0\sl-230\slmult0\par\pard\li2829\sb2\sl-230\slmult0\fi0\tx5018\tx7077\tx8517 \up
0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \ex
pndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10ECL57\tab \up0 \expndtw-2\
charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscale
x100 : 25\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \expndtw-2\c
harscalex100 No. of Practical Hrs/Week: 03\tab \up0 \expndtw-2\charscalex100 Exa
m Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2829\sb0\sl-228\slmult
0\fi0\tx5018\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Total no. of Practical
Hrs.\tab \up0 \expndtw-2\charscalex100 : 42\tab \up0 \expndtw-2\charscalex100 Ex
am Marks\tab \up0 \expndtw-2\charscalex100 : 50\par\pard\li2829\sb0\sl-230\slmul
t0\par\pard\li2829\sb7\sl-230\slmult0\fi0 \up0 \expndtw-2\charscalex100 \ul0\nos
upersub\cf3\f4\fs20 A LIST OF EXPERIMENTS USING MATLAB / SCILAB / OCTAVE /\par\p
ard\li2829\sb0\sl-230\slmult0\fi0 \up0 \expndtw-2\charscalex100 WAB\par\pard\li2
829\sb226\sl-230\slmult0\fi0\tx3189 \up0 \expndtw-2\charscalex100 \ul0\nosupersu
b\cf4\f5\fs20 3.\tab \up0 \expndtw-2\charscalex100 Verification of Sampling theo
rem.\par\pard\li2829\sb0\sl-228\slmult0\fi0\tx3189 \up0 \expndtw-2\charscalex100
4.\tab \up0 \expndtw-2\charscalex100 Impulse response of a given system\par\par
d\li2829\sb2\sl-230\slmult0\fi0\tx3189 \up0 \expndtw-2\charscalex100 5.\tab \up0
\expndtw-2\charscalex100 Linear convolution of two given sequences.\par\pard\li
2829\sb0\sl-230\slmult0\fi0\tx3189 \up0 \expndtw-2\charscalex100 6.\tab \up0 \ex
pndtw-2\charscalex100 Circular convolution of two given sequences\par\pard\li282
9\sb1\sl-230\slmult0\fi0\tx3189 \up0 \expndtw-2\charscalex100 7.\tab \up0 \expnd
tw-1\charscalex100 Autocorrelation of a given sequence and verification of its p
roperties.\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx3189 \up0 \expndtw-2\charsca
lex100 8.\tab \up0 \expndtw-1\charscalex100 Cross correlation of given sequences
and verification of its properties.\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx31
89 \up0 \expndtw-2\charscalex100 9.\tab \up0 \expndtw-2\charscalex100 Solving a
given difference equation.\par\pard\ql \li2829\ri2632\sb7\sl-220\slmult0\tx3189
\up0 \expndtw0\charscalex100 10.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\c
f4\f5\fs20 Computation of N point DFT of a given sequence and to plot magnitude
\line\tab \up0 \expndtw-5\charscalex100 and
phase spectrum. \par\pard\ql \li
2829\sb12\sl-230\slmult0 \up0 \expndtw-2\charscalex100 11.\ul0\nosupersub\cf15\f
16\fs20 \ul0\nosupersub\cf4\f5\fs20 Linear convolution of two sequences using
DFT and IDFT. \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex
100 12.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20 Circular conv

olution of two given sequences using DFT and IDFT \par\pard\ql \li2829\sb13\sl-2
30\slmult0 \up0 \expndtw-1\charscalex100 13.\ul0\nosupersub\cf15\f16\fs20 \ul0\
nosupersub\cf4\f5\fs20 Design and implementation of FIR filter to meet given sp
ecifications. \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-1\charscalex
100 14.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20 Design and im
plementation of IIR filter to meet given specifications. \par\pard\ql \li2829\sb
0\sl-230\slmult0 \par\pard\ql\li2829\sb3\sl-230\slmult0 \up0 \expndtw-2\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 B. LIST OF EXPERIMENTS USING DSP PROCESSOR \pa
sub\cf4\f5\fs20 1.Linear convolution of two given sequences. \par\pard\ql \li282
9\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 2.Circular convolution of two
given sequences. \par\pard\ql \li2829\sb13\sl-230\slmult0 \up0 \expndtw-3\chars
calex100 3.Computation of N- Point DFT of a given sequence \par\pard\qj \li282
9\ri2675\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex104 4.Realization of an FIR
filter (any type) to meet given specifications .The \up0 \expndtw-2\charscalex
100 input can be a signal from function generator / speech signal. \par\pard\qj
\li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex102 5.Audio applicati
ons such as to plot time and frequency (Spectrum) display \up0 \expndtw0\charsca
lex100 of Microphone output plus a cosine using DSP. Read a wav file and match
\up0 \expndtw-2\charscalex100 with their respective spectrograms \par\pard\qj \
li2829\ri2675\sb0\sl-220\slmult0 \up0 \expndtw0\charscalex102 6.Noise: Add noise
above 3kHz and then remove; Interference suppression \up0 \expndtw-2\charscalex
100 using 400 Hz tone. \par\pard\ql \li2829\sb2\sl-230\slmult0 \up0 \expndtw-2\c
harscalex100 7.Impulse response of first order and second order system \par\pard
\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\c
f3\f4\fs20 REFERENCE BOOKS: \par\pard\qj \li3189\ri2674\sb0\sl-240\slmult0 \up0
\expndtw0\charscalex101 \ul0\nosupersub\cf4\f5\fs20 1.\ul0\nosupersub\cf3\f4\fs2
0 Digital signal processing using MATLAB - \ul0\nosupersub\cf4\f5\fs20 Sanjee
t Mitra, TMH, \line \up0 \expndtw-2\charscalex100 2001 \par\pard\qj \li3189\ri26
77\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex101 2.\ul0\nosupersub\cf3\f4\fs20
Digital signal processing using MATLAB\ul0\nosupersub\cf4\f5\fs20 - J. G. Proa
kis & Ingale, \up0 \expndtw-2\charscalex100 MGH, 2000 \par\pard\ql \li3189\sb0\s
l-180\slmult0 \up0 \expndtw-2\charscalex100 3.\ul0\nosupersub\cf3\f4\fs20 Digita
l Signal Processors\ul0\nosupersub\cf4\f5\fs20 , B. Venkataramani and Bhaskar, T
MH,2002 \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\s
lmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb137\sl-184\s
lmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 42
Width}{\sv 18812}}
b100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 AN
ALOG COMMUNICATION LAB + LIC LAB \par\pard\li2829\sb0\sl-230\slmult0\par\pard\li
0\nosupersub\cf3\f4\fs20 10ECL58\tab \up0 \expndtw-1\charscalex100 \ul0\nosupers
ub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-1\charscalex100 : 25\par\pard\li2829\s
b0\sl-230\slmult0\fi26\tx7103\tx8543 \up0 \expndtw-1\charscalex100 No. of Practi
cal Hrs/Week : 03\tab \up0 \expndtw-1\charscalex100 Exam Hours\tab \up0 \expndtw
-1\charscalex100 : 03\par\pard\li2829\sb0\sl-228\slmult0\fi26\tx5094\tx7103\tx85
43 \up0 \expndtw-1\charscalex100 Total no. of Practical Hrs.\tab \up0 \expndtw-1
\charscalex100 : 42\tab \up0 \expndtw-1\charscalex100 Exam Marks\tab \up0 \expnd
tw-1\charscalex100 : 50\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb7\s
l-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 EXPE
RIMENTS USING DESCERTE COMPONENTS and LABVIEW\par\pard\li2829\sb0\sl-230\slmult0
\fi0 \up0 \expndtw-1\charscalex100 - 2009 CAN BE USED FOR VERIFICATION AND TESTI
NG.\par\pard\li2829\sb226\sl-230\slmult0\fi360\tx3549 \up0 \expndtw-1\charscalex
100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex100 Second orde

r active LPF and HPF\par\pard\li2829\sb0\sl-228\slmult0\fi359\tx3549 \up0 \expnd
tw-1\charscalex100 2.\tab \up0 \expndtw-1\charscalex100 Second order active BPF
and BE\par\pard\li2829\sb2\sl-230\slmult0\fi359\tx3549 \up0 \expndtw-1\charsca
lex100 3.\tab \up0 \expndtw-1\charscalex100 Schmitt Trigger Design and test a S
chmitt trigger circuit for the\par\pard\li2829\sb0\sl-230\slmult0\fi719 \up0 \ex
pndtw-1\charscalex100 given values of UTP and LTP\par\pard\li2829\sb1\sl-230\slm
ult0\fi359\tx3549 \up0 \expndtw-1\charscalex100 4.\tab \up0 \expndtw-1\charscale
x100 Frequency synthesis using PLL.\par\pard\li2829\sb0\sl-230\slmult0\fi359\tx3
549 \up0 \expndtw-1\charscalex100 5.\tab \up0 \expndtw-1\charscalex100 Design an
d test R-2R DAC using op-amp\par\pard\li2829\sb0\sl-230\slmult0\fi359\tx3549 \up
0 \expndtw-1\charscalex100 6.\tab \up0 \expndtw-1\charscalex100 Design and test
the following circuits using IC 555\par\pard\li2829\sb0\sl-228\slmult0\fi1079 \u
p0 \expndtw-1\charscalex100 a.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4
\f5\fs20 Astable multivibrator for given
frequency and duty cycle\par\pard\
li2829\sb2\sl-230\slmult0\fi1079 \up0 \expndtw-1\charscalex100 b.\ul0\nosupersub
\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20 Monostable multivibrator for given
pulse width W\par\pard\li2829\sb0\sl-230\slmult0\fi359\tx3549 \up0 \expndtw-1
\charscalex100 7.\tab \up0 \expndtw-1\charscalex100 IF amplifier design\par\pard
\li2829\sb1\sl-230\slmult0\fi359\tx3549\tx7643 \up0 \expndtw-1\charscalex100 8.\
tab \up0 \expndtw-1\charscalex100 Amplitude modulation using transistor/FE
T\tab \up0 \expndtw-1\charscalex100 (Generation and\par\pard\li2829\sb0\sl-230
\slmult0\fi719 \up0 \expndtw-1\charscalex100 detection)\par\pard\li2829\sb0\sl-2
28\slmult0\fi359\tx3549 \up0 \expndtw-1\charscalex100 9.\tab \up0 \expndtw-1\cha
rscalex100 Pulse amplitude modulation and detection\par\pard\li2829\sb1\sl-230\s
lmult0\fi359 \up0 \expndtw-1\charscalex100 10.\ul0\nosupersub\cf15\f16\fs20 \ul
0\nosupersub\cf4\f5\fs20 PWM and PPM\par\pard\ql \li3189\sb1\sl-217\slmult0 \up
0 \expndtw-2\charscalex100 11.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4
\f5\fs20 Frequency modulation using 8038/2206 \par\pard\ql \li3189\sb13\sl-230\
slmult0 \up0 \expndtw-1\charscalex100 12.\ul0\nosupersub\cf15\f16\fs20 \ul0\nos
upersub\cf4\f5\fs20 Precision rectifiers - both Full Wave and Half Wave. \par\p
l-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb172\sl184\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 43
Width}{\sv 18812}}
b100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 VI
SEMESTER \par\pard\ql \li4567\sb110\sl-230\slmult0 \up0 \expndtw-2\charscalex10
0 \ul0\nosupersub\cf3\f4\fs20 DIGITAL COMMUNICATION \par\pard\li2829\sb0\sl-230\
slmult0\par\pard\li2829\sb8\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndt
w-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\c
harscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC61\tab \up0 \expndtw-2\charscalex
100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\
par\pard\li2829\sb0\sl-228\slmult0\fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex1
00 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab
\up0 \expndtw-2\charscalex100 : 03\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx491
7\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0

\expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab
\up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\
pard\ql\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb4\sl-230\slmult0 \up0 \e
xpndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\qj \li2829
\ri2674\sb0\sl-220\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\f
s20 Basic signal processing operations in digital communication. Sampling
\line \up0 \expndtw0\charscalex102 Principles:\ul0\nosupersub\cf3\f4\fs20 \ul0
\nosupersub\cf4\f5\fs20 Sampling Theorem, Quadrature sampling of Band pass signa
l, \par\pard\li2829\sb17\sl-230\slmult0\fi0\tx8075 \up0 \expndtw-2\charscalex100
Practical aspects of sampling and signal recovery.\tab \up0 \expndtw-2\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb224\sl-230\slmult0
\up0 \expndtw-2\charscalex100 UNIT - 2 \par\pard\ql \li2829\sb1\sl-217\slmult0
\up0 \expndtw0\charscalex101 \ul0\nosupersub\cf4\f5\fs20 PAM, TDM. Waveform Codi
ng Techniques,\ul0\nosupersub\cf3\f4\fs20 \ul0\nosupersub\cf4\f5\fs20 PCM, Quan
tization noise and \par\pard\li2829\sb18\sl-230\slmult0\fi0\tx8109 \up0 \expndtw
-2\charscalex100 SNR, robust quantization.\tab \up0 \expndtw-2\charscalex100 \ul
0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb225\sl-230\slmult0 \up0 \ex
pndtw-2\charscalex100 UNIT - 3 \par\pard\qj \li2829\ri2677\sb0\sl-240\slmult0\fi
0 \up0 \expndtw0\charscalex103 \ul0\nosupersub\cf4\f5\fs20 DPCM, DM, applicati
ons. Base-Band Shaping for Data Transmission, \up0 \expndtw-2\charscalex100
Discrete PAM signals, power spectra of discrete PAM signals. \up0 \expndtw-2\ch
arscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb211\sl-230\
slmult0 \up0 \expndtw-2\charscalex100 UNIT - 4 \par\pard\qj \li2829\ri2675\sb0\s
l-240\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf4\f5\fs20 ISI, Ny
quist\u8217?s criterion for distortion less base-band binary transmission
, \line \up0 \expndtw-3\charscalex100 correlative coding, eye pattern, baseband M-ary PAM systems, adaptive \par\pard\li2829\sb1\sl-213\slmult0\fi0\tx8
186 \up0 \expndtw-2\charscalex100 equalization for data transmission.\tab \up0 \
expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb
0\sl-230\slmult0 \par\pard\ql\li2829\sb7\sl-230\slmult0 \up0 \expndtw-4\charscal
ex100 UNIT - 5 \par\pard\qj \li2829\ri2675\sb0\sl-220\slmult0 \up0 \expndtw-2\ch
arscalex100 DIGITAL MODULATION TECHNIQUES:\ul0\nosupersub\cf4\f5\fs20 Digital M
odulation formats, \line \up0 \expndtw-2\charscalex100 Coherent binary modulat
ion techniques, Coherent quadrature modulation \par\pard\li2829\sb17\sl-230\
slmult0\fi0\tx8164 \up0 \expndtw-2\charscalex100 techniques. Non-coherent binary
modulation techniques.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4
\fs20 6 Hrs\par\pard\ql \li2829\sb224\sl-230\slmult0 \up0 \expndtw-4\charscalex1
00 UNIT - 6 \par\pard\qj \li2829\ri2674\sb0\sl-240\slmult0 \up0 \expndtw-1\chars
calex100 \ul0\nosupersub\cf4\f5\fs20 Detection and estimation, Model of DCS,\ul0
\nosupersub\cf3\f4\fs20 \ul0\nosupersub\cf4\f5\fs20 Gram-Schmidt Orthogonalizat
ion \line \up0 \expndtw-3\charscalex100 procedure, geometric interpretation of s
ignals, response of bank of correlators \par\pard\li2829\sb1\sl-213\slmult0\fi0\
tx8272 \up0 \expndtw-2\charscalex100 to noisy input.\tab \up0 \expndtw-2\charsca
lex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0
\par\pard\ql\li2829\sb7\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT - 7 \p
ar\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosuper
sub\cf4\f5\fs20 Detection of known signals in noise, correlation receiver
, matched filter \par\pard\li2829\sb8\sl-230\slmult0\fi0\tx8313 \up0 \expndtw2\charscalex100 receiver, detection of signals with unknown phase in noise.\tab
arscalex100 UNIT - 8 \par\pard\qj \li2829\ri2674\sb0\sl-220\slmult0 \up0 \expndt
w-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Spread Spectrum Modulation:\ul0\
nosupersub\cf3\f4\fs20 \ul0\nosupersub\cf4\f5\fs20 Pseudo noise sequences,
notion of spread \line \up0 \expndtw-2\charscalex100 spectrum, direct sequence
spread spectrum, coherent binary PSK, frequency \par\pard\li2829\sb18\sl-230\sl
mult0\fi0\tx8303 \up0 \expndtw-2\charscalex100 hop spread spectrum, applications
l \li5834\sb101\sl-184\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf1
\f2\fs16 44
Width}{\sv 18812}}
alex100 \ul0\nosupersub\cf3\f4\fs20 TEXT BOOK: \par\pard\li2829\sb12\sl-230\slmu
lt0\fi359\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\ta
b \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Digital communicatio
ns\ul0\nosupersub\cf4\f5\fs20 , Simon Haykin, John Wiley India Pvt. Ltd,\par\par
d\li2829\sb0\sl-230\slmult0\fi719 \up0 \expndtw-2\charscalex100 2008.\par\pard\l
i2829\sb0\sl-230\slmult0\par\pard\li2829\sb4\sl-230\slmult0\fi0 \up0 \expndtw-2\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS:\par\pard\li2829\sb0\s
l-225\slmult0\fi360\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\
fs20 1.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Digital an
d Analog communication systems, \ul0\nosupersub\cf4\f5\fs20 Simon Haykin, John\p
ar\pard\li2829\sb2\sl-230\slmult0\fi720 \up0 \expndtw-2\charscalex100 Wildy Indi
a Lts, 2008\par\pard\li2829\sb0\sl-230\slmult0\fi359\tx3599 \up0 \expndtw-2\char
scalex100 2.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 An in
troduction to Analog and Digital Communication\ul0\nosupersub\cf4\f5\fs20 , K. S
am\par\pard\li2829\sb0\sl-230\slmult0\fi720 \up0 \expndtw-2\charscalex100 Shanmu
gam, John Wiley India Pvt. Ltd, 2008.\par\pard\li2829\sb0\sl-228\slmult0\fi360\t
x3549 \up0 \expndtw-2\charscalex100 3.\tab \up0 \expndtw-2\charscalex100 \ul0\no
supersub\cf3\f4\fs20 Digital communications\ul0\nosupersub\cf4\f5\fs20 - Bernar
d Sklar: Pearson education 2007\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li28
29\sb0\sl-230\slmult0\par\pard\li2829\sb48\sl-230\slmult0\fi2220 \up0 \expndtw-2
\charscalex100 MICROPROCESSOR\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829
\sb1\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Subje
ct Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC62\t
7 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2
\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2829
\sb0\sl-228\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Total
no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\
charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li
\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\qj \li2829\ri2675\
sb0\sl-240\slmult0 \up0 \expndtw-1\charscalex100 8086 PROCESSORS:\ul0\nosupersu
b\cf4\f5\fs20 Historical background, The microprocessor-based \line \up0 \e
xpndtw-1\charscalex100 personal computer system, \up0 \expndtw-1\charscalex100
8086 CPU Architecture, Machine language \par\pard\li2829\sb1\sl-213\slmult0
\fi0\tx7931 \up0 \expndtw-2\charscalex100 instructions, Instruction execution ti
ming.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pa
rd\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb7\sl-230\slmult0 \up0 \ex
pndtw-3\charscalex100 UNIT - 2 \par\pard\qj \li2829\ri2675\sb0\sl-230\slmult0\fi
0 \up0 \expndtw-1\charscalex100 INSTRUCTION SET OF 8086:\ul0\nosupersub\cf37\f38
\fs20 \ul0\nosupersub\cf4\f5\fs20 Assembler instruction format, data transfer \
line \up0 \expndtw0\charscalex100 and arithmetic, branch type, loop, NOP & HALT,
flag manipulation, logical \line \up0 \expndtw0\charscalex100 and shift and
rotate instructions. Illustration of these instructions with \par\pard\li2
829\sb1\sl-225\slmult0\fi0\tx8020 \up0 \expndtw-2\charscalex100 example programs
, Directives and operators.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf
3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb5\s
l-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 3 \par\pard\qj \li2829\ri2675
\sb0\sl-220\slmult0 \up0 \expndtw-1\charscalex100 BYTE AND STRING MANIPULATION:\
ul0\nosupersub\cf4\f5\fs20 String instructions, REP Prefix, \line \up0 \expndtw
0\charscalex100 Table translation, Number format conversions, Procedur
es, Macros, \par\pard\li2829\sb17\sl-230\slmult0\fi0\tx8023 \up0 \expndtw-2\ch

arscalex100 Programming using keyboard and video display.\tab \up0 \expndtw-2\ch
arscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb224\sl-230\s
lmult0 \up0 \expndtw-2\charscalex100 UNIT - 4 \par\pard\qj \li2829\ri2674\sb0\sl
-240\slmult0 \up0 \expndtw-1\charscalex100 8086 INTERRUPTS:\ul0\nosupersub\cf4\
f5\fs20 8086 Interrupts and interrupt responses, Hardware \line \up0 \exp
ndtw-1\charscalex100 interrupt applications, Software interrupt applications, In
terrupt examples. \par\pard\ql \li8020\sb1\sl-218\slmult0 \up0 \expndtw-2\charsc
alex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult
0 \par\pard\ql\li2829\sb3\sl-230\slmult0 \up0 \expndtw-3\charscalex100 UNIT - 5
\par\pard\qj \li2829\ri2674\sb0\sl-220\slmult0 \up0 \expndtw0\charscalex101 8086
INTERFACING\ul0\nosupersub\cf4\f5\fs20 : Interfacing microprocessor to keyboard
(keyboard \line \up0 \expndtw0\charscalex102 types, keyboard circuit connec
tions and interfacing, software keyboard \par\pard\ql \li5834\sb0\sl-184\slm
ult0 \par\pard\ql\li5834\sb5\sl-184\slmult0 \up0 \expndtw-1\charscalex100 \ul0\n
osupersub\cf1\f2\fs16 45
}
}}
Width}{\sv 18812}}
b100\sl-230\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 in
terfacing, keyboard interfacing with hardware), Interfacing to alphanumeric \par
\pard\li2829\sb2\sl-230\slmult0\fi0\tx3645 \up0 \expndtw0\charscalex101 displays
\tab \up0 \expndtw0\charscalex101 (interfacing LED displays to microcomputer
), Interfacing a\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx8051 \up0 \expndtw0\
charscalex101 microcomputer to a stepper motor.\tab \up0 \expndtw0\charscalex101
\ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\l
i2829\sb3\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex101 UNIT - 6\par\pard\li28
29\sb0\sl-226\slmult0\fi0\tx3530 \up0 \expndtw0\charscalex101 8086\tab \up0 \exp
ndtw0\charscalex101 BASED
MULTIPROCESSING
SYSTEMS:\ul0\nosupersub\cf4\f5\f
s20
Coprocessor\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx4579 \up0 \expndtw1\charscalex100 configurations, The\tab \up0 \expndtw0\charscalex101 8087 nume
ric data processor: data types, processor\par\pard\li2829\sb1\sl-230\slmult
0\fi0\tx8095 \up0 \expndtw0\charscalex101 architecture, instruction set and exam
ples.\tab \up0 \expndtw0\charscalex101 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\par
d\ql \li2829\sb218\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 7 \par\pa
rd\qj \li2829\ri2674\sb10\sl-230\slmult0 \up0 \expndtw-1\charscalex100 SYSTEM BU
S STRUCTURE:\ul0\nosupersub\cf4\f5\fs20 Basic 8086 configurations: minimum mode
, \line \up0 \expndtw-1\charscalex100 maximum mode, Bus Interface: periphera
l component interconnect (PCI) \line \up0 \expndtw-1\charscalex100 bus, the p
arallel printer interface (LPT), the universal serial bus (USB) \par\pard\ql \li
0 6 Hrs \par\pard\ql \li2829\sb13\sl-230\slmult0 \up0 \expndtw-2\charscalex100 U
NIT - 8 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex100 803
86, 80486 AND PENTIUM PROCESSORS:\ul0\nosupersub\cf4\f5\fs20 Introduction to th
e 80386 \par\pard\li2829\sb13\sl-230\slmult0\fi0\tx5056\tx8565 \up0 \expndtw-1\c
harscalex100 microprocessor, Special\tab \up0 \expndtw-1\charscalex100 80386

registers, Introduction to the\tab \up0 \expndtw-1\charscalex100 80486\pa
r\pard\li2829\sb1\sl-230\slmult0\fi0\tx8150 \up0 \expndtw-1\charscalex100 microp
rocessor, Introduction to the Pentium microprocessor.\tab \up0 \expndtw-1\charsc
alex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par
\pard\li2829\sb5\sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 TEXT BOOKS:\pa
r\pard\li2829\sb0\sl-226\slmult0\fi360\tx3549 \up0 \expndtw-1\charscalex100 \ul0
\nosupersub\cf4\f5\fs20 4.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3
\f4\fs20 Microcomputer systems-The 8086 / 8088\ul0\nosupersub\cf4\f5\fs20 Famil
y - Y.C. Liu and\par\pard\li2829\sb1\sl-228\slmult0\fi720 \up0 \expndtw-1\charsc
alex100 G. A. Gibson, 2E PHI -2003\par\pard\li2829\sb6\sl-230\slmult0\fi359\tx35
ersub\cf3\f4\fs20 The Intel Microprocessor, Architecture, Programming and\p
ar\pard\li2829\sb0\sl-226\slmult0\fi719 \up0 \expndtw-1\charscalex100 Interfacin
g\ul0\nosupersub\cf4\f5\fs20 -Barry B. Brey, 6e, Pearson Education / PHI, 2003\p
ar\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb6\sl-230\slmult0\fi0 \up0 \e
xpndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS:\par\pard\li2
b\cf4\f5\fs20 2.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 M
icroprocessor and Interfacing- Programming & Hardware\ul0\nosupersub\cf4\f5
\fs20 ,\par\pard\li2829\sb1\sl-228\slmult0\fi720 \up0 \expndtw-1\charscalex100 D
ouglas hall, 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 , TMH, 200
6.\par\pard\li2829\sb1\sl-230\slmult0\fi359\tx3549 \up0 \expndtw-1\charscalex100
3.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Advanced Micro
processors and Peripherals\ul0\nosupersub\cf4\f5\fs20 - A.K. Ray and K.M.\par\p
ard\li2829\sb1\sl-230\slmult0\fi719 \up0 \expndtw-1\charscalex100 Bhurchandi, TM
H, 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 , 2006.\par\pard\ql
\li3189\ri2674\sb0\sl-230\slmult0\tx3549\tx3549\tx3549 \up0 \expndtw-2\charscale
x100 4. \tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 8088 and
8086 Microprocessors - Programming, Interfacing, \line\tab \up0 \expndtw0\
charscalex102 Software, Hardware \ul0\nosupersub\cf38\f39\fs21 & \ul0\nosupersub
\cf3\f4\fs20 Applications\ul0\nosupersub\cf4\f5\fs20 - Triebel and Avtar Singh,
\line \tab \up0 \expndtw-2\charscalex100 4e, Pearson Education, 2003 \par\pard\
ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\q
71\sl-184\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 46 \
par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg43
}{\bkmkend Pg43}\par\pard\ql \li2927\sb0\sl-230\slmult0 \par\pard\ql\li2927\sb10
0\sl-230\slmult0 \up0 \expndtw-6\charscalex100 \ul0\nosupersub\cf3\f4\fs20 MICRO
ELECTRONICS
CIRCUITS \par\pard\li2829\sb2\sl-230\slmult0\fi0\tx4917\tx707
7\tx8517 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\
tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC63\tab \up0
\expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw2\charscalex100 : 25\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \
expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charsca
lex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2829\sb0\sl230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Total no. of
Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscal
ex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0
l-230\slmult0 \par\pard\ql\li2829\sb48\sl-230\slmult0 \up0 \expndtw0\charscalex1
02 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\ql \li2829\ri2737\sb0\sl-228\s
lmult0 \up0 \expndtw-2\charscalex100 MOSFETS:\ul0\nosupersub\cf4\f5\fs20
Devi
ce Structure and Physical Operation, V-I Characteristics, \line \up0 \expndtw-2\
charscalex100 MOSFET Circuits at DC, Biasing in MOS amplifier Circuits, Small Si
gnal \line \up0 \expndtw-1\charscalex100 Operation and Models, MOSFET as an ampl

ifier and as a switch, biasing in \line \up0 \expndtw-2\charscalex100 MOS amplif
ier circuits, small signal operation modes, single stage MOS \line \up0 \expndtw
-2\charscalex100 amplifiers. MOSFET internal capacitances and high frequency mod
es, \line \up0 \expndtw-1\charscalex100 Frequency response of CS amplifiers, CMO
S digital logic inverter, detection \par\pard\li2829\sb11\sl-230\slmult0\fi0\tx7
764 \up0 \expndtw-2\charscalex100 type MOSFET.\tab \up0 \expndtw-2\charscalex100
\expndtw-2\charscalex100 UNIT -2 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \
expndtw-3\charscalex100 Single Stage IC Amplifier:\ul0\nosupersub\cf4\f5\fs20
IC Design philiosophy, CoUmparison of \par\pard\ql \li2829\sb13\sl-230\slmult0
\up0 \expndtw-2\charscalex100 MOSFET and BJT, Current sources, Current mirrors a
nd Current steering \par\pard\li2829\sb7\sl-230\slmult0\fi0\tx7773 \up0 \expndtw
-2\charscalex100 circuits, high frequency response.\tab \up0 \expndtw-2\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \
par\pard\ql\li2829\sb3\sl-230\slmult0 \up0 \expndtw0\charscalex102 UNIT - 3 \par
\pard\ql \li2829\ri2650\sb0\sl-230\slmult0 \up0 \expndtw-2\charscalex100 Single
Stage IC amplifiers (\ul0\nosupersub\cf4\f5\fs20 continued): CS and CF amplifi
ers with loads, \line \up0 \expndtw-2\charscalex100 high frequency response of C
S and CF amplifiers, CG and CB amplifiers \line \up0 \expndtw-1\charscalex100 wi
th active loads, high frequency response of CG and CB amplifiers, Cascade \line
\up0 \expndtw-1\charscalex100 amplifiers. CS and CE amplifiers with source ( emi
tter) degeneration source \line \up0 \expndtw-1\charscalex100 and emitter follow
ers, some useful transfer parings, current mirrors with \par\pard\li2829\sb1\sl227\slmult0\fi0\tx7910 \up0 \expndtw-2\charscalex100 improved performance. SPICE
examples.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\p
ar\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb3\sl-230\slmult0 \up
0 \expndtw0\charscalex102 UNIT - 4 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0
\expndtw-1\charscalex100 Differences and Multistage Amplifiers: \ul0\nosupersub\
cf4\f5\fs20 The MOS differential pair, small \par\pard\ql \li2829\ri2675\sb0\sl230\slmult0 \up0 \expndtw-1\charscalex100 signal operation of MOS differential p
air, the BJT differences pair, other non-\line \up0 \expndtw-1\charscalex100 ide
al characteristics and differential pair, Differential amplifier with active \li
ne \up0 \expndtw-1\charscalex100 loads, frequency response and differential ampl
ifiers. Multistage amplifier. \par\pard\li2829\sb9\sl-230\slmult0\fi0\tx7382 \up
0 \expndtw-2\charscalex100 SPICE examples.\tab \up0 \expndtw-2\charscalex100 \ul
ql\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb4\sl-230\slmult0 \up0 \expndt
w0\charscalex102 UNIT - 5 \par\pard\ql \li2829\ri2660\sb0\sl-226\slmult0 \up0 \e
xpndtw-1\charscalex100 Feedback\ul0\nosupersub\cf4\f5\fs20 . General Feedback st
ructure. Properties of negative feedback. Four \line \up0 \expndtw-1\charscalex1
00 basic feedback topologies. Series-Shunt feedback. Determining the loop gain.
\line \up0 \expndtw-2\charscalex100 Stability problem. Effect of feedback an amp
lifier poles. Stability study \line \up0 \expndtw-3\charscalex100 using Bode p
lots. Frequency compensation. SPICE examples. \up0 \expndtw-3\charscalex100 \ul0
\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb5\sl-230\slmult0 \up0 \expn
dtw-2\charscalex100 UNIT - 6 \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\q
l\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb40\sl-184\slmult0 \up0 \expndt
w-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 47
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}
fs20 Operational Amplifiers:\ul0\nosupersub\cf4\f5\fs20
The two stage CMOS Op
-amp, folded cascade \line \up0 \expndtw-2\charscalex100 CMOS op-amp, 741 op-amp
circuit, DC analysis of the 741, small signal \line \up0 \expndtw-2\charscalex1
00 analysis of 741, gain, frequency response and slew rate of 741. Data \par\p
ard\li2829\sb2\sl-230\slmult0\fi0\tx8140 \up0 \expndtw-2\charscalex100 Converter
s. A-D and D-A converters.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3
\f4\fs20 6 Hrs\par\pard\ql \li2829\sb218\sl-230\slmult0 \up0 \expndtw0\charscale
x100 UNIT - 7 & 8 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-2\chars
calex100 Digital CMOS circuits\ul0\nosupersub\cf4\f5\fs20 . Overview. Design and
performance analysis of \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-1
\charscalex100 CMOS inverter. Logic Gate Circuits. Pass-transistor logic. Dynami
c Logic \par\pard\li2829\sb15\sl-230\slmult0\fi0\tx7915 \up0 \expndtw-2\charscal
ex100 Circuits. SPICE examples.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersu
b\cf3\f4\fs20 12 Hrs\par\pard\ql \li2829\sb228\sl-230\slmult0 \up0 \expndtw-2\ch
arscalex100 Text Book: \par\pard\qj \li2829\ri2881\sb0\sl-240\slmult0\fi0\tx3081
\up0 \expndtw-3\charscalex100 1. \tab \up0 \expndtw-3\charscalex100 \u8220?Micr
oelectronic Circuits\u8221?, \ul0\nosupersub\cf4\f5\fs20 Adel \ul0\nosupersub
\cf3\f4\fs20 \ul0\nosupersub\cf4\f5\fs20 Sedra and K.C. Smith, 5\ul0\super\cf1
7\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 Edition, \line\up0 \expndtw-4\charscal
ex100 Oxford University Press, Interantional Version, 2009. \par\pard\ql \li28
0 Reference Book: \par\pard\li2829\sb2\sl-230\slmult0\fi0\tx3132 \up0 \expndtw-2
\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-2\charscalex100
\u8220?\ul0\nosupersub\cf3\f4\fs20 Fundamentals of Microelectronics\ul0\nosupers
ub\cf4\f5\fs20 \u8221? , Behzad Razavi, John Wiley India\par\pard\li2829\sb0\sl228\slmult0\fi0 \up0 \expndtw-2\charscalex100 Pvt. Ltd, 2008.\par\pard\li2829\sb
2\sl-230\slmult0\fi0\tx3132 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4
\fs20 2.\tab \up0 \expndtw-2\charscalex100 \u8220?Microelectronics - Analysis an
d Design\u8221?\ul0\nosupersub\cf4\f5\fs20 , Sundaram Natarajan,\par\pard\li2829
\sb0\sl-230\slmult0\fi400 \up0 \expndtw-2\charscalex100 Tata
McGraw-Hill, 200
7\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb1\sl-230\slmult0\fi1608 \
up0 \expndtw-2\charscalex100 ANTENNAS AND PROPAGATION\par\pard\li2829\sb183\sl-2
30\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Subject Code\t
ab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC64\tab \up0 \
expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2
\charscalex100 : 25\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \e
xpndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscal
ex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2829\sb1\sl-2
30\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Total no. of L
ecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscale
x100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0\
sl-230\slmult0 \par\pard\ql\li2829\sb224\sl-230\slmult0 \up0 \expndtw-4\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\qj \li2829\ri2675\sb0\sl-23
0\slmult0 \up0 \expndtw-1\charscalex100 ANTENNA BASICS: \ul0\nosupersub\cf4\f5\
fs20 Introduction, basic Antenna parameters, patterns, \line \up0 \expndtw0
\charscalex100 beam area, radiation intensity, beam efficiency, diversity and ga
in, antenna \line \up0 \expndtw0\charscalex100 apertures, effective height,
bandwidth, radiation, efficiency, antenna \par\pard\li2829\sb6\sl-230\sl
mult0\fi0\tx8968 \up0 \expndtw-2\charscalex100 temperature and antenna filed zon
es.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7\par\pard\ql
\li2829\sb1\sl-210\slmult0 \up0 \expndtw-4\charscalex100 Hrs \par\pard\ql \li282
rscalex100 UNIT - 2 \par\pard\qj \li2829\ri2675\sb0\sl-230\slmult0 \up0 \expndtw
-3\charscalex100 POINT SOURCES AND ARRAYS:\ul0\nosupersub\cf4\f5\fs20 Intro
duction, point sources, power \line \up0 \expndtw0\charscalex102 patterns, po
wer theorem, radiation intensity, filed patterns, phase patterns. \line \up0 \ex
pndtw-2\charscalex100 Array of two isotropic point sources. Endfire array and Br
oadside array. \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 \par\

pard\ql \li2829\sb1\sl-205\slmult0 \up0 \expndtw-4\charscalex100 Hrs \par\pard\q
l \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb25\sl-230\slmult0 \up0 \expnd
tw-4\charscalex100 UNIT - 3 \par\pard\qj \li2829\ri2675\sb0\sl-230\slmult0 \up0
\expndtw-3\charscalex100 ELECTRIC DIPOLES AND THIN LINEAR ANTENNAS:\ul0\nosupers
ub\cf4\f5\fs20 Introduction, \line \up0 \expndtw0\charscalex105 short electric
dipole, fields of a short dipole(no derivation of field \line \up0 \ex
pndtw-3\charscalex100 components), radiation resistance of short dipole, r
adiation resistances of \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\l
i5834\sb74\sl-184\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf1\f2\f
s16 48
}
}}
Width}{\sv 18812}}
b100\sl-230\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 la
mbda/2 Antenna, thin linear antenna, micro strip arrays, low side lobe
\par\pard\li2829\sb2\sl-230\slmult0\fi0\tx8263 \up0 \expndtw-2\charscalex100 ar
rays, long wire antenna, folded dipole antennas.\tab \up0 \expndtw-2\charscalex1
\pard\ql\li2829\sb228\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 4 & 5
\par\pard\qj \li2829\ri2675\sb0\sl-230\slmult0 \up0 \expndtw-3\charscalex100 LOO
P, SLOT, PATCH AND HORN ANTENNA:\ul0\nosupersub\cf4\f5\fs20 Introduction,
small \line \up0 \expndtw0\charscalex100 loop, comparison of far fields of sma
ll loop and short dipole, loop antenna \line \up0 \expndtw0\charscalex103 genera
l case, far field patterns of circular loop, radiation resistance, \lin
e \up0 \expndtw0\charscalex100 directivity, slot antenna, Babinet\u8217?s princi
ple and complementary antennas, \line \up0 \expndtw0\charscalex100 impedance of
complementary and slot antennas, patch antennas, horn \par\pard\li2829\s
b0\sl-230\slmult0\fi0\tx8196 \up0 \expndtw-2\charscalex100 antennas, rectangular
horn antennas.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 12
- 6 \par\pard\qj \li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex100
ANTENNA TYPES:\ul0\nosupersub\cf4\f5\fs20 Helical Antenna, Yagi-Uda array, co
rner reflectors, \line \up0 \expndtw0\charscalex100 parabolic reflectors, log pe
riodic antenna, lens antenna, antenna for special \line \up0 \expndtw0\charscale
x100 applications - sleeve antenna, turnstile antenna, omni directional antennas
, \line \up0 \expndtw-1\charscalex100 antennas for satellite antennas for g
round penetrating radars, embedded \line \up0 \expndtw-1\charscalex100 antenn
as, ultra wide band antennas, plasma antenna, high-resolution data, \par\pard\l
i2829\sb1\sl-230\slmult0\fi0\tx8152 \up0 \expndtw-2\charscalex100 intelligent an
tennas, antenna for remote sensing.\tab \up0 \expndtw-2\charscalex100 \ul0\nosup
ersub\cf3\f4\fs20 8 Hrs\par\pard\ql \li2829\sb229\sl-230\slmult0 \up0 \expndtw-4
\charscalex100 UNIT - 7 & 8 \par\pard\ql \li2829\ri2674\sb0\sl-233\slmult0 \up0
\expndtw-4\charscalex100 RADIO WAVE PROPAGATION:\ul0\nosupersub\cf4\f5\fs20 Int
roduction, Ground wave propagation, \line \up0 \expndtw-4\charscalex100 free spa
ce propagation, ground reflection, surface wave, diffraction. \line \up0 \expndt

w-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 TROPOSPHERE
WAVE
PROPAGATION
:\ul0\nosupersub\cf4\f5\fs20
Troposcopic
scatter, \line \up0 \expndtw-1\c
harscalex100 Ionosphere propagation, electrical properties of the ionosphere, ef
fects of \par\pard\li2829\sb1\sl-217\slmult0\fi0\tx8224 \up0 \expndtw-2\charsca
lex100 earth\u8217?s magnetic field.\tab \up0 \expndtw-2\charscalex100 \ul0\nosu
persub\cf3\f4\fs20 10 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb1
45\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex100 TEXT BOOKS:\par\pard\li2829\s
b0\sl-226\slmult0\fi360\tx3549\tx8865 \up0 \expndtw0\charscalex100 \ul0\nosupers
ub\cf4\f5\fs20 1.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 A
ntennas and Wave Propagation\ul0\nosupersub\cf4\f5\fs20 , John D. Kr
auss,\tab \up0 \expndtw0\charscalex100 4\ul0\super\cf17\f18\fs19 th\par\pard\li2
829\sb1\sl-230\slmult0\fi719 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5
\fs20 Edn,McGraw-Hill International edition, 2010.\par\pard\li2829\sb0\sl-228\sl
mult0\fi359\tx3549 \up0 \expndtw0\charscalex100 2.\tab \up0 \expndtw0\charscalex
100 \ul0\nosupersub\cf3\f4\fs20 Antennas and Wave Propagation\ul0\nosupersub\
cf4\f5\fs20 - Harish and Sachidananda:\par\pard\li2829\sb1\sl-230\slmult0\f
i719 \up0 \expndtw0\charscalex100 Oxford Press 2007\par\pard\li2829\sb0\sl-230\s
lmult0\par\pard\li2829\sb143\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex100 \ul
0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS:\par\pard\li2829\sb0\sl-225\slmult0\fi3
60\tx3549 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \
expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Antenna Theory Analysis and D
esign\ul0\nosupersub\cf4\f5\fs20 - C A Balanis, 3\ul0\super\cf17\f18\fs19 rd\
ul0\nosupersub\cf4\f5\fs20
Edn,\par\pard\li2829\sb2\sl-230\slmult0\fi719 \up
0 \expndtw0\charscalex100 John Wiley India Pvt. Ltd, 2008\par\pard\li2829\sb5\sl
-230\slmult0\fi359\tx3549 \up0 \expndtw0\charscalex100 2.\tab \up0 \expndtw0\cha
rscalex100 \ul0\nosupersub\cf3\f4\fs20 Antennas and Propagation for Wire
less Communication\par\pard\li2829\sb0\sl-226\slmult0\fi719 \up0 \expndtw0\cha
rscalex100 Systems\ul0\nosupersub\cf4\f5\fs20 - Sineon R Saunders, John Wiley,
2003.\par\pard\li2829\sb1\sl-230\slmult0\fi359\tx3549 \up0 \expndtw0\charscalex1
00 3.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Antennas and
wave propagation - \ul0\nosupersub\cf4\f5\fs20 G S N Raju: Pearson Education\par
\pard\li2829\sb0\sl-228\slmult0\fi719 \up0 \expndtw0\charscalex100 2005\par\pard
\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\
\li5834\sb127\sl-184\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf1\f
2\fs16 49 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkm
kstart Pg46}{\bkmkend Pg46}\par\pard\ql \li4850\sb0\sl-230\slmult0 \par\pard\ql\
li4850\sb100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4
\fs20 OPERATING SYSTEMS \par\pard\li2855\sb0\sl-230\slmult0\par\pard\li2855\sb2\
ub\cf3\f4\fs20 10EC65\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\f
s20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2855\sb0\sl-230\s
lmult0\fi0\tx7103\tx8543 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week :
00 : 03\par\pard\li2855\sb0\sl-228\slmult0\fi0\tx4943\tx7103\tx8543 \up0 \expndt
w-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 :
0 : 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb221\sl-230\
slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\
pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-1\charscalex100 INTRODUCTION
AND OVERVIEW OF OPERATING SYSTEMS: \par\pard\qj \li2829\ri2675\sb0\sl-233\sl
mult0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Operating system,
Goals of an O.S, Operation of an O.S, Resource allocation \line \up0 \expndtw0\
charscalex102 and related functions, User interface related functions, Classes o
f operating \line \up0 \expndtw0\charscalex100 systems, O.S and the computer
system, Batch processing system, Multi \line \up0 \expndtw0\charscalex100
programming systems, Time sharing systems, Real time operating systems, \par\par
d\li2829\sb1\sl-217\slmult0\fi0\tx7910 \up0 \expndtw-2\charscalex100 distributed
operating systems.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs2

0 6 Hrs\par\pard\ql \li2829\sb221\sl-230\slmult0 \up0 \expndtw-2\charscalex100 U
NIT - 2 \par\pard\qj \li2829\ri2675\sb14\sl-226\slmult0 \up0 \expndtw0\charscale
x100 STRUCTURE OF THE OPERATING SYSTEMS: \ul0\nosupersub\cf4\f5\fs20 Operation o
f an O.S, \line \up0 \expndtw-1\charscalex100 Structure of the supervisor, C
onfiguring and installing of the supervisor, \line \up0 \expndtw0\charscale
x100 Operating system with monolithic structure, layered design, Virtual machine
\line \up0 \expndtw0\charscalex100 operating systems, Kernel based operating sy
stems, and Microkernel based \par\pard\li2829\sb13\sl-230\slmult0\fi0\tx8071 \up
0 \expndtw-2\charscalex100 operating systems.\tab \up0 \expndtw-2\charscalex100
\expndtw-2\charscalex100 UNIT - 3 \par\pard\qj \li2829\ri2674\sb0\sl-240\slmult0
\up0 \expndtw0\charscalex102 PROCESS MANAGEMENT:\ul0\nosupersub\cf4\f5\fs20
Process concept, Programmer view of \line \up0 \expndtw-1\charscalex100 proc
esses, OS view of processes, Interacting processes, Threads, Processes in \par\p
ard\li2829\sb1\sl-208\slmult0\fi0\tx8088 \up0 \expndtw-2\charscalex100 UNIX, Thr
eads in Solaris\ul0\nosupersub\cf3\f4\fs20 .\tab \up0 \expndtw-2\charscalex100 6
- 4 \par\pard\qj \li2829\ri2674\sb10\sl-230\slmult0 \up0 \expndtw0\charscalex10
0 MEMORY MANAGEMENT:\ul0\nosupersub\cf4\f5\fs20 Memory allocation to programs
, Memory \line \up0 \expndtw0\charscalex105 allocation preliminaries, Contiguo
us and noncontiguous allocation to \line \up0 \expndtw0\charscalex102 progr
ams, Memory allocation for program controlled data, kernel memory \par\pard\li28
29\sb2\sl-230\slmult0\fi0\tx8169 \up0 \expndtw-2\charscalex100 allocation.\tab \
up0 \expndtw-2\charscalex100 7\ul0\nosupersub\cf3\f4\fs20 Hrs\par\pard\ql \li28
harscalex100 UNIT - 5 \par\pard\qj \li2829\ri2675\sb0\sl-230\slmult0 \up0 \expnd
tw0\charscalex100 VIRTUAL MEMORY:\ul0\nosupersub\cf4\f5\fs20 Virtual memory
basics, Virtual memory using \line \up0 \expndtw0\charscalex102 paging, Dem
and paging, Page replacement, Page replacement policies, \line \up0 \expnd
tw-2\charscalex100 Memory allocation to programs, Page sharing, UNIX virtual mem
ory. \par\pard\ql \li8222\sb0\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\
nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expnd
tw-2\charscalex100 UNIT - 6 \par\pard\qj \li2829\ri2675\sb13\sl-230\slmult0\fi0
\up0 \expndtw-1\charscalex100 FILE SYSTEMS:\ul0\nosupersub\cf4\f5\fs20 File sys
tem and IOCS, Files and directories, Overview of \line \up0 \expndtw0\charscalex
100 I/O organization, Fundamental file organizations, Interface between f
ile \line \up0 \expndtw0\charscalex100 system and IOCS, Allocation of disk space
, Implementing file access, UNIX \par\pard\li2829\sb2\sl-230\slmult0\fi0\tx8253
\up0 \expndtw-2\charscalex100 file system.\tab \up0 \expndtw-2\charscalex100 \ul
ql\li5834\sb32\sl-184\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf1\
f2\fs16 50
Width}{\sv 18812}}
-220\slmult0 \up0 \expndtw0\charscalex101 SCHEDULING:\ul0\nosupersub\cf4\f5\fs20
Fundamentals of scheduling, Long-term scheduling, \line \up0 \expndtw1\charscalex100 Medium and short term scheduling, Real time scheduling, Process
scheduling \par\pard\li2829\sb12\sl-230\slmult0\fi0\tx8172 \up0 \expndtw-2\chars
calex100 in UNIX.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20
T - 8 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 MESS
AGE PASSING: \ul0\nosupersub\cf4\f5\fs20 Implementing message passing, Mail
boxes, Inter \par\pard\li2829\sb15\sl-230\slmult0\fi0\tx8131 \up0 \expndtw-1\ch
arscalex100 process communication in UNIX.\tab \up0 \expndtw-1\charscalex100 7\u

l0\nosupersub\cf3\f4\fs20 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li282
9\sb3\sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 TEXT BOOK:\par\pard\li282
9\sb0\sl-226\slmult0\fi360\tx3549\tx5467 \up0 \expndtw-1\charscalex100 \ul0\nosu
persub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\f
s20 \u8220?Operating Systems\tab \up0 \expndtw-1\charscalex100 - A Concept b
ased Approach\u8221?\ul0\nosupersub\cf4\f5\fs20 , D. M.\par\pard\li2829\sb1\s
l-230\slmult0\fi720 \up0 \expndtw-1\charscalex100 Dhamdhare, TMH, 3\ul0\super\cf
17\f18\fs19 rd\ul0\nosupersub\cf4\f5\fs20
Ed, 2010.\par\pard\li2829\sb0\sl-23
0\slmult0\par\pard\li2829\sb6\sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 \
ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOK:\par\pard\li2829\sb0\sl-225\slmult0\fi
360\tx3549 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0
\expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Operating Systems Concepts
\ul0\nosupersub\cf4\f5\fs20 , Silberschatz and Galvin, John Wiley\par\pard\li282
9\sb1\sl-228\slmult0\fi720 \up0 \expndtw-1\charscalex100 India Pvt. Ltd, 5\ul0\s
uper\cf17\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 Edition, 2001.\par\pard\li2829
\sb2\sl-230\slmult0\fi359\tx3549 \up0 \expndtw-1\charscalex100 2.\tab \up0 \expn
dtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Operating System - Internals
and Design Systems\ul0\nosupersub\cf4\f5\fs20 , Willaim\par\pard\li2829\sb0\
sl-230\slmult0\fi719 \up0 \expndtw-1\charscalex100 Stalling, Pearson Education,
4\ul0\super\cf17\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 Ed, 2006.\par\pard\li28
29\sb1\sl-230\slmult0\fi360\tx3549 \up0 \expndtw-1\charscalex100 3.\tab \up0 \ex
pndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Design of Operating Systems, \
ul0\nosupersub\cf4\f5\fs20 Tennambhaum, TMH, 2001.\par\pard\li2829\sb0\sl-230\sl
mult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\
pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li282
9\sb0\sl-230\slmult0\par\pard\li2829\sb5\sl-230\slmult0\fi1368 \up0 \expndtw-2\c
harscalex100 \ul0\nosupersub\cf3\f4\fs20 ADVANCED COMMUNICATION LAB\par\pard\li2
0\nosupersub\cf3\f4\fs20 10ECL67\tab \up0 \expndtw-2\charscalex100 \ul0\nosupers
b1\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex100 No. of Practic
al Hrs/Week: 03\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2
\charscalex100 : 03\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \e
xpndtw-2\charscalex100 Total no. of Practical Hrs. : 42\tab \up0 \expndtw-2\char
scalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 50\par\pard\li2829\sb0\
sl-230\slmult0\par\pard\li2829\sb6\sl-230\slmult0\fi0 \up0 \expndtw-2\charscalex
100 \ul0\nosupersub\cf3\f4\fs20 LIST OF EXPERIMENTS USING DESCERTE COMPONENTS an
d\par\pard\li2829\sb0\sl-228\slmult0\fi0 \up0 \expndtw-2\charscalex100 LABVIEW 2009 can be used for verification and testing.\par\pard\li2829\sb227\sl-230\slm
ult0\fi360\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\t
ab \up0 \expndtw-2\charscalex100 TDM of two band limited signals.\par\pard\li282
9\sb0\sl-230\slmult0\fi359\tx3549 \up0 \expndtw-2\charscalex100 2.\tab \up0 \exp
ndtw-2\charscalex100 ASK and FSK generation and detection\par\pard\li2829\sb1\sl
-230\slmult0\fi359\tx3549 \up0 \expndtw-2\charscalex100 3.\tab \up0 \expndtw-2\c
harscalex100 PSK generation and detection\par\pard\li2829\sb0\sl-230\slmult0\f
i359\tx3549 \up0 \expndtw-2\charscalex100 4.\tab \up0 \expndtw-2\charscalex100 D
PSK generation and detection\par\pard\li2829\sb0\sl-228\slmult0\fi359\tx3549 \
up0 \expndtw-2\charscalex100 5.\tab \up0 \expndtw-2\charscalex100 QPSK generatio
n and detection\par\pard\li2829\sb1\sl-230\slmult0\fi359\tx3549 \up0 \expndtw-2\
charscalex100 6.\tab \up0 \expndtw-2\charscalex100 PCM generation and detection
using a CODEC Chip\par\pard\li2829\sb1\sl-230\slmult0\fi359\tx3549 \up0 \expndtw
-2\charscalex100 7.\tab \up0 \expndtw-2\charscalex100 Measurement of losses in a
given optical fiber ( propagation loss,\par\pard\ql \li3549\sb0\sl-229\slmult0
\up0 \expndtw-4\charscalex100 bending loss) and numerical aperture \par\pard\ql
s16 51
Width}{\sv 18812}}
g48}{\bkmkend Pg48}\par\pard\li3189\sb0\sl-230\slmult0\par\pard\li3189\sb101\sl230\slmult0\fi0\tx3549 \up0 \expndtw0\charscalex101 \ul0\nosupersub\cf4\f5\fs20
8.\tab \up0 \expndtw0\charscalex101 Analog and Digital (with TDM) communication
link using optical\par\pard\li3189\sb1\sl-230\slmult0\fi360 \up0 \expndtw0\chars
calex101 fiber.\par\pard\li3189\sb0\sl-230\slmult0\fi0\tx3549 \up0 \expndtw0\cha
rscalex101 9.\tab \up0 \expndtw0\charscalex101 Measurement of frequency, guide w
avelength, power, VSWR and\par\pard\li3189\sb0\sl-230\slmult0\fi359 \up0 \expndt
w0\charscalex101 attenuation in a microwave test bench\par\pard\ql \li3189\ri267
4\sb0\sl-230\slmult0\tx3549\tx3549 \up0 \expndtw0\charscalex102 10.\ul0\nosupers
ub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20 Measurement of directivity and ga
in of antennas: Standard dipole \line\tab \up0 \expndtw0\charscalex100 (or prin
ted dipole), microstrip patch antenna and Yagi antenna \line \tab \up0 \e
xpndtw-2\charscalex100 (printed). \par\pard\ql \li3189\ri2638\sb0\sl-240\slmult0
\tx3549 \up0 \expndtw0\charscalex100 11.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosu
persub\cf4\f5\fs20 Determination of coupling and isolation characteristics of a
stripline \line\tab \up0 \expndtw-4\charscalex100 (or microstrip) directional
coupler \par\pard\ql \li3189\ri2675\sb0\sl-240\slmult0\tx3549\tx3549 \up0 \expn
dtw-2\charscalex100 12. \tab \up0 \expndtw0\charscalex103 (a) Measurement of res
onance characteristics of a microstrip ring \line\tab \up0 \expndtw-2\charscalex
100 resonator and determination of dielectric constant of the substrate. \par\pa
rd\ql \li3549\sb0\sl-180\slmult0 \up0 \expndtw-3\charscalex100 (b) Measurement o
f power division and isolation characteristics of a \par\pard\ql \li3549\sb9\s
l-230\slmult0 \up0 \expndtw-2\charscalex100 microstrip 3 dB power divider. \par\
pard\ql \li4749\sb0\sl-230\slmult0 \par\pard\ql\li4749\sb220\sl-230\slmult0 \up0
\expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 MICROPROCESSOR LAB \par\pa
rd\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb11\sl-230\slmult0\fi26\tx4943\tx7
103\tx8544 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Cod
e\tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10ECL68\tab \u
p0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expnd
tw-2\charscalex100 : 25\par\pard\li2829\sb0\sl-230\slmult0\fi26\tx7103\tx8543 \u
p0 \expndtw-2\charscalex100 No. of Practical Hrs/Week: 03\tab \up0 \expndtw-2\ch
arscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2829\sb
1\sl-230\slmult0\fi26\tx7103\tx8543 \up0 \expndtw-2\charscalex100 Total no. of P
ractical Hrs. : 42\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndt
w-2\charscalex100 : 50\par\pard\li2829\sb228\sl-230\slmult0\fi0 \up0 \expndtw-2\
charscalex100 I) \ul0\nosupersub\cf3\f4\fs20 Programs involving\par\pard\li28
harscalex100 \ul0\nosupersub\cf4\f5\fs20 1)
Data transfer instructions like:\
par\pard\li2829\sb0\sl-230\slmult0\fi1439\tx4629 \up0 \expndtw-2\charscalex100 i
]\tab \up0 \expndtw-2\charscalex100 Byte and word data transfer in differe
nt addressing\par\pard\li2829\sb1\sl-230\slmult0\fi1799 \up0 \expndtw-2\charsca
lex100 modes.\par\pard\li2829\sb0\sl-230\slmult0\fi1439 \up0 \expndtw-2\charscal
ex100 ii]
Block move (with and without overlap)\par\pard\li2829\sb0\sl-228\sl
mult0\fi1439 \up0 \expndtw-2\charscalex100 iii] Block interchange\par\pard\li2
829\sb0\sl-230\slmult0\par\pard\li2829\sb2\sl-230\slmult0\fi719 \up0 \expndtw-2\
charscalex100 2)
Arithmetic & logical operations like:\par\pard\li2829\sb0\sl
-230\slmult0\fi1439\tx4629 \up0 \expndtw-2\charscalex100 i]\tab \up0 \expndtw-2\
charscalex100 Addition and Subtraction of multi precision nos.\par\pard\li2829\s
b1\sl-230\slmult0\fi1439 \up0 \expndtw-2\charscalex100 ii]
Multiplication an
d Division of signed and unsigned\par\pard\li2829\sb0\sl-230\slmult0\fi1800
\up0 \expndtw-2\charscalex100 Hexadecimal nos.\par\pard\qj \li4269\ri4667\sb0\s
l-240\slmult0 \up0 \expndtw-3\charscalex100 iii] ASCII adjustment instructions
\up0 \expndtw-3\charscalex100 iv] Code conversions \par\pard\ql \li4269\ri267
7\sb0\sl-240\slmult0\tx4629 \up0 \expndtw-2\charscalex100 v]
Arithmetic progr
ams to find square cube, LCM, GCD, \line\tab \up0 \expndtw-4\charscalex100 facto
rial \par\pard\ql \li3549\sb189\sl-230\slmult0 \up0 \expndtw-4\charscalex100 3)
Bit manipulation instructions like checking: \par\pard\ql \li4269\ri3727\sb0\

sl-230\slmult0\tx4629 \up0 \expndtw-3\charscalex100 i] \tab \up0 \expndtw-4\char
scalex100 Whether given data is positive or negative \line\up0 \expndtw-3\charsc
alex100 ii]
Whether given data is odd or even \line \up0 \expndtw-3\charscale
x100 iii] Logical 1\u8217?s and 0\u8217?s in a given data \par\pard\li4269\sb1
\sl-230\slmult0\fi0\tx4629 \up0 \expndtw-2\charscalex100 iv]\tab \up0 \expndtw-2
\charscalex100 2 out 5 code\par\pard\ql \li4269\sb1\sl-216\slmult0 \up0 \expndtw
-3\charscalex100 v] Bit wise and nibble wise palindrome \par\pard\ql \li5834\s
alex100 \ul0\nosupersub\cf1\f2\fs16 52
Width}{\sv 18812}}
alex100 \ul0\nosupersub\cf4\f5\fs20 4)
Branch/Loop instructions like: \par\pa
rd\ql \li4269\ri3987\sb10\sl-230\slmult0\tx4629\tx4629\tx4629 \up0 \expndtw-3\ch
arscalex100 i] \tab \up0 \expndtw-3\charscalex100 Arrays: addition/subtraction
of N nos. \line\tab \up0 \expndtw-2\charscalex100 Finding largest and smallest
nos. \line \tab \up0 \expndtw-2\charscalex100 Ascending and descending order \pa
r\pard\ql \li4269\ri2677\sb0\sl-240\slmult0\tx4629 \up0 \expndtw0\charscalex101
ii]
Near and Far Conditional and Unconditional jumps, \line\tab \up0 \expnd
tw-2\charscalex100 Calls and Returns \par\pard\ql \li3549\ri2675\sb219\sl-220\sl
mult0\tx3909 \up0 \expndtw0\charscalex100 5)
Programs on String manipulati
on like string transfer, string \line\tab \up0 \expndtw-2\charscalex100 reve
rsing, searching for a string, etc. \par\pard\ql \li3549\sb0\sl-230\slmult0 \par
\pard\ql\li3549\sb2\sl-230\slmult0 \up0 \expndtw-2\charscalex100 6)
Programs
involving Software interrupts \par\pard\qj \li3909\ri2675\sb10\sl-230\slmult0 \u
p0 \expndtw-1\charscalex100 Programs to use DOS interrupt INT 21h Functio
n calls for \up0 \expndtw0\charscalex100 Reading a Character from keyboard, Bu
ffered Keyboard input, \up0 \expndtw-2\charscalex100 Display of character/ Strin
g on console \par\pard\ql \li2829\ri2676\sb0\sl-240\slmult0\tx3189 \up0 \expndtw
0\charscalex100 II) Experiments on interfacing 8086 with the following interfa
cing modules \line\tab \up0 \expndtw-2\charscalex100 through DIO (Digital Input/
Output-PCI bus compatible) card \par\pard\ql \li3549\sb1\sl-193\slmult0 \up0 \ex
pndtw-2\charscalex100 a)
Matrix keyboard interfacing \par\pard\ql \li3549\sb1
7\sl-230\slmult0 \up0 \expndtw-1\charscalex100 b) Seven segment display interf
ace \par\pard\ql \li3549\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 c)
Logical controller interface \par\pard\ql \li3549\sb13\sl-230\slmult0 \up0 \expn
dtw-2\charscalex100 d)
Stepper motor interface \par\pard\ql \li2829\sb230\sl230\slmult0 \up0 \expndtw-1\charscalex100 III) Other Interfacing Programs \par\p
ard\ql \li3549\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 a) Interfacing a
printer to an X86 microcomputer \par\pard\ql \li3549\sb13\sl-230\slmult0 \up0 \
expndtw-2\charscalex100 b) PC to PC Communication \par\pard\ql \li4874\sb0\sl-23
0\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 ELECTIVE - G
ROUP A \par\pard\ql \li3895\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 ANA
LOG AND MIXED MODE VLSI DESIGN \par\pard\li2829\sb0\sl-230\slmult0\par\pard\li28
29\sb60\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 \u
l0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\charscalex100 : \ul0\
nosupersub\cf3\f4\fs20 10EC661\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub
\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2829\sb1
\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex100 No. of Lecture H
rs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\ch
arscalex100 : 03\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up
0 \expndtw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charsca
lex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\cha
rscalex100 : 100\par\pard\ql \li5551\sb0\sl-161\slmult0 \par\pard\ql\li5551\sb0\

ex100 \ul0\nosupersub\cf30\f31\fs14 (Text Book 1) \par\pard\ql \li2829\sb21\sl-2
08\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT 1 \par
\pard\qj \li2829\ri2675\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex102 \ul0\nos
upersub\cf4\f5\fs20 Data converter fundamentals: Analog versus Digital Discrete
Time Signals, \line \up0 \expndtw-1\charscalex100 Converting Analog Signals to D
ata Signals, Sample and Hold Characteristics, \line \up0 \expndtw-2\charscalex10
0 DAC Specifications, ADC Specifications, Mixed-Signal Layout Issues. \par\pard\
ql \li7881\sb4\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\
f4\fs20 7 Hrs \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-2\charscale
x100 UNIT 2 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex10
0 \ul0\nosupersub\cf4\f5\fs20 Data Converters Architectures: DAC Architectures,
Digital Input Code, \par\pard\ql \li2829\sb3\sl-217\slmult0 \up0 \expndtw-1\char
scalex100 Resistors String, R-2R Ladder Networks, Current Steering, Charge Scali
ng \par\pard\ql \li5834\sb31\sl-184\slmult0 \up0 \expndtw-1\charscalex100 \ul0\n
osupersub\cf1\f2\fs16 53
}
}}
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}

}}
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}
}}
}
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}

}}
}
}}
}
}}
}
}}
{\shp {\*\shpinst\shpleft2829\shptop9962\shpright8354\shpbottom10195\shpfhdr0\sh
pbxpage\shpbypage\shpwr3\shpwrk0\shpfblwtxt1\shpz297\shplid12
}
}}
{\shp {\*\shpinst\shpleft2829\shptop10192\shpright3528\shpbottom10425\shpfhdr0\s
hpbxpage\shpbypage\shpwr3\shpwrk0\shpfblwtxt1\shpz313\shplid13
}

}}
}
}}
}
}}
bxpage\shpbypage\shpwr3\shpwrk0\shpfblwtxt1\shpz359\shplid16{\sp{\sn shapeType}{
\sv 20}}{\sp{\sn fBehindDocument}{\sv 1}}{\sp{\sn lineColor}{\sv 0}}{\sp{\sn lin
eWidth}{\sv 18812}}
fs20 DACs, Cyclic DAC, Pipeline DAC, ADC Architectures, Flash, 2-Step Flash \lin
e \up0 \expndtw-2\charscalex100 ADC, Pipeline ADC, Integrating ADC, Successive A
pproximation ADC. \par\pard\li2829\sb19\sl-230\slmult0\fi5351 \up0 \expndtw-2\ch
arscalex100 \ul0\nosupersub\cf3\f4\fs20 12 Hrs\par\pard\li2829\sb0\sl-230\slmult
0\fi0 \up0 \expndtw-2\charscalex100 UNIT 3\par\pard\qj \li2829\ri2675\sb2\sl-220
\slmult0 \up0 \expndtw0\charscalex101 \ul0\nosupersub\cf4\f5\fs20 Non-Linear Ana
log Circuits: Basic CMOS Comparator Design (Excluding \line \up0 \expndtw0\char
scalex102 Characterization), Analog Multipliers, Multiplying Quad \up0 \
expndtw-2\charscalex100 (Excluding \par\pard\ql \li2829\sb12\sl-230\slmult0 \up0
\expndtw-1\charscalex100 Stimulation), Level Shifting (Excluding Input Level Sh
ifting For Multiplier). \par\pard\ql \li8282\sb1\sl-217\slmult0 \up0 \expndtw-2\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\li2829\sb0\sl-161\slmu
lt0\par\pard\li2829\sb89\sl-161\slmult0\fi2721 \up0 \expndtw-1\charscalex100 \ul
0\nosupersub\cf30\f31\fs14 (Text Book 2)\par\pard\li2829\sb10\sl-213\slmult0\fi0
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT 4\ul0\nosupersub
\cf4\f5\fs20 :\par\pard\qj \li2829\ri2842\sb0\sl-230\slmult0 \up0 \expndtw-2\cha
rscalex100 Data Converter SNR: Improving SNR Using Averaging (Excluding Jitter &
\line \up0 \expndtw-2\charscalex100 Averaging onwards), Decimating Filters for
ADCs (Excluding Decimating \line \up0 \expndtw-1\charscalex100 without Averaging
onwards), Interpolating Filters for DAC, Band pass and \par\pard\li2829\sb2\sl230\slmult0\fi0\tx8143 \up0 \expndtw-2\charscalex100 High pass Sync filters.\tab
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 8 Hrs\par\pard\ql \li
2829\sb218\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 5 \par\pard\qj \li2
829\ri2675\sb10\sl-230\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\
f5\fs20 Su-Microns CMOS circuit design: Process Flow, Capacitors and Resistors,
\line \up0 \expndtw0\charscalex100 MOSFET Switch (upto Bidirectional Switches),

Delay and adder Elements, \line \up0 \expndtw-2\charscalex100 Analog Circuits MO
SFET Biasing (upto MOSFET Transition Frequency). \par\pard\li2829\sb7\sl-230\slm
ult0\fi5301 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 10 Hrs\par
\pard\li2829\sb1\sl-230\slmult0\fi0 \up0 \expndtw-2\charscalex100 UNIT 6\par\par
d\li2829\sb0\sl-225\slmult0\fi0\tx8186 \up0 \expndtw-2\charscalex100 \ul0\nosupe
rsub\cf4\f5\fs20 OPAmp Design (Excluding Circuits Noise onwards)\tab \up0 \expnd
tw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 8 Hrs\par\pard\ql \li2829\sb218\s
l-230\slmult0 \up0 \expndtw-2\charscalex100 TEXT BOOK: \par\pard\ql \li3189\ri26
94\sb206\sl-260\slmult0\tx3549\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosuper
sub\cf4\f5\fs20 1. \tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs2
0 Design, Layout, Stimulation ,\ul0\nosupersub\cf4\f5\fs20 R. Jacob Baker, Harry
W Li, David E \line\tab \up0 \expndtw-2\charscalex100 Boyce, CMOS Circuit, PHI
Education, 2005 \par\pard\ql \li3189\ri2816\sb20\sl-260\slmult0\tx3549\tx3549\tx
3549 \up0 \expndtw-2\charscalex100 2. \tab \up0 \expndtw-2\charscalex100 \ul0\no
supersub\cf3\f4\fs20 CMOS- Mixed Signal Circuit Design ,\ul0\nosupersub\cf4\f5\f
s20 R. Jacob Baker, (Vol II of \line\tab \up0 \expndtw-2\charscalex100 CMOS: Cir
cuit Design, Layout and Stimulation), John Wiley India \line \tab \up0 \expndtw2\charscalex100 Pvt. Ltd, 2008. \par\pard\ql \li2829\sb45\sl-230\slmult0 \up0 \e
xpndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS: \par\pard\li
b\cf4\f5\fs20 1.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 D
esign of Analog CMOS Integrated Circuits\ul0\nosupersub\cf4\f5\fs20 , B Razavi,\
par\pard\li3189\sb34\sl-230\slmult0\fi460 \up0 \expndtw-2\charscalex100 First Ed
ition, McGraw Hill,2001.\par\pard\ql \li3230\sb25\sl-230\slmult0 \up0 \expndtw-2
\charscalex100 \ul0\nosupersub\cf3\f4\fs20 2. CMOS Analog Circuit Design\ul0\nos
upersub\cf4\f5\fs20 , P e Allen and D R Holberg, 2\ul0\super\cf17\f18\fs19 nd \p
ar\pard\ql \li3549\sb110\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosup
ersub\cf4\f5\fs20 Edition, Oxford University Press,2002. \par\pard\ql \li5834\sb
0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\
-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-1
\slmult0 \par\pard\ql\li5834\sb92\sl-184\slmult0 \up0 \expndtw-1\charscalex100 \
ul0\nosupersub\cf1\f2\fs16 54
}
}}
}
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}
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}
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}
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}
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}
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}
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}
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}
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}
}}
}
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}
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}
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}
}}
}
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}
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}
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}
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}
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}
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}
}}
}
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}
}}
}
}}
}
}}
}
b100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 SA

TELLITE COMMUNICATION \par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb2\sl
-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 \ul0\nosuper
sub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub
\cf3\f4\fs20 10EC662\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs
20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2829\sb0\sl-230\sl
mult0\fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week :
0 : 03\par\pard\li2829\sb0\sl-228\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw
-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 5
: 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb1\sl-230\slm
ult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\par
d\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex102 OVER VIEW OF SAT
ELLITE SYSTEMS:\ul0\nosupersub\cf4\f5\fs20 Introduction, frequency \par\pard
\li2829\sb15\sl-230\slmult0\fi0\tx8102 \up0 \expndtw-2\charscalex100 allocation,
INTEL Sat.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\
par\pard\ql \li2829\sb228\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 2
\par\pard\qj \li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw-1\charscalex100 ORB
ITS:\ul0\nosupersub\cf4\f5\fs20 Introduction, Kepler laws, definitions, orbital
element, apogee and \line \up0 \expndtw-1\charscalex100 perigee heights, orbit
perturbations, inclined orbits, calendars, universal time, \line \up0 \expndtw0\
charscalex105 sidereal time, orbital plane, local mean time and sun synchronous
orbits, \line \up0 \expndtw0\charscalex103 Geostationary orbit: Introduction, a
ntenna, look angles, polar mix antenna, \line \up0 \expndtw-1\charscalex100 limi
ts of visibility, earth eclipse of satellite, sun transit outage, lean
diag \par\pard\li2829\sb0\sl-230\slmult0\fi0\tx8135 \up0 \expndtw-2\charscalex10
0 orbits.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\pa
r\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 3 \p
ar\pard\ql \li2829\ri2675\sb0\sl-233\slmult0\fi0 \up0 \expndtw-1\charscalex100 P
ROPAGATION IMPAIRMENTS AND SPACE LINK: \ul0\nosupersub\cf4\f5\fs20 Introduc
tion, \line \up0 \expndtw-1\charscalex100 atmospheric loss, ionospheric effects,
rain attenuation, other impairments. \line \up0 \expndtw0\charscalex100 \ul0\no
supersub\cf3\f4\fs20 SPACE LINK:\ul0\nosupersub\cf4\f5\fs20 Introduction, EIRP,
transmission losses, link power budget, \line \up0 \expndtw-2\charscalex100 sys
tem noise, CNR, uplink, down link, effects of rain, combined CNR. \par\pard\ql \
li8121\sb1\sl-202\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\f
s20 7 Hrs \par\pard\ql \li2829\sb15\sl-230\slmult0 \up0 \expndtw-2\charscalex100
UNIT - 4 \par\pard\qj \li2829\ri2677\sb0\sl-240\slmult0 \up0 \expndtw0\charscal
ex100 SPACE SEGMENT:\ul0\nosupersub\cf4\f5\fs20 Introduction, power supply
units, altitude control, \line \up0 \expndtw-1\charscalex100 station keeping,
thermal control, TT&C, transponders, antenna subsystem. \par\pard\ql \li8071\sb
1\sl-193\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs
\up0 \expndtw-2\charscalex100 UNIT - 5 & 6 \par\pard\qj \li2829\ri2677\sb19\sl-2
20\slmult0 \up0 \expndtw-2\charscalex100 EARTH SEGEMENT:\ul0\nosupersub\cf4\f5\
fs20 Introduction, receive only home TV system, out \up0 \expndtw-2\char
scalex100 door unit, indoor unit, MATV, CATV, Tx - Rx earth station. \up0 \expnd
tw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 5 Hrs \par\pard\qj \li2829\sb0\sl
-230\slmult0 \par\pard\qj\li2829\ri2675\sb2\sl-230\slmult0 \up0 \expndtw0\charsc
alex104 INTERFERENCE
AND
SATELLITE
ACCESS:\ul0\nosupersub\cf4\f5\fs20
Introduction, \line \up0 \expndtw-1\charscalex100 interference between sate
llite circuits, satellite access, single access, pre-\line \up0 \expndtw-2
\charscalex100 assigned FDMA, SCPC \up0 \expndtw-2\charscalex100 (spade syste
m), TDMA, pre-assigned TDMA, \par\pard\qj \li2829\ri2677\sb19\sl-220\slmult0
\up0 \expndtw0\charscalex102 demand assigned TDMA, down link analysis, compariso
n of uplink power \line \up0 \expndtw0\charscalex100 requirements for TDMA &
FDMA, on board signal processing satellite \par\pard\li2829\sb14\sl-230\sl
mult0\fi0\tx8231 \up0 \expndtw-2\charscalex100 switched TDMA.\tab \up0 \expndtw2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 9 Hrs\par\pard\ql \li2829\sb228\sl-2
30\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 7 & 8 \par\pard\ql \li2829\sb1\s

l-217\slmult0 \up0 \expndtw0\charscalex101 DBS, SATELLITE MOBILE AND SPE
CIALIZED SERVICES: \par\pard\ql \li2829\sb13\sl-230\slmult0 \up0 \expndtw0\cha
rscalex104 \ul0\nosupersub\cf4\f5\fs20 Introduction, orbital spacing, power
ratio, frequency and polarization, \par\pard\ql \li5834\sb0\sl-184\slmult0 \p
ar\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb80\sl-184\slmult0 \up
0 \expndtw-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 55
Width}{\sv 18812}}
s20 transponder capacity, bit rates for digital TV, satellite mobile se
rvices, \line \up0 \expndtw-2\charscalex100 USAT, RadarSat, GPS, orb communicati
on and Indian Satellite systems. \par\pard\ql \li8222\sb12\sl-230\slmult0 \up0 \
expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 12 Hrs \par\pard\ql \li2829\
sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 TEXT BOOK: \par\pard\ql \li3189
\ri2634\sb21\sl-220\slmult0\tx3549 \up0 \expndtw0\charscalex101 \ul0\nosupersub\
cf4\f5\fs20 13.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf3\f4\fs20 Satel
lite Communications\ul0\nosupersub\cf4\f5\fs20 , Dennis Roddy, 4\ul0\super\cf17
\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 Edition, McGraw-\line\tab \up0 \expndtw
-4\charscalex100 Hill International edition, 2006. \par\pard\ql \li2829\sb0\sl
-230\slmult0 \par\pard\ql\li2829\sb62\sl-230\slmult0 \up0 \expndtw-2\charscalex1
00 \ul0\nosupersub\cf3\f4\fs20 REFERENCES BOOKS: \par\pard\ql \li3189\ri2675\sb0
\sl-220\slmult0\tx3549\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\
f5\fs20 3. \tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Satell
ite Communications\ul0\nosupersub\cf4\f5\fs20 , Timothy Pratt, Charles Bost
ian and \line\tab \up0 \expndtw-2\charscalex100 Jeremy Allnutt, 2\ul0\super\cf1
7\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 Edition, John Wiley Pvt. Ltd & Sons, 2
008. \par\pard\li3189\sb19\sl-230\slmult0\fi0\tx3549 \up0 \expndtw0\charscalex10
0 4.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Satellite Comm
unication Systems Engineering\ul0\nosupersub\cf4\f5\fs20 , W. L. Pitchand,\par\p
ard\li3189\sb0\sl-228\slmult0\fi359 \up0 \expndtw0\charscalex100 H. L. Suyderhou
d, R. A. Nelson, 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 Ed., P
earson Education., 2007.\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\
sl-230\slmult0\par\pard\li2829\sb7\sl-230\slmult0\fi2049 \up0 \expndtw-2\charsca
lex100 \ul0\nosupersub\cf3\f4\fs20 RANDOM PROCESSES\par\pard\li2829\sb226\sl-230
\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\
cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3
\f4\fs20 10EC663\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 I
A Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2829\sb0\sl-228\slmult
0\fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\t
ab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 :
03\par\pard\li2829\sb2\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\c
harscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\ta
b \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 1
00\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb213\sl-230\slmul
t0 \up0 \expndtw-2\charscalex100 UNIT - 1 \par\pard\qj \li2829\ri2675\sb10\sl-23
0\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 INTRODUCTION
TO PROBABILITY THEORY:\ul0\nosupersub\cf4\f5\fs20 Experiments, sample \line \u
p0 \expndtw0\charscalex102 space, Events, Axioms, Assigning probabilities,
Joint and conditional \line \up0 \expndtw0\charscalex100 probabilities, Baye\u
8217?s Theorem, Independence, Discrete Random Variables, \par\pard\li2829\sb7\sl
-230\slmult0\fi0\tx8015 \up0 \expndtw-2\charscalex100 Engg Example.\tab \up0 \ex
pndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb21
- 2 \par\pard\qj \li2829\ri2674\sb10\sl-230\slmult0 \up0 \expndtw-1\charscalex10
0 \ul0\nosupersub\cf3\f4\fs20 Random Variables, Distributions, Density F
unctions:\ul0\nosupersub\cf4\f5\fs20
CDF, PDF, \up0 \expndtw-2\charscalex10
0 Gaussian random variable, Uniform Exponential, Laplace, Gamma, Erlang, \up0
\expndtw-4\charscalex100 Chi-Square, Raleigh, Rician and Cauchy types of random
variables. \par\pard\ql \li8181\sb10\sl-230\slmult0 \up0 \expndtw-4\charscalex10
0 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb210\sl-230\slmult0 \u
p0 \expndtw-4\charscalex100 \ul0\nosupersub\cf4\f5\fs20 UNIT - 3 \par\pard\qj \l
i2829\ri2674\sb19\sl-220\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\c
f3\f4\fs20 OPERATIONS ON A SINGLE R V:\ul0\nosupersub\cf4\f5\fs20 Expecte
d value, EV of Random \line \up0 \expndtw-3\charscalex100 variables, EV of
functions of Random variables, Central Moments, \par\pard\li2829\sb19\sl230\slmult0\fi0\tx8097 \up0 \expndtw-2\charscalex100 Conditional expected values
\f5\fs20 UNIT - 4 \par\pard\qj \li2829\ri2675\sb0\sl-230\slmult0 \up0 \expndtw0\
charscalex103 Characteristic functions, Probability generating functions
, Moment \up0 \expndtw-3\charscalex100 generating functions, Engg applicati
ons, Scalar quantization, entropy and \up0 \expndtw-3\charscalex100 source c
oding. \par\pard\ql \li8121\sb0\sl-230\slmult0 \up0 \expndtw-4\charscalex100 6 H
rs \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult
0 \par\pard\ql\li5834\sb40\sl-184\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nos
upersub\cf1\f2\fs16 56
}
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Width}{\sv 18812}}
b100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 UN
IT - 5 \par\pard\qj \li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex1
06 Pairs of Random variables, Joint CDF, joint PDF, Joint probability mass \line
\up0 \expndtw0\charscalex105 functions, Conditional Distribution, density a
nd mass functions, EV \line \up0 \expndtw0\charscalex104 involving pairs o
f Random variables, Independent Random variables, \par\pard\li2829\sb0\sl-2
30\slmult0\fi0\tx8131 \up0 \expndtw-2\charscalex100 Complex Random variables, En
gg Application.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7
Hrs\par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\
nosupersub\cf4\f5\fs20 UNIT - 6 \par\pard\qj \li2829\ri2674\sb0\sl-240\slmult0 \

up0 \expndtw0\charscalex101 \ul0\nosupersub\cf3\f4\fs20 MULTIPLE RANDOM VARIABLE
S:\ul0\nosupersub\cf4\f5\fs20 Joint and conditional PMF, CDF, \line \up0 \expnd
tw-1\charscalex100 PDF,.EV involving multiple Random variables, Gaussian Random
variable in \par\pard\li2829\sb1\sl-208\slmult0\fi0\tx8260 \up0 \expndtw-2\chars
calex100 multiple dimension, Engg application, linear prediction.\tab \up0 \expn
dtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb222\
sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 UNIT 7 \par\pard\qj \li2829\ri2675\sb19\sl-220\slmult0 \up0 \expndtw-1\charscalex100
\ul0\nosupersub\cf3\f4\fs20 RANDOM PROCESS:\ul0\nosupersub\cf4\f5\fs20 Definiti
on and characterization, Mathematical tools \line \up0 \expndtw0\charscalex100 f
or studying Random Processes, Stationary and Ergodic Random processes, \par\pard
\li2829\sb14\sl-230\slmult0\fi0\tx8248 \up0 \expndtw-2\charscalex100 Properties
of ACF.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\
pard\ql \li2829\sb228\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupers
ub\cf4\f5\fs20 UNIT - 8 \par\pard\qj \li2829\ri2674\sb0\sl-240\slmult0 \up0 \exp
ndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 EXAMPLE PROCESSES:\ul0\nosupers
ub\cf4\f5\fs20 Markov processes, Gaussian Processes, Poisson \up0 \expndtw-2\ch
arscalex100 Processes, Engg application, Computer networks, Telephone networks.
\par\pard\ql \li8231\sb1\sl-193\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosup
ersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2
829\sb7\sl-230\slmult0 \up0 \expndtw-2\charscalex100 TEXT BOOK: \par\pard\ql \li
3189\ri2674\sb10\sl-230\slmult0\tx3549\tx3549\tx3549 \up0 \expndtw-2\charscalex1
00 \ul0\nosupersub\cf4\f5\fs20 1. \tab \up0 \expndtw0\charscalex100 \ul0\nosuper
sub\cf3\f4\fs20 Probability and random processes: application to Sig
nal \line\tab \up0 \expndtw0\charscalex103 processing and communication\ul0\nosu
persub\cf4\f5\fs20 - S L Miller and D C Childers\ul0\nosupersub\cf3\f4\fs20 :
\line \tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Academic Pr
ess / Elsivier 2004 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\char
scalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS: \par\pard\li3189\sb15\sl230\slmult0\fi0\tx3549 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20
4.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Probability, Ra
ndom variables and stochastic processes\ul0\nosupersub\cf4\f5\fs20 - A.\p
ar\pard\li3189\sb0\sl-228\slmult0\fi360 \up0 \expndtw0\charscalex100 Papoullis a
nd S U Pillai: McGraw Hill 2002\par\pard\li3189\sb1\sl-230\slmult0\fi0\tx3549
\up0 \expndtw0\charscalex100 5.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub
\cf3\f4\fs20 Probability, Random variables and Random signal principles\ul0\nosu
persub\cf4\f5\fs20 -\par\pard\li3189\sb1\sl-230\slmult0\fi360\tx5700 \up0 \expn
dtw0\charscalex100 Peyton Z Peebles\ul0\nosupersub\cf3\f4\fs20 :\ul0\nosupersub\
cf4\f5\fs20 TMH\tab \up0 \expndtw0\charscalex100 4\ul0\super\cf17\f18\fs19 th\u
l0\nosupersub\cf4\f5\fs20 Edition 2007\par\pard\li3189\sb0\sl-230\slmult0\fi0\t
x3549 \up0 \expndtw0\charscalex100 6.\tab \up0 \expndtw0\charscalex100 \ul0\nosu
persub\cf3\f4\fs20 Probability, random processes and applications\ul0\nosupersub
\cf4\f5\fs20 - H Stark and\par\pard\li3189\sb1\sl-230\slmult0\fi360 \up0 \expn
dtw0\charscalex100 Woods\ul0\nosupersub\cf3\f4\fs20 :\ul0\nosupersub\cf4\f5\fs20
PHI 2001\par\pard\li2855\sb0\sl-230\slmult0\par\pard\li2855\sb3\sl-230\slmult0
\fi1778 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 LOW POWER VLSI
DESIGN\par\pard\li2855\sb226\sl-230\slmult0\fi0\tx4943\tx7103\tx8544 \up0 \expn
dtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2
\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC664\tab \up0 \expndtw-2\charsca
lex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 :
25\par\pard\li2855\sb0\sl-230\slmult0\fi0\tx7103\tx8543 \up0 \expndtw-2\charscal
ex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\
tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2855\sb1\sl-230\slmult0\fi0\tx
4943\tx7103\tx8543 \up0 \expndtw-2\charscalex100 Total no. of Lecture Hrs.\tab \
up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\t
ab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb218\sl-230\slmult0
\up0 \expndtw0\charscalex102 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\qj \
li2829\ri2675\sb10\sl-230\slmult0 \up0 \expndtw0\charscalex104 \ul0\nosupersub\c
f4\f5\fs20 Introduction, Sources of power dissipation, designing for low
power. \line \up0 \expndtw0\charscalex104 Physics of power dissipation in MOSFE

T devices - MIS Structure, Long \line \up0 \expndtw-2\charscalex100 channel and
sub-micron MOSFET, Gate induced Drain leakage. \up0 \expndtw-2\charscalex100 \u
l0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\par
d\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb80\sl-184\slmult0 \up0 \exp
ndtw-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 57
}
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Width}{\sv 18812}}
}}
Width}{\sv 18812}}
00 \ul0\nosupersub\cf4\f5\fs20 Power dissipation in CMOS - Short circuit dissipa
tion, dynamic dissipation, \line \up0 \expndtw-1\charscalex100 Load capacitance.
Low power design limits - Principles of low power design, \line \up0 \expndtw-1
\charscalex100 Hierarchy of limits, fundamental limits, Material, device, circui
t and system \par\pard\li2829\sb0\sl-230\slmult0\fi0\tx8236 \up0 \expndtw-2\char
scalex100 limits.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20

8 Hrs\par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw0\charscalex100 UNIT
- 3&4 \par\pard\qj \li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex1
03 SYNTHESIS FOR LOW POWER:\ul0\nosupersub\cf4\f5\fs20 Behavioral, Logic and C
ircuit level \line \up0 \expndtw-1\charscalex100 approaches, Algorithm level
transforms, Power-constrained Least squares \line \up0 \expndtw-1\charscalex1
00 optimization for adaptive and non-adaptive filters, Circuit activity
driven \line \up0 \expndtw0\charscalex104 architectural transformations, volta
ge scaling, operation reduction and \line \up0 \expndtw-1\charscalex100 subs
titution, pre- computation, FSM and Combinational logic, Transistor \par\
pard\li2829\sb1\sl-230\slmult0\fi0\tx8260 \up0 \expndtw-2\charscalex100 sizing.\
\li2829\sb229\sl-230\slmult0 \up0 \expndtw0\charscalex100 UNIT - 5&6 \par\pard\
ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex100 DESIGN AND TEST
OF LOW-VOLTAGE CMOS CIRCUITS: \par\pard\qj \li2829\ri2674\sb16\sl-226\slm
ult0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 Introduction, Desi
gn style, Leakage current in Deep sub-micron transistors, \line \up0 \expndtw0\c
harscalex103 device design issues, minimizing short channel effect, Low voltage
design \line \up0 \expndtw0\charscalex103 techniques using reverse V\ul0\sub\
cf17\f18\fs19 gs\ul0\nosupersub\cf4\f5\fs20 , steep sub threshold swing and
multiple \line \up0 \expndtw0\charscalex103 threshold voltages, Testing with e
levated intrinsic leakage, multiple supply \par\pard\li2829\sb13\sl-230\slmult0\
fi0\tx8198 \up0 \expndtw-2\charscalex100 voltages.\tab \up0 \expndtw-2\charscale
x100 \ul0\nosupersub\cf3\f4\fs20 12 Hrs\par\pard\ql \li2829\sb228\sl-230\slmult0
\up0 \expndtw-2\charscalex100 UNIT - 7 \par\pard\qj \li2829\ri2674\sb0\sl-233\s
lmult0 \up0 \expndtw0\charscalex101 LOW ENERGY COMPUTING:\ul0\nosupersub\cf4\f5\
fs20 Energy dissipation in transistor channel, \line \up0 \expndtw0\charscalex1
05 Energy recovery circuit design, designs with reversible and partially
\line \up0 \expndtw0\charscalex100 reversible logic, energy recovery in adiabat
ic logic and SRAM core, Design \line \up0 \expndtw0\charscalex100 of peripheral
circuits - address decoder, level shifter and I/O Buffer, supply \par\pard\li282
9\sb1\sl-214\slmult0\fi0\tx8308 \up0 \expndtw-2\charscalex100 clock generation.\
i2829\sb3\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 8 \par\pard\ql \li
2829\sb1\sl-217\slmult0 \up0 \expndtw-1\charscalex100 SOFTWARE DESIGN FOR LOW
POWER:\ul0\nosupersub\cf4\f5\fs20 Introduction, sources of \par\pard\li282
9\sb15\sl-230\slmult0\fi0\tx8232 \up0 \expndtw-2\charscalex100 power dissipation
, power estimation and optimization.\tab \up0 \expndtw-2\charscalex100 \ul0\nosu
persub\cf3\f4\fs20 7 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb3\
sl-230\slmult0\fi0 \up0 \expndtw-2\charscalex100 TEXT BOOK:\par\pard\li2829\sb0\
sl-226\slmult0\fi360\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5
\fs20 1.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Low-Power
CMOS VLSI Circuit Design\ul0\nosupersub\cf4\f5\fs20 , Kaushik Roy and Sharat\pa
r\pard\li2829\sb1\sl-230\slmult0\fi720 \up0 \expndtw-2\charscalex100 C Prasad, J
ohn Wiley Pvt. Ltd, 2008.\par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\
b171\sl-184\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 58
\par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg
55}{\bkmkend Pg55}\par\pard\ql \li4471\sb0\sl-230\slmult0 \par\pard\ql\li4471\sb
0\sl-230\slmult0 \par\pard\ql\li4471\sb90\sl-230\slmult0 \up0 \expndtw-2\charsca
lex100 \ul0\nosupersub\cf3\f4\fs20 DATA STRUCTURE USING C++ \par\pard\li2829\sb0
\sl-230\slmult0\par\pard\li2829\sb12\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up
pndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC665\tab \up0 \expndtw-2\
harscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam

Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2829\sb2\sl-230\slmult0
\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Total no. of Lecture Hrs
.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam
Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0\sl-230\slm
ult0 \par\pard\ql\li2829\sb229\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0
\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\qj \li2829\ri2675\sb0\sl-230\slmult0\
fi0 \up0 \expndtw-1\charscalex100 INTRODUCTION:\ul0\nosupersub\cf4\f5\fs20 Func
tions and parameters, Dynamic memory allocation \line \up0 \expndtw-1\charscalex
100 classis, Testing and debugging. Data Representation, Introduction, Li
near \line \up0 \expndtw-1\charscalex100 lists, Formula-based representation lin
ked representation, Indirect addressing \par\pard\li2829\sb1\sl-230\slmult0\fi0\
tx8119 \up0 \expndtw-2\charscalex100 simulating pointers.\tab \up0 \expndtw-2\ch
arscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb229\sl-230\s
lmult0 \up0 \expndtw-2\charscalex100 UNIT - 2 \par\pard\ql \li2829\sb1\sl-217\sl
mult0 \up0 \expndtw0\charscalex101 ARRAYS AND MATRICS:\ul0\nosupersub\cf4\f5\f
s20 Arrays, Matrices, Special matrices spare \par\pard\li2829\sb13\sl-230\
slmult0\fi0\tx8109 \up0 \expndtw-2\charscalex100 matrices.\tab \up0 \expndtw-2\c
harscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb230\sl-230\
l-240\slmult0\fi0 \up0 \expndtw0\charscalex105 STACKS:\ul0\nosupersub\cf4\f5\fs2
0 The abstract data types, Derived classed and inheritance, \up0 \expnd
tw-2\charscalex100 Formula-based representation, Linked representation, Applicat
ions. \par\pard\ql \li8121\sb1\sl-193\slmult0 \up0 \expndtw-2\charscalex100 \ul0
\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb17\sl-230\slmult0 \up0 \exp
ndtw-2\charscalex100 UNIT - 4 \par\pard\qj \li2829\ri2675\sb0\sl-240\slmult0 \up
0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 Queues: The abstract data
types, Derived classes and inheritance, Formula\up0 \expndtw-2\charscalex100 bas
ed representation, Linked Linked representation, Applications. \par\pard\ql \li8
6 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb7\sl-230\sl
mult0 \up0 \expndtw-2\charscalex100 UNIT - 5 \par\pard\ql \li2829\sb10\sl-230\sl
mult0 \up0 \expndtw-2\charscalex100 SKIP LISTS AND HASHING:\ul0\nosupersub\cf4\f
5\fs20 Dictionaries, Linear representation, Skip list \par\pard\li2829\sb1\sl-2
30\slmult0\fi0\tx8191 \up0 \expndtw-2\charscalex100 presentation, Hash table rep
resentation.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs
\par\pard\ql \li2829\sb219\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 6
\par\pard\qj \li2829\ri2675\sb19\sl-220\slmult0 \up0 \expndtw0\charscalex101 BI
NARY AND OTHER TREES:\ul0\nosupersub\cf4\f5\fs20 Trees, Binary trees, Pr
operties and \line \up0 \expndtw0\charscalex102 representation of binary trees,
Common binary tree operations, Binary tree \par\pard\li2829\sb12\sl-230\slmult0
\fi0\tx8219 \up0 \expndtw-2\charscalex100 traversal the ADT binary tree, ADT and
class extensions.\tab \up0 \expndtw-2\charscalex100 8\ul0\nosupersub\cf3\f4\fs2
0 Hrs\par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UN
IT - 7 \par\pard\li2829\sb2\sl-230\slmult0\fi0\tx8222 \up0 \expndtw-2\charscalex
100 PRIRITY QUEUES:\ul0\nosupersub\cf4\f5\fs20 Linear lists, Heaps, Leftist tre
es.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard
\ql \li2829\sb218\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT-8 \par\pard\
li2829\sb10\sl-230\slmult0\fi0\tx8258 \up0 \expndtw-2\charscalex100 \ul0\nosuper
sub\cf4\f5\fs20 Search Trees: Binary search trees, B-trees, Applications.\tab \u
p0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li583
4\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\
sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb
172\sl-184\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 59
Width}{\sv 18812}}
b100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 TE

XT BOOK: \par\pard\li2829\sb2\sl-230\slmult0\fi359\tx3549 \up0 \expndtw-1\charsc
alex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex100 \ul0\no
supersub\cf3\f4\fs20 Data structures, Algorithms, and applications in C++ -\ul0
\nosupersub\cf4\f5\fs20 Sartaj\par\pard\li2829\sb0\sl-230\slmult0\fi719 \up0 \e
xpndtw-1\charscalex100 Sahni, McGraw Hill.2000.\par\pard\li2829\sb5\sl-230\slmul
t0\fi0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS
:\par\pard\li2829\sb1\sl-221\slmult0\fi360\tx3549 \up0 \expndtw-1\charscalex100
\ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub
\cf3\f4\fs20 Object Oriented Programming in C++\ul0\nosupersub\cf4\f5\fs20 - Ba
laguruswamy. TMH,\par\pard\li2829\sb3\sl-230\slmult0\fi720 \up0 \expndtw-1\chars
calex100 1995.\par\pard\li2829\sb0\sl-230\slmult0\fi359\tx3549 \up0 \expndtw-1\c
harscalex100 2.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Pr
ogramming in C++\ul0\nosupersub\cf4\f5\fs20 - Balaguruswamy. TMH, 4\ul0\super\c
f17\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 , 2010 .\par\pard\li2829\sb0\sl-230\s
lmult0\par\pard\li2829\sb6\sl-230\slmult0\fi945 \up0 \expndtw-1\charscalex100 \u
l0\nosupersub\cf3\f4\fs20 DIGITAL SYSTEMS DESIGN USING VERILOG\par\pard\li2829\s
b223\sl-230\slmult0\fi134\tx5419\tx7283\tx8527\tx8733 \up0 \expndtw-1\charscalex
100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-1\charscalex100 :
\ul0\nosupersub\cf3\f4\fs20 10EC666\tab \up0 \expndtw-1\charscalex100 \ul0\nosu
persub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-1\charscalex100 :\tab \up0 \expndt
w-1\charscalex100 25\par\pard\li2829\sb30\sl-230\slmult0\fi134\tx5419\tx7283\tx8
527\tx8733 \up0 \expndtw-1\charscalex100 No. of Lecture Hours /week\tab \up0 \ex
pndtw-1\charscalex100 : 04\tab \up0 \expndtw-1\charscalex100 Exam Hours\tab \up0
\expndtw-1\charscalex100 :\tab \up0 \expndtw-1\charscalex100 03\par\pard\li2829
\sb10\sl-230\slmult0\fi134\tx5418\tx7283\tx8526 \up0 \expndtw-1\charscalex100 To
tal no. of Lecture Hours\tab \up0 \expndtw-1\charscalex100 : 52\tab \up0 \expndt
w-1\charscalex100 Exam Marks\tab \up0 \expndtw-1\charscalex100 : 100\par\pard\ql
\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb100\sl-230\slmult0 \up0 \expnd
tw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT 1 \par\pard\ql \li2829\sb10\
sl-230\slmult0 \up0 \expndtw-2\charscalex100 Introduction and Methodology: \par\
pard\qj \li2829\ri2676\sb0\sl-220\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosu
persub\cf4\f5\fs20 Digital Systems and Embedded Systems, Binary representation a
nd Circuit \up0 \expndtw-2\charscalex100 Elements, Real-World Circuits, Models,
Design Methodology. \up0 \expndtw-2\charscalex100 7\ul0\nosupersub\cf3\f4\fs20
Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb21\sl-230\slmu
lt0 \up0 \expndtw-2\charscalex100 UNIT 2 \par\pard\ql \li2829\sb1\sl-217\slmult0
\up0 \expndtw-2\charscalex100 Combinational Basics: \par\pard\qj \li2829\ri2674
\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Boo
lean Functions and Boolean Algebra, Binary Coding, Combinational \up0 \ex
pndtw-2\charscalex100 Components and Circuits, Verification of Combinational Cir
cuits. \par\pard\ql \li7881\sb213\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \
ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \
expndtw-2\charscalex100 UNIT 3 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \exp
ndtw-2\charscalex100 Number Basics\ul0\nosupersub\cf4\f5\fs20 : \par\pard\li2829
\sb9\sl-230\slmult0\fi0\tx8306 \up0 \expndtw-2\charscalex100 Unsigned and Signed
Integers, Fixed and Floating-point Numbers.\tab \up0 \expndtw-2\charscalex100 \
ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\li2829\sb6\sl-230\slmult0\fi0 \up0 \ex
pndtw-2\charscalex100 UNIT 4\par\pard\ql \li2829\sb1\sl-203\slmult0 \up0 \expndt
w0\charscalex102 Sequential Basics\ul0\nosupersub\cf4\f5\fs20 : Storage element
s, Counters, Sequential Datapaths and \par\pard\li2829\sb23\sl-230\slmult0\fi0\
tx7922 \up0 \expndtw-2\charscalex100 Control, Clocked Synchronous Timing Methodo
logy.\tab \up0 \expndtw-2\charscalex100 6\ul0\nosupersub\cf3\f4\fs20 Hrs\par\pa
rd\ql \li2829\sb222\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 5 \par\par
d\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-3\charscalex100 Memories:\ul0\nosu
persub\cf4\f5\fs20
Concepts, Memory Types, Error Detection and Correction. \p
ar\pard\ql \li2829\sb13\sl-230\slmult0 \up0 \expndtw0\charscalex100 Implementati
on Fabrics: ICs, PLDs, Packaging and Circuit Boards, \par\pard\li2
829\sb7\sl-230\slmult0\fi0\tx7975 \up0 \expndtw-2\charscalex100 Interconnection
and Signal Integrity.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\f
s20 7 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb3\sl-230\

slmult0 \up0 \expndtw-2\charscalex100 UNIT 6 \par\pard\ql \li2829\sb1\sl-217\slm
ult0 \up0 \expndtw-2\charscalex100 Processor Basics:\ul0\nosupersub\cf4\f5\fs20
Embedded Computer Organization, Instruction and Data, \par\pard\li2829\sb9\sl
-230\slmult0\fi0\tx8032 \up0 \expndtw-2\charscalex100 Interfacing with memory.\t
li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb4\sl-230\slmult0 \up0 \expndtw-2
\charscalex100 UNIT 7 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\cha
rscalex106 I/O interfacing:\ul0\nosupersub\cf4\f5\fs20 I/O devices, I/O co
ntrollers, Parallel Buses, Serial \par\pard\li2829\sb11\sl-230\slmult0\fi0\tx
7915 \up0 \expndtw-2\charscalex100 Transmission, I/O software.\tab \up0 \expndtw
84\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 60
}
}}
}
}}
}
}}
}
}}
}
}}
}
}}
}
calex100 \ul0\nosupersub\cf3\f4\fs20 UNIT 8 \par\pard\ql \li2829\sb1\sl-217\slmu
lt0 \up0 \expndtw-2\charscalex100 Accelerators\ul0\nosupersub\cf4\f5\fs20 : Conc
epts, case study, Verification of accelerators. \par\pard\ql \li2829\sb0\sl-230\
slmult0 \par\pard\ql\li2829\sb3\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul
0\nosupersub\cf3\f4\fs20 Design Methodology:\ul0\nosupersub\cf4\f5\fs20 Design
flow, Design optimization, Design for test, \par\pard\ql \li7831\sb10\sl-230\slm
ult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\q
l \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 Test Book: \par\pard\
li3530\sb13\sl-230\slmult0\fi0\tx3890 \up0 \expndtw-2\charscalex100 1.\tab \up0
\expndtw-2\charscalex100 \u8220?Digital Design: An Embedded Ssytems Approach Usi
ng\par\pard\li3530\sb0\sl-228\slmult0\fi758 \up0 \expndtw-2\charscalex100 VERILO
G\u8221?, Peter J. Ashenden, Elesvier, 2010.\par\pard\li2829\sb0\sl-230\slmult0\
par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb3\sl-230\slmult0\fi1502 \up
0 \expndtw-2\charscalex100 VIRTUAL INSTRUMENTATION\par\pard\li2829\sb0\sl-225\sl
mult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4
\f5\fs20 Subject Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4
\fs20 10EC668\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA M
arks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2829\sb1\sl-228\slmult0\f
i0\tx7077\tx8517 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab
\up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\
par\pard\li2829\sb2\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\char
scalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \

up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\
par\pard\ql \li2829\sb226\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosu
persub\cf3\f4\fs20 UNIT 1 \par\pard\qj \li2829\ri2675\sb0\sl-240\slmult0 \up0 \e
xpndtw-3\charscalex100 Review of Digital Instrumentation: \ul0\nosupersub\cf4\f
5\fs20 Representation of analog signals in the \line \up0 \expndtw-3\charscalex
100 digital domain - Review of quantization in amplifier and time areas, sampl
e \par\pard\li2829\sb1\sl-209\slmult0\fi0\tx7996 \up0 \expndtw-2\charscalex100 a
nd hold, sampling theorem, ADC and DAC.\tab \up0 \expndtw-2\charscalex100 \ul0\n
osupersub\cf3\f4\fs20 8 Hrs\par\pard\ql \li2829\sb7\sl-223\slmult0 \up0 \expndtw
-4\charscalex100 UNIT 2 & 3 \par\pard\qj \li2829\ri2673\sb0\sl-230\slmult0 \up0
\expndtw0\charscalex104 Fundamentals of Virtual Instrumentation:\ul0\nosup
ersub\cf4\f5\fs20
Concept of Virtual \line \up0 \expndtw0\charscalex100 I
nstrumentation - PC based data acquisition - Typical on board DAQ card -\line \u
p0 \expndtw-1\charscalex100 Resolution and sampling frequency - Multiplexing of
analog inputs - Single-\line \up0 \expndtw0\charscalex100 ended and differenti
al inputs - Different strategies for sampling of multi \line \up0 \expndtw-2\c
harscalex100 channel analog inputs. Concept of universal DAQ card - Use
of timer-\par\pard\li2829\sb6\sl-230\slmult0\fi0\tx7996 \up0 \expndtw-2\chars
calex100 counter and analog outputs on the universal DAQ card.\tab \up0 \expndtw
13\slmult0 \up0 \expndtw-2\charscalex100 UNIT 4 \par\pard\qj \li2829\ri2674\sb13
\sl-230\slmult0 \up0 \expndtw0\charscalex100 Cluster of Instruments in System:\u
l0\nosupersub\cf4\f5\fs20 Interfacing of external instruments to a \line \up0 \
expndtw-1\charscalex100 PC - RS 232C, RS - 422, RS 485 and USB standards - IEEE
488 standard -\line \up0 \expndtw0\charscalex100 ISO -OSI model for series bus introduction to bus protocols of MOD bus \par\pard\li2829\sb3\sl-230\slmult0\fi
0\tx8119 \up0 \expndtw-2\charscalex100 and CAN bus.\tab \up0 \expndtw-2\charscal
ex100 8 \ul0\nosupersub\cf3\f4\fs20 Hrs\par\pard\ql \li2829\sb0\sl-227\slmult0 \
up0 \expndtw-4\charscalex100 UNIT 5 & 6 \par\pard\qj \li2829\ri2674\sb0\sl-233\s
lmult0 \up0 \expndtw-1\charscalex100 Graphical Programming Environment in VI
:\ul0\nosupersub\cf4\f5\fs20 Concepts of graphical \line \up0 \expndtw0\char
scalex100 programming - Lab-view software - Concept of VIs and sub VIs - Display
\line \up0 \expndtw0\charscalex105 types - Digital - Analog - Chart - Oscillosc
ope types - Loops - Case and \line \up0 \expndtw0\charscalex100 sequence structu
res - Types of data - Arrays - Formulate nodes - Local and \par\pard\li2829\sb1\
sl-219\slmult0\fi0\tx8210 \up0 \expndtw0\charscalex100 Global variables - String
and file I/O.\tab \up0 \expndtw0\charscalex100 12\ul0\nosupersub\cf3\f4\fs20 H
rs\par\pard\li2829\sb7\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex100 UNIT 7 &
8\par\pard\li2829\sb0\sl-226\slmult0\fi0 \up0 \expndtw0\charscalex100 Analysis T
ools and Simple Application in VI:\ul0\nosupersub\cf4\f5\fs20
Fourier transfo
rm - Power\par\pard\li2829\sb1\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex100 s
pectrum - Correlation - Windowing and filtering tools - Simple temperature\par\p
ard\li2829\sb1\sl-230\slmult0\fi0\tx3671\tx5658\tx7257\tx8966 \up0 \expndtw0\cha
rscalex100 indicator\tab \up0 \expndtw0\charscalex100 - ON/OFF controller\tab
\up0 \expndtw0\charscalex100 - PID controller\tab \up0 \expndtw0\charscalex100
- CRO emulation\tab \up0 \expndtw0\charscalex100 -\par\pard\li2829\sb0\sl-228
\slmult0\fi0 \up0 \expndtw0\charscalex100 Simulation of a simple second order sy
stem - Generation of HTML page.\par\pard\ql \li8181\sb1\sl-214\slmult0 \up0 \e
xpndtw-8\charscalex100 \ul0\nosupersub\cf3\f4\fs20 12 Hrs \par\pard\ql \li5834
\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb27\sl-184\slmult0 \up0 \expndtw-3\char
scalex100 \ul0\nosupersub\cf1\f2\fs16 61
Width}{\sv 18812}}
b100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Te
xt Books: \par\pard\li3909\sb2\sl-230\slmult0\fi0\tx4269 \up0 \expndtw-2\charsca
lex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-2\charscalex100 Sanjay

Gupta, \u8220?\ul0\nosupersub\cf3\f4\fs20 Virtual Instrumentation, LABVIEW\u8
221?\ul0\nosupersub\cf4\f5\fs20 ,\par\pard\li3909\sb0\sl-230\slmult0\fi359 \up0
\expndtw-2\charscalex100 TMH, New Delhi, 2003\par\pard\ql \li3909\ri2674\sb0\sl230\slmult0\tx4269\tx4269\tx4269 \up0 \expndtw-3\charscalex100 2. \tab \up0 \exp
ndtw0\charscalex103 S. Gupta and J P Gupta,\u8221?\ul0\nosupersub\cf3\f4\fs
20 PC Interfacing for Data \line\tab \up0 \expndtw-2\charscalex100 Acquisitio
n and Process Control\u8221?\ul0\nosupersub\cf4\f5\fs20 , Instrument Society of
\line \tab \up0 \expndtw-4\charscalex100 America, 1994 \par\pard\ql \li2829\sb0\
sl-228\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Referen
ce Books: \par\pard\ql \li3909\sb0\sl-219\slmult0\tx4269 \up0 \expndtw-3\charsca
lex100 \ul0\nosupersub\cf4\f5\fs20 3. \tab \up0 \expndtw-4\charscalex100 Peter W
Gofton , \u8220?\ul0\nosupersub\cf3\f4\fs20 Understanding Serial \par\pard\ql \
li4269\sb12\sl-230\slmult0 \up0 \expndtw-4\charscalex100 Communication\ul0\nosup
ersub\cf4\f5\fs20 \u8221?, Sybes International, 2000 \par\pard\li3909\sb2\sl-230
\slmult0\fi0\tx4269 \up0 \expndtw-1\charscalex100 4.\tab \up0 \expndtw-1\charsca
lex100 Robert H. Bishop, \u8220?\ul0\nosupersub\cf3\f4\fs20 Learning with L
ab-View\ul0\nosupersub\cf4\f5\fs20 \u8221? Preticee\par\pard\li3909\sb0\sl-228\
slmult0\fi360 \up0 \expndtw-1\charscalex100 Hall, 2009\par\pard\li3909\sb2\sl-23
0\slmult0\fi0\tx4269 \up0 \expndtw-1\charscalex100 5.\tab \up0 \expndtw-1\charsc
alex100 Ernest O. Doeblin and Dhanesh N Manik, \u8220?\ul0\nosupersub\cf3\f4\fs2
0 Measrement\par\pard\li3909\sb0\sl-230\slmult0\fi359 \up0 \expndtw-1\charscale
x100 Systems - Application and Design\u8221?\ul0\nosupersub\cf4\f5\fs20 , 5\ul0\
super\cf17\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 Edn, TMH, 2007.\par\pard\li28
29\sb0\sl-230\slmult0\par\pard\li2829\sb6\sl-230\slmult0\fi2652 \up0 \expndtw-2\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 VII SEMESTER\par\pard\li2829\sb0\sl-23
0\slmult0\fi1000 \up0 \expndtw-2\charscalex100 COMPUTER COMMUNICATION NETWORKS\p
ar\pard\li2829\sb224\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\cha
rscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\charscal
ex100 : \ul0\nosupersub\cf3\f4\fs20 10EC71\tab \up0 \expndtw-2\charscalex100 \ul
0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\par
d\li2829\sb0\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex100 No.
of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \
7\tx8517 \up0 \expndtw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expnd
tw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \e
xpndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb218\sl-230\slmult0 \up0 \expn
dtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\qj \li2829\ri
2675\sb19\sl-220\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs
20 Layered tasks, OSI Model, Layers in OSI model, TCP?IP Suite, Addressing, \lin
e \up0 \expndtw-1\charscalex100 Telephone and cable networks for data transmissi
on, Telephone networks, \par\pard\li2829\sb13\sl-230\slmult0\fi0\tx7963 \up0 \ex
pndtw-2\charscalex100 Dial up modem, DSL, Cable TV for data transmission.\tab \u
p0 \expndtw-2\charscalex100 7\ul0\nosupersub\cf3\f4\fs20 Hrs\par\pard\ql \li282
9\sb229\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT - 2 \par\pard\ql \li28
29\sb1\sl-217\slmult0 \up0 \expndtw-3\charscalex100 DATA LINK CONTROL:\ul0\nos
upersub\cf4\f5\fs20 Framing, Flow and error control, Protocols, \par\pard
\li2829\sb13\sl-230\slmult0\fi0\tx8111 \up0 \expndtw-2\charscalex100 Noiseless c
hannels and noisy channels, HDLC.\tab \up0 \expndtw-2\charscalex100 \ul0\nosuper
sub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-4\c
harscalex100 UNIT - 3 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\cha
rscalex103 MULTIPLE
ACCESSES:\ul0\nosupersub\cf4\f5\fs20
Random
access
,
Controlled
access, \par\pard\li2829\sb15\sl-230\slmult0\fi0\tx8231 \up0
\expndtw-2\charscalex100 Channelisation.\tab \up0 \expndtw-2\charscalex100 \ul0\
nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2879\sb228\sl-230\slmult0 \up0 \expn
dtw-4\charscalex100 UNIT - 4 \par\pard\qj \li2829\ri2677\sb0\sl-240\slmult0 \up0
\expndtw0\charscalex101 \ul0\nosupersub\cf4\f5\fs20 Wired LAN, Ethernet, IEEE s
tandards, Standard Ethernet. Changes in the \up0 \expndtw-4\charscalex100 standa
rds, Fast Ethernet, Gigabit Ethernet, Wireless LAN IEEE 802.11 \par\pard\ql \li8
7 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb7\sl-230\sl

mult0 \up0 \expndtw-4\charscalex100 UNIT - 5 \par\pard\ql \li2829\sb10\sl-230\sl
mult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Connecting LANs,
Backbone and Virtual LANs, Connecting devices, Back \par\pard\li2829\sb1\sl-230
\slmult0\fi0\tx8303 \up0 \expndtw-2\charscalex100 bone Networks, Virtual LANs\ta
b \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \l
834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb125\sl-184\slmult0 \up0 \expndtw-3\
charscalex100 \ul0\nosupersub\cf1\f2\fs16 62
Width}{\sv 18812}}
mult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Network Layer, L
ogical addressing, Ipv4 addresses, Ipv6 addresses, Ipv4 and \par\pard\li2829\sb2
\sl-230\slmult0\fi0\tx8299 \up0 \expndtw-2\charscalex100 Ipv6 Transition from Ip
v4 to Ipv6.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\
\par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosup
ersub\cf4\f5\fs20 Delivery, Forwarding, Unicast Routing Protocols, Mul
ticast Routing \par\pard\li2829\sb2\sl-230\slmult0\fi0\tx8227 \up0 \expndtw-2\
charscalex100 protocols.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f
100 UNIT - 8 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw0\charscalex1
00 \ul0\nosupersub\cf4\f5\fs20 Transport layer Process to process Delivery,
UDP, TCP, Domain name \par\pard\li2829\sb1\sl-230\slmult0\fi0\tx8253 \up0 \
expndtw-2\charscalex100 system, Resolution.\tab \up0 \expndtw-2\charscalex100 \u
l0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li28
29\sb0\sl-230\slmult0\par\pard\li2829\sb6\sl-230\slmult0\fi0 \up0 \expndtw0\char
scalex100 TEXT BOOK:\par\pard\li2829\sb0\sl-225\slmult0\fi360\tx3549 \up0 \expnd
tw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw0\charscalex10
0 \ul0\nosupersub\cf3\f4\fs20 Data Communication and Networking\ul0\nosupersub\c
f4\f5\fs20 , B Forouzan\ul0\nosupersub\cf3\f4\fs20 , \ul0\nosupersub\cf4\f5\fs20
4\ul0\super\cf17\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 Ed, TMH\par\pard\li282
9\sb1\sl-228\slmult0\fi719 \up0 \expndtw0\charscalex100 2006\par\pard\li2829\sb0
\sl-230\slmult0\par\pard\li2829\sb2\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex
100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS\ul0\nosupersub\cf4\f5\fs20 :\par
\pard\li2829\sb1\sl-230\slmult0\fi360\tx3549 \up0 \expndtw0\charscalex100 4.\tab
\up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Computer Networks\ul0\
nosupersub\cf4\f5\fs20 , James F. Kurose, Keith W. Ross: Pearson\par\pard\li2829
\sb0\sl-230\slmult0\fi720 \up0 \expndtw0\charscalex100 education, 2\ul0\super\cf
17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20
Edition, 2003\par\pard\li2829\sb0\s
l-228\slmult0\fi360\tx3549 \up0 \expndtw0\charscalex100 5.\tab \up0 \expndtw0\ch
arscalex100 \ul0\nosupersub\cf3\f4\fs20 Introduction to Data communication and
Networking\ul0\nosupersub\cf4\f5\fs20 , Wayne\par\pard\li2829\sb1\sl-230\slmul
t0\fi720 \up0 \expndtw0\charscalex100 Tomasi: Pearson education 2007\par\pard\li
2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb6\s
l-230\slmult0\fi1384 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 O
PTICAL FIBER COMMUNICATION\par\pard\li2829\sb224\sl-230\slmult0\fi0\tx4917\tx707
7\tx8517 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\
tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC72\tab \up0
\expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw2\charscalex100 : 25\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \
expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charsca
lex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2829\sb1\sl230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Total no. of
Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscal

ex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0
lex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\qj \li2829\ri2674\sb0\sl-2
30\slmult0 \up0 \expndtw-1\charscalex100 OVERVIEW OF OPTICAL FIBER COMMUNICATION
: \ul0\nosupersub\cf4\f5\fs20 Introduction, \line \up0 \expndtw0\charscalex100 H
istorical development, general system, advantages, disadvantages, and \lin
e \up0 \expndtw-1\charscalex100 applications
of optical fiber communication,
optical fiber waveguides, Ray \line \up0 \expndtw0\charscalex103 theory, cylind
rical fiber (no derivations in article 2.4.4), single mode fiber, \line \up0 \ex
pndtw-1\charscalex100 cutoff wave length, mode filed diameter. Optical Fi
bers: fiber materials, \par\pard\li2829\sb2\sl-230\slmult0\fi0\tx8207 \up0 \ex
pndtw-2\charscalex100 photonic crystal, fiber optic cables specialty fibers.\tab
2829\sb228\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 2 \par\pard\qj \l
i2829\ri2674\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex100 TRANSMISSION CHAR
ACTERISTICS OF OPTICAL FIBERS: \line \up0 \expndtw0\charscalex100 \ul0\nos
upersub\cf4\f5\fs20 Introduction, \ul0\nosupersub\cf3\f4\fs20 A\ul0\nosupersub\
cf4\f5\fs20 ttenuation, absorption, scattering losses, bending loss, \par\p
ard\li2829\sb1\sl-208\slmult0\fi0\tx8203 \up0 \expndtw-2\charscalex100 dispersio
n, Intra model dispersion, Inter model dispersion.\tab \up0 \expndtw-2\charscale
x100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li5834\sb0\sl-184\slmult0 \p
ar\pard\ql\li5834\sb36\sl-184\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosuper
sub\cf1\f2\fs16 63
Width}{\sv 18812}}
-230\slmult0 \up0 \expndtw-2\charscalex100 OPTICAL SOURCES AND DETECTORS:\ul0\no
supersub\cf4\f5\fs20 Introduction, LED\u8217?s, LASER \line \up0 \expndtw0\char
scalex100 diodes, Photo detectors, Photo detector noise, Response time, double h
etero \line \up0 \expndtw-4\charscalex100 junction structure, Photo diodes, comp
arison of photo detectors. \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\
calex100 FIBER COUPLERS AND CONNECTORS: \ul0\nosupersub\cf4\f5\fs20 Introduction
, fiber alignment \line \up0 \expndtw-1\charscalex100 and joint loss, single mod
e fiber joints, fiber splices, fiber connectors and \par\pard\li2829\sb1\sl-208\
slmult0\fi0\tx8186 \up0 \expndtw-2\charscalex100 fiber couplers.\tab \up0 \expnd
tw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl230\slmult0 \par\pard\ql\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb2\sl-23
0\slmult0 \up0 \expndtw-4\charscalex100 UNIT - 5 \par\pard\qj \li2829\ri2674\sb0
\sl-240\slmult0\fi0 \up0 \expndtw-3\charscalex100 OPTICAL RECEIVER:\ul0\nosupers
ub\cf4\f5\fs20 Introduction, Optical Receiver Operation, receiver \line \up0 \e
xpndtw-2\charscalex100 sensitivity, quantum limit, eye diagrams, coherent
detection, burst mode \par\pard\li2829\sb1\sl-208\slmult0\fi0\tx8191 \up0 \exp
ndtw-2\charscalex100 receiver, operation, Analog receivers.\tab \up0 \expndtw-2\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb222\sl-230
\slmult0 \up0 \expndtw-4\charscalex100 UNIT - 6 \par\pard\ql \li2829\ri2644\sb12
\sl-228\slmult0 \up0 \expndtw-2\charscalex100 ANALOG AND DIGITAL LINKS:\ul0\nosu
persub\cf4\f5\fs20 Analog links - Introduction, overview \line \up0 \expndtw-2\
charscalex100 of analog links, CNR, multichannel transmission techniques, RF o
ver fiber, \line \up0 \expndtw-3\charscalex100 key link parameters, Radio over f
iber links, microwave photonics. \line \up0 \expndtw-1\charscalex100 Digital l
inks - Introduction, point-to-point links, System considerations, link \line \up
0 \expndtw-3\charscalex100 power budget, resistive budget, short wave length ban
d, transmission distance \line \up0 \expndtw-4\charscalex100 for single mode fib

ers, Power penalties, nodal noise and chirping. \up0 \expndtw-4\charscalex100 \u
l0\nosupersub\cf3\f4\fs20 8 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\par
d\ql\li2829\sb1\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT - 7 \par\pard\
qj \li2829\ri2674\sb12\sl-228\slmult0 \up0 \expndtw-2\charscalex100 WDM CONCEPTS
AND COMPONENTS:\ul0\nosupersub\cf4\f5\fs20 WDM concepts, overview of \line \up
0 \expndtw-3\charscalex100 WDM operation principles, WDM standards, Mach-Zehende
r interferometer, \line \up0 \expndtw0\charscalex102 multiplexer, Isolators and
circulators, direct thin film filters, active optical \line \up0 \expndtw-2\char
scalex100 components, MEMS technology, variable optical attenuators, tunable opt
ical \line \up0 \expndtw0\charscalex100 fibers, dynamic gain equalizers, opt
ical drop multiplexers, polarization \line \up0 \expndtw-4\charscalex100 cont
rollers, chromatic dispersion compensators, tunable light sources. \par\pard\ql
\li8270\sb11\sl-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4
\fs20 7 Hrs \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-4\charscalex10
calex100 \ul0\nosupersub\cf4\f5\fs20 Optical Amplifiers and Networks - optical a
mplifiers, basic applications and \up0 \expndtw-4\charscalex100 types, semicondu
ctor optical amplifiers, EDFA. \par\pard\ql \li2829\sb12\sl-230\slmult0 \up0 \ex
pndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 OPTICAL NETWORKS:\ul0\nosupers
ub\cf4\f5\fs20 Introduction, SONET / SDH, Optical Interfaces, \par\pard\li2829\
sb2\sl-230\slmult0\fi0\tx8299 \up0 \expndtw0\charscalex100 SONET/SDH rings, High
- speed light - waveguides.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf
3\f4\fs20 6 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb3\sl-230\sl
mult0\fi50 \up0 \expndtw0\charscalex100 TEXT BOOKS:\par\pard\li2829\sb0\sl-225\s
lmult0\fi360\tx3549 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\
tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 "Optical Fiber Co
mmunication\u8221?\ul0\nosupersub\cf4\f5\fs20 , Gerd Keiser, 4\ul0\super\cf17
\f18\fs19 th\ul0\nosupersub\cf4\f5\fs20 Ed., MGH,\par\pard\li2829\sb2\sl-230\
slmult0\fi720 \up0 \expndtw0\charscalex100 2008.\par\pard\li2829\sb0\sl-230\slmu
lt0\fi360\tx3549 \up0 \expndtw0\charscalex100 2.\tab \up0 \expndtw0\charscalex10
0 \ul0\nosupersub\cf3\f4\fs20 "Optical Fiber Communications"\ul0\nosupersub\cf
4\f5\fs20 , John M. Senior, Pearson\par\pard\li2829\sb1\sl-230\slmult0\fi720
\up0 \expndtw0\charscalex100 Education. 3\ul0\super\cf17\f18\fs19 rd\ul0\nosupe
rsub\cf4\f5\fs20 Impression, 2007.\par\pard\ql \li5834\sb0\sl-184\slmult0 \par\
pard\ql\li5834\sb32\sl-184\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub
\cf1\f2\fs16 64 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-24
0{\bkmkstart Pg61}{\bkmkend Pg61}\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pa
\ql\li2829\sb100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf
3\f4\fs20 REFERENCE BOOK: \par\pard\li3189\sb2\sl-230\slmult0\fi0\tx3549\tx6276\
tx8090 \up0 \expndtw0\charscalex101 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \exp
ndtw0\charscalex101 \ul0\nosupersub\cf3\f4\fs20 Fiber Optic Communication\tab
\up0 \expndtw0\charscalex101 \ul0\nosupersub\cf4\f5\fs20 - Joseph C Palais:\t
ab \up0 \expndtw0\charscalex101 4\ul0\super\cf17\f18\fs19 th\ul0\nosupersub\cf4\
f5\fs20 Edition,\par\pard\li3189\sb0\sl-228\slmult0\fi359 \up0 \expndtw0\chars
calex101 Pearson Education.\par\pard\li2855\sb0\sl-230\slmult0\par\pard\li2855\s
b7\sl-230\slmult0\fi1963 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs
20 POWER ELECTRONICS\par\pard\li2855\sb226\sl-230\slmult0\fi0\tx4943\tx7103\tx85
44 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \u
p0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC73\tab \up0 \expnd
tw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\char
scalex100 : 25\par\pard\li2855\sb0\sl-230\slmult0\fi0\tx7103\tx8543 \up0 \expndt
w-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100
Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2855\sb0\sl-228\sl
mult0\fi0\tx4943\tx7103\tx8543 \up0 \expndtw-2\charscalex100 Total no. of Lectur
e Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100
Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0\sl-23
\ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\qj \li2829\ri2675\sb19\sl-220\sl
mult0 \up0 \expndtw0\charscalex104 \ul0\nosupersub\cf4\f5\fs20 Introduction, Ap

plications of power electronics, Power semiconductor \line \up0 \expndtw0\c
harscalex104 devices, Control characteristics, Types of power electronics
circuits, \par\pard\li2829\sb12\sl-230\slmult0\fi0\tx7936 \up0 \expndtw-2\chars
calex100 Peripheral effects.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\c
alex100 UNIT - 2 \par\pard\qj \li2829\ri2675\sb0\sl-230\slmult0 \up0 \expndtw0\c
harscalex101 POWER TRANSISTOR:\ul0\nosupersub\cf4\f5\fs20
Power BJT\u8217
?s, Switching characteristics, \line \up0 \expndtw0\charscalex103 Switching
limits, Base derive control, Power MOSFET\u8217?s, Switching \line \up0 \
expndtw-3\charscalex100 characteristics, Gate drive, IGBT\u8217?s, Isolation of
gate and base drives. \par\pard\ql \li8020\sb0\sl-230\slmult0 \up0 \expndtw-4\ch
arscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb1\sl-217\sl
mult0 \up0 \expndtw-4\charscalex100 UNIT - 3 \par\pard\qj \li2829\ri2675\sb16\sl
-226\slmult0 \up0 \expndtw0\charscalex100 INTRODUCTION TO THYRISTORS:\ul0\nosu
persub\cf4\f5\fs20 Principle of operation states \line \up0 \expndtw0\chars
calex100 anode-cathode characteristics, Two transistor model. Turn-on Meth
ods, \line \up0 \expndtw-2\charscalex100 Dynamic Turn-on and turn-off charac
teristics, Gate characteristics, Gate \line \up0 \expndtw-3\charscalex100 tri
gger circuits, di / dt and dv / dt protection, Thyristor firing circuits. \par\p
ard\ql \li8071\sb11\sl-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub
\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-4\chars
calex100 UNIT - 4 \par\pard\qj \li2829\ri2674\sb21\sl-220\slmult0 \up0 \expndtw0
\charscalex101 CONTROLLED RECTIFIERS:\ul0\nosupersub\cf4\f5\fs20
Introducti
on, Principles of phase \line \up0 \expndtw-2\charscalex100 controlled c
onverter operation, \up0 \expndtw0\charscalex100 1\u966? fully controlled
converters, Duel \par\pard\ql \li2829\sb12\sl-230\slmult0 \up0 \expndtw-4\cha
rscalex100 converters, 1 \u966? semi converters (all converters with R & RL load
). \par\pard\ql \li8071\sb1\sl-217\slmult0 \up0 \expndtw-4\charscalex100 \ul0\no
supersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\
li2829\sb3\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT - 5 \par\pard\qj \l
i2829\ri2675\sb10\sl-230\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf
4\f5\fs20 Thyristor turn off methods, natural and forced commutati
on, self \line \up0 \expndtw-1\charscalex100 commutation, class A and clas
s B types, Complementary commutation, \line \up0 \expndtw-1\charscalex100 au
xiliary commutation, external pulse commutation, AC line commutation, \par\pard\
li2829\sb0\sl-230\slmult0\fi0\tx8075 \up0 \expndtw-2\charscalex100 numerical pro
blems.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\p
l\li5834\sb34\sl-184\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf1\f
2\fs16 65
Width}{\sv 18812}}
01 AC VOLTAGE CONTROLLERS:\ul0\nosupersub\cf4\f5\fs20 Introduction, Principles
of on and off \line \up0 \expndtw0\charscalex102 control, Principles of phase c
ontrol, Single phase controllers with restive \par\pard\li2829\sb1\sl-208\slm
ult0\fi0\tx8111 \up0 \expndtw-2\charscalex100 loads and Inductive loads, numeric
al problems.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs
par\pard\ql\li2829\sb2\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 7 \pa
r\pard\qj \li2829\ri2675\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex104 DC CHO
PPERS: \ul0\nosupersub\cf4\f5\fs20 Introduction, Principles of step down a
nd step up \up0 \expndtw0\charscalex100 choppers, Step down chopper with RL lo

ads, Chopper classification, Switch \up0 \expndtw0\charscalex100 mode regulators
- buck, boost and buck - boost regulators. \up0 \expndtw-2\charscalex100 \ul0\n
osupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb220\sl-230\slmult0 \up0 \expn
dtw-2\charscalex100 UNIT - 8 \par\pard\qj \li2829\ri2674\sb10\sl-230\slmult0\fi0
\up0 \expndtw0\charscalex103 INVERTORS:\ul0\nosupersub\cf4\f5\fs20
Introduct
ion, Principles of\ul0\nosupersub\cf3\f4\fs20 \ul0\nosupersub\cf4\f5\fs20
operation, Performance \up0 \expndtw-3\charscalex100 parameters, 1\u966?\ul0\
nosupersub\cf3\f4\fs20 \ul0\nosupersub\cf4\f5\fs20 bridge inverter, voltage con
trol of 1\u966? invertors, current source \up0 \expndtw-3\charscalex100 invertor
s, Variable DC link inverter. \par\pard\ql \li8020\sb1\sl-217\slmult0 \up0 \expn
dtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb0\s
l-230\slmult0 \par\pard\ql\li2829\sb3\sl-230\slmult0 \up0 \expndtw-4\charscalex1
00 TEXT BOOKS: \par\pard\li2829\sb11\sl-230\slmult0\fi359\tx3549 \up0 \expndtw-1
\charscalex100 \ul0\nosupersub\cf4\f5\fs20 4.\tab \up0 \expndtw-1\charscalex100
\ul0\nosupersub\cf3\f4\fs20 \u8220?Power Electronics\u8221? - \ul0\nosupersub\c
f4\f5\fs20 M. H. Rashid 3\ul0\super\cf17\f18\fs19 rd\ul0\nosupersub\cf4\f5\fs20
edition, PHI / Pearson\par\pard\li2829\sb1\sl-230\slmult0\fi720 \up0 \expndtw
-1\charscalex100 publisher 2004.\par\pard\li2829\sb0\sl-230\slmult0\fi360\tx3549
\up0 \expndtw-1\charscalex100 5.\tab \up0 \expndtw-1\charscalex100 \ul0\nosuper
sub\cf3\f4\fs20 \u8220?Power Electronics\u8221? - \ul0\nosupersub\cf4\f5\fs20 M.
D. Singh and Kanchandani K.B. TMH\par\pard\li2829\sb0\sl-228\slmult0\fi720 \up0
\expndtw-1\charscalex100 publisher, 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub
\cf4\f5\fs20 Ed. 2007.\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb7\s
l-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFE
RENCE BOOKS:\par\pard\li2829\sb0\sl-230\slmult0\fi360\tx3549 \up0 \expndtw-1\cha
\nosupersub\cf3\f4\fs20 \u8220?Power Electronics, Essentials and Applications\u8
221?, L Umanand,\par\pard\li2829\sb0\sl-226\slmult0\fi720 \up0 \expndtw-1\charsc
alex100 \ul0\nosupersub\cf4\f5\fs20 John Wiley India Pvt. Ltd, 2009.\par\pard\li
expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Power Electronics\u82
21? \ul0\nosupersub\cf4\f5\fs20 , Daniel W. Hart, McGraw Hill, 2010.\par\pard\li
expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Power Electronics\ul0
\nosupersub\cf4\f5\fs20 \u8221?, V Nattarasu and R.S. Anandamurhty,\par\pard\li2
829\sb6\sl-230\slmult0\fi763 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f
4\fs20 Pearson/Sanguine Pub. 2006.\par\pard\ql \li4831\sb0\sl-230\slmult0 \par\p
ard\ql\li4831\sb215\sl-230\slmult0 \up0 \expndtw-4\charscalex100 EMBEDED SYSTEM
DESIGN \par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\pa
r\pard\li2829\sb10\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\chars
calex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\charscalex
100 : \ul0\nosupersub\cf3\f4\fs20 10EC74\tab \up0 \expndtw-2\charscalex100 \ul0\
nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\
li2829\sb1\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex100 No. of
Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \ex
pndtw-2\charscalex100 : 03\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx4917\tx7077\
tx8517 \up0 \expndtw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw
-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \exp
ndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb229\sl-230\slmult0 \up0 \expndt
w-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT 1: \par\pard\qj \li2829\ri325
3\sb0\sl-240\slmult0 \up0 \expndtw-4\charscalex100 Introduction to Embedded Syst
em:\ul0\nosupersub\cf4\f5\fs20 Introducing Embedded Systems, \line \up0 \expndt
w-4\charscalex100 Philosophy, Embedded Systems, Embedded Design and Development
\par\pard\li2829\sb1\sl-207\slmult0\fi0\tx8044 \up0 \expndtw-2\charscalex100 Pro
cess.\tab \up0 \expndtw-2\charscalex100 5\ul0\nosupersub\cf3\f4\fs20 Hrs\par\pa
rd\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\par
d\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb129\sl-184\slmult0 \up0 \ex
pndtw-3\charscalex100 \ul0\nosupersub\cf1\f2\fs16 66
Width}{\sv 18812}}
IT 2: \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 The
Hardware Side\ul0\nosupersub\cf4\f5\fs20 : An Introduction, The Core Level, Repr
esenting \par\pard\ql \li2829\ri2854\sb13\sl-230\slmult0 \up0 \expndtw-1\charsca
lex100 Information, Understanding Numbers, Addresses, Instructions, Registers-A
\line \up0 \expndtw-2\charscalex100 First Look, Embedded Systems-An Instruction
Set View, Embedded \line \up0 \expndtw-2\charscalex100 Systems-A Register View,
Register View of a Microprocessor \line \up0 \expndtw-2\charscalex100 The Hardwa
re Side: Storage Elements and Finite-State Machines (2 hour) \line \up0 \expndtw
-1\charscalex100 The concepts of State and Time, The State Diagram, Finite State
Machines-\par\pard\li2829\sb2\sl-230\slmult0\fi0\tx8157 \up0 \expndtw-2\charsca
lex100 A Theoretical Model.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf
3\f4\fs20 8 Hrs\par\pard\ql \li2829\sb218\sl-230\slmult0 \up0 \expndtw-2\charsca
lex100 UNIT 3\ul0\nosupersub\cf4\f5\fs20 : \par\pard\ql \li2829\ri2833\sb12\sl-2
28\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Memories an
d the Memory Subsystem\ul0\nosupersub\cf4\f5\fs20 : Classifying Memory, A Genera
l \line \up0 \expndtw-2\charscalex100 Memory Interface, ROM Overview, Static RAM
Overview, Dynamic RAM \line \up0 \expndtw-1\charscalex100 Overview, Chip Organi
zation, Terminology, A Memory Interface in Detail, \line \up0 \expndtw-2\charsca
lex100 SRAM Design, DRAM Design, DRAM Memory Interface, The Memory \line \up0 \e
xpndtw-2\charscalex100 Map, Memory Subsystem Architecture, Basic Concepts of Cac
hing, \line \up0 \expndtw-2\charscalex100 Designing a Cache System, Dynamic Memo
ry Allocation. \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \
par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb1\sl-230\slmult0 \u
p0 \expndtw-2\charscalex100 UNIT 4: \par\pard\ql \li2829\sb10\sl-230\slmult0 \up
0 \expndtw-2\charscalex100 Embedded Systems Design and Development\ul0\nosupersu
b\cf4\f5\fs20 : System Design and \par\pard\ql \li2829\ri2674\sb0\sl-232\slmult
0 \up0 \expndtw-1\charscalex100 Development, Life-cycle Models, Problem SolvingFive Steps to Design, The \line \up0 \expndtw-1\charscalex100 Design Process, Id
entifying the Requirements, Formulating the Requirements \line \up0 \expndtw-2\c
harscalex100 Specification, The System Design Specification, System Specificatio
ns \line \up0 \expndtw-2\charscalex100 versus System Requirements, Partitioning
and Decomposing a System, \line \up0 \expndtw-2\charscalex100 Functional Design,
Architectural Design, Functional Model versus \line \up0 \expndtw-2\charscalex1
00 Architectural Model, Prototyping, Other Considerations, Archiving the \par\pa
rd\li2829\sb1\sl-218\slmult0\fi0\tx7999 \up0 \expndtw-2\charscalex100 Project.\t
li2829\sb221\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 5 & 6: \par\pard\
ql \li2829\ri2800\sb10\sl-230\slmult0 \up0 \expndtw-3\charscalex100 Real-Time Ke
rnels and Operating Systems\ul0\nosupersub\cf4\f5\fs20 : Tasks and Things, Pro
grams \line \up0 \expndtw-2\charscalex100 and Processes, The CPU is a resource,
Threads - Lightweight and \line \up0 \expndtw-2\charscalex100 heavyweight, Shari
ng Resources, Foreground/Background Systems, The \line \up0 \expndtw-1\charscale
x100 operating System, The real time operating system (RTOS), OS architecture, \
line \up0 \expndtw-2\charscalex100 Tasks and Task control blocks, memory managem
ent revisited. \par\pard\ql \li8231\sb1\sl-217\slmult0 \up0 \expndtw-2\charscale
x100 \ul0\nosupersub\cf3\f4\fs20 12 Hrs \par\pard\ql \li2829\sb13\sl-230\slmult0
\up0 \expndtw-2\charscalex100 UNIT 7 & 8: \par\pard\ql \li2829\ri2843\sb0\sl-23
0\slmult0 \up0 \expndtw-3\charscalex100 Performance Analysis and Optimization\ul
0\nosupersub\cf4\f5\fs20 : Performance or Efficiency \line \up0 \expndtw-4\cha
rscalex100 Measures, Complexity Analysis, The methodology, Analyzing code, \line
\up0 \expndtw-2\charscalex100 Instructions in Detail, Time, etc. - A more detai
led look, Response Time, \line \up0 \expndtw-4\charscalex100 Time Loading, Memor
y Loading, Evaluating Performance, Thoughts on \line \up0 \expndtw-3\charscalex1
00 Performance Optimization, Performance Optimization, Tricks of the Trade, \par
\pard\li2829\sb0\sl-230\slmult0\fi0\tx8267 \up0 \expndtw-2\charscalex100 Hardwar

e Accelerators, Caches and Performance.\tab \up0 \expndtw-2\charscalex100 \ul0\n
osupersub\cf3\f4\fs20 12 Hrs\par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expn
dtw-4\charscalex100 Text Book\ul0\nosupersub\cf4\f5\fs20 : \par\pard\ql \li3189\
sb1\sl-217\slmult0\tx3599 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf3\f4\f
s20 1. \tab \up0 \expndtw-3\charscalex100 Embedded Systems - A contemporary Desi
gn \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb47\sl-184\slmul
t0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf1\f2\fs16 67 \par\pard\sect\s
ectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg64}{\bkmkend Pg64
}\par\pard\qj \li2829\sb0\sl-220\slmult0 \par\pard\qj\li2829\ri3554\sb119\sl-220
\slmult0\fi712 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Tool, \
ul0\nosupersub\cf4\f5\fs20 James K. Peckol\ul0\nosupersub\cf3\f4\fs20 , \ul0\no
supersub\cf4\f5\fs20 John Weily India Pvt. Ltd, 2008 \up0 \expndtw-4\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 Reference Books\ul0\nosupersub\cf4\f5\fs20 : \
par\pard\li3189\sb14\sl-230\slmult0\fi0\tx3549 \up0 \expndtw-1\charscalex100 1.\
tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Embedded Systems:
Architecture and Programming, \ul0\nosupersub\cf4\f5\fs20 Raj Kamal,\par\pard\li
3189\sb0\sl-230\slmult0\fi360 \up0 \expndtw-1\charscalex100 TMH. 2008\par\pard\l
i3189\sb3\sl-230\slmult0\fi0\tx3549 \up0 \expndtw-1\charscalex100 2.\tab \up0 \e
xpndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Embedded Systems Architecture
- A Comprehensive Guide for\par\pard\li3189\sb0\sl-226\slmult0\fi360 \up0 \expn
dtw-1\charscalex100 Engineers and Programmers\ul0\nosupersub\cf4\f5\fs20 ,
Tammy Noergaard, Elsevier\par\pard\li3189\sb1\sl-230\slmult0\fi360 \up0 \ex
pndtw-1\charscalex100 Publication, 2005\par\pard\li3189\sb1\sl-230\slmult0\fi0\t
x3549 \up0 \expndtw-1\charscalex100 3.\tab \up0 \expndtw-1\charscalex100 \ul0\no
supersub\cf3\f4\fs20 Programming for Embedded Systems\ul0\nosupersub\cf4\f5\fs20
, Dreamtech Software\par\pard\li3189\sb0\sl-230\slmult0\fi350 \up0 \expndtw-1
\charscalex100 Team, John Wiley India Pvt. Ltd, 2008\par\pard\li2829\sb0\sl-23
0\slmult0\par\pard\li2829\sb51\sl-230\slmult0\fi2551 \up0 \expndtw-2\charscalex1
00 \ul0\nosupersub\cf3\f4\fs20 VLSI LAB\par\pard\li2829\sb224\sl-230\slmult0\fi0
\tx5068\tx7130\tx8570 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20
Subject Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10E
CL77\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab
\tx8570 \up0 \expndtw-2\charscalex100 No. of Practical Hrs/Week : 03\tab \up0 \e
xpndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\par
d\li2829\sb1\sl-230\slmult0\fi0\tx5068\tx7130\tx8570 \up0 \expndtw-2\charscalex1
00 Total no. of Practical Hrs.\tab \up0 \expndtw-2\charscalex100 : 42\tab \up0 \
expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 50\par\pa
rd\qj \li2829\sb0\sl-240\slmult0 \par\pard\qj\li2829\ri2703\sb14\sl-240\slmult0\
fi0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf3\f4\fs20 (Wherever necess
ary
Cadence/Synopsis/Menta Graphics tools must be \line \up0 \expndtw-3\chars
calex100 used) \par\pard\ql \li5520\sb1\sl-215\slmult0 \up0 \expndtw-2\charscale
x100 PART - A \par\pard\ql \li5107\sb133\sl-230\slmult0 \up0 \expndtw-2\charscal
ex100 DIGITAL DESIGN \par\pard\ql \li2829\sb110\sl-230\slmult0 \up0 \expndtw-2\c
harscalex100 ASIC-DIGITAL DESIGN FLOW \par\pard\qj \li2829\ri2675\sb2\sl-240\slm
ult0\fi0 \up0 \expndtw0\charscalex106 \ul0\nosupersub\cf4\f5\fs20 1. Write Veril
og Code for the following circuits and their Test Bench for \up0 \expndtw0\chars
calex102 \ul0\nosupersub\cf3\f4\fs20 verification\ul0\nosupersub\cf4\f5\fs20 ,
observe the waveform and \ul0\nosupersub\cf3\f4\fs20 synthesize\ul0\nos
upersub\cf4\f5\fs20
the code with \up0 \expndtw0\charscalex107 technologi
cal library with given Constraints*. Do the initial timing \up0 \expndtw
-2\charscalex100 verification with gate level simulation. \par\pard\li4269\sb0\s
l-230\slmult0\par\pard\li4269\sb35\sl-230\slmult0\fi0\tx4629 \up0 \expndtw-1\cha
rscalex100 1.\tab \up0 \expndtw-1\charscalex100 An inverter\par\pard\li4269\sb10
\sl-230\slmult0\fi0\tx4629 \up0 \expndtw-1\charscalex100 2.\tab \up0 \expndtw-1\
charscalex100 A Buffer\par\pard\li4269\sb10\sl-230\slmult0\fi0\tx4629 \up0 \expn
dtw-1\charscalex100 3.\tab \up0 \expndtw-1\charscalex100 Transmission Gate\par\p
ard\li4269\sb10\sl-230\slmult0\fi0\tx4629 \up0 \expndtw-1\charscalex100 4.\tab \
up0 \expndtw-1\charscalex100 Basic/universal gates\par\pard\li4269\sb10\sl-230\s
lmult0\fi0\tx4629 \up0 \expndtw-1\charscalex100 5.\tab \up0 \expndtw-1\charscale

x100 Flip flop -RS, D, JK, MS, T\par\pard\li4269\sb10\sl-230\slmult0\fi0\tx4629
\up0 \expndtw-1\charscalex100 6.\tab \up0 \expndtw-1\charscalex100 Serial & Para
llel adder\par\pard\li4269\sb10\sl-230\slmult0\fi0\tx4629\tx6057 \up0 \expndtw-1
\charscalex100 7.\tab \up0 \expndtw-1\charscalex100 4-bit counter\tab \up0 \ex
pndtw-1\charscalex100 [Synchronous and Asynchronous\par\pard\ql \li4629\sb1\
sl-222\slmult0 \up0 \expndtw-4\charscalex100 counter] \par\pard\ql \li4269\sb12\
sl-230\slmult0\tx4629 \up0 \expndtw-3\charscalex100 8. \tab \up0 \expndtw-4\char
scalex100 Successive approximation register [SAR] \par\pard\ql \li2829\sb0\sl-23
\ul0\nosupersub\cf37\f38\fs20 * An appropriate constraint should be given \par\p
}
}}
Width}{\sv 18812}}
b100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 PA
RT - B \par\pard\ql \li5102\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 AN
ALOG DESIGN \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb20\sl230\slmult0 \up0 \expndtw-2\charscalex100 Analog Design Flow \par\pard\qj \li282
9\ri2628\sb2\sl-240\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5
\fs20 1. Design an \ul0\nosupersub\cf3\f4\fs20 Inverter\ul0\nosupersub\cf4\f5\fs
20 with given specifications*, completing the design flow \up0 \expndtw-5\chars
calex100 mentioned
below: \par\pard\ql \li3100\sb9\sl-230\slmult0 \up0 \expnd
tw-2\charscalex100 a. \ul0\nosupersub\cf3\f4\fs20 Draw the schematic\ul0\nosuper
sub\cf4\f5\fs20 and verify the following \par\pard\ql \li3820\sb10\sl-230\slmul
t0 \up0 \expndtw-2\charscalex100 i) DC Analysis \par\pard\ql \li3820\sb10\sl-230
\slmult0 \up0 \expndtw-2\charscalex100 ii) Transient Analysis \par\pard\ql \li31
00\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 b. \ul0\nosupersub\cf3\f4\f
s20 Draw the Layout\ul0\nosupersub\cf4\f5\fs20 and verify the DRC, ERC \par\par
d\ql \li3100\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 c. Check for LVS
\par\pard\ql \li3100\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 d. Extrac
t RC and back annotate the same and verify the Design \par\pard\qj \li3100\ri267
5\sb2\sl-240\slmult0 \up0 \expndtw0\charscalex108 e. Verify & Optimize for
Time, Power and Area to the given \up0 \expndtw-2\charscalex100 constraint
*** \par\pard\qj \li2829\ri2675\sb240\sl-240\slmult0 \up0 \expndtw0\charscalex10
3 2. Design the following circuits with given specifications*, completing the \u
p0 \expndtw-2\charscalex100 design flow mentioned below: \par\pard\ql \li3100\sb
9\sl-230\slmult0 \up0 \expndtw-2\charscalex100 a. Draw the schematic and verify
the following \par\pard\ql \li3820\sb10\sl-230\slmult0 \up0 \expndtw-5\charscale
x100 i) DC Analysis \par\pard\ql \li3820\sb10\sl-230\slmult0 \up0 \expndtw-2\c
harscalex100 ii) AC Analysis \par\pard\ql \li3820\sb10\sl-230\slmult0 \up0 \expn
dtw-2\charscalex100 iii) Transient Analysis \par\pard\ql \li3100\sb10\sl-230\slm

ult0 \up0 \expndtw-2\charscalex100 b. Draw the Layout and verify the DRC, ERC \p
ar\pard\ql \li3100\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 c. Check fo
r LVS \par\pard\ql \li3100\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 d.
Extract RC and back annotate the same and verify the Design. \par\pard\ql \li382
0\sb10\sl-230\slmult0 \up0 \expndtw-3\charscalex100 i) A Single Stage differen
tial amplifier \par\pard\ql \li3820\sb10\sl-230\slmult0 \up0 \expndtw-2\charscal
ex100 ii) Common source and Common Drain amplifier \par\pard\qj \li2829\sb0\sl-2
40\slmult0 \par\pard\qj\li2829\sb0\sl-240\slmult0 \par\pard\qj\li2829\ri2675\sb2
\sl-240\slmult0 \up0 \expndtw0\charscalex100 3. Design an \ul0\nosupersub\cf3\
f4\fs20 op-amp\ul0\nosupersub\cf4\f5\fs20 with given specification* using
given differential \up0 \expndtw0\charscalex104 amplifier Common source and Co
mmon Drain amplifier in library** and \up0 \expndtw-2\charscalex100 completing t
he design flow mentioned below: \par\pard\ql \li3100\sb9\sl-230\slmult0 \up0 \ex
pndtw-2\charscalex100 a. Draw the schematic and verify the following \par\pard\q
l \li3820\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 i) DC Analysis \par\
pard\ql \li3820\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 ii). AC Analys
is \par\pard\ql \li3820\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 iii) T
ransient Analysis \par\pard\ql \li3100\sb10\sl-230\slmult0 \up0 \expndtw-2\chars
calex100 b. Draw the Layout and verify the DRC, ERC \par\pard\ql \li3100\sb10\sl
-230\slmult0 \up0 \expndtw-2\charscalex100 c. Check for LVS \par\pard\ql \li3100
\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 d. Extract RC and back annota
te the same and verify the Design. \par\pard\qj \li2829\sb0\sl-240\slmult0 \par\
pard\qj\li2829\sb0\sl-240\slmult0 \par\pard\qj\li2829\ri2675\sb2\sl-240\slmult0\
tx4005 \up0 \expndtw0\charscalex102 4. Design a \tab \up0 \expndtw0\charscalex
102 \ul0\nosupersub\cf3\f4\fs20 4 bit R-2R based DAC\ul0\nosupersub\cf4\f5\f
s20 for the given specification and \line\up0 \expndtw-1\charscalex100 com
pleting the design flow mentioned using given op-amp in the library**. \par\pard
\ql \li3100\sb9\sl-230\slmult0 \up0 \expndtw-2\charscalex100 a. Draw the schemat
ic and verify the following \par\pard\ql \li5834\sb28\sl-184\slmult0 \up0 \expnd
tw-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 69
}
}}
}
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ff0010deff00c112bfe8c23e1fff00e1c1f8e1ff00cf428ff886f7fe0895ff004611f0ff00ff000e
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0082257fd1847c3fff00c383f1c3ff009e857edf51401f883ff10deffc112bfe8c23e1ff00fe1c1f
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4aff00a308f87fff008707e387ff003d0a3fe21bdff82257fd1847c3ff00fc383f1c3ff9e857edf5
1401f883ff0010deff00c112bfe8c23e1fff00e1c1f8e1ff00cf428ff886f7fe0895ff004611f0ff
00ff000e0fc70ffe7a15fb7d45007e20ff00c437bff044affa308f87ff00f8707e387ff3d0a3fe21
bdff0082257fd1847c3fff00c383f1c3ff009e857edf51401f883ff10deffc112bfe8c23e1ff00fe
1c1f8e1ffcf428ff00886f7fe0895ff4611f0fff00f0e0fc70ff00e7a15fb7d45007e20ffc437bff
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f0ff00ff000e0fc70ffe7a15fb7d45007e20ff00c437bff044affa308f87ff00f8707e387ff3d0a3
fe21bdff0082257fd1847c3fff00c383f1c3ff009e857edf51401f883ff10deffc112bfe8c23e1ff
00fe1c1f8e1ffcf428ff00886f7fe0895ff4611f0fff00f0e0fc70ff00e7a15fb7d45007e20ffc43
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40051451400514514005145140051451400514514005145140051451400514514005145140051451
40051451400514514005145140051451400514514005145140051451400514514005145140051451
400514514005145140051451400514514005145140051451400514514005145140057c23fb7dfc4f
fdbe7e15fc35f07eb3ff0004fafd98be197ed49f12affc6c9a6f8d3c21f137e2d697f09ac3c3fe08
3a1eaf727c43a5ea3acdfe8d63ab5e8d760d2b4e96cc6af1dcc105e34d0e9d7d1b4f73a6fddd4500
7f363ff0d8dff07327fd21f3f64fff00c4cff007ff003c3a3fe1b1bfe0e64ffa43e7ec9fff00899f
e00ffe7875fd2751401fcd8ffc3637fc1cc9ff00487cfd93ff00f133fc01ff00cf0e8ff86c6ff839
93fe90f9fb27ff00e267f803ff009e1d7f49d45007f363ff000d8dff0007327fd21f3f64ff00fc4c
ff00007ff3c3a3fe1b1bfe0e64ff00a43e7ec9ff00f899fe00ff00e7875fd2751401fcd8ff00c363
7fc1cc9ff487cfd93fff00133fc01ffcf0e8ff0086c6ff0083993fe90f9fb27ffe267f803ff9e1d7
f49d45007f363ff0d8dff07327fd21f3f64fff00c4cff007ff003c3afd40ff00827d7c5bff00828d
7c57f0ff00c4abaff8287fec97f0abf653f1068dacf876dfe1869df0c3e33e8df1763f19e8f7965a
9c9e25bdd68e89a96b56de1f7d16f60d260b012ea8d3eaaba85de6c2d23d352e2fff0043a8a0028a
28a0028a28a0028a28a0028a28a0028a28a0028a28a0028a28a00fffd9}}}}}\pard\sb0\sl-240{
\bkmkstart Pg66}{\bkmkend Pg66}\par\pard\ql \li3549\sb0\sl-240\slmult0 \par\pard
\ql\li3549\ri3548\sb82\sl-240\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosuper
sub\cf4\f5\fs20 i) DC Analysis \line \up0 \expndtw-2\charscalex100 ii) AC Analys
is \par\pard\ql \li3549\sb9\sl-230\slmult0 \up0 \expndtw-2\charscalex100 iii) Tr
ansient Analysis \par\pard\ql \li3100\sb10\sl-230\slmult0 \up0 \expndtw-2\charsc
alex100 b. Draw the Layout and verify the DRC, ERC \par\pard\ql \li3100\sb10\sl230\slmult0 \up0 \expndtw-2\charscalex100 c. Check for LVS \par\pard\ql \li3100\
sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 d. Extract RC and back annotat
e the same and verify the Design. \par\pard\qj \li2829\sb0\sl-240\slmult0 \par\p
ard\qj\li2829\sb0\sl-240\slmult0 \par\pard\qj\li2829\ri2674\sb2\sl-240\slmult0 \
up0 \expndtw0\charscalex101 5. For the \ul0\nosupersub\cf3\f4\fs20 SAR based ADC
\ul0\nosupersub\cf4\f5\fs20 mentioned in the figure below draw the mixed \line
\up0 \expndtw0\charscalex105 signal schematic and verify the functionality by co
mpleting ASIC Design \line \up0 \expndtw-2\charscalex100 FLOW. \par\pard\ql \li3
[Specifications to GDS-II] \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\

l-230\slmult0 \par\pard\ql\li2829\sb230\sl-230\slmult0 \up0 \expndtw-5\charscale
x100 *
\ul0\nosupersub\cf4\f5\fs20
Appropriate specification should be gi
ven. \par\pard\qj \li2829\ri2939\sb19\sl-220\slmult0 \up0 \expndtw-2\charscalex1
00 **
Applicable Library should be added & information should be given to \up
0 \expndtw-4\charscalex100 the Designer. \par\pard\ql \li2829\sb12\sl-230\slmult
0 \up0 \expndtw-4\charscalex100 *** An appropriate constraint should be given \p
ar\pard\ql \li4586\sb0\sl-230\slmult0 \par\pard\ql\li4586\sb220\sl-230\slmult0 \
up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 POWER ELECTRONICS LAB \
par\pard\li2855\sb0\sl-230\slmult0\par\pard\li2855\sb13\sl-230\slmult0\fi0\tx504
4\tx7104\tx8544 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subjec
t Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10ECL78\t
3 \up0 \expndtw-2\charscalex100 No. of Practical Hrs/Week: 03\tab \up0 \expndtw2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li285
5\sb0\sl-230\slmult0\fi0\tx7103\tx8543 \up0 \expndtw-2\charscalex100 Total no. o
f Practical Hrs. : 42\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \exp
ndtw-2\charscalex100 : 50\par\pard\qj \li3189\ri2677\sb208\sl-240\slmult0\fi0 \u
p0 \expndtw-2\charscalex100 Any five converter circuits experiment from the
below list \ul0\nosupersub\cf3\f4\fs20 must be \up0 \expndtw-4\charscalex100
\ul0\nosupersub\cf4\f5\fs20 simulated using the \ul0\nosupersub\cf3\f4\fs20 spi
ce-simulator\ul0\nosupersub\cf4\f5\fs20 . \par\pard\ql \li5834\sb0\sl-184\slmult
0 \par\pard\ql\li5834\sb123\sl-184\slmult0 \up0 \expndtw-3\charscalex100 \ul0\no
supersub\cf1\f2\fs16 70 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\s
b0\sl-240{\bkmkstart Pg67}{\bkmkend Pg67}\par\pard\ql \li3189\sb0\sl-230\slmult0
\par\pard\ql\li3189\sb100\sl-230\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nos
upersub\cf22\f23\fs20 \u-3913?\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4
\f5\fs20
Static characteristics of SCR and DIAC. \par\pard\ql \li3189\sb30\sl
-230\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf22\f23\fs20 \u-3913
?\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20
Static characteri
stics of MOSFET and IGBT. \par\pard\ql \li3189\sb10\sl-230\slmult0 \up0 \expndtw
-1\charscalex100 \ul0\nosupersub\cf22\f23\fs20 \u-3913?\ul0\nosupersub\cf15\f16\
fs20 \ul0\nosupersub\cf4\f5\fs20
Controlled HWR and FWR using RC triggering
circuit \par\pard\qj \li3189\ri3442\sb2\sl-240\slmult0 \up0 \expndtw-1\charscale
x100 \ul0\nosupersub\cf22\f23\fs20 \u-3913?\ul0\nosupersub\cf15\f16\fs20 \ul0\n
osupersub\cf4\f5\fs20
SCR turn off using i) LC circuit ii) Auxiliary Commutat
ion \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf22\f23\fs20 \u-3913?\ul0\nos
upersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20
UJT firing circuit for HWR
and FWR circuits. \par\pard\ql \li3189\ri2674\sb0\sl-240\slmult0\tx3549 \up0 \e
xpndtw0\charscalex100 \ul0\nosupersub\cf22\f23\fs20 \u-3913?\ul0\nosupersub\cf15
\f16\fs20 \ul0\nosupersub\cf4\f5\fs20
Generation of firing signals for thyri
stors/ trials using digital circuits \line\tab \up0 \expndtw-2\charscalex100 / m
icroprocessor. \par\pard\ql \li3189\sb9\sl-230\slmult0 \up0 \expndtw0\charscalex
100 \ul0\nosupersub\cf22\f23\fs20 \u-3913?\ul0\nosupersub\cf15\f16\fs20 \ul0\no
supersub\cf4\f5\fs20
AC voltage controller using triac - diac combination. \p
ar\pard\ql \li3189\ri2674\sb2\sl-240\slmult0\tx3549 \up0 \expndtw0\charscalex106
\ul0\nosupersub\cf22\f23\fs20 \u-3913?\ul0\nosupersub\cf15\f16\fs20 \ul0\nosup
ersub\cf4\f5\fs20
Single phase Fully Controlled Bridge Converter with R and R
-L \line\tab \up0 \expndtw-2\charscalex100 loads. \par\pard\ql \li3189\ri2675\sb
0\sl-240\slmult0\tx3549 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf22\f23\f
s20 \u-3913?\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20
Voltag
e (Impulse) commutated chopper both constant frequency and \line\tab \up0 \expnd
tw-2\charscalex100 variable frequency operations. \par\pard\qj \li3189\ri4427\sb
0\sl-240\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf22\f23\fs20 \u3913?\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20
Speed control
of a separately exited DC motor. \up0 \expndtw-1\charscalex100 \ul0\nosupersub\
cf22\f23\fs20 \u-3913?\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20
Speed control of universal motor. \par\pard\qj \li3189\ri5665\sb0\sl-240\slm
ult0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf22\f23\fs20 \u-3913?\ul0\nos
upersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20
Speed control of stepper m
otor. \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf22\f23\fs20 \u-3913?\ul0\no
supersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20
Parallel / series inverte
r. \par\pard\qj \li3189\ri2674\sb17\sl-220\slmult0 \up0 \expndtw0\charscalex102
Note: Experiments to be conducted with isolation transformer and low \up0 \expnd
tw-3\charscalex100 voltage. \par\pard\ql \li3950\sb0\sl-230\slmult0 \par\pard\ql
s20 DSP ALGORITHMS AND ARCHITECTURE \par\pard\li2829\sb228\sl-230\slmult0\fi0\tx
1\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up
0 \expndtw-2\charscalex100 : 25\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx7077\tx
8517 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndt
w-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2
829\sb1\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 To
tal no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw
-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql
w-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\qj \li2829\ri26
74\sb0\sl-233\slmult0 \up0 \expndtw-1\charscalex100 INTRODUCTION TO DIGITAL SIGN
AL PROCESSING:\ul0\nosupersub\cf4\f5\fs20 Introduction, \line \up0 \expndtw0\ch
arscalex102 A Digital Signal-Processing System, The Sampling Process, Discrete T
ime \line \up0 \expndtw0\charscalex102 Sequences, Discrete Fourier Transform (DF
T) and Fast Fourier Transform \line \up0 \expndtw0\charscalex103 (FFT), Linear
Time-Invariant Systems, Digital Filters, Decimation and \par\pard\li2829\s
b1\sl-223\slmult0\fi0\tx8114 \up0 \expndtw-2\charscalex100 Interpolation.\tab \u
9\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb5\sl-230\slmult0 \up0 \expndtw-2\char
\charscalex100 ARCHITECTURES FOR PROGRAMMABLE DIGITAL SIGNAL-\line \up0 \exp
ndtw0\charscalex104 PROCESSORS:\ul0\nosupersub\cf4\f5\fs20
Introduction, Ba
sic
Architectural
Features, DSP \line \up0 \expndtw0\charscalex104 Compu
tational Building Blocks, Bus Architecture and Memory, Data \line \up0 \e
xpndtw0\charscalex100 Addressing Capabilities, Address Generation Unit, Pro
grammability and \par\pard\li2829\sb13\sl-230\slmult0\fi0\tx8195 \up0 \expndtw3\charscalex100 Program Execution, Features for External Interfacing.\tab \up0
sb222\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 3 \par\pard\ql \li2829
\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex100 PROGRAMMABLE DIGITAL SIGNAL PRO
CESSORS: \ul0\nosupersub\cf4\f5\fs20 Introduction, \par\pard\ql \li5834\sb51\sl184\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 71
Width}{\sv 18812}}
s20 Commercial Digital Signal-processing Devices, Data Addressing Modes of \line
\up0 \expndtw-2\charscalex100 TMS32OC54xx., Memory Space of TMS32OC54xx Pr
ocessors, Program \par\pard\li2829\sb14\sl-230\slmult0\fi0\tx8244 \up0 \expndtw
-2\charscalex100 Control.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\
f4\fs20 6 Hrs\par\pard\ql \li2829\sb228\sl-230\slmult0 \up0 \expndtw-2\charscale
x100 UNIT - 4 \par\pard\qj \li2829\ri2672\sb0\sl-240\slmult0 \up0 \expndtw0\char
scalex101 \ul0\nosupersub\cf4\f5\fs20 Detail Study of TMS320C54X & 54xx Instruct
ions and Programming, On-\line \up0 \expndtw0\charscalex102 Chip peripherals,
Interrupts of TMS32OC54XX Processors, Pipeline \par\pard\li2829\sb1\sl208\slmult0\fi0\tx8265 \up0 \expndtw-2\charscalex100 Operation of TMS32OC54xx Pr
ocessor.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par

pard\ql\li2829\sb2\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 5 \par\pa
rd\qj \li2829\ri2674\sb0\sl-240\slmult0 \up0 \expndtw-1\charscalex100 IMPLEMENTA
TION OF BASIC DSP ALGORITHMS:\ul0\nosupersub\cf4\f5\fs20 Introduction, \li
ne \up0 \expndtw0\charscalex100 The Q-notation, FIR Filters, IIR Filters, Interp
olation and Decimation Filters \par\pard\li2829\sb1\sl-208\slmult0\fi0\tx8349 \u
p0 \expndtw-2\charscalex100 (one example in each case).\tab \up0 \expndtw-2\char
scalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb222\sl-230\slm
ult0 \up0 \expndtw-2\charscalex100 UNIT - 6 \par\pard\qj \li2829\ri2675\sb19\sl220\slmult0\fi0 \up0 \expndtw0\charscalex100 IMPLEMENTATION OF FFT ALGORITHMS\u
l0\nosupersub\cf42\f43\fs20 :\ul0\nosupersub\cf35\f36\fs20 \ul0\nosupersub\cf4\
f5\fs20 Introduction, An FFT \line \up0 \expndtw0\charscalex100 Algorithm for D
FT Computation, Overflow and Scaling, Bit-Reversed Index \par\pard\li2829\sb13\s
l-230\slmult0\fi0\tx8275 \up0 \expndtw-2\charscalex100 Generation & Implementati
on on the TMS32OC54xx.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\
fs20 6 Hrs\par\pard\ql \li2829\sb229\sl-230\slmult0 \up0 \expndtw-2\charscalex10
0 UNIT - 7 \par\pard\qj \li2829\ri2676\sb0\sl-230\slmult0 \up0 \expndtw-2\charsc
alex100 INTERFACING MEMORY AND PARALLEL I/O PERIPHERALS TO \line \up0 \expndtw0\
charscalex102 DSP DEVICES: \ul0\nosupersub\cf4\f5\fs20 Introduction, Memory Spac
e Organization, External Bus \line \up0 \expndtw0\charscalex103 Interfacing Sign
als. Memory Interface, Parallel I/O Interface, Programmed \par\pard\li2829\sb1\s
l-230\slmult0\fi0\tx8236 \up0 \expndtw-2\charscalex100 I/O, Interrupts and I / O
Direct Memory Access (DMA).\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\c
alex100 UNIT - 8 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscal
ex100 INTERFACING AND APPLICATIONS OF DSP PROCESSOR: \par\pard\qj \li2
829\ri2676\sb21\sl-220\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4
\f5\fs20 Introduction, Synchronous Serial Interface, A CODEC Interface Circuit.
DSP \line \up0 \expndtw-1\charscalex100 Based Bio-telemetry Receiver, A Spee
ch Processing System, An Image \par\pard\li2829\sb13\sl-230\slmult0\fi0\tx83
37 \up0 \expndtw-1\charscalex100 Processing System.\tab \up0 \expndtw-1\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\p
ard\li2829\sb6\sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 TEXT BOOK:\par\p
ard\li2829\sb1\sl-221\slmult0\fi360\tx3549 \up0 \expndtw-1\charscalex100 \ul0\no
supersub\cf4\f5\fs20 4.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4
\fs20 \u8220?Digital Signal Processing\u8221?\ul0\nosupersub\cf4\f5\fs20 , Av
atar Singh and S. Srinivasan,\par\pard\li2829\sb2\sl-230\slmult0\fi720 \up0
\expndtw-1\charscalex100 Thomson Learning, 2004.\par\pard\li2829\sb0\sl-230\slmu
lt0\par\pard\li2829\sb6\sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 \ul0\no
supersub\cf3\f4\fs20 REFERENCE BOOKS:\par\pard\li2829\sb0\sl-226\slmult0\fi360\t
x3549 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \exp
ndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Digital Signal Processing: A pr
actical approach\ul0\nosupersub\cf4\f5\fs20 , Ifeachor E. C.,\par\pard\li2829\sb
1\sl-230\slmult0\fi720 \up0 \expndtw-1\charscalex100 Jervis B. W Pearson-Educa
tion, PHI/ 2002\par\pard\li2829\sb0\sl-228\slmult0\fi360\tx3549 \up0 \expndtw1\charscalex100 2.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20
\u8220?Digital Signal Processors\u8221?\ul0\nosupersub\cf4\f5\fs20 , B Venk
ataramani and M Bhaskar\par\pard\li2829\sb1\sl-230\slmult0\fi720 \up0 \expndt
w-1\charscalex100 TMH, 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 ,
2010\par\pard\li2829\sb1\sl-230\slmult0\fi359\tx3549 \up0 \expndtw-1\charscalex
100 3.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Arch
itectures for Digital Signal Processing\u8221?\ul0\nosupersub\cf4\f5\fs20 , Pete
r Pirsch John\par\pard\li2829\sb0\sl-230\slmult0\fi719 \up0 \expndtw-1\charsca
lex100 Weily, 2008\par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb
rh16840\pard\sb0\sl-240{\bkmkstart Pg69}{\bkmkend Pg69}\par\pard\ql \li3720\sb0\
-230\slmult0 \par\pard\ql\li3720\sb100\sl-230\slmult0 \up0 \expndtw-2\charscalex
100 \ul0\nosupersub\cf3\f4\fs20 MICRO AND SMART SYSTEMS TECHNOLOGY \par\pard\li2
829\sb230\sl-230\slmult0\fi0\tx5277\tx5517\tx7077\tx8517\tx8853 \up0 \expndtw-2\

charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\chars
calex100 :\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 10MS752
\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0
\expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 25\par\pard\li2829
\sb1\sl-230\slmult0\fi0\tx5277\tx5517\tx7077\tx8517\tx8853 \up0 \expndtw-2\chars
calex100 No. of Lecture Hrs./ Week\tab \up0 \expndtw-2\charscalex100 :\tab \up0
\expndtw-2\charscalex100 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up
0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 03\par\pard\li282
9\sb0\sl-230\slmult0\fi0\tx5277\tx5517\tx7077\tx8517\tx8855 \up0 \expndtw-2\char
scalex100 Total No. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 :\tab \up0
\expndtw-2\charscalex100 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \u
p0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 10\par\pard\ql \
li8954\sb1\sl-216\slmult0 \up0 \expndtw-2\charscalex100 0 \par\pard\ql \li2829\s
- 1 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 INTRO
DUCTION TO MICRO AND SMART SYSTEMS: \par\pard\qj \li2829\ri2782\sb0\sl-230\slmul
t0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 a) What are smart-m
aterial systems? Evolution of smart materials, structures \line \up0 \expndtw-1\
charscalex100 and systems. Components of a smart system. Application areas. Comm
ercial \line \up0 \expndtw-2\charscalex100 products. \par\pard\qj \li2829\ri2674
\sb0\sl-240\slmult0 \up0 \expndtw-1\charscalex100 b) What are microsystems? Feyn
man\u8217?s vision. Micromachined transducers. \line \up0 \expndtw0\charscalex10
0 Evolution of micro-manufacturing. Multi-disciplinary aspects. Applications \pa
r\pard\li2829\sb1\sl-203\slmult0\fi0\tx8020 \up0 \expndtw-2\charscalex100 areas.
Commercial products.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\f
s20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb7\sl-230\
l-240\slmult0 \up0 \expndtw-3\charscalex100 MICRO AND SMART DEVICES AND SYSTEMS:
PRINCIPLES AND \up0 \expndtw-3\charscalex100 MATERIALS: \par\pard\ql \li2829\sb
1\sl-193\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf4\f5\fs20 a) De
finitions and salient features of sensors, actuators, and systems. \par\pard\qj
\li2829\ri2675\sb0\sl-230\slmult0 \up0 \expndtw-1\charscalex100 b) Sensors: sili
con capacitive accelerometer, piezo-resistive pressure sensor, \up0 \expndtw0\ch
arscalex102 blood analyzer, conductometric gas sensor, fiber-optic gyrosco
pe and \up0 \expndtw-4\charscalex100 surface-acoustic-wave based wireless strai
n sensor. \par\pard\qj \li2829\ri2673\sb7\sl-230\slmult0 \up0 \expndtw0\charscal
ex100 c) Actuators: silicon micro-mirror arrays, piezo-electric based inkjet pri
nt\up0 \expndtw-2\charscalex100 head, electrostatic comb-drive and micromotor, m
agnetic micro relay, shape\up0 \expndtw-4\charscalex100 memory-alloy based actua
tor, electro-thermal actuator. \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \exp
ndtw-2\charscalex100 d) Systems: micro gas turbine, portable clinical analyzer,
active noise control \par\pard\li2829\sb19\sl-230\slmult0\fi0\tx8059 \up0 \expnd
tw-2\charscalex100 in a helicopter cabin.\tab \up0 \expndtw-2\charscalex100 \ul0
\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb224\sl-230\slmult0 \up0 \exp
ndtw-4\charscalex100 UNIT - 3 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \exp
ndtw-4\charscalex100 MICROMANUFACTURING AND MATERIAL PROCESSING: \par\pard\ql \l
i2829\ri2674\sb0\sl-220\slmult0\tx3189 \up0 \expndtw-1\charscalex100 \ul0\nosupe
rsub\cf4\f5\fs20 a.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20
Silicon wafer processing, lithography, thin-film deposition, etching (wet \line\
tab \up0 \expndtw-4\charscalex100 and dry), wafer-bonding, and metallization. \p
ar\pard\ql \li2829\ri2673\sb19\sl-220\slmult0\tx3189 \up0 \expndtw-2\charscalex1
00 b.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20 Silicon microm
achining: surface, bulk, moulding, bonding based process \line\tab \up0 \expndtw
-3\charscalex100 flows. \par\pard\ql \li2829\sb12\sl-230\slmult0 \up0 \expndtw-1
\charscalex100 c.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20 Th
ick-film processing: \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\cha
rscalex100 d.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20 Smart
material processing: \par\pard\ql \li2829\sb13\sl-230\slmult0 \up0 \expndtw-3\ch
arscalex100 e.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20 Proce

ssing of other materials: ceramics, polymers and metals \par\pard\li2829\sb6\sl230\slmult0\fi0\tx3189\tx8068 \up0 \expndtw-4\charscalex100 f.\tab \up0 \expndtw
-4\charscalex100 Emerging trends.\tab \up0 \expndtw-4\charscalex100 \ul0\nosuper
sub\cf3\f4\fs20 7 Hrs\par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li58
3
}
}}
}
}}
}
}}
}
}}

}
}}
}
}}
}
}}
}
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}
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}
IT - 4 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 MOD
ELING: \par\pard\ql \li2829\sb13\sl-230\slmult0 \up0 \expndtw0\charscalex102 \ul
0\nosupersub\cf4\f5\fs20 a.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5
\fs20 Scaling issues. \par\pard\ql \li2829\ri2674\sb0\sl-230\slmult0\tx3189\tx
3189 \up0 \expndtw0\charscalex105 b.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupers
ub\cf4\f5\fs20 Elastic deformation and stress analysis of beams and plates. Re
sidual \line\tab \up0 \expndtw-1\charscalex100 stresses and stress gradients. Th
ermal loading. Heat transfer issues. Basic \line \tab \up0 \expndtw-2\charscalex
100 fluids issues. \par\pard\ql \li2829\ri2674\sb9\sl-220\slmult0\tx3189 \up0 \e
xpndtw0\charscalex102 c.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs
20 Electrostatics. Coupled electromechanics. Electromagnetic actuation. \l
ine\tab \up0 \expndtw0\charscalex102 Capillary electro-phoresis. Piezoresist
ive modeling. Piezoelectric \par\pard\li3189\sb14\sl-230\slmult0\fi0\tx8325
\up0 \expndtw-2\charscalex100 modeling. Magnetostrictive actuators.\tab \up0 \ex
pndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2879\sb0\
ex100 UNIT - 5 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-2\charscal
ex100 COMPUTER-AIDED SIMULATION AND DESIGN: \par\pard\ql \li2829\sb1\sl-217\slmu
lt0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 Background to t
he finite element element method. Coupled-domain \par\pard\li2829\sb15\s
l-230\slmult0\fi0\tx8181 \up0 \expndtw-2\charscalex100 simulations using Matlab.
Commercial software.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\f
s20 6 Hrs\par\pard\ql \li2829\sb228\sl-230\slmult0 \up0 \expndtw-2\charscalex100
UNIT - 6 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100
ELECTRONICS, CIRCUITS AND CONTROL: \par\pard\qj \li2829\ri2674\sb13\sl-230\slmul
t0 \up0 \expndtw0\charscalex103 \ul0\nosupersub\cf4\f5\fs20 Carrier concentrat
ions, semiconductor diodes, transistors, MOSFET \line \up0 \expndtw-1\ch
arscalex100 amplifiers, operational amplifiers. Basic Op-Amp circuits. Charge-me
asuring \line \up0 \expndtw0\charscalex104 circuits. Examples from microsyst
ems. Transfer function, state-space \line \up0 \expndtw0\charscalex104 modeli
ng, stability, PID controllers, and model order reduction. Examples \line \up0 \
expndtw-1\charscalex100 from smart systems and micromachined accelerometer or a
thermal cycler. \par\pard\ql \li8231\sb1\sl-217\slmult0 \up0 \expndtw-2\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0
ar\pard\qj \li2829\ri2675\sb19\sl-220\slmult0 \up0 \expndtw0\charscalex103 INTEG
RATION
AND
PACKAGING
OF
MICROELECTRO \up0 \expndtw-2\charscalex100 M
ECHANICAL SYSTEMS: \par\pard\qj \li2829\ri2675\sb20\sl-220\slmult0 \up0 \expndtw
0\charscalex103 \ul0\nosupersub\cf4\f5\fs20 Integration of microelectronics and

micro devices at wafer and chip levels. \line \up0 \expndtw0\charscalex103 Micro
electronic packaging: wire and ball bonding, flip-chip. Low-\par\p
ard\li2829\sb13\sl-230\slmult0\fi0\tx5406 \up0 \expndtw0\charscalex100 temperatu
re-cofired-ceramic\tab \up0 \expndtw0\charscalex100 (LTCC)
multi-chip-module
technology.\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx8203 \up0 \expndtw0\char
scalex100 Microsystem packaging examples.\tab \up0 \expndtw0\charscalex100 \ul0\
nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb218\sl-230\slmult0 \up0 \expn
dtw-2\charscalex100 UNIT - 8 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expn
dtw-2\charscalex100 CASE STUDIES: \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \
expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 BEL pressure sensor, therm
al cycler for DNA amplification, and active \par\pard\li2829\sb14\sl-230\s
lmult0\fi0\tx8258 \up0 \expndtw-2\charscalex100 vibration control of a beam.\tab
\charscalex100 UNIT - 9 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-2
\charscalex100 Mini-projects and class-demonstrations (not for Examination) \par
\pard\qj \li2829\sb0\sl-220\slmult0 \par\pard\qj\li2829\ri2676\sb19\sl-220\slmul
t0 \up0 \expndtw0\charscalex103 \ul0\nosupersub\cf4\f5\fs20 a) CAD lab (coupled
field simulation of electrostatic-elastic actuation with \up0 \expndtw-2\charsca
lex100 fluid effect) \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834
4
}
b100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 b)
BEL pressure sensor \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\cha
rscalex100 c) Thermal-cycler for PCR \par\pard\ql \li2829\sb13\sl-230\slmult0 \u
p0 \expndtw-2\charscalex100 d) Active control of a cantilever beam \par\pard\ql
w-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 TEXT BOOKS AND A CD-SUPPLEMENT: \p
ar\pard\li3189\sb11\sl-230\slmult0\fi0\tx3549 \up0 \expndtw-1\charscalex100 \ul0
\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3
\f4\fs20 MEMS & Microsystems: Design and Manufacture,\ul0\nosupersub\cf4\f5\fs20
Tai-Ran Tsu,\par\pard\li3189\sb1\sl-230\slmult0\fi359 \up0 \expndtw-1\charscal
ex100 Tata Mc-Graw-Hill.\par\pard\ql \li3189\ri2674\sb7\sl-220\slmult0\tx3549\tx
3549 \up0 \expndtw-3\charscalex100 2. \tab \up0 \expndtw-3\charscalex100 \ul0\no
supersub\cf3\f4\fs20 \u8220?Micro and Smart Systems\u8221?\ul0\nosupersub\cf4
\f5\fs20 by Dr. A.K.Aatre, Prof.
Ananth \line\tab \up0 \expndtw-3\charsc
alex100 Suresh,
Prof.K.J.Vinoy,
Prof.
S.
Gopalakrishna,,
Prof. \p
ar\pard\ql \li3549\sb12\sl-230\slmult0 \up0 \expndtw-4\charscalex100 K.N.Bhat.,J
ohn Wiley Publications. \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2
20 REFERENCE BOOKS: \par\pard\ql \li3189\ri2674\sb14\sl-226\slmult0\tx3549\tx354
9\tx3549 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf4\f5\fs20 2. \tab \up0
\expndtw-3\charscalex100 Animations of working principles, process flows a
nd processing \line\tab \up0 \expndtw-1\charscalex100 techniques, A CD-suppleme
nt with Matlab codes, photographs and \line \tab \up0 \expndtw-4\charscalex100 m
ovie clips of processing machinery and working devices. \line \up0 \expndtw-4\c
harscalex100 3. \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Labora

tory hardware kits for \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf4\f5\f
s20 (i) BEL pressure sensor, \up0 \expndtw-4\charscalex100 (ii) \par\pard\ql
\li3549\sb11\sl-230\slmult0 \up0 \expndtw-4\charscalex100 thermal-cycler and (ii
i) active control of a cantilever beam. \par\pard\ql \li3189\ri2674\sb0\sl-240\s
lmult0\tx3549\tx3549 \up0 \expndtw-3\charscalex100 1. \tab \up0 \expndtw-3\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 Microsystems Design,\ul0\nosupersub\cf4\f5
\fs20 S. D. Senturia, 2001, Kluwer Academic \line\tab \up0 \expndtw-4\cha
rscalex100 Publishers, Boston, USA. ISBN 0-7923-7246-8. \par\pard\ql \li3189\ri2
676\sb0\sl-230\slmult0\tx3549\tx3549\tx3549 \up0 \expndtw-3\charscalex100 2. \ta
b \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Analysis and Design
Principles of MEMS Devices,\ul0\nosupersub\cf4\f5\fs20 Minhang Bao, \line\tab \
up0 \expndtw-4\charscalex100 Elsevier, Amsterdam, The Netherlands, ISBN 0-444-51
616-6. \line \up0 \expndtw-3\charscalex100 3. \up0 \expndtw-3\charscalex100 \ul0
\nosupersub\cf3\f4\fs20 Design and Development Methodologies,\ul0\nosupersub\cf4
\f5\fs20 Smart Material Systems \line\tab \up0 \expndtw-4\charscalex100 and MEM
S: V. Varadan, K. J. Vinoy, S. Gopalakrishnan, Wiley. \line \up0 \expndtw-4\char
scalex100 4. \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 MEMS- \ul
0\nosupersub\cf4\f5\fs20 Nitaigour Premchand Mahalik, TMH 2007 \par\pard\ql \li5
0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\
-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-1
upersub\cf1\f2\fs16 75 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb
0\sl-240{\bkmkstart Pg72}{\bkmkend Pg72}\par\pard\ql \li4288\sb0\sl-230\slmult0
ar\pard\ql\li4288\sb0\sl-230\slmult0 \par\pard\ql\li4288\sb90\sl-230\slmult0 \up
0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 ARTIFICIAL NEURAL NETWORK
S \par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb11\sl-230\slmult0\fi0\tx
3\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up
0 \expndtw-2\charscalex100 : 25\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx7077\tx
8517 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndt
w-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2
829\sb1\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 To
tal no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw
-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql
w-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\ql \li2829\sb1\
sl-217\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Introdu
ction, history, structure and function of single neuron, neural net \pa
r\pard\li2829\sb14\sl-230\slmult0\fi0\tx8174 \up0 \expndtw-2\charscalex100 archi
tectures, neural learning, use of neural networks.\tab \up0 \expndtw-2\charscale
x100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \p
ar\pard\ql\li2829\sb219\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 2 \p
ar\pard\qj \li2829\ri2677\sb19\sl-220\slmult0 \up0 \expndtw0\charscalex102 \ul0\
nosupersub\cf4\f5\fs20 Supervised learning, single layer networks, perceptions,
linear separability, \up0 \expndtw-2\charscalex100 perceptions training algorith
m, guarantees of success, modifications. \par\pard\ql \li8171\sb12\sl-230\slmult
0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \
li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 3 \par\pard\ql \l
i2829\sb13\sl-230\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs

20 Multiclass networks-I, multilevel discrimination, preliminaries, ba
ck \par\pard\li2829\sb0\sl-230\slmult0\fi0\tx8195 \up0 \expndtw-2\charscalex100
propagation, setting parameter values, theoretical results.\tab \up0 \expndtw-2\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb220\sl-230
\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 4 \par\pard\ql \li2829\sb10\sl-230
\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Accelerating
learning process, application, mandaline, adaptive multilayer \par\pard\li
2829\sb2\sl-230\slmult0\fi0\tx8215 \up0 \expndtw-2\charscalex100 networks.\tab \
tw0\charscalex105 \ul0\nosupersub\cf4\f5\fs20 Prediction networks, radial
basis functions, polynomial networks, \up0 \expndtw-2\charscalex100 regula
rization, unsupervised learning, winner take all networks. \up0 \expndtw-2\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb211\sl-230\slm
ult0 \up0 \expndtw-2\charscalex100 UNIT - 6 \par\pard\qj \li2829\ri2674\sb0\sl-2
40\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 Learning v
ector quantizing, counter propagation networks, adaptive \line \up0 \e
xpndtw-1\charscalex100 resonance theorem, toplogically organized networks, dista
nce based learning, \par\pard\li2829\sb1\sl-207\slmult0\fi0\tx8294 \up0 \expndtw
-2\charscalex100 neo-cognition.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersu
rscalex100 UNIT - 7 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-1\cha
rscalex100 \ul0\nosupersub\cf4\f5\fs20 Associative models, hop field network
s, brain state networks, Boltzmann \par\pard\li2829\sb0\sl-230\slmult0\fi0\t
x8304 \up0 \expndtw-2\charscalex100 machines, hetero associations.\tab \up0 \exp
ndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb220
\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 8 \par\pard\ql \li2829\sb10
\sl-230\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Optimiz
ation using hop filed networks, simulated annealing, random search, \par\pard\li
2829\sb2\sl-230\slmult0\fi0\tx8344 \up0 \expndtw-2\charscalex100 evolutionary co
mputation.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\p
ar\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb32\sl-184\slmult0 \u
p0 \expndtw-1\charscalex100 \ul0\nosupersub\cf1\f2\fs16 76
Width}{\sv 18812}}
calex100 \ul0\nosupersub\cf3\f4\fs20 TEXT BOOK: \par\pard\li3189\sb9\sl-230\slmu
lt0\fi0\tx3549 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \
up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Elements of Artificial N
eural Networks\ul0\nosupersub\cf4\f5\fs20 , Kishan Mehrotra, C. K.\par\pard\li31
89\sb0\sl-230\slmult0\fi359 \up0 \expndtw0\charscalex100 Mohan, Sanjay Ranka, Pe
nram, 1997.\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb143\sl-230\slmu
lt0\fi0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOK
S:\par\pard\li2829\sb0\sl-225\slmult0\fi360\tx3549 \up0 \expndtw-2\charscalex100
\ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersu
b\cf3\f4\fs20 Artificial Neural Networks\ul0\nosupersub\cf4\f5\fs20 , R. Schal
koff, MGH, 1997.\par\pard\li2829\sb2\sl-230\slmult0\fi360\tx3549 \up0 \expndtw-2
\charscalex100 2.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20
Introduction to Artificial Neural Systems\ul0\nosupersub\cf4\f5\fs20 , J. Zurada
, Jaico, 2003.\par\pard\li2829\sb0\sl-230\slmult0\fi360\tx3549 \up0 \expndtw-2\c
harscalex100 3.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Ne
ural Networks,\ul0\nosupersub\cf4\f5\fs20 Haykins, Pearson Edu., 1999.\par\pard
\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb
4\sl-230\slmult0\fi2407 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs2
0 CAD FOR VLSI\par\pard\li2829\sb226\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up

pndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC754\tab \up0 \expndtw-2\
harscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam
Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2829\sb0\sl-230\slmult0
\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Total no. of Lecture Hrs
.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam
Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0\sl-230\slm
t0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1&2 \par\pard
\qj \li2829\ri2674\sb0\sl-220\slmult0 \up0 \expndtw-2\charscalex100 INTRODUCTION
TO VLSI METHODOLOGIES\ul0\nosupersub\cf4\f5\fs20 : VLSI Physical Design \line \
up0 \expndtw-1\charscalex100 Automation - Design and Fabrication of VLSI Devices
- Fabrication process \par\pard\li2829\sb17\sl-230\slmult0\fi0\tx8198 \up0 \exp
ndtw-3\charscalex100 and its impact on Physical Design.\tab \up0 \expndtw-3\char
scalex100 \ul0\nosupersub\cf3\f4\fs20 12 Hrs\par\pard\ql \li2829\sb0\sl-230\sl
lt0 \up0 \expndtw0\charscalex100 UNIT - 3&4 \par\pard\qj \li2829\ri2674\sb0\sl-2
30\slmult0 \up0 \expndtw0\charscalex103 A QUICK TOUR OF VLSI DESIGN AUTOMATION
TOOLS:\ul0\nosupersub\cf4\f5\fs20 Data \line \up0 \expndtw0\charscalex106 struc
tures and Basic Algorithms, Algorithmic Graph theory and \line \up
0 \expndtw-2\charscalex100 computational complexity, Tractable and Intractable p
roblems. \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 14 Hrs \par\p
rd\ql\li2829\sb160\sl-230\slmult0 \up0 \expndtw0\charscalex100 UNIT - 5&6 \par\p
ard\qj \li2829\ri2674\sb0\sl-220\slmult0 \up0 \expndtw0\charscalex102 GENERAL
PURPOSE
METHODS
FOR
COMBINATIONAL \line \up0 \expndtw0\charscalex100 O
PTIMIZATION:\ul0\nosupersub\cf4\f5\fs20
partitioning, floor planning an
d pin assignment, \par\pard\li2829\sb18\sl-230\slmult0\fi0\tx8282 \up0 \expn
dtw-2\charscalex100 placement, routing.\tab \up0 \expndtw-2\charscalex100 \ul0\n
osupersub\cf3\f4\fs20 14 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql
\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb3\sl-230\slmult0 \up0 \expndtw0
\charscalex100 UNIT - 7&8 \par\pard\qj \li2829\ri2672\sb0\sl-230\slmult0 \up0 \e
xpndtw0\charscalex100 SIMULATION-LOGIC SYNTHESIS:\ul0\nosupersub\cf4\f5\fs20 Ve
rification-High level synthesis -\line \up0 \expndtw0\charscalex103 Compaction.
Physical Design Automation of FPGAs, MCMS-VHDL-\line \up0 \expndtw-2\chars
calex100 Verilog-Implementation of Simple circuits using VHDL and Verilog. \par\
pard\ql \li8270\sb0\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub
\cf3\f4\fs20 12 Hrs \par\pard\ql \li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\
scalex100 \ul0\nosupersub\cf1\f2\fs16 77
Width}{\sv 18812}}
b100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 RE
FERENCE BOOKS: \par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb2\sl-230\sl
mult0\fi360\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\
tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Algorithms
for VLSI Physical Design Automation\u8221?\ul0\nosupersub\cf4\f5\fs20 , N.
A.\par\pard\li2829\sb0\sl-230\slmult0\fi720 \up0 \expndtw-2\charscalex100 Sher
vani, 1999.\par\pard\li2829\sb0\sl-228\slmult0\fi360\tx3549 \up0 \expndtw-2\char
scalex100 2.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u822
0?Algorithms for VLSI Design Automation\u8221?\ul0\nosupersub\cf4\f5\fs20 , S. H
. Gerez, 1998.\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb7\sl-230\slm
ult0\fi1231 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 APPLIED EM
BEDDED SYSTEM DESIGN\par\pard\li2829\sb226\sl-230\slmult0\fi0\tx4917\tx7077\tx85

17 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \u
p0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC755\tab \up0 \expn
dtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\cha
rscalex100 : 25\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \expnd
tw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex10
0 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2829\sb0\sl-228\s
lmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-3\charscalex100 Total no. of Lectu
re Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100
Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li5834\sb0\sl-1
\par\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \
\ul0\nosupersub\cf1\f2\fs16 78
Width}{\sv 18812}}
\sl-230\slmult0 \par\pard\ql\li5575\sb0\sl-230\slmult0 \par\pard\ql\li5575\sb140
\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf43\f44\fs20 PART
-A \par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-3\charscalex100 \ul0\
nosupersub\cf3\f4\fs20 Unit 1. Introduction to the Embedded Systems: \par\pard
\qj \li2829\ri3008\sb0\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosuper
sub\cf4\f5\fs20 An embedded System, Processor embedded into a system (A). Embedd
ed \up0 \expndtw-2\charscalex100 Hardware Units and devices in a system, Embedde
d software in a system, \up0 \expndtw-2\charscalex100 Examples of embedded syste
ms, \par\pard\ql \li2829\sb1\sl-205\slmult0 \up0 \expndtw-1\charscalex100 Embedd
ed system-on-chip (SoC) and use of VLSI circuits design technology \par\pard\qj
\li2829\ri2770\sb15\sl-230\slmult0 \up0 \expndtw-2\charscalex100 (A), Complex sy
stems design and processors, Design process in embedded \line \up0 \expndtw-1\ch
arscalex100 system, Formalism of system design, Design process and design exampl
es, \line \up0 \expndtw-1\charscalex100 Classification of embedded systems. Skil
ls required for an embedded system \par\pard\li2829\sb8\sl-230\slmult0\fi0\tx866
1 \up0 \expndtw-2\charscalex100 designer\ul0\nosupersub\cf3\f4\fs20 .\tab \up0 \
expndtw-2\charscalex100 5\par\pard\li2829\sb5\sl-230\slmult0\fi0 \up0 \expndtw-2
\charscalex100 Hours\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb1\sl-2
30\slmult0\fi0\tx3559 \up0 \expndtw-2\charscalex100 Unit 2.\tab \up0 \expndtw-2\
charscalex100 8051 and Advanced Processor Architecture:\par\pard\li2829\sb1\sl-2
0 8051 Architecture, Real world interfacing,\tab \up0 \expndtw-2\charscalex100 I

ntroduction to\par\pard\ql \li2829\sb3\sl-221\slmult0 \up0 \expndtw-2\charscalex
100 advanced architecture \par\pard\qj \li3405\ri3119\sb0\sl-240\slmult0 \up0 \e
xpndtw-2\charscalex100 Processor and memory architecture, Instruction level para
llelism, \up0 \expndtw-2\charscalex100 Performance metrics \par\pard\ql \li3405\
sb1\sl-196\slmult0 \up0 \expndtw-2\charscalex100 Memory types and addresses, Pro
cessor selection, Memory selection \par\pard\ql \li3405\sb16\sl-230\slmult0 \up0
\expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 5 Hours \par\pard\ql \li28
29\sb230\sl-230\slmult0 \up0 \expndtw-3\charscalex100 Unit 3.
Devices and Com
munication Buses for Devices Network: \par\pard\li3405\sb8\sl-230\slmult0\fi0\tx
7869 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Devices and Commu
nication buses for Networks,\tab \up0 \expndtw-2\charscalex100 Serial\par\pard\q
l \li2829\sb1\sl-220\slmult0 \up0 \expndtw-2\charscalex100 communication devices
\par\pard\qj \li2829\ri3152\sb0\sl-240\slmult0\fi575 \up0 \expndtw-2\charscalex
100 Parallel port devices, Sophisticated interfacing features in device \up0 \ex
pndtw-2\charscalex100 ports, Wireless \par\pard\qj \li2829\ri3245\sb0\sl-240\slm
ult0\fi501 \up0 \expndtw-2\charscalex100 communication devices, Timer and counti
ng devices, Watchdog \up0 \expndtw-3\charscalex100 timers,
Real time clocks \
par\pard\qj \li2829\ri2700\sb0\sl-240\slmult0\fi575 \up0 \expndtw-2\charscalex10
0 Parallel bus device protocols - parallel communication network using \up0 \e
xpndtw-2\charscalex100 the ISA, PCI, PCI-X and \par\pard\ql \li3331\sb0\sl-180\s
lmult0\tx4989 \up0 \expndtw-2\charscalex100 advanced buses, \tab \up0 \expndtw-2
\charscalex100 Wireless and mobile system protocols. \par\pard\ql \li3549\sb14\s
l-205\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hours
up0 \expndtw-2\charscalex100 Unit 4. Device drivers and interrupts servicing mec
hanism: \par\pard\qj \li2829\ri2710\sb0\sl-240\slmult0\fi575 \up0 \expndtw-2\cha
rscalex100 \ul0\nosupersub\cf4\f5\fs20 Port or device access without interrupt s
ervicing mechanism, Interrupt \up0 \expndtw-2\charscalex100 service routine, thr
ead \par\pard\qj \li2829\ri3322\sb0\sl-240\slmult0\fi501 \up0 \expndtw-2\charsca
lex100 and device driver concept, Interrupt sources, Interrupt servicing \up0 \e
xpndtw-2\charscalex100 (handling) mechanism \par\pard\ql \li5829\sb193\sl-276\sl
mult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf2\f3\fs24 79 \par\pard\sec
t\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg76}{\bkmkend P
g76}\par\pard\qj \li2829\sb0\sl-220\slmult0 \par\pard\qj\li2829\sb0\sl-220\slmul
t0 \par\pard\qj\li2829\sb0\sl-220\slmult0 \par\pard\qj\li2829\sb0\sl-220\slmult0
\par\pard\qj\li2829\ri3011\sb119\sl-220\slmult0\fi575 \up0 \expndtw-2\charscale
x100 \ul0\nosupersub\cf4\f5\fs20 Multiple interrupts, Context and the periods fo
r context-switching, \up0 \expndtw-2\charscalex100 interrupt latency and \par\pa
rd\qj \li2829\ri2948\sb4\sl-240\slmult0\fi501 \up0 \expndtw-2\charscalex100 Dead
line
Classification of processors interrupt service mechanism \up0 \expndtw-2
\charscalex100 from context saving angle \par\pard\qj \li2829\ri3142\sb0\sl-240\
slmult0\fi575 \up0 \expndtw-2\charscalex100 Direct memory access, Device driver
programming, Parallel port \up0 \expndtw-2\charscalex100 device drivers in a sys
tem \par\pard\ql \li3405\sb1\sl-191\slmult0 \up0 \expndtw-2\charscalex100 Serial
port device drivers in a system, Timer devices and devices \par\pard\li2829\sb1
6\sl-230\slmult0\fi0\tx4269 \up0 \expndtw-2\charscalex100 interrupts\tab \up0 \e
xpndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 8 Hours\par\pard\ql \li5592\s
b0\sl-230\slmult0 \par\pard\ql\li5592\sb1\sl-230\slmult0 \up0 \expndtw-2\charsca
lex100 \ul0\nosupersub\cf4\f5\fs20 PART-B \par\pard\ql \li2829\sb0\sl-220\slmult
0 \par\pard\ql\li2829\ri2880\sb19\sl-220\slmult0\tx3549 \up0 \expndtw-2\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 Unit 5. Programming concepts and embedded prog
ramming in C, C++ \line\tab \up0 \expndtw-2\charscalex100 and Java: \par\pard\qj
\li2829\ri2756\sb0\sl-240\slmult0\fi575 \up0 \expndtw-4\charscalex100 \ul0\nosu
persub\cf4\f5\fs20 Software programming in assembly language (ALP) and in high l
evel \up0 \expndtw-4\charscalex100 language \u8216?C\u8217? \par\pard\qj \li2829
\ri2814\sb1\sl-220\slmult0\fi575 \up0 \expndtw-4\charscalex100 \u8216?C\u8217? p
rogramming elements: header and source files and preprocessor \up0 \expndtw-4\ch
arscalex100 directives \par\pard\qj \li2829\ri3032\sb20\sl-220\slmult0\fi575 \up
0 \expndtw-4\charscalex100 Program elements : macros and functions, Program elem
ents: data \up0 \expndtw-4\charscalex100 types, data structures, \par\pard\qj \l

i2829\ri3426\sb0\sl-240\slmult0\fi602 \up0 \expndtw-3\charscalex100 modifiers, s
tatements, loops and pointers, Objected oriented \up0 \expndtw-4\charscalex100
programming \par\pard\ql \li3405\sb1\sl-220\slmult0 \up0 \expndtw-4\charscalex1
00 Embedded programming in Java, Optimisation of Memory needs. \par\pard\ql \li4
5 Hours \par\pard\ql \li2829\ri2736\sb224\sl-240\slmult0\tx3549 \up0 \expndtw-4
\charscalex100 Unit 6. Program modeling concepts in single and multiprocessor sy
stems \line\tab \up0 \expndtw-4\charscalex100 software - development process: \p
ar\pard\qj \li2829\ri3601\sb0\sl-240\slmult0\fi575 \up0 \expndtw-3\charscalex100
\ul0\nosupersub\cf4\f5\fs20 Program models,
Data flow graph models, State ma
chine \up0 \expndtw-3\charscalex100 programming models for event \par\pard\ql \l
i3331\sb1\sl-191\slmult0 \up0 \expndtw-4\charscalex100 controlled programs, Mode
ling of multiprocessor systems, UML \par\pard\li2829\sb15\sl-230\slmult0\fi0\tx4
989 \up0 \expndtw-2\charscalex100 modeling\tab \up0 \expndtw-2\charscalex100 \ul
0\nosupersub\cf3\f4\fs20 5 Hours\par\pard\ql \li2829\sb0\sl-220\slmult0 \par\par
d\ql\li2829\ri3007\sb21\sl-220\slmult0\tx3549 \up0 \expndtw-3\charscalex100 Unit
7. Real time operating systems - I: Inter process communication \line\tab \up0
\expndtw-3\charscalex100 and synchronization of processes, Task and Threads): \p
ar\pard\qj \li2829\ri3588\sb20\sl-220\slmult0\fi575 \up0 \expndtw-4\charscalex10
0 \ul0\nosupersub\cf4\f5\fs20 Multiple processes in an application, Multiple thr
eads in an \up0 \expndtw-4\charscalex100 applications, Task \par\pard\qj \li2829
\ri3312\sb0\sl-240\slmult0\fi575 \up0 \expndtw-4\charscalex100 Tasks and states,
Tasks and data, Clear cut distinction between \up0 \expndtw-4\charscalex100 Fun
ctions, ISRs and Tasks by \par\pard\qj \li2829\ri3263\sb0\sl-240\slmult0\fi551 \
up0 \expndtw-4\charscalex100 their Characteristics, Concept of semaphores, Share
d data, Inter \up0 \expndtw-4\charscalex100 process communications \par\pard\ql
\li5829\sb255\sl-276\slmult0 \up0 \expndtw-5\charscalex100 \ul0\nosupersub\cf2\f
3\fs24 80 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkm
kstart Pg77}{\bkmkend Pg77}\par\pard\qj \li2829\sb0\sl-220\slmult0 \par\pard\qj\
li2829\sb0\sl-220\slmult0 \par\pard\qj\li2829\sb0\sl-220\slmult0 \par\pard\qj\li
2829\sb0\sl-220\slmult0 \par\pard\qj\li2829\ri2840\sb119\sl-220\slmult0\fi575 \u
p0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Signals,
Semaphores,
Message queues, Mailboxes, Pipes, Sockets, \up0 \expndtw-2\charscalex100 Remote
procedure calls \par\pard\ql \li3431\sb12\sl-230\slmult0 \up0 \expndtw-2\charsca
lex100 (RPCs). \par\pard\ql \li5006\sb10\sl-230\slmult0 \up0 \expndtw-2\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 8 Hours \par\pard\ql \li2829\sb230\sl-230\slmu
lt0 \up0 \expndtw-2\charscalex100 Unit 8. Real time operating systems: \par\pard
\li3405\sb1\sl-227\slmult0\fi0\tx7869 \up0 \expndtw-2\charscalex100 \ul0\nosuper
sub\cf4\f5\fs20 Operating system service, Process management,\tab \up0 \expndtw2\charscalex100 Timer\par\pard\ql \li2829\sb1\sl-208\slmult0 \up0 \expndtw-2\cha
rscalex100 functions, Event functions, \par\pard\ql \li2829\ri2912\sb14\sl-230\s
lmult0\fi575\tx3405 \up0 \expndtw-2\charscalex100 Memory management, Device, fil
e and IO subsystems management \line\tab \up0 \expndtw-2\charscalex100 Interrupt
routines in RTOS environment and handling of interrupt \line \up0 \expndtw-2\c
harscalex100 source calls by RTOS \par\pard\qj \li2829\ri3025\sb19\sl-220\slmult
0\fi575 \up0 \expndtw-2\charscalex100 Introduction to Real Time Operating System
, Basic design using a \up0 \expndtw-2\charscalex100 Real Time Operating \par\pa
rd\qj \li2829\ri2864\sb0\sl-240\slmult0\fi602 \up0 \expndtw-2\charscalex100 Syst
em, RTOS Task Scheduling Models, Latency, Response Times, \up0 \expndtw-2\charsc
alex100 Deadline as Performance \par\pard\qj \li2829\ri2803\sb1\sl-220\slmult0\f
i551 \up0 \expndtw-2\charscalex100 Metric, OS security issues, IEEE Standard POS
IX 1003.1b Functions \up0 \expndtw-2\charscalex100 for Standardisation of \par\p
ard\qj \li2829\ri2976\sb20\sl-220\slmult0\fi602 \up0 \expndtw-2\charscalex100 RT
OS and Inter Process Communication Functions, Types of Real \up0 \expndtw-2\char
scalex100 Time Operating Systems \par\pard\ql \li3455\sb2\sl-218\slmult0 \up0 \e
xpndtw-3\charscalex100 RTOSC/OS-II,
RTOS Vx Works. \par\pard\ql \li2829\sb13\s
l-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 10 Hours
\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb220\sl-230\slmult
0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf4\f5\fs20 TEXTBOOK \par\pard\q
l \li2829\ri2675\sb19\sl-220\slmult0\tx3189 \up0 \expndtw0\charscalex100 \ul0\no

supersub\cf3\f4\fs20 Embedded System Architecture & Programming\ul0\nosupersub\c
f4\f5\fs20 by Raj Kamal, TMH, \line\tab \up0 \expndtw-4\charscalex100 2008 (lat
est edition). \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb22\s
l-230\slmult0 \up0 \expndtw-4\charscalex100 REFERENCE BOOKS \par\pard\ql \li2829
\ri2644\sb0\sl-220\slmult0\tx3189 \up0 \expndtw-1\charscalex100 12.\ul0\nosupers
ub\cf15\f16\fs20 \ul0\nosupersub\cf3\f4\fs20 Introduction to Embedded System D
esign - A certified Hardware / \line\tab \up0 \expndtw-3\charscalex100 Software\
ul0\nosupersub\cf4\f5\fs20 by Bank Vahid, John Wikey & Sons, 2002. \par\pard\
ql \li2829\ri2674\sb19\sl-220\slmult0\tx3189 \up0 \expndtw0\charscalex101 13.\ul
0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf3\f4\fs20 An embedded Software Pr
imer\ul0\nosupersub\cf4\f5\fs20 by David E Simon, Pearson Edition \line\tab \up
0 \expndtw-3\charscalex100 1999. \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pa
rd\ql\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb12\sl-230\slmult0 \up0 \ex
pndtw-4\charscalex100 Lab Work:(Part of the theory class) \par\pard\li3189\sb0\s
l-230\slmult0\par\pard\li3189\sb8\sl-230\slmult0\fi0\tx3549 \up0 \expndtw-3\char
scalex100 5.\tab \up0 \expndtw-3\charscalex100 Write C prog to iniitalise the I/
O ports and interface the following:\par\pard\li3189\sb1\sl-230\slmult0\fi410 \u
p0 \expndtw-3\charscalex100 a.
LED / LCD Display\par\pard\ql \li3599\sb1\sl
-219\slmult0 \up0 \expndtw-7\charscalex100 b.
Stepper Motor \par\pard\ql \l
i3599\sb12\sl-230\slmult0 \up0 \expndtw-9\charscalex96 c.
Elevator \par\par
d\ql \li5829\sb52\sl-276\slmult0 \up0 \expndtw-5\charscalex100 \ul0\nosupersub\c
f2\f3\fs24 81 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{
\bkmkstart Pg78}{\bkmkend Pg78}\par\pard\ql \li3599\sb0\sl-230\slmult0 \par\pard
w-5\charscalex100 \ul0\nosupersub\cf4\f5\fs20 d.
Dot - matrix Printer. \par
\pard\li3189\sb9\sl-230\slmult0\fi0\tx3549 \up0 \expndtw-2\charscalex100 6.\tab
\up0 \expndtw-2\charscalex100 Write C Prog uisng ADC/DAC to perform various co
nversions.\par\pard\li3189\sb0\sl-230\slmult0\fi0\tx3549 \up0 \expndtw-2\charsca
lex100 7.\tab \up0 \expndtw-2\charscalex100 Write C Prog for delay using in-buil
t timer.\par\pard\li3189\sb1\sl-230\slmult0\fi0\tx3549 \up0 \expndtw-2\charscale
x100 8.\tab \up0 \expndtw-2\charscalex100 Write C prog for serial-communicatio
n using in-built 8251.\par\pard\li3189\sb0\sl-230\slmult0\fi0\tx3549 \up0 \expnd
tw-2\charscalex100 9.\tab \up0 \expndtw-2\charscalex100 Write C prog for Schedul
ing algorithms like FIFO, SJF and Round-\par\pard\ql \li3549\sb0\sl-230\slmult0
\up0 \expndtw-2\charscalex100 Robin \par\pard\ql \li3189\sb1\sl-217\slmult0 \up0
\expndtw-2\charscalex100 10.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\
f5\fs20 Implement Real-Time deadline algrithms. \par\pard\ql \li3189\sb3\sl-217
\slmult0 \up0 \expndtw-2\charscalex100 11.\ul0\nosupersub\cf15\f16\fs20 \ul0\no
supersub\cf4\f5\fs20 Write C Prog. to control I/O devices (hard disk, speaker,
etc). \par\pard\ql \li3189\sb13\sl-230\slmult0 \up0 \expndtw-2\charscalex100 12.
\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20 Write C Prog to test
the functions of Semaphore, Mutex, Lock etc. \par\pard\ql \li3189\ri2737\sb19\s
l-220\slmult0\tx3549 \up0 \expndtw-2\charscalex100 13.\ul0\nosupersub\cf15\f16\f
s20 \ul0\nosupersub\cf4\f5\fs20 Write C Prog to communicate between processes
uisng Pipe, Send() \line\tab \up0 \expndtw-2\charscalex100 & Recev(), IPC(). \pa
sub\cf43\f44\fs20 14.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20
Write C Prog to perform matrix mulitpliation using pthreads. \par\pard\ql \li282
9\ri3504\sb222\sl-240\slmult0\tx3232 \up0 \expndtw-3\charscalex100 \ul0\nosupers
ub\cf3\f4\fs20 Embedded Systems : Architecture, Programming, and Design, \line
\tab \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Raj Kamal, 2\ul0\
super\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 Edn. TMH, 2008. \par\pard\q
\f4\fs20 REFERENCE BOOKS: \par\pard\ql \li3189\ri2674\sb19\sl-220\slmult0\tx3549
\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1. \tab \up0 \
expndtw0\charscalex103 \ul0\nosupersub\cf3\f4\fs20 Embedded System Design - A c
ertified Hardware / Software \line\tab \up0 \expndtw-2\charscalex100 Introducti
on, \ul0\nosupersub\cf4\f5\fs20 Frank Vahid,\ul0\nosupersub\cf3\f4\fs20 \ul0\no
supersub\cf4\f5\fs20 John Wikey & Sons, 2002. \par\pard\li3189\sb5\sl-230\slmult

0\fi0\tx3549 \up0 \expndtw-2\charscalex100 2.\tab \up0 \expndtw-2\charscalex100
\ul0\nosupersub\cf3\f4\fs20 An embedded Software Primer\ul0\nosupersub\cf4\f5\fs
20 by David E Simon, Pearson\par\pard\li3189\sb1\sl-230\slmult0\fi352 \up0 \exp
ndtw-2\charscalex100 Edition 1999.\par\pard\li2855\sb0\sl-230\slmult0\par\pard\l
i2855\sb0\sl-230\slmult0\par\pard\li2855\sb0\sl-230\slmult0\par\pard\li2855\sb97
\sl-230\slmult0\fi2018 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20
SPEECH PROCESSING\par\pard\li2855\sb178\sl-230\slmult0\fi0\tx4943\tx7103\tx8544
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0
\expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC756\tab \up0 \expndt
w-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\chars
calex100 : 25\par\pard\li2855\sb1\sl-230\slmult0\fi0\tx7103\tx8543 \up0 \expndtw
-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100
Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2855\sb0\sl-230\slm
ult0\fi0\tx4943\tx7103\tx8543 \up0 \expndtw-2\charscalex100 Total no. of Lecture
Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 E
xam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0\sl-230
\slmult0 \par\pard\ql\li2829\sb150\sl-230\slmult0 \up0 \expndtw-2\charscalex100
\ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\ql \li2829\sb10\sl-230\slmult0 \u
p0 \expndtw0\charscalex102 PRODUCTION AND CLASSIFICATION OF SPEECH SOUNDS:
\par\pard\qj \li2829\ri2675\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex100 \ul0
\nosupersub\cf4\f5\fs20 Introduction, mechanism of speech production. Acoustic p
honetics: vowels, \up0 \expndtw-2\charscalex100 diphthongs, semivowels, nasals,
fricatives, stops and affricates. \up0 \expndtw-2\charscalex100 \ul0\nosupersub\
\charscalex103 TIME-DOMAIN METHODS FOR SPEECH PROCESSING:\ul0\nosupersub\cf4
\f5\fs20 time \line \up0 \expndtw0\charscalex102 dependent processing of speec
h, short-time energy and average magnitude, \par\pard\li2829\sb1\sl-206\slmult0\
fi0\tx8085 \up0 \expndtw-2\charscalex100 short-time average zero crossing rate.\
\li5829\sb67\sl-276\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf2\f3
\fs24 82
Width}{\sv 18812}}
\sl-230\slmult0 \par\pard\ql\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb80\
sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT 3 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nos
upersub\cf4\f5\fs20 Speech vs. silence detection, pitch period estimation using
parallel processing \par\pard\li2829\sb13\sl-230\slmult0\fi0\tx8013 \up0 \expndt
w-2\charscalex100 approach, short-time autocorrelation function.\tab \up0 \expnd
tw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb230\s
l-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 4 \par\pard\ql \li2829\sb1\sl
-217\slmult0 \up0 \expndtw0\charscalex105 \ul0\nosupersub\cf4\f5\fs20 Brief Appl
ications of temporal processing of speech signals in synthesis, \par\pard\li282
9\sb12\sl-230\slmult0\fi0\tx8124 \up0 \expndtw-2\charscalex100 enhancement, hear
ing applications and clear speech.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupe
rsub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li282
9\sb141\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 5 \par\pard\ql \li28
29\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 FREQUENCY DOMAIN METHODS
FOR SPEECH PROCESSING: \par\pard\qj \li2829\ri2675\sb0\sl-240\slmult0 \up0 \ex
pndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Introduction, definitions and
properties: Fourier transforms interpretation and \up0 \expndtw-2\charscalex100
linear filter interpretation, sampling rates in time and frequency. \up0 \expndt
w-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb213\s

\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 Fil
ter bank summation and overlap add methods for short-time synthesis of \line \up
0 \expndtw-1\charscalex100 speech, sinusoidal and harmonic plus noise method of
analysis/synthesis. \par\pard\ql \li7919\sb1\sl-218\slmult0 \up0 \expndtw-2\char
scalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb3\sl-217\slmu
0\slmult0 \up0 \expndtw-1\charscalex100 HOMOMORPHIC SPEECH PROCESSING:\ul0\nosup
ersub\cf4\f5\fs20 Introduction, homomorphic \line \up0 \expndtw0\charscalex100
system for convolution, the complex cepstrum of speech, homomorphic \lin
e \up0 \expndtw-2\charscalex100 vocoder. \par\pard\ql \li7351\sb3\sl-230\slmult0
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \l
i2829\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 8 \par\pard\qj \l
i2829\ri2675\sb0\sl-220\slmult0 \up0 \expndtw0\charscalex100 APPLICATIONS OF S
PEECH PROCESSING:\ul0\nosupersub\cf4\f5\fs20 Brief applications of \line \u
p0 \expndtw0\charscalex100 speech processing in voice response systems hea
ring aid design and \par\pard\li2829\sb17\sl-230\slmult0\fi0\tx7876 \up0 \exp
ndtw-2\charscalex100 recognition systems.\tab \up0 \expndtw-2\charscalex100 \ul0
\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829
\sb0\sl-230\slmult0\par\pard\li2829\sb6\sl-230\slmult0\fi0 \up0 \expndtw0\charsc
alex102 TEXT BOOK:\par\pard\li2829\sb0\sl-226\slmult0\fi360\tx3549 \up0 \expndtw
0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw0\charscalex102
\ul0\nosupersub\cf3\f4\fs20 Digital Processing of Speech Signals\ul0\nosupersub\
cf4\f5\fs20 , L. R. Rabiner and R. W.\par\pard\li2829\sb1\sl-230\slmult0\fi720 \
up0 \expndtw0\charscalex102 Schafer, Pearson Education Asia, 2004.\par\pard\ql \
li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb162\sl-230\slmult0 \up0 \expndtw
-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS: \par\pard\ql \li31
89\ri2674\sb0\sl-220\slmult0\tx3549 \up0 \expndtw0\charscalex100 \ul0\nosupersub
\cf4\f5\fs20 15.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf3\f4\fs20 Disc
rete Time Speech Signal Processing\ul0\nosupersub\cf4\f5\fs20 , T. F. Quatieri
, Pearson \line\tab \up0 \expndtw-2\charscalex100 Education Asia, 2004. \par\par
d\ql \li5829\sb0\sl-276\slmult0 \par\pard\ql\li5829\sb0\sl-276\slmult0 \par\pard
\ql\li5829\sb141\sl-276\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf
2\f3\fs24 83 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\
bkmkstart Pg80}{\bkmkend Pg80}\par\pard\ql \li3189\sb0\sl-230\slmult0 \par\pard\
\li3189\sb0\sl-230\slmult0 \par\pard\ql\li3189\ri2674\sb70\sl-230\slmult0\tx3549
\tx3549 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf4\f5\fs20 16.\ul0\nosupe
rsub\cf15\f16\fs20 \ul0\nosupersub\cf3\f4\fs20 Speech and Audio Signal Process
ing: Processing and\ul0\nosupersub\cf44\f45\fs20 \ul0\nosupersub\cf3\f4\fs20 Pe
rception \line\tab \up0 \expndtw0\charscalex101 of Speech and Music\ul0\nosupers
ub\cf4\f5\fs20 , B. Gold and N. Morgan, John Wiley India \line \tab \up0 \expndt
w-4\charscalex100 Pvt. Ltd, 2004. \par\pard\qj \li4790\ri4635\sb222\sl-240\slmul
t0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 ELECTIVE-3 (GROUP-C
) \line \up0 \expndtw-4\charscalex100 PROGRAMMING IN C++ \par\pard\li2829\sb228\
ub\cf3\f4\fs20 10EC761\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\
fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2829\sb0\sl-230\
slmult0\fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week
: 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex
100 : 03\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expnd
tw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 :
00 : 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb220\sl-230
\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par
\pard\qj \li2829\ri2675\sb0\sl-240\slmult0 \up0 \expndtw-3\charscalex100 C++, A
N OVERVIEW:\ul0\nosupersub\cf4\f5\fs20 Getting started, the C++ program,
Preprocessor \line \up0 \expndtw-1\charscalex100 Directives, The Built-In Array
Data Type, Dynamic Memory Allocation and \line \up0 \expndtw-2\charscalex100 Po
inters, An Object \up0 \expndtw-2\charscalex100 - based Design, An ObjectOriented Design, An \par\pard\li2829\sb1\sl-206\slmult0\fi0\tx8320 \up0 \expnd
tw-1\charscalex100 Exception - based Design, An array.\tab \up0 \expndtw-1\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb225\sl-230\slmu
0\slmult0 \up0 \expndtw-2\charscalex100 THE BASIC LANGUAGE:\ul0\nosupersub\cf4
\f5\fs20 Literal Constant, Variables, Pointer Type, \line \up0 \expndtw-1\
charscalex100 String Types, const Qualifier, Reference Types, the bool type, Enu
meration \par\pard\li2829\sb1\sl-218\slmult0\fi0\tx8440 \up0 \expndtw-2\charscal
ex100 types, Array types. The vector container type.\tab \up0 \expndtw-2\charsca
ar\pard\qj \li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw-1\charscalex100 OPERA
TORS:\ul0\nosupersub\cf4\f5\fs20 Arithmetic Operators, Equality, Relational
and Logical \line \up0 \expndtw-2\charscalex100 operators, Assignment opera
tors, Increment and Decrement operator, The \line \up0 \expndtw-2\charscalex
100 conditional Operator, Bitwise operator, bitset operations. Statements:
if, \par\pard\li2829\sb0\sl-230\slmult0\fi0\tx8385 \up0 \expndtw-2\charscalex1
00 switch, for Loop, while, break, goto, continue statements.\tab \up0 \expndtw2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb230\sl-2
30\slmult0 \up0 \expndtw-4\charscalex100 UNIT - 4 \par\pard\ql \li2829\sb1\sl-21
7\slmult0 \up0 \expndtw-4\charscalex100 FUNCTIONS:\ul0\nosupersub\cf4\f5\fs20 P
rototype, Argument passing, Recursion and linear function. \par\pard\ql \li8320\
sb13\sl-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6
Hrs \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-4\charscalex100 UNIT 5 \par\pard\qj \li2829\ri2674\sb21\sl-220\slmult0 \up0 \expndtw0\charscalex100
EXCEPTION HANDLING: \ul0\nosupersub\cf4\f5\fs20 Throwing an Exception,
Catching an \up0 \expndtw-4\charscalex100 exception, Exception Specification
and Exceptions and Design Issues. \par\pard\ql \li8320\sb12\sl-230\slmult0 \up0
sb1\sl-217\slmult0 \up0 \expndtw-4\charscalex100 UNIT - 6 \par\pard\ql \li2829\s
b3\sl-217\slmult0 \up0 \expndtw-3\charscalex100 CLASSES:\ul0\nosupersub\cf4\f5\f
s20 Definition, Class Objects, Class Initailization, Class constructior, \par\p
ard\li2829\sb22\sl-230\slmult0\fi0\tx8150 \up0 \expndtw-2\charscalex100 The clas
s destructor, Class Object Arrays and Vectors.\tab \up0 \expndtw-2\charscalex100
\ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li5829\sb0\sl-276\slmult0 \par\p
ard\ql\li5829\sb7\sl-276\slmult0 \up0 \expndtw-5\charscalex100 \ul0\nosupersub\c
f2\f3\fs24 84
Width}{\sv 18812}}
\sl-230\slmult0 \par\pard\ql\li2829\sb70\sl-230\slmult0 \up0 \expndtw-2\charscal
ex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 7 \par\pard\ql \li2829\sb1\sl-217\slmul
t0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Overload Operators,
Operators ++ and --, Operators new and delete. \par\pard\ql \li8121\sb13\sl-230
rd\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 8 \par\pa
rd\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex103 \ul0\nosupersub\cf
4\f5\fs20 Multiple Inheritances\ul0\nosupersub\cf3\f4\fs20 , \ul0\nosupersub\cf4
\f5\fs20 public, private & protected inheritance, Class scope \par\pard\li2829\s
b13\sl-230\slmult0\fi0\tx8186 \up0 \expndtw-1\charscalex100 under Inheritance.\t
ab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\li28
29\sb0\sl-230\slmult0\par\pard\li2829\sb4\sl-230\slmult0\fi0 \up0 \expndtw-1\cha
rscalex100 TEXT BOOK:\par\pard\li2829\sb0\sl-225\slmult0\fi360\tx3549 \up0 \expn
dtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscale
x100 \ul0\nosupersub\cf3\f4\fs20 C++ Primer\ul0\nosupersub\cf4\f5\fs20 , S. B
. Lippman & J. Lajoie, 3rd Edition, Addison\par\pard\li2829\sb2\sl-230\slmu

lt0\fi720 \up0 \expndtw-1\charscalex100 Wesley, 2000.\par\pard\ql \li2829\sb230\
sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFEREN
CE BOOKS: \par\pard\ql \li3189\ri2674\sb0\sl-230\slmult0\tx3549\tx3549\tx3549 \u
p0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1. \tab \up0 \expndtw-1\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 C++ Program Design: An Introduction
to Programming and \line\tab \up0 \expndtw0\charscalex103 Object- Oriented D
esign\ul0\nosupersub\cf4\f5\fs20 . Cohoon and Davidson, 3\ul0\super\cf17\f18\fs
19 rd\ul0\nosupersub\cf4\f5\fs20 Edn. TMH \line \tab \up0 \expndtw-2\charscalex
100 publication. 2004. \par\pard\li3189\sb0\sl-230\slmult0\fi0\tx3549 \up0 \expn
dtw0\charscalex102 2.\tab \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf3\f4\fs
20 Object Oriented Programming using C++\ul0\nosupersub\cf4\f5\fs20 , R. Lafore,
Galgotia\par\pard\li3189\sb0\sl-230\slmult0\fi359 \up0 \expndtw0\charscalex102
Publications, 2004.\par\pard\li2855\sb0\sl-230\slmult0\par\pard\li2855\sb0\sl-23
0\slmult0\par\pard\li2855\sb0\sl-230\slmult0\par\pard\li2855\sb4\sl-230\slmult0\
fi2023 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REAL-TIME SYSTE
MS\par\pard\li2855\sb226\sl-230\slmult0\fi0\tx4943\tx7103\tx8544 \up0 \expndtw-2
\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\char
scalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC762\tab \up0 \expndtw-2\charscalex10
0 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\pa
r\pard\li2855\sb0\sl-228\slmult0\fi0\tx7103\tx8543 \up0 \expndtw-2\charscalex100
No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \
up0 \expndtw-2\charscalex100 : 03\par\pard\li2855\sb1\sl-230\slmult0\fi0\tx4943\
tx7103\tx8543 \up0 \expndtw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \
expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \u
p0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pa
rd\ql\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb222\sl-230\slmult0 \up0 \e
xpndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\qj \li2829
\ri2675\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex100 INTRODUCTION TO REAL-TIM
E SYSTEMS:\ul0\nosupersub\cf4\f5\fs20 Historical background, \line \up0 \expndt
w0\charscalex100 RTS Definition, Classification of Real-time Systems, Time
constraints, \par\pard\li2829\sb1\sl-216\slmult0\fi0\tx7965 \up0 \expndtw-2\ch
arscalex100 Classification of Programs.\tab \up0 \expndtw-2\charscalex100 \ul0\n
osupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\
li2829\sb4\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 2 \par\pard\qj \l
i2829\ri2674\sb0\sl-226\slmult0 \up0 \expndtw0\charscalex103 CONCEPTS OF COMPU
TER CONTROL:\ul0\nosupersub\cf4\f5\fs20 Introduction, Sequence \line \up0 \e
xpndtw0\charscalex102 Control, Loop control, Supervisory control, Centralised
computer control, \line \up0 \expndtw0\charscalex100 Distributed system, Human-c
omputer interface, Benefits of computer control \line \up0 \expndtw-2\charscalex
100 systems. \par\pard\ql \li7970\sb5\sl-230\slmult0 \up0 \expndtw-2\charscalex1
00 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li5829\sb0\sl-276\slmult0 \pa
r\pard\ql\li5829\sb16\sl-276\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupers
ub\cf2\f3\fs24 85
Width}{\sv 18812}}
0\slmult0 \up0 \expndtw-1\charscalex100 COMPUTER HARDWARE REQUIREMENTS FOR RTS:\
ul0\nosupersub\cf4\f5\fs20 Introduction, \line \up0 \expndtw0\charscalex102 Gen
eral purpose computer, Single chip microcontroller, Specialized \lin
e \up0 \expndtw0\charscalex102 processors,
Process-related
Interfaces,
Data
transfer
techniques, \par\pard\li2829\sb1\sl-206\slmult0\fi0\tx8071 \
up0 \expndtw-2\charscalex100 Communications, Standard Interface.\tab \up0 \expnd
tw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb0\sl-

00 UNIT - 4 \par\pard\qj \li2829\ri2674\sb10\sl-230\slmult0 \up0 \expndtw0\chars
calex100 LANGUAGES FOR REAL-TIME APPLICATIONS:\ul0\nosupersub\cf4\f5\fs20
Introduction, \line \up0 \expndtw0\charscalex100 Syntax layout and readabilit
y, Declaration and Initialization of Variables and \line \up0 \expndtw0\charscal
ex100 Constants, Modularity and Variables, Compilation, Data types, Contr
ol \line \up0 \expndtw0\charscalex102 Structure, Exception Handling, Low-level f
acilities, Co routines, Interrupts \line \up0 \expndtw-1\charscalex100 and Devic
e handling, Concurrency, Real-time support, Overview of real-time \par\pard\li28
29\sb3\sl-230\slmult0\fi0\tx8131 \up0 \expndtw-2\charscalex100 languages.\tab \u
scalex100 UNIT - 5 & 6 \par\pard\qj \li2829\ri2675\sb14\sl-226\slmult0 \up0 \exp
ndtw0\charscalex103 OPERATING SYSTEMS:\ul0\nosupersub\cf4\f5\fs20 Introductio
n, Real-time multi-tasking OS, \line \up0 \expndtw0\charscalex100 Scheduling
strategies, Priority Structures, Task management, Scheduler and \line \up0 \expn
dtw0\charscalex102 real-time clock interrupt handles, Memory Management, C
ode sharing, \line \up0 \expndtw0\charscalex102 Resource control, Task co-opera
tion and communication, Mutual exclusion, \par\pard\li2829\sb12\sl-230\slmult0\f
i0\tx7975 \up0 \expndtw-2\charscalex100 Data transfer, Liveness, Minimum OS kern
el, Examples.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 14 H
rs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb219\sl-230\slmul
0\slmult0 \up0 \expndtw0\charscalex103 DESIGN OF RTSS - GENERAL INTRODUCTIO
N:\ul0\nosupersub\cf4\f5\fs20 Introduction, \line \up0 \expndtw0\charscalex100
Specification documentation, Preliminary design, Single-program approach, \line
\up0 \expndtw0\charscalex100 Foreground/background,
Multi-tasking
approac
h,
Mutual
exclusion, \par\pard\li2829\sb2\sl-230\slmult0\fi0\tx8164 \up0 \
expndtw-2\charscalex100 Monitors.\tab \up0 \expndtw-2\charscalex100 \ul0\nosuper
sub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb218\sl-230\slmult0 \up0 \expndtw-2\c
harscalex100 UNIT - 8 \par\pard\qj \li2829\ri2674\sb19\sl-220\slmult0 \up0 \expn
dtw0\charscalex101 RTS DEVELOPMENT METHODOLOGIES:\ul0\nosupersub\cf4\f5\fs20
Introduction, Yourdon \line \up0 \expndtw0\charscalex102 Methodology, Requirem
ent definition for Drying Oven, Ward and Mellor \par\pard\li2829\sb13\sl-230\slm
ult0\fi0\tx8078 \up0 \expndtw-2\charscalex100 Method, Hately and Pirbhai Method.
\tab \up0 \expndtw-2\charscalex100 6\ul0\nosupersub\cf3\f4\fs20 Hrs\par\pard\ql
\li5829\sb0\sl-276\slmult0 \par\pard\ql\li5829\sb0\sl-276\slmult0 \par\pard\ql\
4 86 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstar
t Pg83}{\bkmkend Pg83}\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li282
calex100 \ul0\nosupersub\cf3\f4\fs20 TEXT BOOKS: \par\pard\li2829\sb9\sl-230\slm
ult0\fi360\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 4.\t
ab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Real - Time Compute
r Control- An Introduction\ul0\nosupersub\cf4\f5\fs20 , Stuart Bennet,\par\pard\
li2829\sb0\sl-230\slmult0\fi720 \up0 \expndtw-2\charscalex100 2\ul0\super\cf17\f
18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 Edn. Pearson Education. 2005.\par\pard\
\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS:\par\pard\li2829\sb0\
sl-225\slmult0\fi360\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5
\fs20 1.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Real-Time
Systems Design and Analysis\ul0\nosupersub\cf4\f5\fs20 , Phillip. A. Lap
lante,\par\pard\li2829\sb1\sl-228\slmult0\fi720 \up0 \expndtw-2\charscalex100 se
cond edition, PHI, 2005.\par\pard\li2829\sb2\sl-230\slmult0\fi359\tx3549 \up0 \e
xpndtw-2\charscalex100 2.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\
f4\fs20 Real-Time Systems Development\ul0\nosupersub\cf4\f5\fs20 , Rob Williams,
Elsevier. 2006.\par\pard\li2829\sb0\sl-230\slmult0\fi360\tx3549 \up0 \expndtw-2
\charscalex100 3.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20

Embedded Systems\ul0\nosupersub\cf4\f5\fs20 , Raj Kamal, Tata Mc Graw Hill, Indi
a, 2005.\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\p
ar\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li
2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb5\s
l-230\slmult0\fi2095 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 I
MAGE PROCESSING\par\pard\li2829\sb226\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \u
p0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \e
xpndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC763\tab \up0 \expndtw-2
\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscal
ex100 : 25\par\pard\li2829\sb0\sl-228\slmult0\fi0\tx7077\tx8517 \up0 \expndtw-2\
charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exa
m Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2829\sb2\sl-230\slmult
0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Total no. of Lecture Hr
s.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam
Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0\sl-230\sl
0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\qj \li2829\ri2677\sb0\sl-240\slmult0
\up0 \expndtw-2\charscalex100 DIGITAL IMAGE FUNDAMENTALS: \ul0\nosupersub\cf4\f
5\fs20 What is Digital Image Processing. \line \up0 \expndtw-2\charscalex100 fun
damental Steps in Digital Image Processing, Components of an Image \par\pard\li2
829\sb1\sl-216\slmult0\fi0\tx8095 \up0 \expndtw-3\charscalex100 processing sys
tem, elements of Visual Perception.\tab \up0 \expndtw-3\charscalex100 \ul0\nosup
ersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li28
9\ri2615\sb0\sl-220\slmult0 \up0 \expndtw0\charscalex103 \ul0\nosupersub\cf4\f5\
fs20 Image Sensing and Acquisition, Image Sampling and Quantization, Some \up0 \
expndtw-3\charscalex100 Basic Relationships
between Pixels, Linear and Nonl
inear Operations. \par\pard\ql \li8020\sb11\sl-230\slmult0 \up0 \expndtw-2\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb10\sl-230\slmu
0\slmult0 \up0 \expndtw0\charscalex103 IMAGE TRANSFORMS:\ul0\nosupersub\cf4\f5
\fs20
Two-dimensional orthogonal & unitary \line \up0 \expndtw-1\charsc
alex100 transforms, properties of unitary transforms, two dimensional discrete F
ourier \par\pard\li2829\sb1\sl-206\slmult0\fi0\tx8061 \up0 \expndtw-2\charscalex
100 transform.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 H
rs\par\pard\ql \li2829\sb225\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 4 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex104 \ul0\nos
upersub\cf4\f5\fs20 Discrete cosine transform, sine transform, Hadamard tr
ansform, Haar \par\pard\li2829\sb22\sl-230\slmult0\fi0\tx8092 \up0 \expndtw-2\c
harscalex100 transform, Slant transform, KL transform.\tab \up0 \expndtw-2\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li5829\sb0\sl-276\slmult
0 \par\pard\ql\li5829\sb7\sl-276\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosu
persub\cf2\f3\fs24 87
Width}{\sv 18812}}
0\slmult0 \up0 \expndtw-1\charscalex100 IMAGE ENHANCEMENT:\ul0\nosupersub\cf4\f5
\fs20 Image Enhancement in Spatial domain, Some \line \up0 \expndtw-1\charscale
x100 Basic Gray Level Trans -formations, Histogram Processing, Enhancement \par
\pard\li2829\sb1\sl-218\slmult0\fi0\tx8075 \up0 \expndtw-2\charscalex100 Using A
rithmetic/Logic Operations.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf
3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb3\s
\sb0\sl-220\slmult0 \up0 \expndtw0\charscalex104 \ul0\nosupersub\cf4\f5\fs20 Bas

ics of Spatial Filtering Image enhancement in the Frequency Domain \line \up0
\expndtw-1\charscalex100 filters, Smoothing Frequency Domain filters, Sharpening
Frequency Domain \par\pard\li2829\sb20\sl-230\slmult0\fi0\tx8114 \up0 \expndt
w-2\charscalex100 filters, homomorphic filtering.\tab \up0 \expndtw-2\charscalex
100 6\ul0\nosupersub\cf3\f4\fs20 Hrs\par\pard\ql \li2829\sb221\sl-230\slmult0 \
up0 \expndtw-2\charscalex100 UNIT - 7 \par\pard\qj \li2829\ri2651\sb14\sl-226\sl
mult0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Model of image de
gradation/restoration process, noise models, Restoration \up0 \expndtw0\charsc
alex100 in the Presence of Noise, Only-Spatial Filtering Periodic Noise Reductio
n by \up0 \expndtw-2\charscalex100 Frequency Domain Filtering, Linear Position-I
nvariant Degradations, inverse \up0 \expndtw-3\charscalex100 filtering, minimu
m mean square error (Weiner) Filtering, \up0 \expndtw-3\charscalex100 \ul0\nosup
ersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2
29\ri2675\sb19\sl-220\slmult0 \up0 \expndtw0\charscalex104 \ul0\nosupersub\cf4\f
5\fs20 Color Fundamentals. Color Models, Pseudo color Image Processing.,
\up0 \expndtw-2\charscalex100 processing basics of full color image processing \
par\pard\ql \li8071\sb12\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosup
ersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw2\charscalex100 TEXT BOOK: \par\pard\li2829\sb0\sl-230\slmult0\fi359\tx3549 \up0
\expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\cha
rscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Digital Image Processing\u8221?\
ul0\nosupersub\cf4\f5\fs20 , Rafael C.Gonzalez,
Richard E.\par\pard\li282
9\sb0\sl-228\slmult0\fi719 \up0 \expndtw-1\charscalex100 Woods, etl , TMH , 2\
ul0\super\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 Edition 2010.\par\pard\li
harscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS:\par\pard\li2829\sb0\sl
-225\slmult0\fi405\tx3595 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\f
s20 1.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Fund
amentals of Digital Image Processing\u8221?\ul0\nosupersub\cf4\f5\fs20 , An
il K. Jain,\par\pard\li2829\sb2\sl-230\slmult0\fi765 \up0 \expndtw-1\charscale
x100 Pearson Education, 2001.\par\pard\li2829\sb0\sl-230\slmult0\fi405\tx3595 \u
p0 \expndtw-1\charscalex100 2.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub
\cf3\f4\fs20 \u8220?Digital Image Processing and
Analysis\u8221?\ul0\nosup
ersub\cf4\f5\fs20 , B. Chanda and D.\par\pard\li2829\sb0\sl-228\slmult0\fi76
5 \up0 \expndtw-1\charscalex100 Dutta Majumdar,
PHI, 2003.\par\pard\ql \li5
0\sl-276\slmult0 \par\pard\ql\li5829\sb0\sl-276\slmult0 \par\pard\ql\li5829\sb14
7\sl-276\slmult0 \up0 \expndtw-5\charscalex100 \ul0\nosupersub\cf2\f3\fs24 88 \p
ar\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg85}
{\bkmkend Pg85}\par\pard\ql \li3743\sb0\sl-230\slmult0 \par\pard\ql\li3743\sb0\s
\ul0\nosupersub\cf3\f4\fs20 RADIO FREQUENCY INTEGRATED CIRCUITS \par\pard\li2829
\sb0\sl-230\slmult0\par\pard\li2829\sb10\sl-230\slmult0\fi0\tx4917\tx7077\tx8517
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0
\expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC764\tab \up0 \expndt
w-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\chars
calex100 : 25\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \expndtw
-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100
Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2829\sb0\sl-228\slm
ult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Total no. of Lecture
Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 E
xam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0\sl-230
lmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\p
ard\qj \li2829\ri2675\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex101 OVERVIEW O

F WIRELESS PRINCIPLES:\ul0\nosupersub\cf4\f5\fs20 A brief history of wireless \
line \up0 \expndtw0\charscalex100 systems, Noncellular wireless applicatio
ns, Shannon, Modulations & \par\pard\li2829\sb1\sl-203\slmult0\fi0\tx8143
\up0 \expndtw-2\charscalex100 Alphabet Soup, Propagation.\tab \up0 \expndtw-2\ch
arscalex100 3\ul0\nosupersub\cf3\f4\fs20 Hrs\par\pard\qj \li2829\ri2674\sb0\sl240\slmult0 \up0 \expndtw-2\charscalex100 PASSIVE RLC NETWORKS:\ul0\nosupersub
\cf4\f5\fs20 Introduction, Parallel RLC Tank, Series \line \up0 \expndtw-2
\charscalex100 RLC Networks, Other RLC networks, RLC Networks as impedan
ce \par\pard\li2829\sb1\sl-214\slmult0\fi0\tx8258 \up0 \expndtw-2\charscalex100
Transformers.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 4 Hr
s\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb3\sl-230\slmult0
\up0 \expndtw-2\charscalex100 UNIT - 2 \par\pard\qj \li2829\ri2675\sb0\sl-220\sl
mult0 \up0 \expndtw0\charscalex100 CHARACTERISTICS OF PASSIVE IC COMPONENTS:\ul0
\nosupersub\cf4\f5\fs20 Introduction, \line \up0 \expndtw-1\charscalex100 Inter
connect at radio frequencies: Skin effect, resisters, Capacitors, Inductors, \pa
r\pard\li2829\sb20\sl-230\slmult0\fi0\tx8145 \up0 \expndtw-2\charscalex100 Trans
formers, Interconnect options at high frequency.\tab \up0 \expndtw-2\charscalex1
00 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb221\sl-230\slmult0 \u
p0 \expndtw-2\charscalex100 UNIT - 3 \par\pard\qj \li2829\ri2674\sb0\sl-230\slmu
lt0 \up0 \expndtw0\charscalex101 A REVIEW OF MOS DEVICE PHYSICS:\ul0\nosupersub\
cf4\f5\fs20 Introduction, A little history, \line \up0 \expndtw0\charscalex103
FETs, MOSFET physics, The long - channels approximation, operation in \line \up0
\expndtw0\charscalex104 weak inversion (sub threshold), MOS device physics in t
he short - channel \par\pard\li2829\sb9\sl-230\slmult0\fi0\tx8181 \up0 \expndtw2\charscalex100 regime, Other effects.\tab \up0 \expndtw-2\charscalex100 \ul0\no
supersub\cf3\f4\fs20 3 Hrs\par\pard\qj \li2829\ri2674\sb225\sl-226\slmult0 \up0
\expndtw0\charscalex102 DISTRIBUTED SYSTEMS:\ul0\nosupersub\cf4\f5\fs20 Intro
duction, Link between lumped and \line \up0 \expndtw0\charscalex104 distribu
ted regimes driving-point impedance of iterated structures, \line \u
p0 \expndtw0\charscalex103 Transmission lines in more detail, Behavior of Finite
- length transmission \line \up0 \expndtw-2\charscalex100 lines, summary of tra
nsmission line equations, artificial lines. \up0 \expndtw-2\charscalex100 \ul0\n
osupersub\cf3\f4\fs20 4 Htrs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\q
l\li2829\sb201\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 4 \par\pard\q
j \li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex101 THE SMITH CHART
AND S-PARAMETERS:\ul0\nosupersub\cf4\f5\fs20 Introduction, The smith \line \up
0 \expndtw0\charscalex102 chart, S-parameters, Band Width Estimation Techniques,
Introduction, The \line \up0 \expndtw0\charscalex102 method of open - circuit
time constant, The method of short circuit time \par\pard\li2829\sb4\sl-230\slmu
lt0\fi0\tx8169 \up0 \expndtw-2\charscalex100 constant, Risetime, Delay and bandw
idth.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pa
rd\ql \li5829\sb0\sl-276\slmult0 \par\pard\ql\li5829\sb52\sl-276\slmult0 \up0 \e
xpndtw-3\charscalex100 \ul0\nosupersub\cf2\f3\fs24 89
Width}{\sv 18812}}
\sl-230\slmult0 \par\pard\ql\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb20\
sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT 5 \par\pard\qj \li2829\ri2674\sb10\sl-230\slmult0 \up0 \expndtw0\charscalex101 H
IGH FREQUENCY AMPLIFIER DESIGN:\ul0\nosupersub\cf4\f5\fs20 Introduction, Z
eros as \line \up0 \expndtw0\charscalex100 bandwidth Enhancers, The shunt -seri
es amplifier, Bandwidth Enhancement \line \up0 \expndtw0\charscalex100 with f\u
l0\sub\cf17\f18\fs19 T\ul0\nosupersub\cf4\f5\fs20 Doublers, Tuned amplifiers
, Neutralization and unilateralization, \par\pard\li2829\sb2\sl-230\slmult0\f
i0\tx7948 \up0 \expndtw-1\charscalex100 Cascaded amplifiers, AM - PM conversion.
\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql

\li2829\sb218\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 6 \par\pard\q
j \li2829\ri2674\sb10\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex100 VOLTAGE R
EFERENCES AND BIASING:\ul0\nosupersub\cf4\f5\fs20 Introduction, Review of
\line \up0 \expndtw0\charscalex100 diode behavior, Diodes and bipolar transistor
s in CMOS technology, Supply \line \up0 \expndtw0\charscalex100 -independent bi
as circuits, Bandgap voltage reference, Constant g\ul0\sub\cf17\f18\fs19 m
\ul0\nosupersub\cf4\f5\fs20 bias. \line \up0 \expndtw0\charscalex100 \ul0\nosu
persub\cf3\f4\fs20 Noise\ul0\nosupersub\cf4\f5\fs20 : Introduction, Thermal nois
e, Shot noise, Flicker noise, Popcorn noise, \line \up0 \expndtw0\charscalex100
Classical two- port noise theory, Examples of noise calculations, A handy \par\p
ard\li2829\sb3\sl-230\slmult0\fi0\tx8212 \up0 \expndtw-2\charscalex100 rule of t
humb, Typical noise performance.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupers
ub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb217\sl-230\slmult0 \up0 \expndtw-2\ch
arscalex100 UNIT - 7 \par\pard\qj \li2829\ri2675\sb14\sl-226\slmult0 \up0 \expnd
tw-1\charscalex100 LOW NOISE AMPLIFIER DESIGN:\ul0\nosupersub\cf4\f5\fs20 Intro
duction, Derivation of intrinsic \line \up0 \expndtw0\charscalex101 MOSFET two-p
ort noise parameters, LNA topologies: Power match versus \line \up0 \expndtw0\ch
arscalex104 noise match, Power-constrained noise optimization, Design exam
ples, \line \up0 \expndtw-1\charscalex100 linearity and large signal perform
ance, Spurious \up0 \expndtw0\charscalex101 - free Dynamic range. \par\pard\
ql \li2829\sb11\sl-230\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf3\
f4\fs20 Mixers: \ul0\nosupersub\cf4\f5\fs20 Introduction, Mixer fundamental,
Nonlinear systems as linear \par\pard\li2829\sb4\sl-230\slmult0\fi0\tx8327 \
up0 \expndtw-2\charscalex100 mixers.\tab \up0 \expndtw-2\charscalex100 \ul0\nosu
persub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb216\sl-230\slmult0 \up0 \expndtw2\charscalex100 UNIT - 8 \par\pard\qj \li2829\ri2674\sb10\sl-230\slmult0 \up0 \e
xpndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Multiplier - based mixers,
Sub sampling mixers, Diode ring mixers, RF \line \up0 \expndtw-1\charsca
lex100 power amplifiers, Introduction, general considerations, Class A, AB, B an
d C \line \up0 \expndtw-1\charscalex100 power amplifier, Class D amplifiers, Cla
ss E amplifiers
Class F amplifiers, \line \up0 \expndtw-1\charscalex100 Modu
lation of power amplifiers, summary of PA characteristics, RF PA \line
\up0 \expndtw-2\charscalex100 design examples, additional design considerations,
Design summery. \par\pard\ql \li8222\sb1\sl-217\slmult0 \up0 \expndtw-2\charsca
lex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0
\par\pard\ql\li2829\sb3\sl-230\slmult0 \up0 \expndtw-2\charscalex100 TEXT BOOK:
\par\pard\li2829\sb14\sl-230\slmult0\fi359\tx3549 \up0 \expndtw-1\charscalex100
\ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersu
b\cf3\f4\fs20 The design of CMOS radio-frequency integrated circuit\ul0\nosupers
ub\cf4\f5\fs20 , Thomas\par\pard\li2829\sb0\sl-230\slmult0\fi719 \up0 \expndtw-1
\charscalex100 H. Lee, 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20
edition Cambridge, 2004.\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb3\
sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REF
ERENCE BOOK:\par\pard\li2829\sb0\sl-226\slmult0\fi360\tx3549 \up0 \expndtw-1\cha
\nosupersub\cf3\f4\fs20 Design of Analog CMOS integrated circuit\ul0\nosupersub\
cf4\f5\fs20 , Behzad Razavi, Tata\par\pard\li2829\sb1\sl-230\slmult0\fi720 \up0
\expndtw-1\charscalex100 Mc Graw Hill, 2005.\par\pard\ql \li5829\sb0\sl-276\slmu
0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf2\f3\fs24 90 \par\pard\sect\se
ctd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg87}{\bkmkend Pg87}
r\pard\ql\li4711\sb70\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupers
ub\cf3\f4\fs20 WAVELET TRANSFORMS \par\pard\li2829\sb0\sl-230\slmult0\par\pard\l
i2829\sb9\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100
0\nosupersub\cf3\f4\fs20 10EC765\tab \up0 \expndtw-2\charscalex100 \ul0\nosupers
b1\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex100 No. of Lecture

Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\
charscalex100 : 03\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \
up0 \expndtw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\chars
calex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\c
harscalex100 : 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb
230\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNI
T - 1 \par\pard\qj \li2829\ri2675\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex10
0 CONTINUOUS WAVELET TRANSFORM: \ul0\nosupersub\cf4\f5\fs20 Introduction, C-T wa
velets, \line \up0 \expndtw0\charscalex102 Definition of CWT, The CWT as a corre
lation. Constant Q-Factor Filtering \line \up0 \expndtw0\charscalex100 Interpola
tion and time frequency resolution, the CWT as an operator, inverse \par\pard\li
2829\sb0\sl-230\slmult0\fi0\tx8027 \up0 \expndtw-2\charscalex100 CWT.\tab \up0 \
230\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 2 \par\pard\qj \li2829\r
i2674\sb0\sl-230\slmult0 \up0 \expndtw-1\charscalex100 INTRODUCTION TO DISCRET
E WAVELET TRANSFORM AND \line \up0 \expndtw0\charscalex102 ORTHOGONAL
WAVE
LET
DECOMPOSITION:\ul0\nosupersub\cf4\f5\fs20
Introduction. \line \up0 \e
xpndtw-1\charscalex100 Approximation of vectors in nested linear vector s
paces, (i) example of \line \up0 \expndtw-1\charscalex100 approximating vecto
rs in nested subspaces of a finite dimensional liner vector \line \up0 \expndtw2\charscalex100 space, \up0 \expndtw0\charscalex100 (ii) Example of approxima
ting vectors in nested subspaces of an \line \up0 \expndtw0\charscalex104
infinite dimensional linear vector space. Example MRA. (i) Bases for the \line
\up0 \expndtw0\charscalex100 approximations subspaces and Harr scaling functi
on, (ii) Bases for detail \par\pard\li2829\sb0\sl-230\slmult0\fi0\tx8181 \up0
\expndtw-2\charscalex100 subspaces and Haar wavelet.\tab \up0 \expndtw-2\charsca
\par\pard\ql\li2829\sb220\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 3
\par\pard\qj \li2829\ri2675\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 MR
A, ORTHO NORMAL WAVELETS AND THEIR RELATIONSHIP \line \up0 \expndtw0\charscalex1
04 TO FILTER BANKS:\ul0\nosupersub\cf4\f5\fs20 Introduction, Formal defini
tion of an MRA. \line \up0 \expndtw0\charscalex101 Construction of a gener
al orthonormal MRA, \up0 \expndtw0\charscalex102 (i) scaling function and \
par\pard\qj \li2829\ri2674\sb0\sl-220\slmult0 \up0 \expndtw0\charscalex100 subsp
aces, (ii) Implication of dilation equation and orthogonality, a wavelet \line \
up0 \expndtw-1\charscalex100 basis for MRA. (i) Two scale relations for
(t), \up0 \expndtw-1\charscalex100 (ii) Basis for the detail \par\pard\ql \l
i2829\sb11\sl-230\slmult0 \up0 \expndtw0\charscalex103 subspace (iii) Direct su
m decomposition, Digital filtering interpolation (i) \par\pard\li2829\sb9\sl-23
0\slmult0\fi0\tx8181 \up0 \expndtw-2\charscalex100 Decomposition filters, (ii) r
econstruction, the signal.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3
\f4\fs20 7 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb1\sl
-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 4 \par\pard\qj \li2829\ri2674\
sb0\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex101 EXAMPLES OF WAVELETS:\ul0\no
supersub\cf4\f5\fs20 Examples of orthogonal basis generating \line \up0 \expndt
w0\charscalex100 wavelets, (i) Daubechies D\ul0\sub\cf17\f18\fs19 4\ul0\nosupers
ub\cf4\f5\fs20 scaling function and wavelet. (ii) band
limited \line \up0 \
expndtw0\charscalex100 wavelets, Interpreting orthonormal MRAs for Discrete time
MRA, (iii) Basis \par\pard\li2829\sb1\sl-228\slmult0\fi0\tx8135 \up0 \expndtw-2
\charscalex100 functions for DTWT.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupe
rsub\cf3\f4\fs20 6 Hrs\par\pard\ql \li5829\sb0\sl-276\slmult0 \par\pard\ql\li582
91
Width}{\sv 18812}}

0\slmult0 \up0 \expndtw-2\charscalex100 ALTERNATIVE WAVELET REPRESENTATIONS:\u
l0\nosupersub\cf4\f5\fs20 Introduction, Bi-\line \up0 \expndtw0\charscalex100
orthogonal wavelet bases, Filtering relationship for bi-orthogonal filte
rs, \line \up0 \expndtw-1\charscalex100 Examples of bi-orthogonal scaling functi
ons and wavelets. 2-D wavelets. \par\pard\ql \li8071\sb1\sl-193\slmult0 \up0 \ex
pndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb1
7\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 6 \par\pard\qj \li2829\ri2
674\sb0\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\f
s20 Non - separable multidimensional wavelets, wavelet packets. Wavelets
\line \up0 \expndtw0\charscalex102 Transform and Data Compression:\ul0\nosupersu
b\cf3\f4\fs20 \ul0\nosupersub\cf4\f5\fs20 Introduction, transform coding, DTWT
\line \up0 \expndtw0\charscalex103 for image compression (i) Image compression u
sing DTWT and run-length \par\pard\li2829\sb0\sl-230\slmult0\fi0\tx7965 \up0 \ex
pndtw-2\charscalex100 encoding.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersu
rscalex100 UNIT - 7 \par\pard\ql \li2829\sb1\sl-217\slmult0\tx5956 \up0 \expndtw
0\charscalex105 \ul0\nosupersub\cf4\f5\fs20 (i) Embedded tree image coding \
tab \up0 \expndtw0\charscalex104 (ii) compression with JPEG audio \par\pard\
ql \li2829\sb3\sl-217\slmult0 \up0 \expndtw-2\charscalex100 compression (iii) Au
dio masking, (iv) Wavelet based audio coding. \par\pard\ql \li7919\sb13\sl-230\s
lmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard
\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 8 \par\pard
\qj \li2829\ri2674\sb0\sl-226\slmult0\fi0 \up0 \expndtw-2\charscalex100 CONSTRUC
TION OF SIMPLE WAVELETS:\ul0\nosupersub\cf4\f5\fs20 Construction of simpl
e \line \up0 \expndtw0\charscalex104 wavelets like Harr and DB1. Other Applica
tions of Wavelet Transforms: \line \up0 \expndtw0\charscalex100 Introduction, wa
velet de-noising, speckle removal, edge detection and object \line \up0 \expndtw
0\charscalex100 isolation, Image fusions, Object detection by wavelet tra
nsforms of \par\pard\li2829\sb14\sl-230\slmult0\fi0\tx8071 \up0 \expndtw-2\char
scalex100 projections.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\
0 TEXT BOOK: \par\pard\ql \li3189\ri2675\sb0\sl-240\slmult0\tx3549\tx3549 \up0 \
expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 6. \tab \up0 \expndtw-2\char
scalex100 \ul0\nosupersub\cf3\f4\fs20 Wavelet transforms- Introduction to th
eory and applications\ul0\nosupersub\cf4\f5\fs20 , \line\tab \up0 \expndtw-2\c
harscalex100 Raghuveer M.Rao and Ajit S. Bapardikar, Person Education, 2000. \pa
r\pard\ql \li2829\sb211\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupe
rsub\cf3\f4\fs20 REFERENCE BOOKS: \par\pard\li3189\sb10\sl-230\slmult0\fi0\tx354
9 \up0 \expndtw0\charscalex101 \ul0\nosupersub\cf4\f5\fs20 3.\tab \up0 \expndtw0
\charscalex101 \ul0\nosupersub\cf3\f4\fs20 Wavelet transforms,\ul0\nosupersub\cf
4\f5\fs20 Prasad and Iyengar, John Wiley India Pvt.\par\pard\li3189\sb0\sl-23
0\slmult0\fi360 \up0 \expndtw0\charscalex101 Ltd, 2007.\par\pard\li3189\sb0\sl-2
28\slmult0\fi0\tx3549 \up0 \expndtw0\charscalex101 4.\tab \up0 \expndtw0\charsca
lex101 \ul0\nosupersub\cf3\f4\fs20 Wave-let and filter banks\ul0\nosupersub\cf4\
f5\fs20 , Gilbert Strang and Nguyen Wellesley\par\pard\li3189\sb1\sl-230\slmult0
\fi359 \up0 \expndtw0\charscalex101 Cambridge press, 1996\par\pard\ql \li3189\ri
2933\sb0\sl-240\slmult0\tx3549\tx3542 \up0 \expndtw-2\charscalex100 5. \tab \up0
\expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Insight into WAVELETS from
theory to practice, \ul0\nosupersub\cf4\f5\fs20 K.P. Soman \line\tab \up0 \expn
dtw-2\charscalex100 and K.L. Ramchandran, Eastern Economy Edition, 2008 \par\par
d\ql \li5829\sb0\sl-276\slmult0 \par\pard\ql\li5829\sb0\sl-276\slmult0 \par\pard
l\li5829\sb0\sl-276\slmult0 \par\pard\ql\li5829\sb265\sl-276\slmult0 \up0 \expnd
tw-3\charscalex100 \ul0\nosupersub\cf2\f3\fs24 92 \par\pard\sect\sectd\fs24\pape
rw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg89}{\bkmkend Pg89}\par\pard\ql

harscalex100 \ul0\nosupersub\cf3\f4\fs20 MODELING AND SIMULATION OF DATA NETWORK
S \par\pard\li2829\sb230\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2
\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\char
scalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC766\tab \up0 \expndtw-2\charscalex10
0 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\pa
r\pard\li2829\sb0\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex100
No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \
up0 \expndtw-2\charscalex100 : 03\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx4917\
tx7077\tx8517 \up0 \expndtw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \
expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \u
p0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pa
rd\ql\li2829\sb220\sl-230\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\c
f3\f4\fs20 UNIT - 1&2 \par\pard\qj \li2829\ri2674\sb19\sl-220\slmult0 \up0 \expn
dtw-2\charscalex100 DELAY MODELS IN DATA NETWORKS:\ul0\nosupersub\cf4\f5\fs2
0 Queuing Models, M/M/1, \line \up0 \expndtw-2\charscalex100 M/M/m, M/M/ \u
p0 \expndtw-2\charscalex100 , M/M/m/m and other Markov System, M/G/1 Syst
em, \par\pard\ql \li2829\sb12\sl-230\slmult0 \up0 \expndtw-1\charscalex100 Netwo
rks of Transmission Lines, Time Reversibility, Networks of Queues. \par\pard\ql
fs20 12 Hrs \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb3\sl
-230\slmult0 \up0 \expndtw0\charscalex100 UNIT - 3&4 \par\pard\qj \li2829\ri2674
\sb19\sl-220\slmult0 \up0 \expndtw0\charscalex100 MULTI-ACCESS COMMUNICATION:\u
l0\nosupersub\cf4\f5\fs20 Slotted Multi-access and the \line \up0 \expndtw0
\charscalex100 Aloha System, Splitting Algorithms, Carrier Sensing,
Multi-access \par\pard\li2829\sb12\sl-230\slmult0\fi0\tx7953 \up0 \expndtw-2\cha
rscalex100 Reservations, Packet Radio Networks.\tab \up0 \expndtw-2\charscalex10
\pard\ql\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb170\sl-230\slmult0 \up0
\expndtw0\charscalex100 UNIT - 5&6 \par\pard\qj \li2829\ri2674\sb10\sl-230\slmu
lt0 \up0 \expndtw-2\charscalex100 ROUTING IN DATA NETWORKS:\ul0\nosupersub\cf
4\f5\fs20 Introduction, Network Algorithms \line \up0 \expndtw0\charscalex10
2 and Shortest Path Routing, Broadcasting Routing Information: Coping with \line
\up0 \expndtw0\charscalex100 Link Failures, Flow models, Optimal Routing,
and Topological Design, \line \up0 \expndtw0\charscalex104 Characterization
of Optimal Routing, Feasible Direction Methods for \line \up0 \expndtw0\ch
arscalex100 Optimal Routing, Projection Methods for Optimum Routing, Routing in
the \par\pard\li2829\sb4\sl-230\slmult0\fi0\tx8004 \up0 \expndtw-2\charscalex100
Codex Network.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 14
Hrs\par\pard\ql \li2829\sb216\sl-230\slmult0 \up0 \expndtw0\charscalex100 UNIT
- 7&8 \par\pard\qj \li2829\ri2674\sb19\sl-220\slmult0 \up0 \expndtw-1\charscalex
100 FLOW CONTROL:\ul0\nosupersub\cf4\f5\fs20 Introduction, Window Flow Con
trol, Rate Control \line \up0 \expndtw0\charscalex100 Schemes, Overview of
Flow Control in Practice, Rate Adjustment \par\pard\li2829\sb16\sl-230\s
lmult0\fi0\tx8143 \up0 \expndtw-2\charscalex100 Algorithms.\tab \up0 \expndtw-2\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 14 Hrs\par\pard\li2829\sb0\sl-230\slmu
lt0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb188\sl-230\slmult0\fi0
\up0 \expndtw-1\charscalex100 REFERENCE BOOKS:\par\pard\li2829\sb0\sl-226\slmult
0\fi360\tx3549\tx8836 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20
1.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Data Ne
tworks"\ul0\nosupersub\cf4\f5\fs20 Dimitri Bertsekas and Robert Gallager,\
tab \up0 \expndtw0\charscalex100 2\ul0\super\cf17\f18\fs19 nd\par\pard\li2829\sb
1\sl-230\slmult0\fi719 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20
edition, Prentice Hall of India, 2003.\par\pard\ql \li5829\sb0\sl-276\slmult0 \
par\pard\ql\li5829\sb98\sl-276\slmult0 \up0 \expndtw-5\charscalex100 \ul0\nosupe
rsub\cf2\f3\fs24 93
Width}{\sv 18812}}
g90}{\bkmkend Pg90}\par\pard\li3189\sb0\sl-230\slmult0\par\pard\li3189\sb0\sl-23
0\slmult0\par\pard\li3189\sb0\sl-230\slmult0\par\pard\li3189\sb0\sl-230\slmult0\
par\pard\li3189\sb78\sl-230\slmult0\fi0\tx3549 \up0 \expndtw-1\charscalex100 \ul
0\nosupersub\cf4\f5\fs20 2.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf
3\f4\fs20 \u8220?High-Speed Networks and Internets\u8221? \ul0\nosupersub\cf4\f5
\fs20 William Stallings, Pearson\par\pard\li3189\sb1\sl-230\slmult0\fi360 \up0 \
expndtw-1\charscalex100 Education (Asia) Pte. Ltd, 2004.\par\pard\li3189\sb0\sl230\slmult0\fi0\tx3549 \up0 \expndtw-1\charscalex100 3.\tab \up0 \expndtw-1\char
scalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?High Performance Communication Netw
orks\u8221? \ul0\nosupersub\cf4\f5\fs20 J. Walrand\ul0\nosupersub\cf3\f4\fs20 \
ul0\nosupersub\cf4\f5\fs20 and\par\pard\li3189\sb1\sl-230\slmult0\fi360 \up0 \ex
pndtw-1\charscalex100 P. Varaya, 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub\cf4
\f5\fs20 edition, Harcourt India Pvt. Ltd. & Morgan Kaufman,\par\pard\li3189\sb
0\sl-230\slmult0\fi359 \up0 \expndtw-1\charscalex100 2000.\par\pard\ql \li5829\s
ql\li5829\sb98\sl-276\slmult0 \up0 \expndtw-5\charscalex100 \ul0\nosupersub\cf2\
f3\fs24 94 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bk
mkstart Pg91}{\bkmkend Pg91}\par\pard\ql \li5239\sb0\sl-230\slmult0 \par\pard\ql
i5239\sb0\sl-230\slmult0 \par\pard\ql\li5239\sb70\sl-230\slmult0 \up0 \expndtw-2
\charscalex100 \ul0\nosupersub\cf4\f5\fs20 VIII SEMESTER \par\pard\ql \li4478\sb
110\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 WIR
ELESS COMMUNICATION \par\pard\li2855\sb0\sl-230\slmult0\par\pard\li2855\sb15\sl230\slmult0\fi0\tx4943\tx7103\tx8544 \up0 \expndtw-2\charscalex100 \ul0\nosupers
ub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\
cf3\f4\fs20 10EC81\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20
IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2855\sb0\sl-230\slmu
lt0\fi0\tx7103\tx8543 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04
\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100
: 03\par\pard\li2855\sb1\sl-230\slmult0\fi0\tx4943\tx7103\tx8543 \up0 \expndtw-2
\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\
tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 :
100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb224\sl-230\slm
ult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\par
d\qj \li2829\ri2674\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosuper
sub\cf4\f5\fs20 Introduction to wireless telecommunication systems and Network
s, History \line \up0 \expndtw0\charscalex100 and Evolution Different generation
s of wireless cellular networks 1G, 2g,3G \par\pard\li2829\sb1\sl-209\slmult0\fi
0\tx7999 \up0 \expndtw-2\charscalex100 and 4G networks.\tab \up0 \expndtw-2\char
scalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb221\sl-230\slm
ult0 \up0 \expndtw-2\charscalex100 UNIT - 2 \par\pard\qj \li2829\ri2675\sb10\sl230\slmult0 \up0 \expndtw0\charscalex103 \ul0\nosupersub\cf4\f5\fs20 Common Ce
llular System components, Common cellular network \line \up0 \expndtw0
\charscalex100 components, Hardware and software, views of cellular networks, 3G
cellular \line \up0 \expndtw-1\charscalex100 systems components, Cellular compo
nent identification Call establishment. \par\pard\ql \li8071\sb1\sl-217\slmult0
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li

2829\sb13\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 3 \par\pard\qj \li
2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\
f5\fs20 Wireless network architecture and operation, Cellular concep
t Cell \line \up0 \expndtw0\charscalex102 fundamentals, Capacity expansion tec
hniques, Cellular backbone networks, \line \up0 \expndtw-1\charscalex100 Mobilit
y management, Radio resources and power management Wireless \par\pard\li2
829\sb5\sl-230\slmult0\fi0\tx8119 \up0 \expndtw-2\charscalex100 network security
l \li2829\sb225\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 4 \par\pard\
qj \li2829\ri2675\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex104 \ul0\nosupersu
b\cf4\f5\fs20 GSM and TDMA techniques, GSM system overview, GSM Network and \up0
\expndtw-2\charscalex100 system Architecture, GSM channel concepts, GSM identif
iers \par\pard\ql \li7919\sb1\sl-218\slmult0 \up0 \expndtw-2\charscalex100 \ul0\
nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb213\sl-230\slmult0 \up0 \exp
ndtw-2\charscalex100 UNIT - 5 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \exp
ndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 GSM system operation, Traffic ca
ses, Cal handoff, Roaming, GSM protocol \par\pard\li2829\sb4\sl-230\slmult0\fi0\
tx7999 \up0 \expndtw-2\charscalex100 architecture. TDMA systems.\tab \up0 \expnd
tw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl230\slmult0 \par\pard\ql\li2829\sb226\sl-230\slmult0 \up0 \expndtw-2\charscalex1
00 UNIT - 6 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex100
\ul0\nosupersub\cf4\f5\fs20 CDMA technology, CDMA overview, CDMA channel
concept CDMA \par\pard\li2829\sb17\sl-230\slmult0\fi0\tx7965 \up0 \expndtw-2\ch
arscalex100 operations.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4
\fs20 6 Hrs\par\pard\ql \li5829\sb0\sl-276\slmult0 \par\pard\ql\li5829\sb0\sl-27
\ul0\nosupersub\cf2\f3\fs24 95
Width}{\sv 18812}}
0\slmult0 \up0 \expndtw0\charscalex104 \ul0\nosupersub\cf4\f5\fs20 Wireless Mod
ulation techniques and Hardware, Characteristics of air \line \up0 \expndt
w0\charscalex102 interface, Path loss models, wireless coding techniques, Digita
l modulation \line \up0 \expndtw0\charscalex102 techniques, OFDM, UWB radio tech
niques, Diversity techniques, Typical \par\pard\li2829\sb1\sl-206\slmult0\fi0\tx
8054 \up0 \expndtw-2\charscalex100 GSM Hardware.\tab \up0 \expndtw-2\charscalex1
lt0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 Introduction to wir
eless LAN 802.11X technologies, Evolution of Wireless \line \up0 \expndtw0\chars
calex102 LAN Introduction to \up0 \expndtw0\charscalex102 802.15X technologie
s in PAN Application and \par\pard\ql \li2829\sb1\sl-218\slmult0 \up0 \expnd
tw0\charscalex102 architecture Bluetooth Introduction to Broadband wireless MAN,
802.16X \par\pard\li2829\sb3\sl-230\slmult0\fi0\tx8092 \up0 \expndtw-2\charsca
lex100 technologies.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs
20 7 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\p
ar\pard\li2829\sb4\sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 TEXT BOOK:\p
ar\pard\li2829\sb0\sl-225\slmult0\fi360\tx3549 \up0 \expndtw-1\charscalex100 \ul
0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf
3\f4\fs20 Wireless Telecom Systems and networks\ul0\nosupersub\cf4\f5\fs20 ,
Mullet: Thomson\par\pard\li2829\sb2\sl-230\slmult0\fi720 \up0 \expndtw-1\char
scalex100 Learning 2006.\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb5\
sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REF
ERENCE BOOKS:\par\pard\li2829\sb1\sl-221\slmult0\fi360\tx3549\tx8786 \up0 \expnd

tw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex
100 \ul0\nosupersub\cf3\f4\fs20 Mobile Cellular Telecommunication\ul0\nosupers
ub\cf4\f5\fs20 , Lee W.C.Y, MGH,\tab \up0 \expndtw-1\charscalex100 2\ul0\supe
r\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 ,\par\pard\li2829\sb3\sl-230\slmul
t0\fi719 \up0 \expndtw-1\charscalex100 2009.\par\pard\li2829\sb0\sl-230\slmult0\
fi359\tx3549 \up0 \expndtw-1\charscalex100 2.\tab \up0 \expndtw-1\charscalex100
\ul0\nosupersub\cf3\f4\fs20 Wireless communication\ul0\nosupersub\cf4\f5\fs20
- D P Agrawal: 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 Ed
ition Thomson\par\pard\li2829\sb1\sl-230\slmult0\fi719 \up0 \expndtw-1\charscal
ex100 learning 2007.\par\pard\li2829\sb0\sl-230\slmult0\fi359\tx3549 \up0 \expnd
s20 Fundamentals of Wireless Communication\ul0\nosupersub\cf4\f5\fs20 , David Ts
e, Pramod\par\pard\li2829\sb0\sl-228\slmult0\fi719 \up0 \expndtw-1\charscalex100
Viswanath, Cambridge 2005.\par\pard\li2829\sb1\sl-230\slmult0\fi359\tx3549 \up0
\expndtw-1\charscalex100 4.\tab \up0 \expndtw-1\charscalex100 S. S. Manvi, M. S
. Kakkasageri, \u8220?\ul0\nosupersub\cf3\f4\fs20 Wireles and Mobile Network\par
\pard\li2829\sb1\sl-230\slmult0\fi712 \up0 \expndtw-1\charscalex100 concepts and
protocols\ul0\nosupersub\cf4\f5\fs20 \u8221?, John Wiley India Pvt. Ltd, 1\ul0\
super\cf17\f18\fs19 st\ul0\nosupersub\cf4\f5\fs20
edition,\par\pard\li2829\sb
0\sl-230\slmult0\fi712 \up0 \expndtw-1\charscalex100 2010.\par\pard\li2829\sb1\s
l-230\slmult0\fi359\tx3491 \up0 \expndtw-1\charscalex100 5.\tab \up0 \expndtw-1\
charscalex100 \u8220?\ul0\nosupersub\cf3\f4\fs20 Wireless Communication - Princi
ples & Practice\ul0\nosupersub\cf4\f5\fs20 \u8221? ,\par\pard\li2829\sb0\sl-230\
slmult0\fi760 \up0 \expndtw-1\charscalex100 T.S. Rappaport, PHI 2001.\par\pard
\ql \li5829\sb0\sl-276\slmult0 \par\pard\ql\li5829\sb0\sl-276\slmult0 \par\pard\
harscalex100 \ul0\nosupersub\cf2\f3\fs24 96 \par\pard\sect\sectd\fs24\paperw1190
0\paperh16840\pard\sb0\sl-240{\bkmkstart Pg93}{\bkmkend Pg93}\par\pard\ql \li439
lex100 \ul0\nosupersub\cf3\f4\fs20 DIGITAL SWITCHING SYSTEMS \par\pard\li2855\sb
230\sl-230\slmult0\fi0\tx4943\tx7103\tx8544 \up0 \expndtw-2\charscalex100 \ul0\n
osupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nosu
persub\cf3\f4\fs20 10EC82\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\
f5\fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2855\sb0\sl-2
30\slmult0\fi0\tx7103\tx8543 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/We
ek : 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charsca
lex100 : 03\par\pard\li2855\sb0\sl-230\slmult0\fi0\tx4943\tx7103\tx8543 \up0 \ex
pndtw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex10
0 : 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscal
ex100 : 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb60\sl-2
30\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \p
ar\pard\qj \li2829\ri2675\sb0\sl-233\slmult0 \up0 \expndtw0\charscalex100 \ul0\n
osupersub\cf4\f5\fs20 Developments of telecommunications, Network structure, Net
work services, \up0 \expndtw0\charscalex102 terminology, Regulation, Standards
. Introduction to telecommunications \up0 \expndtw0\charscalex103 transmissio
n, Power levels, Four wire circuits, Digital transmission, FDM, \up0 \expndtw-2\
charscalex100 TDM, PDH and SDH, Transmission performance. \par\pard\ql \li8001\s
b0\sl-228\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hr
s \par\pard\ql \li2829\sb0\sl-219\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 2
\par\pard\qj \li2829\ri2675\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex102 EVO
LUTION OF SWITCHING SYSTEMS:\ul0\nosupersub\cf4\f5\fs20 Introduction, Mess
age \line \up0 \expndtw0\charscalex103 switching, Circuit switching, Functions o
f switching systems, Distribution \line \up0 \expndtw0\charscalex100 systems, Ba
sics of crossbar systems, Electronic switching, Digital switching \par\pard\li28
29\sb10\sl-230\slmult0\fi0\tx8015 \up0 \expndtw-2\charscalex100 systems.\tab \up

0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\qj \li2829
\ri2674\sb222\sl-230\slmult0 \up0 \expndtw0\charscalex100 DIGITAL SWITCHING SYST
EMS:\ul0\nosupersub\cf4\f5\fs20 Fundamentals : Purpose of analysis, \line \up0
\expndtw0\charscalex104 Basic central office linkages, Outside plant versus insi
de plant, Switching \line \up0 \expndtw0\charscalex104 system hierarchy, Evoluti
on of digital switching systems, Stored program \line \up0 \expndtw0\charscalex1
00 control switching systems, Digital switching system fundamentals, Building \l
ine \up0 \expndtw-2\charscalex100 blocks of a digital switching system, Basic ca
ll processing. \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \
\par\pard\qj \li2829\ri2675\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex101 TELE
COMMUNICATIONS TRAFFIC:\ul0\nosupersub\cf4\f5\fs20 Introduction, Unit of t
raffic, \line \up0 \expndtw-1\charscalex100 Congestion, Traffic measurement,
Mathematical model, lost call systems, \par\pard\li2829\sb1\sl-214\slmult0\f
i0\tx8003 \up0 \expndtw-2\charscalex100 Queuing systems.\tab \up0 \expndtw-2\cha
rscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmu
lt0 \par\pard\ql\li2829\sb6\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 4 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex101 SWITCHING
SYSTEMS:\ul0\nosupersub\cf4\f5\fs20 Introduction, Single stage networks, Gradi
ngs, \par\pard\li2829\sb12\sl-230\slmult0\fi0\tx7943 \up0 \expndtw-2\charscalex1
00 Link Systems, GOS of Linked systems.\tab \up0 \expndtw-2\charscalex100 \ul0\n
osupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\
li2829\sb221\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 5 \par\pard\ql
\li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex101 TIME DIVISION SWITCHING:
\ul0\nosupersub\cf4\f5\fs20 Introduction, space and time switching, \par\pard\l
i2829\sb21\sl-230\slmult0\fi0\tx7864 \up0 \expndtw-2\charscalex100 Time switchin
g networks, Synchronisation.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\c
f3\f4\fs20 6 Hrs\par\pard\ql \li5829\sb0\sl-276\slmult0 \par\pard\ql\li5829\sb16
8\sl-276\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf2\f3\fs24 97
Width}{\sv 18812}}
0\slmult0 \up0 \expndtw0\charscalex101 SWITCHING SYSTEM SOFTWARE:\ul0\nosupe
rsub\cf4\f5\fs20
Introduction, Scope, Basic \line \up0 \expndtw0\charscal
ex100 software architecture, Operating systems, Database Management, Concept of
\line \up0 \expndtw-1\charscalex100 generic program, Software architecture f
or level \up0 \expndtw-1\charscalex100 1 control, Software \par\pard\qj \li28
29\ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex103 architecture for level
2 control, Software architecture for level 3 control, \line \up0 \expndtw0\
charscalex102 Digital switching system software classification, Call model
s, Connect \line \up0 \expndtw0\charscalex100 sequence, Software linkages durin
g call, Call features, Feature flow diagram, \par\pard\li2829\sb1\sl-205\slmult0
\fi0\tx8037 \up0 \expndtw-2\charscalex100 Feature interaction.\tab \up0 \expndtw
-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 hrs\par\pard\ql \li2829\sb0\sl-23
0\slmult0 \par\pard\ql\li2829\sb6\sl-230\slmult0 \up0 \expndtw-2\charscalex100 U
NIT - 7 \par\pard\qj \li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex
100 MAINTENANCE OF DIGITAL SWITCHING SYSTEM:\ul0\nosupersub\cf4\f5\fs20 Introdu
ction, \line \up0 \expndtw0\charscalex100 Scope, Software maintenance, Interface
of a typical digital switching system \line \up0 \expndtw-1\charscalex100 centr
al office, System outage and its impact on digital switching system \li
ne \up0 \expndtw0\charscalex102 reliability, Impact of software patches
on digital switching system \line \up0 \expndtw0\charscalex100 maintainab
ility, Embedded patcher concept, Growth of digital switching \line \up0 \
expndtw0\charscalex102 system central office, Generic program upgrade, A methodo

logy for proper \line \up0 \expndtw0\charscalex100 maintenance of digital switch
ing system, Effect of firmware deployment on \line \up0 \expndtw0\charscalex100
digital switching system, Firmware-software coupling, Switching system \li
ne \up0 \expndtw0\charscalex104 maintainability metrics, Upgrade process success
rate, Number of patches \line \up0 \expndtw-1\charscalex100 applied per year,
Diagnostic resolution rate, Reported critical and major \line \up0 \expn
dtw-1\charscalex100 faults corrected, A strategy improving software quality, Pro
gram for software \line \up0 \expndtw-1\charscalex100 process improvement, Softw
are processes improvement, Software processes, \par\pard\li2829\sb1\sl-217\slmul
t0\fi0\tx7946 \up0 \expndtw-2\charscalex100 Metrics, Defect analysis, Defect ana
lysis.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\p
ard\ql \li2829\sb223\sl-230\slmult0 \up0 \expndtw-3\charscalex100 UNIT - 8 \par\
pard\qj \li2829\ri2674\sb0\sl-240\slmult0 \up0 \expndtw-1\charscalex100 A GENERI
C DIGITAL SWITCHING SYSTEM MODEL:\ul0\nosupersub\cf4\f5\fs20 Introduction, \lin
e \up0 \expndtw0\charscalex100 Scope, Hardware architecture, Software archit
ecture, Recovery strategy, \line \up0 \expndtw0\charscalex100 Simple call th
rough a digital system, Common characteristics of digital \par\pard\li282
9\sb1\sl-206\slmult0\fi0\tx7960 \up0 \expndtw-2\charscalex100 switching systems.
Analysis report. Reliability analysis.\tab \up0 \expndtw-2\charscalex100 \ul0\n
osupersub\cf3\f4\fs20 6 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\s
b8\sl-230\slmult0\fi0 \up0 \expndtw-2\charscalex100 TEXT BOOKS:\par\pard\li2829\
sb0\sl-226\slmult0\fi360\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf
4\f5\fs20 1.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Telec
ommunication and Switching, Traffic and Networks\ul0\nosupersub\cf4\f5\fs20 - J
E\par\pard\li2829\sb1\sl-230\slmult0\fi720 \up0 \expndtw-2\charscalex100 Flood\
ul0\nosupersub\cf3\f4\fs20 :\ul0\nosupersub\cf4\f5\fs20 Pearson
Education,
2002.\par\pard\li2829\sb1\sl-230\slmult0\fi360\tx3549 \up0 \expndtw-2\charscale
x100 2.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Digital Sw
itching Systems\ul0\nosupersub\cf4\f5\fs20 , Syed R. Ali, TMH Ed 2002.\par\pard\
\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOK:\par\pard\li2829\sb0\s
l-225\slmult0\fi360\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\
fs20 1.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Digital Te
lephony\ul0\nosupersub\cf4\f5\fs20 - John C Bellamy: Wiley India India Pvt. Ltd
, 3\ul0\super\cf17\f18\fs19 rd\par\pard\li2829\sb2\sl-230\slmult0\fi719 \up0 \ex
pndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Ed, 2008.\par\pard\ql \li5829\
aperh16840\pard\sb0\sl-240{\bkmkstart Pg95}{\bkmkend Pg95}\par\pard\qj \li4756\s
b0\sl-340\slmult0 \par\pard\qj\li4756\sb0\sl-340\slmult0 \par\pard\qj\li4756\sb0
\sl-340\slmult0 \par\pard\qj\li4756\ri4602\sb120\sl-340\slmult0 \up0 \expndtw-1\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 ELECTIVE -4 (GROUP D) \line \up0 \expn
dtw-2\charscalex100 DISTRIBUTED SYSTEM \par\pard\li2855\sb216\sl-230\slmult0\fi0
C831\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab
\tx8543 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \exp
ndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\
li2855\sb0\sl-228\slmult0\fi0\tx4943\tx7103\tx8543 \up0 \expndtw-2\charscalex100
Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expn
dtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\
ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb0\sl-230\slmult0 \par\pard\q
l\li2829\sb167\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\
f4\fs20 UNIT - 1 \par\pard\qj \li2829\ri2674\sb0\sl-220\slmult0 \up0 \expndtw0\c
harscalex100 CHARACTERIZATION OF DISTRIBUTED SYSTEMS: \ul0\nosupersub\cf4\f5\fs
20 Introduction, \line \up0 \expndtw-1\charscalex100 Examples of distributed sys
tems, Resource sharing and the web, Challenges. \par\pard\ql \li8121\sb11\sl-230
rd\ql \li2829\sb130\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 2 \par\p

ard\qj \li2829\ri2676\sb19\sl-220\slmult0 \up0 \expndtw0\charscalex101 SYSTEM M
ODELS:\ul0\nosupersub\cf4\f5\fs20 Introduction, Architectural models, Funda
mental \line \up0 \expndtw-3\charscalex100 mode. \par\pard\ql \li8171\sb12\sl-23
0\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\p
ard\ql \li2829\sb110\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 3 \par\
pard\qj \li2829\ri2674\sb0\sl-240\slmult0 \up0 \expndtw-2\charscalex100 INTERPRO
CESS COMMUNICATION:\ul0\nosupersub\cf4\f5\fs20 Introduction, The API for
the \line \up0 \expndtw-1\charscalex100 internet protocols, External data repres
entation and marshalling, Clint-server \par\pard\li2829\sb1\sl-214\slmult0\fi0\t
x8080 \up0 \expndtw-2\charscalex100 communication, Group communication.\tab \up0
scalex100 UNIT - 4 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw0\chars
calex105 DISTRIBUTED
OBJECTS
AND
REMOTE
INVOCATION: \par\pard\ql \li
0 Introduction, Communication between distributed objects, Remote procedure \par
\pard\li2829\sb15\sl-230\slmult0\fi0\tx8004 \up0 \expndtw-2\charscalex100 call,
Events and notifications.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\
f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb0\sl230\slmult0 \par\pard\ql\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb38\sl-2
30\slmult0 \up0 \expndtw-1\charscalex100 SECURITY:\ul0\nosupersub\cf4\f5\fs20
Introduction, Overview of security technique cryptographic \par\pard\li2829
\sb0\sl-230\slmult0\fi0\tx7994 \up0 \expndtw-2\charscalex100 algorithms, Digital
signature, Cryptography progrmatics.\tab \up0 \expndtw-2\charscalex100 \ul0\nos
upersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li
2829\sb230\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 6 \par\pard\qj \l
i2829\ri2677\sb0\sl-240\slmult0 \up0 \expndtw-1\charscalex100 TIME & GLOBAL STAT
ES:\ul0\nosupersub\cf4\f5\fs20 Introduction, Clocks, Events, Process states, \u
p0 \expndtw-2\charscalex100 Synchronizing physical clocks, Global states, Distri
buted debugging. \par\pard\ql \li5829\sb33\sl-276\slmult0 \up0 \expndtw-3\charsc
Width}{\sv 18812}}
ex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb190\sl-230\slmult
0 \up0 \expndtw-2\charscalex100 UNIT - 7 \par\pard\ql \li2829\sb1\sl-217\slmult0
\up0 \expndtw-2\charscalex100 COORDINATION AND AGREEMENT:\ul0\nosupersub\cf4\
f5\fs20 Distributed mutual exclusion, \par\pard\li2829\sb17\sl-230\slmult0\f
i0\tx8073 \up0 \expndtw-2\charscalex100 Elections, Multicast communication.\tab
829\sb226\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 8 \par\pard\ql \li
2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 CORBA CASE STUDY:\ul0\nosu
persub\cf4\f5\fs20 Introduction, CORBA RMI, CORBA Services. \par\pard\ql \li817
6 Hrs \par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expndtw-2\charscalex100 TE
XT BOOK: \par\pard\li2829\sb2\sl-230\slmult0\fi359\tx3549 \up0 \expndtw0\charsca
lex100 \ul0\nosupersub\cf4\f5\fs20 5.\tab \up0 \expndtw0\charscalex100 \ul0\nosu
persub\cf3\f4\fs20 \u8220?Distributed Systems, Concepts & Design\u8221?\ul0\
nosupersub\cf4\f5\fs20 , George Coulouris,\par\pard\li2829\sb1\sl-230\slmult0\
fi719\tx7849 \up0 \expndtw0\charscalex100 Jeam Dollimore, Tim Kindberg, four
th edition,\tab \up0 \expndtw0\charscalex100 2006. Pearson\par\pard\li2829\sb0
\sl-230\slmult0\fi719 \up0 \expndtw0\charscalex100 education.\par\pard\li2829\sb
0\sl-230\slmult0\par\pard\li2829\sb6\sl-230\slmult0\fi0 \up0 \expndtw0\charscale
x100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOK:\par\pard\li2829\sb0\sl-230\slmu

lt0\fi360\tx3549 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 7.\tab
\up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Distributed Sy
stem Architecture, a Middleware Approach\u8221?\par\pard\li2829\sb1\sl-221\s
lmult0\fi719 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Arno pude
r, Kay Romer, Frank Pilhofer, Morgan Kaufmann\par\pard\li2829\sb3\sl-230\s
lmult0\fi719 \up0 \expndtw0\charscalex100 publishers.\par\pard\li2829\sb0\sl-230
\slmult0\par\pard\li2829\sb5\sl-230\slmult0\fi2044 \up0 \expndtw-2\charscalex100
\ul0\nosupersub\cf3\f4\fs20 NETWORK SECURITY\par\pard\li2829\sb157\sl-230\slmul
t0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5
\fs20 Subject Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs
20 10EC832\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Mark
s\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2829\sb0\sl-230\slmult0\fi0\
tx7077\tx8517 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up
0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par
\pard\li2829\sb0\sl-228\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charsca
lex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0
\expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par
0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\ql \li
2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20
Services, mechanisms and attacks, The OSI security architecture, A model \par\p
ard\li2829\sb18\sl-230\slmult0\fi0\tx8054 \up0 \expndtw-2\charscalex100 for netw
ork security.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hr
s\par\pard\ql \li2829\sb225\sl-230\slmult0 \up0 \expndtw-4\charscalex100 UNIT 2 \par\pard\qj \li2829\ri2674\sb0\sl-233\slmult0 \up0 \expndtw0\charscalex101 SY
MMETRIC CIPHERS:\ul0\nosupersub\cf4\f5\fs20
Symmetric Cipher Model, S
ubstitution \line \up0 \expndtw-2\charscalex100 Techniques, Transposition Tech
niques, Simplified DES, Data encryption \line \up0 \expndtw-1\charscalex100
standard (DES), The strength of DES, Differential and Linear Cryptanalysis, \lin
e \up0 \expndtw-1\charscalex100 Block Cipher Design Principles and Modes of Oper
ation, Evaluation Criteria \par\pard\li2829\sb1\sl-218\slmult0\fi0\tx8059 \up0 \
expndtw-2\charscalex100 for Advanced Encryption Standard, The AES Cipher.\tab \u
calex100 \ul0\nosupersub\cf2\f3\fs24 100
Width}{\sv 18812}}
0\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 Principles
of Public-Key Cryptasystems, The RSA algorithm, Key \line \up0 \expn
dtw0\charscalex102 Management, Diffie - Hellman Key Exchange, Elliptic Curve Ar
ithmetic, \par\pard\li2829\sb1\sl-218\slmult0\fi0\tx8015 \up0 \expndtw-2\charsca
lex100 Authentication functions, Hash Functions.\tab \up0 \expndtw-2\charscalex1
\pard\ql\li2829\sb3\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 4 \par\p
ard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\
cf4\f5\fs20 Digital signatures, Authentication Protocols, Digital Signature Stan
dard. \par\pard\ql \li7982\sb13\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul
0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb170\sl-230\slmult0 \up0 \e
xpndtw-2\charscalex100 UNIT - 5 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \e
xpndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Web Security Consideration, S
ecurity socket layer (SSL) and Transport layer \par\pard\li2829\sb2\sl-230\slmul
t0\fi0\tx8073 \up0 \expndtw-2\charscalex100 security, Secure Electronic Transact

ion.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\par
rd\li2829\sb14\sl-230\slmult0\fi0\tx7965 \up0 \expndtw-2\charscalex100 \ul0\nosu
persub\cf4\f5\fs20 Intruders, Intrusion Detection, Password Management.\tab \up0
scalex100 UNIT - 7 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charsc
alex103 MALICIOUS SOFTWARE:\ul0\nosupersub\cf4\f5\fs20
Viruses and Rela
ted Threats, Virus \par\pard\li2829\sb21\sl-230\slmult0\fi0\tx7970 \up0 \exp
ndtw-2\charscalex100 Countermeasures.\tab \up0 \expndtw-2\charscalex100 \ul0\nos
upersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb222\sl-230\slmult0 \up0 \expndtw
-2\charscalex100 UNIT - 8 \par\pard\li2829\sb6\sl-230\slmult0\fi0\tx7970 \up0 \e
xpndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Firewalls Design Principles,
Trusted Systems.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6
Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\p
ard\li2829\sb6\sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 TEXT BOOK:\par\p
ard\li2829\sb0\sl-226\slmult0\fi360\tx3549 \up0 \expndtw-1\charscalex100 \ul0\no
supersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4
\fs20 Cryptography and Network Security\ul0\nosupersub\cf4\f5\fs20 , William Sta
lling, Pearson\par\pard\li2829\sb1\sl-228\slmult0\fi720 \up0 \expndtw-1\charscal
ex100 Education, 2003.\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb7\sl
-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFER
ENCE BOOKS:\par\pard\li2829\sb0\sl-225\slmult0\fi360\tx3549 \up0 \expndtw-1\char
scalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex100 \ul0\
nosupersub\cf3\f4\fs20 Cryptography and Network Security\ul0\nosupersub\cf4\f
5\fs20 , Behrouz A. Forouzan,\par\pard\li2829\sb2\sl-230\slmult0\fi720 \up0 \
expndtw-1\charscalex100 TMH, 2007.\par\pard\li2829\sb0\sl-230\slmult0\fi360\tx35
ersub\cf3\f4\fs20 Cryptography and Network Security\ul0\nosupersub\cf4\f5\fs20 ,
Atul Kahate, TMH, 2003.\par\pard\ql \li5769\sb0\sl-276\slmult0 \par\pard\ql\li5
calex100 \ul0\nosupersub\cf2\f3\fs24 101 \par\pard\sect\sectd\fs24\paperw11900\p
aperh16840\pard\sb0\sl-240{\bkmkstart Pg98}{\bkmkend Pg98}\par\pard\ql \li4879\s
100 \ul0\nosupersub\cf3\f4\fs20 OPTICAL NETWORKS \par\pard\li2829\sb160\sl-230\s
lmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf
4\f5\fs20 Subject Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f
4\fs20 10EC833\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA
Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2829\sb0\sl-230\slmult0\
fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab
\up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03
\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\cha
rscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab
\up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par\pard\qj
\li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex101 INTRODUCTION TO
OPTICAL NETWORKS:\ul0\nosupersub\cf4\f5\fs20 Telecommunication \line \up0 \
expndtw-1\charscalex100 networks, First generation optical networks, Multiplexin
g techniques, Second \line \up0 \expndtw-1\charscalex100 generation optical ne
tworks, System and network evolution. Non linear \par\pard\li2829\sb1\sl-2
30\slmult0\fi0\tx7965 \up0 \expndtw-2\charscalex100 effects SPM, CPM, four wave
mixing, Solitons.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20
1 COMPONENTS:\ul0\nosupersub\cf4\f5\fs20 Couplers, isolators and Circulator

s, Multiplexes and \up0 \expndtw-2\charscalex100 filters Optical amplifiers. \
par\pard\ql \li8071\sb1\sl-193\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupe
rsub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb17\sl-230\slmult0 \up0 \expndtw-2\
charscalex100 UNIT - 3 \par\pard\li2829\sb1\sl-228\slmult0\fi0\tx8085 \up0 \expn
dtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Transmitters, detectors, Switche
s, Wavelength converters.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\
f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb0\sl230\slmult0 \par\pard\ql\li2829\sb222\sl-230\slmult0 \up0 \expndtw-2\charscalex1
00 UNIT - 4 \par\pard\qj \li2829\ri2675\sb10\sl-230\slmult0 \up0 \expndtw0\chars
calex101 TRANSMISSION SYSTEM ENGINEERING:\ul0\nosupersub\cf4\f5\fs20 System
model, Power \up0 \expndtw0\charscalex102 penalty, Transmitter, receiver, o
ptical amplifiers, Crosstalk, Dispersion, \up0 \expndtw-2\charscalex100 Overa
ll design Consideration. \par\pard\ql \li8121\sb1\sl-217\slmult0 \up0 \expndtw-2
\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb0\sl-230
\slmult0 \par\pard\ql\li2829\sb3\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UN
IT - 5 \par\pard\qj \li2829\ri2675\sb19\sl-220\slmult0 \up0 \expndtw0\charscalex
102 FIRST
GENERATION
NETWORKS:\ul0\nosupersub\cf4\f5\fs20
SONET/SDH,
Computer \line \up0 \expndtw0\charscalex100 interconnects, Mans, Layered archi
tecture for SONET and second generation \par\pard\li2829\sb12\sl-230\slmult0\fi0
\tx8164 \up0 \expndtw-2\charscalex100 networks.\tab \up0 \expndtw-2\charscalex10
0 \expndtw-2\charscalex100 UNIT - 6 \par\pard\qj \li2829\ri2674\sb0\sl-220\slmul
t0 \up0 \expndtw0\charscalex101 WAVELENGTH ROUTING NETWORKS:\ul0\nosupersub\cf4\
f5\fs20 Optical layer, Node design, \line \up0 \expndtw0\charscalex102 Network
design and operation, routing and wavelength assignment \par\pard\
li2829\sb20\sl-230\slmult0\fi0\tx8219 \up0 \expndtw-2\charscalex100 architectura
l variations.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hr
s\par\pard\ql \li5769\sb0\sl-276\slmult0 \par\pard\ql\li5769\sb0\sl-276\slmult0
\par\pard\ql\li5769\sb31\sl-276\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosup
ersub\cf2\f3\fs24 102
Width}{\sv 18812}}
3\slmult0 \up0 \expndtw0\charscalex101 VIRTUAL TOPOLOGY DESIGN:\ul0\nosupersub
\cf4\f5\fs20 Virtual topology design problem, \line \up0 \expndtw0\charscal
ex100 Combines SONET/WDM network design, an ILP formulation, Regular \lin
e \up0 \expndtw0\charscalex102 virtual topologies, Control and managemen
t, Network management \line \up0 \expndtw-2\charscalex100 configuration mana
gement, Performance management, fault management. \par\pard\ql \li8020\sb0\sl-22
8\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\p
ard\ql \li2829\sb0\sl-219\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 8 \par\pa
rd\qj \li2829\ri2674\sb0\sl-240\slmult0 \up0 \expndtw-1\charscalex100 ACCESS NET
WORKS:\ul0\nosupersub\cf4\f5\fs20 Network architecture overview, present and fu
ture \line \up0 \expndtw0\charscalex105 access networks, HFC, FTTC, Optical
access networks Deployment \line \up0 \expndtw0\charscalex106 considerations,
Photonic packet switching, OTDM, Multiplexing and \par\pard\li2829\sb1\sl
-208\slmult0\fi0\tx8042 \up0 \expndtw-2\charscalex100 demultiplexing Synchronisa
tion.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pa
rd\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb154\sl-230\slmult0 \up0 \
expndtw-2\charscalex100 TEXT BOOK: \par\pard\ql \li3189\ri2644\sb19\sl-220\slmul
t0\tx3549\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 3. \t
ab \up0 \expndtw0\charscalex101 \ul0\nosupersub\cf3\f4\fs20 Optical networks: A
practical perspective\ul0\nosupersub\cf4\f5\fs20 Kumar Sivarajan and \line\tab
\up0 \expndtw-3\charscalex100 Rajiv Ramaswamy: Morgan Kauffman 1998. \par\pard

\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb162\sl-230\slmult0 \up0 \ex
pndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS: \par\pard\ql
\li3189\ri2674\sb19\sl-220\slmult0\tx3549 \up0 \expndtw-1\charscalex100 \ul0\nos
upersub\cf4\f5\fs20 14.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf3\f4\fs2
0 Optical Communication Networks\ul0\nosupersub\cf4\f5\fs20 : Biswajit Mukh
erjee: TMG \line\tab \up0 \expndtw-2\charscalex100 1998. \par\pard\ql \li3189\s
b12\sl-230\slmult0 \up0 \expndtw-2\charscalex100 15.\ul0\nosupersub\cf15\f16\fs2
0 \ul0\nosupersub\cf3\f4\fs20 Optical Networks\ul0\nosupersub\cf4\f5\fs20 , Ul
ysees Black: Pearson education 2007. \par\pard\ql \li3640\sb0\sl-230\slmult0 \pa
pard\ql\li3640\sb220\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersu
b\cf3\f4\fs20 HIGH PERFORMANCE COMPUTER NETWORKS \par\pard\li2829\sb0\sl-230\slm
ult0\par\pard\li2829\sb11\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\cha
rscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC834\tab \up0 \expndtw-2\charscalex1
00 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\p
ar\pard\li2829\sb0\sl-230\slmult0\fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex10
0 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab
\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0
\expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \
up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\p
ard\ql\li2829\sb228\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub
\cf3\f4\fs20 UNIT - 1 \par\pard\qj \li2829\ri2674\sb0\sl-240\slmult0 \up0 \expnd
tw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 History of Communication Net
works, Networking principles, Future \up0 \expndtw-2\charscalex100 network
s Internet, Pure TAM Network, Cable Network, Wireless. \par\pard\ql \li8222\sb1\
sl-193\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \
par\pard\ql \li2829\sb17\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 2 \
par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex102 NETWORK
S
ERVICES
AND
LAYERED
ARCHITECTURE: \par\pard\ql \li2829\sb13\sl-230\slmu
lt0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 Applications, Traf
fic characterization and quality of services, Network \par\pard\ql \li5769
\sb192\sl-276\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf2\f3\fs24
103
Width}{\sv 18812}}
g100}{\bkmkend Pg100}\par\pard\qj \li2829\sb0\sl-220\slmult0 \par\pard\qj\li2829
\sb0\sl-220\slmult0 \par\pard\qj\li2829\sb0\sl-220\slmult0 \par\pard\qj\li2829\s
b0\sl-220\slmult0 \par\pard\qj\li2829\ri2674\sb119\sl-220\slmult0 \up0 \expndtw0
\charscalex103 \ul0\nosupersub\cf4\f5\fs20 services, High performance netw
orks, Network Elements., Layered \line \up0 \expndtw0\charscalex100 applic
ations, Open data network model, Network architectures, Network \par\pard
\li2829\sb21\sl-230\slmult0\fi0\tx8193 \up0 \expndtw-2\charscalex100 bottlenecks
l \li2829\sb221\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 3 \par\pard\
qj \li2829\ri2674\sb19\sl-220\slmult0 \up0 \expndtw0\charscalex103 INTERNET AND
TCP/IP NETWORKS:\ul0\nosupersub\cf4\f5\fs20 Multicast IP, Mobile IP, TCP \line
\up0 \expndtw0\charscalex102 and UDP, Applications, FTP, SMTP. Internet su
ccess and limitations, \line \up0 \expndtw-1\charscalex100 Performance of TCP/
IP Networks, Performance of circuit switched networks. \par\pard\ql \li8071\sb12
\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs
\par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 4
\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx8136 \up0 \expndtw-2\charscalex100 \ul
0\nosupersub\cf4\f5\fs20 SONET, DWDM, FTH, DSL, Intelligent networks CATV.\tab \

tw0\charscalex103 ATM:\ul0\nosupersub\cf4\f5\fs20 Main features of ATM, Address
ing, signaling and Routing, ATM \up0 \expndtw-2\charscalex100 header structure
, ATM AAL, Internetworking with ATM. \par\pard\ql \li8102\sb1\sl-193\slmult0 \up
9\ri2674\sb0\sl-220\slmult0 \up0 \expndtw0\charscalex102 WIRELESS NETWORKS:\ul0\
nosupersub\cf4\f5\fs20 Link level design, Channel Access, Network \line \up0 \e
xpndtw0\charscalex103 design, Wireless networks today, Future networks, ad hoc n
etworks, High \par\pard\li2829\sb20\sl-230\slmult0\fi0\tx8102 \up0 \expndtw-2\ch
arscalex100 speed Digital cellular, Home RF and Bluetooth.\tab \up0 \expndtw-2\c
harscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb0\sl-230\sl
mult0 \par\pard\ql\li2829\sb151\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNI
04 \ul0\nosupersub\cf4\f5\fs20 Control of networks, Objectives and methods of co
ntrol, Circuit switched \up0 \expndtw0\charscalex100 networks, Datagram Networ
ks Network economics, Derived demand for \up0 \expndtw-2\charscalex100 netw
ork services, ISPs, subscriber demand model, Empirical model. \par\pard\ql \li80
7 Hrs \par\pard\ql \li2829\sb13\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNI
T - 8 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex101 OPTIC
AL NETWORKS:\ul0\nosupersub\cf4\f5\fs20 WDM systems, Optical cross connects, Op
tical \par\pard\li2829\sb14\sl-230\slmult0\fi0\tx8152 \up0 \expndtw-2\charscalex
100 LANs, Optical paths and networks.\tab \up0 \expndtw-2\charscalex100 \ul0\nos
upersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li
29\sb39\sl-230\slmult0 \up0 \expndtw-2\charscalex100 TEXT BOOK: \par\pard\ql \li
3189\ri2645\sb0\sl-240\slmult0\tx3549\tx3549 \up0 \expndtw-2\charscalex100 \ul0\
nosupersub\cf4\f5\fs20 5. \tab \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf3\
f4\fs20 High Performance Communication Networks,\ul0\nosupersub\cf4\f5\fs20
Warland and \line\tab \up0 \expndtw-3\charscalex100 Varaiya: Morgan Kauffman
/ Elsivier 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 Edition 2000
. \par\pard\ql \li5769\sb0\sl-276\slmult0 \par\pard\ql\li5769\sb0\sl-276\slmult0
upersub\cf2\f3\fs24 104 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\s
b0\sl-240{\bkmkstart Pg101}{\bkmkend Pg101}\par\pard\ql \li2829\sb0\sl-230\slmul
\par\pard\ql\li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb70\sl-230\slmult0
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFFRENCE BOOKS: \par\
pard\ql \li3189\ri2674\sb19\sl-220\slmult0\tx3549\tx3549 \up0 \expndtw-2\charsca
lex100 \ul0\nosupersub\cf4\f5\fs20 1. \tab \up0 \expndtw-2\charscalex100 \ul0\no
supersub\cf3\f4\fs20 High-Speed Networks and Internet: Performance and Quality o
f \line\tab \up0 \expndtw-2\charscalex100 service\ul0\nosupersub\cf4\f5\fs20 , W
illiam Stallings, Pearson Edu., 2001. \par\pard\ql \li3189\sb12\sl-230\slmult0\t
x3549 \up0 \expndtw-2\charscalex100 2. \tab \up0 \expndtw-2\charscalex100 \ul0\n
osupersub\cf3\f4\fs20 Building High-Speed Networks\ul0\nosupersub\cf4\f5\fs20 ,
Tere Parnell, TMGH, 2000. \par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb
0\sl-230\slmult0\par\pard\li2829\sb3\sl-230\slmult0\fi1850 \up0 \expndtw-2\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 INTERNET ENGINEERING\par\pard\li2829\sb226\
ub\cf3\f4\fs20 10EC835\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\
fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2829\sb1\sl-230\
slmult0\fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week
: 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex
100 : 03\par\pard\li2829\sb0\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expnd
tw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 :
00 : 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb230\sl-230
\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1 \par

\pard\qj \li2829\ri2674\sb0\sl-233\slmult0 \up0 \expndtw0\charscalex100 INTRODUC
TION:\ul0\nosupersub\cf4\f5\fs20 Communication model, Communication software, a
nd \line \up0 \expndtw-1\charscalex100 communication protocol: Representation,
Development methods, Protocol \line \up0 \expndtw0\charscalex103 engineering
process. NETWORK REFERENCE MODEL\ul0\nosupersub\cf3\f4\fs20 :\ul0\nosup
ersub\cf4\f5\fs20
Layered \line \up0 \expndtw-1\charscalex100 architecture, N
etwork services and interfaces, protocol functions, OSI model, \par\pard\li2829\
sb1\sl-212\slmult0\fi0\tx7965 \up0 \expndtw-2\charscalex100 TCP/IP protocol suit
e, Application protocols.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\
f4\fs20 7 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb0\sl230\slmult0 \par\pard\ql\li2829\sb6\sl-230\slmult0 \up0 \expndtw-2\charscalex100
UNIT - 2 \par\pard\qj \li2829\ri2677\sb0\sl-230\slmult0 \up0 \expndtw-1\charsca
lex100 PROTOCOL SPECIFICATION:\ul0\nosupersub\cf4\f5\fs20 Communication serv
ice specification, \up0 \expndtw0\charscalex106 Protocol entity specificati
on, Interface specifications, Interactions, \up0 \expndtw-2\charscalex100
Multimedia protocol specifications, Internet protocol specifications. \par\pard\
f4\fs20 6 Hrs \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex
100 UNIT - 3 \par\pard\li2829\sb13\sl-230\slmult0\fi0\tx8146 \up0 \expndtw-1\cha
rscalex100 SPECIFICATION AND DESCRIPTION LANGUAGE\tab \up0 \expndtw-1\char
scalex100 (SDL):\ul0\nosupersub\cf4\f5\fs20
A\par\pard\li2829\sb0\sl-230\slmu
lt0\fi0\tx8073 \up0 \expndtw-1\charscalex100 protocol specification language:
SDL.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\par
rd\qj \li2829\ri2675\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosupe
rsub\cf4\f5\fs20 Examples of SDL based protocol specifications, Other protocol s
pecification \line \up0 \expndtw0\charscalex100 languages. Protocol Verificati
on And Validation, Protocol verification, \par\pard\li2829\sb1\sl-218\slmult
0\fi0\tx8095 \up0 \expndtw-2\charscalex100 Verification of a protocol using fini
te state machines.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20
7 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb223\sl-230\s
lmult0 \up0 \expndtw-2\charscalex100 UNIT - 5 \par\pard\qj \li2829\ri2674\sb0\sl
-240\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 Protocol
validation, Protocol design errors, and protocol validation \line \
up0 \expndtw-1\charscalex100 approaches, SDL based protocol verification, SDL ba
sed protocol validation. \par\pard\ql \li8020\sb1\sl-218\slmult0 \up0 \expndtw-2
6\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf2\f3\fs24 105
Width}{\sv 18812}}
g102}{\bkmkend Pg102}\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829
alex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 6 \par\pard\qj \li2829\ri2675\sb0\sl233\slmult0 \up0 \expndtw0\charscalex102 PROTOCOL CONFORMANCE TESTING:\ul0\n
osupersub\cf4\f5\fs20
Conformance testing \line \up0 \expndtw0\charscalex10
0 methodology and framework, Conformance test architectures, Test sequence \line
\up0 \expndtw0\charscalex100 generation methods, Distribute architecture by loc
al methods, Conformance \line \up0 \expndtw0\charscalex100 testing with TTCN, Co
nformance testing of RIP, Multimedia applications \par\pard\li2829\sb1\sl-226\sl
mult0\fi0\tx8097 \up0 \expndtw-2\charscalex100 testing, SDL based tools for conf
ormance testing.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7
Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb1\sl-230\slmul
\slmult0 \up0 \expndtw0\charscalex101 PROTOCOL PERFORMANCE TESTING:\ul0\nosupe
rsub\cf4\f5\fs20 SDL based performance \line \up0 \expndtw0\charscalex103 te
sting of TCP, OSPF, Interoperability testing, SDL based interoperability \line \

up0 \expndtw0\charscalex100 testing of CSMA/CD and CSMA/CA protocol using
bridge, Scalability \line \up0 \expndtw-3\charscalex100 testing. \par\pard\ql
0 UNIT - 8 \par\pard\qj \li2829\ri2674\sb0\sl-240\slmult0 \up0 \expndtw0\charsca
lex103 PROTOCOL SYNTHESIS:\ul0\nosupersub\cf4\f5\fs20 Synthesis methods, in
teractive synthesis \line \up0 \expndtw0\charscalex100 algorithms, automatic sy
nthesis algorithm, automatic synthesis of SDL from \par\pard\li2829\sb1\sl-206\s
lmult0\fi0\tx8160 \up0 \expndtw-2\charscalex100 MSC protocol re synthesis.\tab \
up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\li2829\s
b0\sl-230\slmult0\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb9\sl-230\
slmult0\fi0 \up0 \expndtw-1\charscalex100 TEXT BOOK:\par\pard\li2829\sb0\sl-225\
slmult0\fi360\tx3549 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 3
.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Communication Pr
otocol Engineering\ul0\nosupersub\cf4\f5\fs20 , P. Venkatarm and S. S.\par\pard\
li2829\sb2\sl-230\slmult0\fi720 \up0 \expndtw-1\charscalex100 Manvi, PHI, 2004.\
par\pard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb3\sl-230\slmult0\fi0 \up0 \
expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCES BOOKS:\par\pard\l
i2829\sb0\sl-225\slmult0\fi360\tx3549 \up0 \expndtw-1\charscalex100 \ul0\nosuper
sub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20
The Internet and its Protocols\ul0\nosupersub\cf4\f5\fs20 , Adrian Farrel, Else
vier, 2006.\par\pard\li2829\sb2\sl-230\slmult0\fi360\tx3549 \up0 \expndtw-1\char
scalex100 2.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 TCP/I
P Protocol Stack\ul0\nosupersub\cf4\f5\fs20 , B A Forouzan, TMH, 2006.\par\pard\
li2855\sb0\sl-230\slmult0\par\pard\li2855\sb5\sl-230\slmult0\fi1905 \up0 \expndt
w-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 ELECTIVE -5 (GROUP E)\par\pard\li2
855\sb116\sl-230\slmult0\fi1406 \up0 \expndtw-2\charscalex100 MULTIMEDIA COMMUNI
CATIONS\par\pard\li2855\sb224\sl-230\slmult0\fi0\tx4943\tx7103\tx8544 \up0 \expn
dtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2
\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC841\tab \up0 \expndtw-2\charsca
lex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 :
25\par\pard\li2855\sb0\sl-230\slmult0\fi0\tx7103\tx8543 \up0 \expndtw-2\charscal
ex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\
tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2855\sb0\sl-230\slmult0\fi0\tx
4943\tx7103\tx8543 \up0 \expndtw-3\charscalex100 Total no. of Lecture Hrs.\tab \
up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\t
ab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \p
ar\pard\ql\li2829\sb216\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupe
rsub\cf3\f4\fs20 UNIT - 1 \par\pard\qj \li2829\ri2675\sb19\sl-220\slmult0 \up0 \
expndtw0\charscalex102 MULTIMEDIA
COMMUNICATIONS:\ul0\nosupersub\cf4\f5\fs20
Introduction,
multimedia \line \up0 \expndtw-1\charscalex100 information
representation, multimedia networks, multimedia applications, \par\pard\ql
Width}{\sv 18812}}
alex100 \ul0\nosupersub\cf4\f5\fs20 media types, communication modes, network ty
pes, multipoint conferencing, \par\pard\li2829\sb9\sl-230\slmult0\fi0\tx7735 \up
0 \expndtw-2\charscalex100 network QoS application QoS.\tab \up0 \expndtw-2\char
t0 \par\pard\ql\li2829\sb1\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 2
\par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex100 MULTIMEDIA
INFORMATION REPRESENTATION:\ul0\nosupersub\cf4\f5\fs20 Introduction, \par\p
ard\li2829\sb13\sl-230\slmult0\fi0\tx8037 \up0 \expndtw-2\charscalex100 digital

principles, text, images, audio, video.\tab \up0 \expndtw-2\charscalex100 \ul0\n
osupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb230\sl-230\slmult0 \up0 \expnd
tw-2\charscalex100 UNIT - 3 \par\pard\qj \li2829\ri2675\sb0\sl-240\slmult0 \up0
\expndtw0\charscalex101 TEXT AND IMAGE COMPRESSION:\ul0\nosupersub\cf4\f5\
fs20
Introduction, compression \up0 \expndtw-2\charscalex100 principles, te
xt compression, image compression. \par\pard\ql \li7920\sb1\sl-193\slmult0 \up0
sb17\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 4 \par\pard\qj \li2829\
ri2675\sb0\sl-230\slmult0 \up0 \expndtw-1\charscalex100 AUDIO AND VIDEO COMPRESS
ION:\ul0\nosupersub\cf4\f5\fs20 Introduction, audio compression, \line \up0 \ex
pndtw0\charscalex103 DPCM, ADPCM, APC, LPC, video compression, video comp
ression \line \up0 \expndtw-2\charscalex100 principles, H.261, H.263, MPEG, MPEG
-1, MPEG-2, and MPEG-4. \par\pard\ql \li7970\sb0\sl-230\slmult0 \up0 \expndtw-2\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li2829\sb0\sl-230\
slmult0 \par\pard\ql\li2829\sb160\sl-230\slmult0 \up0 \expndtw-2\charscalex100 U
NIT - 5 \par\pard\qj \li2829\ri2677\sb0\sl-240\slmult0 \up0 \expndtw0\charscalex
100 MULTIMEDIA INFORMATION NETWORKS:\ul0\nosupersub\cf4\f5\fs20 Introduction
, LANs, \line \up0 \expndtw-2\charscalex100 Ethernet, Token ring, Bridges, FDDI
High-speed LANs, LAN protocol. \par\pard\ql \li7919\sb1\sl-193\slmult0 \up0 \ex
pndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb0
\sl-230\slmult0 \par\pard\ql\li2829\sb7\sl-230\slmult0 \up0 \expndtw-2\charscale
x100 UNIT - 6 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-2\charscale
x100 THE INTERNET:\ul0\nosupersub\cf4\f5\fs20
Introduction, IP Datagrams, Fra
gmentation, IP Address, \par\pard\li2829\sb1\sl-228\slmult0\fi0\tx7847 \up0 \exp
ndtw-2\charscalex100 ARP and RARP, QoS Support, IPv8.\tab \up0 \expndtw-2\charsc
alex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb222\sl-230\slmul
t0 \up0 \expndtw-2\charscalex100 UNIT - 7 \par\pard\ql \li2829\sb10\sl-230\slmul
t0 \up0 \expndtw-1\charscalex100 BROADBAND ATM NETWORKS:\ul0\nosupersub\cf4\f5\f
s20 Introduction, Cell format, Switfh and \par\pard\li2829\sb1\sl-230\slmult0\f
i0\tx7991 \up0 \expndtw-2\charscalex100 Protocol Architecture ATM LANs.\tab \up0
sb219\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 8 \par\pard\ql \li2829
\sb10\sl-230\slmult0 \up0 \expndtw0\charscalex101 TRANSPORT PROTOCOL:\ul0\nosupe
rsub\cf4\f5\fs20 Introduction, TCP/IP, TCP, UDP, RTP and \par\pard\li2829\sb0\s
l-230\slmult0\fi0\tx7931 \up0 \expndtw-2\charscalex100 RTCP.\tab \up0 \expndtw-2
slmult0 \par\pard\ql\li2829\sb230\sl-230\slmult0 \up0 \expndtw-2\charscalex100 T
EXT BOOK: \par\pard\ql \li3189\ri2674\sb0\sl-230\slmult0\tx3549\tx3549\tx3549 \u
p0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1. \tab \up0 \expndtw0\c
harscalex102 \ul0\nosupersub\cf3\f4\fs20 Multimedia
Communications:
Appl
ications,
Networks, \line\tab \up0 \expndtw0\charscalex102 Protocols and Sta
ndards\ul0\nosupersub\cf4\f5\fs20 , Fred Halsall, Pearson Education, Asia, \line
\tab \up0 \expndtw-2\charscalex100 Second Indian reprint 2002. \par\pard\ql \li
5769\sb122\sl-276\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf2\f3\f
s24 107 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmks
tart Pg104}{\bkmkend Pg104}\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\
2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb70\sl-230\slmult0 \up0 \expndtw-2\
charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS: \par\pard\li3189\sb9\
sl-230\slmult0\fi0\tx3549 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs
20 1.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Multimedia I
nformation Networking\ul0\nosupersub\cf4\f5\fs20 , Nalin K. Sharda, PHI,\pa
r\pard\li3189\sb0\sl-230\slmult0\fi360 \up0 \expndtw0\charscalex100 2003.\par\pa
rd\li3189\sb5\sl-230\slmult0\fi0\tx3549 \up0 \expndtw0\charscalex100 2.\tab \up0
\expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Multimedia Fundament
als: Vol 1 - Media Coding and Content\par\pard\li3189\sb0\sl-226\slmult0\fi359 \
up0 \expndtw0\charscalex100 Processing\u8221?\ul0\nosupersub\cf4\f5\fs20 , Ralf
Steinmetz, Klara Narstedt, Pearson Education,\par\pard\li3189\sb1\sl-230\s
lmult0\fi360 \up0 \expndtw0\charscalex100 2004.\par\pard\li3189\sb0\sl-228\slmul
t0\fi0\tx3549 \up0 \expndtw0\charscalex100 3.\tab \up0 \expndtw0\charscalex100 \

ul0\nosupersub\cf3\f4\fs20 \u8220?Multimedia Systems Design\u8221?\ul0\nosuper
sub\cf4\f5\fs20 , Prabhat K. Andleigh, Kiran\par\pard\li3189\sb2\sl-230\slmu
lt0\fi360 \up0 \expndtw0\charscalex100 Thakrar, PHI, 2004.\par\pard\ql \li5769\s
ard\ql\li5769\sb0\sl-276\slmult0 \par\pard\ql\li5769\sb237\sl-276\slmult0 \up0 \
expndtw-5\charscalex100 \ul0\nosupersub\cf2\f3\fs24 108 \par\pard\sect\sectd\fs2
4\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkstart Pg105}{\bkmkend Pg105}\par\
pard\ql \li4255\sb0\sl-230\slmult0 \par\pard\ql\li4255\sb0\sl-230\slmult0 \par\p
d\ql\li4255\sb110\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\c
f3\f4\fs20 REAL TIME OPERATING SYSTEMS \par\pard\li2829\sb178\sl-230\slmult0\fi0
C842\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab
\tx8517 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \exp
ndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\
li2829\sb0\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100
Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expn
dtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\
ql \li2829\sb222\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf
3\f4\fs20 UNIT 1 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-3\charsc
alex100 Introduction to Real-Time Embedded Systems: \ul0\nosupersub\cf4\f5\fs20
Brief history of Real \par\pard\li2829\sb1\sl-227\slmult0\fi0\tx7936 \up0 \exp
ndtw-3\charscalex100 Time Systems, A brief history of Embedded Systems.\tab \u
9\sb223\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 2 \par\pard\qj \li2829
\ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charscalex104 System Resources: \ul0
\nosupersub\cf4\f5\fs20
Resource Analysis, Real-Time Service Utility, \
line \up0 \expndtw0\charscalex100 Scheduling Classes, The Cyclic Esecutive, Sche
duler Concepts, Preemptive \line \up0 \expndtw0\charscalex100 Fixed Priority Sch
eduling Policies, Real-Time OS, Thread Safe Reentrant \par\pard\li2829\sb8\sl-23
0\slmult0\fi0\tx8020 \up0 \expndtw0\charscalex101 Functions.\tab \up0 \expndtw0\
charscalex101 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\li2829\sb0\sl-230\slmul
t0\par\pard\li2829\sb5\sl-230\slmult0\fi0 \up0 \expndtw0\charscalex101 UNIT 3\pa
r\pard\li2829\sb0\sl-226\slmult0\fi0 \up0 \expndtw0\charscalex102 Processing: \u
l0\nosupersub\cf4\f5\fs20
Preemptive Fixed-Priority Policy, Feasibility, Rate
Montonic\par\pard\li2829\sb1\sl-230\slmult0\fi0\tx8966 \up0 \expndtw0\charscale
x102 least upper bound, Necessary and Sufficient feasibility, Deadline\ta
b \up0 \expndtw0\charscalex101 -\par\pard\li2829\sb0\sl-228\slmult0\fi0\tx8025 \
up0 \expndtw0\charscalex101 Monotonic Policy, Dynamic priority policies.\tab \up
0 \expndtw0\charscalex101 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\
sb0\sl-230\slmult0 \par\pard\ql\li2829\sb4\sl-230\slmult0 \up0 \expndtw-2\charsc
alex100 UNIT 4 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscale
x100 I/O Resources: \par\pard\qj \li2829\ri2677\sb0\sl-240\slmult0 \up0 \expndtw
0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Worst-case Execution time, Interm
ediate I/O, Execution efficiency, I/O \up0 \expndtw-2\charscalex100 Architec
ture. \par\pard\ql \li2829\sb1\sl-220\slmult0 \up0 \expndtw-2\charscalex100 \ul0
\nosupersub\cf3\f4\fs20 Memory: \par\pard\ql \li2829\sb2\sl-218\slmult0 \up0 \ex

pndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Physical hierarchy, Capacity an
d allocation, Shared Memory, ECC Memory, \par\pard\li2829\sb11\sl-230\slmult0\fi
0\tx8066 \up0 \expndtw-2\charscalex100 Flash filesystems.\tab \up0 \expndtw-2\ch
arscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb0\sl-230\slm
ult0 \par\pard\ql\li2829\sb2\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 5
\par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 Multireso
urce Services: \par\pard\qj \li2829\ri2674\sb0\sl-240\slmult0 \up0 \expndtw0\cha
rscalex104 \ul0\nosupersub\cf4\f5\fs20 Blocking, Deadlock and livestock, Cri
tical sections to protect shared \up0 \expndtw-2\charscalex100 resources, pr
iority inversion. \par\pard\ql \li2829\sb213\sl-230\slmult0 \up0 \expndtw-2\char
scalex100 \ul0\nosupersub\cf3\f4\fs20 Soft Real-Time Services: \par\pard\ql \li2
Missed Deadlines, QoS, Alternatives to rate monotonic policy, Mixed hard \par
\pard\li2829\sb20\sl-230\slmult0\fi0\tx8037 \up0 \expndtw-2\charscalex100 and so
ft real-time services.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\
0 UNIT 6 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-4\charscalex100
Embedded System Components: \par\pard\ql \li5769\sb72\sl-276\slmult0 \up0 \exp
ndtw-3\charscalex100 \ul0\nosupersub\cf2\f3\fs24 109
Width}{\sv 18812}}
g106}{\bkmkend Pg106}\par\pard\qj \li2829\sb0\sl-220\slmult0 \par\pard\qj\li2829
\sb0\sl-220\slmult0 \par\pard\qj\li2829\sb0\sl-220\slmult0 \par\pard\qj\li2829\s
b0\sl-220\slmult0 \par\pard\qj\li2829\ri3303\sb119\sl-220\slmult0 \up0 \expndtw2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Firmware components, RTOS system sof
tware mechanisms, Software \up0 \expndtw-2\charscalex100 application components.
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Debugging Components:
\par\pard\qj \li2829\ri3125\sb0\sl-230\slmult0 \up0 \expndtw-1\charscalex100 \u
l0\nosupersub\cf4\f5\fs20 Execptions assert, Checking return codes, Single-step
debugging, kernel \line \up0 \expndtw-1\charscalex100 scheduler traces, Test acc
ess ports, Trace ports, Power-On self test and \line \up0 \expndtw-2\charscalex1
00 diagnostics, External test equipment, Application-level debugging. \par\pard\
f4\fs20 7 Hrs \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex
100 UNIT 7 \par\pard\ql \li2829\sb13\sl-230\slmult0 \up0 \expndtw-2\charscalex10
0 Performance Tuning: \par\pard\qj \li2829\ri3098\sb0\sl-230\slmult0 \up0 \expnd
tw-1\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Basic concepts of drill-down tuni
ng, hardware - supported profiling and \line \up0 \expndtw-2\charscalex100 traci
ng, Building performance monitoring into software, Path length, \line \up0 \expn
dtw-3\charscalex100 Efficiency, and Call frequency, Fundamental optimizations.
\up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \l
i2829\sb220\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT 8 \par\pard\ql \li
2829\sb10\sl-230\slmult0 \up0 \expndtw-2\charscalex100 High availability and Rel
iability Design: \par\pard\qj \li2829\ri2716\sb0\sl-230\slmult0 \up0 \expndtw-1\
charscalex100 \ul0\nosupersub\cf4\f5\fs20 Reliability and Availability, Similari
ties and differences, Reliability, Reliable \up0 \expndtw-1\charscalex100 softwa
re, Available software, Design trade offs, Hierarchical applications for \up0 \e
xpndtw-2\charscalex100 Fail-safe design. \par\pard\ql \li2829\sb220\sl-230\slmul
t0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Design of RTOS - \u
l0\nosupersub\cf4\f5\fs20 PIC microcontroller.\ul0\nosupersub\cf3\f4\fs20 (Chap
13 of book Myke Predko) \par\pard\ql \li7931\sb10\sl-230\slmult0 \up0 \expndtw2\charscalex100 7 Hrs \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\ch
arscalex100 References: \par\pard\li3189\sb0\sl-230\slmult0\par\pard\li3189\sb11
\sl-230\slmult0\fi0\tx3549 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\
fs20 1.\tab \up0 \expndtw-2\charscalex100 \u8220?\ul0\nosupersub\cf3\f4\fs20 Rea
l-Time Embedded Systems and Components\u8221? , \ul0\nosupersub\cf4\f5\fs20 Sam

Siewert,\par\pard\li3189\sb1\sl-230\slmult0\fi360 \up0 \expndtw-2\charscalex100
Cengage Learning India Edition, 2007.\par\pard\li3189\sb0\sl-230\slmult0\fi0\tx3
549 \up0 \expndtw-2\charscalex100 2.\tab \up0 \expndtw-2\charscalex100 \u8220?\u
l0\nosupersub\cf3\f4\fs20 Programming and Customizing the PIC microcontroller\u
8221? ,\par\pard\li3189\sb1\sl-230\slmult0\fi360 \up0 \expndtw-2\charscalex100 \
ul0\nosupersub\cf4\f5\fs20 Myke Predko, 3\ul0\super\cf17\f18\fs19 rd\ul0\nosuper
sub\cf4\f5\fs20 Ed, TMH, 2008\par\pard\ql \li5769\sb0\sl-276\slmult0 \par\pard\
rscalex100 \ul0\nosupersub\cf2\f3\fs24 110 \par\pard\sect\sectd\fs24\paperw11900
\paperh16840\pard\sb0\sl-240{\bkmkstart Pg107}{\bkmkend Pg107}\par\pard\ql \li57
b70\sl-230\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf3\f4\fs20 GSM
\par\pard\li2855\sb0\sl-230\slmult0\par\pard\li2855\sb9\sl-230\slmult0\fi0\tx49
43\tx7103\tx8544 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subje
ct Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC843\
tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0
\expndtw-2\charscalex100 : 25\par\pard\li2855\sb1\sl-230\slmult0\fi0\tx7103\tx85
43 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw2\charscalex100 Exam Hours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li285
5\sb0\sl-230\slmult0\fi0\tx4943\tx7103\tx8543 \up0 \expndtw-2\charscalex100 Tota
l no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2
\charscalex100 Exam Marks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \l
20 UNIT - 1 \par\pard\qj \li2829\ri2674\sb0\sl-230\slmult0 \up0 \expndtw0\charsc
alex100 GSM ARCHITECTURE AND INTERFACES:\ul0\nosupersub\cf4\f5\fs20
Int
roduction, GSM \line \up0 \expndtw0\charscalex101 frequency bands, GSM PLMN, O
bjectives of a GSM PLMN, GSM PLMN \line \up0 \expndtw-1\charscalex100 Services,
GSM Subsystems, GSM Subsystems entities, GSM interfaces, The \line \up0 \expndtw
0\charscalex100 radio interface (MS to BSC), A\ul0\sub\cf17\f18\fs19 bits\ul0\no
supersub\cf4\f5\fs20 interface (BTS to BSC), A interface (BSC \line \up0 \expnd
tw0\charscalex100 to MSC), Interfaces between other GSM entities, Mapping of GSM
layers \par\pard\li2829\sb0\sl-230\slmult0\fi0\tx7836 \up0 \expndtw-2\charscale
x100 onto OSI layers.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\f
s20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb120\sl-23
0\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 UNIT - 2 \pa
r\pard\qj \li2829\ri2674\sb10\sl-230\slmult0 \up0 \expndtw-1\charscalex100 \ul0\
nosupersub\cf3\f4\fs20 RADIO LINK FEATURES IN GSM SYSTEMS:\ul0\nosupersub\cf4\f5
\fs20 Introduction, Radio link \line \up0 \expndtw0\charscalex104 measurements,
Radio link features of GSM, Dynamic power control, \line \up0 \expndtw1\charscalex100 Discontinuous transmission \up0 \expndtw0\charscalex104 (DTX),
SFH, Future techniques to reduce \par\pard\li2829\sb9\sl-230\slmult0\fi0\tx
8068 \up0 \expndtw-2\charscalex100 interface in GSM, Channel borrowing, Smart an
tenna.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\p
ard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb161\sl-230\slmult0 \up0
\expndtw-2\charscalex100 UNIT - 3 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \
expndtw0\charscalex102 GSM
LOGICAL
CHANNELS
AND
FRAME
STRUCTURE:
\par\pard\qj \li2829\ri2676\sb0\sl-233\slmult0 \up0 \expndtw0\charscalex100 \ul0
\nosupersub\cf4\f5\fs20 Introduction, GSM logical channels, Allowed logical chan
nel combinations, \line \up0 \expndtw-1\charscalex100 TCH multi frame for TCH/H,
CCH multi frame, GSM frame structure, GSM \line \up0 \expndtw0\charscalex103 bu
rsts, Normal burst, Synchronization burst, Frequency correction channel \line \u
p0 \expndtw0\charscalex103 burst, Access burst, Data encryption in GSM, M
obility management, \par\pard\li2829\sb1\sl-226\slmult0\fi0\tx8198 \up0 \expndt
w-2\charscalex100 Location registration, Mobile identification.\tab \up0 \expndt

w-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb0\sl-2
0 UNIT - 4 \par\pard\qj \li2829\ri2674\sb0\sl-228\slmult0 \up0 \expndtw-2\charsc
alex100 SPEECH CODING IN GSM:\ul0\nosupersub\cf4\f5\fs20 Introduction, Speech c
oding methods, Speech \up0 \expndtw0\charscalex104 code attributes, Transmission
bit rate, Delay, Complexity, Quality, LPAS, \up0 \expndtw0\charscalex102 ITU-T
standards, Bit rate, Waveform coding, Time domain waveform \up0 \expndtw
0\charscalex102 coding, Frequency domain waveform coding, Vocoders, Full-rate vo
coder, \up0 \expndtw0\charscalex101 Half-rate vocoder. MESSAGES, SERVICES, A
ND CALL FLOWS IN \up0 \expndtw-2\charscalex100 GSM: Introduction, GSM PLMN se
rvices. \par\pard\ql \li8222\sb3\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \u
l0\nosupersub\cf3\f4\fs20 7 Hrs \par\pard\ql \li5769\sb152\sl-276\slmult0 \up0 \
expndtw-3\charscalex100 \ul0\nosupersub\cf2\f3\fs24 111
}
}}
}
}}
Width}{\sv 18812}}
alex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 5 \par\pard\qj \li2829\ri2675\sb0\sl235\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 GSM message
s, MS-BS interface, BS to MSC messages on the A interface, \line \up0 \expndtw0\
charscalex100 MSC to VLR and HLR, GSM call setup by an MS, Mobile-Terminated cal
l, \line \up0 \expndtw0\charscalex100 Call release, Handover. Data services, Int
roduction, Data interworking, GSM \line \up0 \expndtw0\charscalex100 data servic
es, Interconnection for switched data, Group 3 fax, Packet data on \line \up0 \e
xpndtw-2\charscalex100 the signaling channel, User-to-user signaling, SMS, GSM G
PRS. \par\pard\ql \li8121\sb1\sl-199\slmult0 \up0 \expndtw-2\charscalex100 \ul0\
nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb136\sl-230\slmult0 \up0 \exp
ndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 UNIT - 6 \par\pard\qj \li2829\r
s20 PRIVACY AND SECURITY IN GSM:\ul0\nosupersub\cf4\f5\fs20 Introduction,
Wireless security \up0 \expndtw0\charscalex102 requirements, Privacy of com
munications, Authentication requirements, \up0 \expndtw0\charscalex104 System

lifetime requirements, Physical requirements, SIM cards, Security \up0 \expndtw0
\charscalex100 algorithms for GSM, Token-based authentication, Token-based regis
tration, \up0 \expndtw-2\charscalex100 Token-based challenge. \par\pard\ql \li81
21\sb1\sl-217\slmult0 \up0 \expndtw-9\charscalex95 6 Hrs \par\pard\ql \li2829\
sb133\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 U
NIT - 7 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex101 PLA
NNING AND DESIGN OF A GSM WIRELESS NETWORK: \par\pard\qj \li2829\ri2674\s
b13\sl-230\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 Intr
oduction, Tele traffic models, Call model, Topology model, Mobility in \line \up
0 \expndtw0\charscalex104 cellular / PCS networks, Application of a fluid flow
model, Planning of a \line \up0 \expndtw0\charscalex103 wireless network, Radio
design for a cellular / PCS network, Radio link \line \up0 \expndtw0\charsc
alex103 design, Coverage planning, Design of a wireless system,
Service \line \up0 \expndtw-1\charscalex100 requirements, Constraints for har
dware implementation, Propagation path \line \up0 \expndtw0\charscalex100 los
s, System requirements, Spectral efficiency of a wireless system, Receiver \line
\up0 \expndtw0\charscalex100 sensitivity and link budget, Selection of mo
dulation scheme, Design of \line \up0 \expndtw0\charscalex102 TDMA frame, Rel
ationship between delay spread and symbol rate, Design \line \up0 \expndtw-2\cha
rscalex100 example for a GSM system. \par\pard\ql \li7970\sb1\sl-217\slmult0 \up
UNIT - 8 \par\pard\qj \li2829\ri2674\sb10\sl-230\slmult0 \up0 \expndtw0\charsca
lex103 \ul0\nosupersub\cf3\f4\fs20 MANAGEMENT OF GSM NETWORKS:\ul0\nosupersub
\cf4\f5\fs20 Introduction, Traditional \line \up0 \expndtw0\charscalex102 app
roaches to NM, TMN, TMN layers, TMN nodes, TMN interface, TMN \line \up0 \expndt
w0\charscalex100 management services, Management requirements for wireless
networks, \line \up0 \expndtw0\charscalex102 Management of radio resources, Per
sonal mobility management, Terminal \line \up0 \expndtw0\charscalex100 mobility,
Service mobility management, Platform-centered management, \line \up0 \exp
ndtw-1\charscalex100 SNMP, OSI systems management, NM interface and funct
ionality, NMS \line \up0 \expndtw0\charscalex100 functionality, OMC functiona
lity, Management of GSM network, TMN \line \up0 \expndtw0\charscalex101 app
lications, GSM information model, GSM containment tree, Future work \line \up0 \
expndtw-2\charscalex100 items. \par\pard\ql \li8121\sb1\sl-217\slmult0 \up0 \exp
ndtw-2\charscalex100 7 Hrs \par\pard\ql \li5769\sb0\sl-276\slmult0 \par\pard\ql\
li5769\sb119\sl-276\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf2\f3
\fs24 112
}
}}
}

}}
}
}}
}
alex100 \ul0\nosupersub\cf3\f4\fs20 TEXT BOOK: \par\pard\li2829\sb9\sl-230\slmul
t0\fi360\tx3549 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f5\fs20 1.\tab
\up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Principles of Ap
plications of GSM\u8221?\ul0\nosupersub\cf4\f5\fs20 , Vijay K. Garg & Joseph E.\
par\pard\li2829\sb0\sl-230\slmult0\fi720 \up0 \expndtw0\charscalex100 Wilkes, Pe
arson education/ PHI, 1999.\par\pard\li2829\sb97\sl-230\slmult0\fi0 \up0 \expndt
w0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS:\par\pard\li2829\sb
0\sl-225\slmult0\fi360\tx3549 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf4\f
5\fs20 1.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 GSM: Evo
lution towards 3\ul0\super\cf33\f34\fs19 rd\ul0\nosupersub\cf3\f4\fs20 Gener
ation Systems\ul0\nosupersub\cf4\f5\fs20 , (Editor), Z.\par\pard\li2829\sb2\s
l-230\slmult0\fi719 \up0 \expndtw0\charscalex100 Zvonar Peter Jung, Karl Kammerl
ander Springer; 1\ul0\super\cf17\f18\fs19 st\ul0\nosupersub\cf4\f5\fs20
editi
on 1998\par\pard\li2829\sb5\sl-230\slmult0\fi360\tx3549 \up0 \expndtw0\charsca
lex100 2.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 GSM
&
UMTS:
The
Creation
of
Global
Mobile\par\pard\li2829\sb6\sl-261
\slmult0\fi720 \up0 \expndtw0\charscalex100 Communication, \ul0\nosupersub\cf34\
f35\fs24 Friedhelm Hillebrand\ul0\nosupersub\cf4\f5\fs20 , John Wiley & Sons;\pa
r\pard\li2829\sb5\sl-230\slmult0\fi719 \up0 \expndtw0\charscalex100 2001.\par\pa
sb0\sl-230\slmult0\par\pard\li2829\sb4\sl-230\slmult0\fi1584 \up0 \expndtw-2\cha
rscalex100 \ul0\nosupersub\cf3\f4\fs20 ADHOC WIRELESS NETWORKS\par\pard\li2829\s
b157\sl-230\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \expndtw-2\charscalex100 \ul0\
nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expndtw-2\charscalex100 : \ul0\nos
upersub\cf3\f4\fs20 10EC844\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf
4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscalex100 : 25\par\pard\li2829\sb0\sl
-230\slmult0\fi0\tx7077\tx8517 \up0 \expndtw-2\charscalex100 No. of Lecture Hrs/
Week : 04\tab \up0 \expndtw-2\charscalex100 Exam Hours\tab \up0 \expndtw-2\chars
calex100 : 03\par\pard\li2829\sb0\sl-228\slmult0\fi0\tx4917\tx7077\tx8517 \up0 \
expndtw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0 \expndtw-2\charscalex
100 : 52\tab \up0 \expndtw-2\charscalex100 Exam Marks\tab \up0 \expndtw-2\charsc

alex100 : 100\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb204\s
l-230\slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 1
\par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charscalex100 AD HOC NE
TWORKS:\ul0\nosupersub\cf4\f5\fs20 Introduction, Issues in Ad hoc wireless netw
orks, \par\pard\li2829\sb18\sl-230\slmult0\fi0\tx7680 \up0 \expndtw-2\charscalex
100 Ad hoc wireless internet.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\
cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb225\sl-230\slmult0 \up0 \expndtw-4\chars
calex100 UNIT - 2 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \expndtw-2\charsc
alex100 MAC PROTOCOLS FOR AD HOC WIRELESS NETWORKS: \par\pard\qj \li
2829\ri2675\sb21\sl-220\slmult0 \up0 \expndtw-1\charscalex100 \ul0\nosupersub\cf
4\f5\fs20 Introduction, Issues in designing a MAC protocol for Ad hoc
wireless \line \up0 \expndtw-2\charscalex100 Networks, Design goals of a MAC pro
tocol for Ad hoc wireless Networks, \par\pard\li2829\sb17\sl-230\slmult0\fi0\tx7
999 \up0 \expndtw-1\charscalex100 Classification of MAC protocols.\tab \up0 \exp
ndtw-1\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\li2829\sb0\sl-23
0\slmult0\par\pard\li2829\sb6\sl-230\slmult0\fi0 \up0 \expndtw-1\charscalex100 U
NIT - 3\par\pard\li2829\sb1\sl-221\slmult0\fi0\tx3842 \up0 \expndtw-1\charscalex
100 \ul0\nosupersub\cf4\f5\fs20 Contention\tab \up0 \expndtw-1\charscalex100 based MAC protocols with scheduling mechanism, MAC\par\pard\li2829\sb2\sl230\slmult0\fi0\tx8051 \up0 \expndtw-1\charscalex100 protocols that use directio
nal antennas, Other MAC protocols.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupe
rsub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb226\sl-230\slmult0 \up0 \expndtw-4\
charscalex100 UNIT - 4 \par\pard\ql \li2829\sb10\sl-230\slmult0 \up0 \expndtw-1\
charscalex100 ROUTING PROTOCOLS FOR AD HOC WIRELESS NETWORKS: \par\pard\qj \li2
829\ri2674\sb0\sl-220\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf4\
f5\fs20 Introduction, Issues in designing a routing protocol for Ad hoc
wireless \line \up0 \expndtw-3\charscalex100 Networks, Classification of routi
ng protocols, Table drive routing protocol, \par\pard\li2829\sb15\sl-230\slmult0
\fi0\tx8119 \up0 \expndtw-2\charscalex100 On-demand routing protocol.\tab \up0 \
0\sl-276\slmult0 \par\pard\ql\li5769\sb192\sl-276\slmult0 \up0 \expndtw-5\charsc
Width}{\sv 18812}}
alex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 5 \par\pard\qj \li2829\ri2674\sb0\sl240\slmult0 \up0 \expndtw0\charscalex102 \ul0\nosupersub\cf4\f5\fs20 Hybrid ro
uting protocol, Routing protocols with effective flooding \line \up0
\expndtw-1\charscalex100 mechanisms, Hierarchical routing protocols, Power awar
e routing protocols. \par\pard\ql \li8071\sb1\sl-218\slmult0 \up0 \expndtw-2\cha
rscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb133\sl-230\s
lmult0 \up0 \expndtw-2\charscalex100 UNIT - 6 \par\pard\qj \li2829\ri2674\sb19\s
l-220\slmult0\fi0 \up0 \expndtw0\charscalex101 TRANSPORT LAYER PROTOCOLS FOR
AD HOC WIRELESS \line \up0 \expndtw0\charscalex102 NETWORKS:\ul0\nosupersub\c
f4\f5\fs20 Introduction, Issues in designing a transport layer protocol \line \
up0 \expndtw0\charscalex100 for Ad hoc wireless Networks, Design goals of a tran
sport layer protocol for \par\pard\li2829\sb20\sl-230\slmult0\fi0\tx8097 \up0 \e
xpndtw-2\charscalex100 Ad hoc wireless Networks.\tab \up0 \expndtw-2\charscalex1
lt0\fi0 \up0 \expndtw0\charscalex100 SECURITY:\ul0\nosupersub\cf4\f5\fs20 Secu
rity in wireless Ad hoc wireless Networks, Network \up0 \expndtw-2\charsc
alex100 security requirements, Issues & challenges in security provisioning. \pa
r\pard\ql \li8020\sb1\sl-218\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupers
ub\cf3\f4\fs20 6 Hrs \par\pard\ql \li2829\sb3\sl-217\slmult0 \up0 \expndtw-2\cha

rscalex100 UNIT - 8 \par\pard\ql \li2829\sb13\sl-230\slmult0 \up0 \expndtw0\char
scalex100 QUALITY OF SERVICE IN AD HOC WIRELESS NETWORKS: \par\pard\ql \l
i2829\sb1\sl-217\slmult0 \up0 \expndtw0\charscalex104 \ul0\nosupersub\cf4\f5\fs2
0 Introduction, Issues and challenges in providing QoS in Ad hoc wireless \par
\pard\li2829\sb10\sl-230\slmult0\fi0\tx8003 \up0 \expndtw-2\charscalex100 Networ
ks, Classification of QoS solutions.\tab \up0 \expndtw-2\charscalex100 \ul0\nosu
persub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2
9\sb3\sl-230\slmult0 \up0 \expndtw-2\charscalex100 TEXT BOOK: \par\pard\ql \li31
89\ri2674\sb0\sl-220\slmult0\tx3549\tx3549 \up0 \expndtw-3\charscalex100 \ul0\no
supersub\cf4\f5\fs20 3. \tab \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf3\f
4\fs20 \u8220?Ad hoc wireless Networks\u8221?\ul0\nosupersub\cf4\f5\fs20 , C. Si
va Ram Murthy & B. S. Manoj, \line\tab \up0 \expndtw-4\charscalex100 Pearson Edu
cation, 2\ul0\super\cf17\f18\fs19 nd\ul0\nosupersub\cf4\f5\fs20 Edition, reprin
t 2005. \par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb21\sl-230\
slmult0 \up0 \expndtw-4\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOK
S: \par\pard\li3189\sb1\sl-225\slmult0\fi0\tx3549 \up0 \expndtw-1\charscalex100
\ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex100 \ul0\nosupersub
\cf3\f4\fs20 \u8220?Ad hoc wireless Networks\u8221?\ul0\nosupersub\cf4\f5\fs2
0 , Ozan K. Tonguz and Gianguigi\par\pard\li3189\sb1\sl-230\slmult0\fi360 \
up0 \expndtw-1\charscalex100 Ferrari, Wiley\par\pard\li3189\sb1\sl-230\slmult0\f
i0\tx3549 \up0 \expndtw-1\charscalex100 2.\tab \up0 \expndtw-1\charscalex100 \ul
0\nosupersub\cf3\f4\fs20 \u8220?Ad hoc wireless Networking\u8221?\ul0\nosupersub
\cf4\f5\fs20 , Xiuzhen Cheng, Xiao Hung, Ding-\par\pard\li3189\sb0\sl-230\slmult
0\fi359 \up0 \expndtw-1\charscalex100 Zhu Du, Kluwer Academic publishers.\par\pa
rd\ql \li5769\sb0\sl-276\slmult0 \par\pard\ql\li5769\sb0\sl-276\slmult0 \par\par
i5769\sb7\sl-276\slmult0 \up0 \expndtw-5\charscalex100 \ul0\nosupersub\cf2\f3\fs
24 114 \par\pard\sect\sectd\fs24\paperw11900\paperh16840\pard\sb0\sl-240{\bkmkst
art Pg111}{\bkmkend Pg111}\par\pard\ql \li4835\sb0\sl-230\slmult0 \par\pard\ql\l
harscalex100 \ul0\nosupersub\cf3\f4\fs20 OPTICAL COMPUTING \par\pard\li2855\sb0\
sl-230\slmult0\par\pard\li2855\sb9\sl-230\slmult0\fi0\tx4943\tx7103\tx8544 \up0
\expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 Subject Code\tab \up0 \expn
dtw-2\charscalex100 : \ul0\nosupersub\cf3\f4\fs20 10EC845\tab \up0 \expndtw-2\ch
arscalex100 \ul0\nosupersub\cf4\f5\fs20 IA Marks\tab \up0 \expndtw-2\charscalex1
00 : 25\par\pard\li2855\sb1\sl-230\slmult0\fi0\tx7103\tx8543 \up0 \expndtw-2\cha
rscalex100 No. of Lecture Hrs/Week : 04\tab \up0 \expndtw-2\charscalex100 Exam H
ours\tab \up0 \expndtw-2\charscalex100 : 03\par\pard\li2855\sb0\sl-230\slmult0\f
i0\tx4943\tx7103\tx8543 \up0 \expndtw-2\charscalex100 Total no. of Lecture Hrs.\
tab \up0 \expndtw-2\charscalex100 : 52\tab \up0 \expndtw-2\charscalex100 Exam Ma
rks\tab \up0 \expndtw-2\charscalex100 : 100\par\pard\ql \li2829\sb0\sl-230\slmul
t0 \par\pard\ql\li2829\sb230\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\n
osupersub\cf3\f4\fs20 UNIT - 1 \par\pard\ql \li2829\sb1\sl-217\slmult0 \up0 \exp
ndtw0\charscalex100 MATHEMATICAL AND DIGITAL IMAGE FUNDAMENTALS: \par\pa
rd\qj \li2829\ri2675\sb21\sl-220\slmult0 \up0 \expndtw0\charscalex100 \ul0\nosup
ersub\cf4\f5\fs20 Introduction, Fourier Transform, discrete Fourier transform, b
asic diffraction \line \up0 \expndtw0\charscalex100 theory, Fourier transform pr
operty of lens , sampling and quantization, image \par\pard\li2829\sb12\sl-230\s
lmult0\fi0\tx7828 \up0 \expndtw-2\charscalex100 enhancement, image restoration.\
\li2829\sb230\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 2 \par\pard\qj
\li2829\ri2677\sb0\sl-240\slmult0 \up0 \expndtw-2\charscalex100 LINER OPTICAL P
ROCESSING:\ul0\nosupersub\cf4\f5\fs20 Introduction, photographic film, spatial
\up0 \expndtw-1\charscalex100 filtering using binary filters, holography, invers
e filtering, Deblurring. \par\pard\ql \li7869\sb1\sl-193\slmult0 \up0 \expndtw-2

\slmult0 \up0 \expndtw0\charscalex100 ANALOG OPTICAL ARITHMETIC: \ul0\nosupersub
\cf4\f5\fs20 Introduction, Halftone processing, \par\pard\li2829\sb12\sl-230\slm
ult0\fi0\tx7886 \up0 \expndtw-2\charscalex100 nonlinear optical processing, Arit
hmetic operations.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20
6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb1\sl-230\slm
ult0 \up0 \expndtw-2\charscalex100 UNIT - 4 \par\pard\qj \li2829\ri2675\sb0\sl-2
30\slmult0 \up0 \expndtw-1\charscalex100 RECOGNITION USING ANALOG OPTICAL SYSTEM
S: \ul0\nosupersub\cf4\f5\fs20 Introduction, \line \up0 \expndtw0\charscalex100
Matched filter, Joint transform correlation, Phase-only filter, Amplitude
\line \up0 \expndtw0\charscalex100 modulated recognition filters, General
ized correlation filter, Melllin \par\pard\li2829\sb1\sl-228\slmult0\fi0\t
x7982 \up0 \expndtw-2\charscalex100 transform based correlation.\tab \up0 \expnd
tw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb0\sl230\slmult0 \par\pard\ql\li2829\sb2\sl-230\slmult0 \up0 \expndtw-2\charscalex100
UNIT - 5 \par\pard\qj \li2829\ri2674\sb0\sl-220\slmult0 \up0 \expndtw0\charscal
ex100 DIGITAL OPTICAL COMPUTING DEVICES: \ul0\nosupersub\cf4\f5\fs20 Introductio
n, Nonlinear \line \up0 \expndtw0\charscalex100 devices, Integrated optics, Thre
shold devices, Spatial high modulators, Theta \par\pard\li2829\sb19\sl-230\slmul
t0\fi0\tx8092 \up0 \expndtw-2\charscalex100 modulation devices.\tab \up0 \expndt
w-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb222\sl
-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 6 \par\pard\qj \li2829\ri2674\
sb14\sl-226\slmult0 \up0 \expndtw-2\charscalex100 SHADOW-CASTING AND SYMBOLIC SU
BSTITUTION: \ul0\nosupersub\cf4\f5\fs20 Introduction, \line \up0 \expndtw0\chars
calex100 Shadow casting system and design algorithm, POSC logic operations, POSC
\line \up0 \expndtw0\charscalex103 multiprocessor, Parallel ALU using POSC, Seq
uential ALU using POSC, \line \up0 \expndtw0\charscalex100 POSC image processing
, Symbolic substitutions, Optical implementation of \par\pard\li2829\sb10\sl-230
\slmult0\fi0\tx8102 \up0 \expndtw-2\charscalex100 symbolic substitution, Limitat
ions and challenges.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs
20 7 Hrs\par\pard\ql \li5769\sb0\sl-276\slmult0 \par\pard\ql\li5769\sb237\sl-276
\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nosupersub\cf2\f3\fs24 115
Width}{\sv 18812}}
alex100 \ul0\nosupersub\cf3\f4\fs20 UNIT - 7 \par\pard\qj \li2829\ri2675\sb0\sl240\slmult0 \up0 \expndtw0\charscalex102 OPTICAL MATRIX PROCESSING: I\ul0\
nosupersub\cf4\f5\fs20 ntroduction, Multiplication, \line \up0 \expndtw0\chars
calex103 Multiplication using convolution, Matrix operations, Cellular
logic \par\pard\li2829\sb1\sl-218\slmult0\fi0\tx8063 \up0 \expndtw-2\charscal
ex100 architecture, Programmable logic array.\tab \up0 \expndtw-2\charscalex100
\ul0\nosupersub\cf3\f4\fs20 6 Hrs\par\pard\ql \li2829\sb0\sl-230\slmult0 \par\pa
rd\ql\li2829\sb123\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 8 \par\pa
rd\qj \li2829\ri2674\sb0\sl-220\slmult0 \up0 \expndtw0\charscalex100 ARTIFICIAL
INTELLIGENT COMPUTATIONS: \ul0\nosupersub\cf4\f5\fs20 Introduction, Neural \line
\up0 \expndtw0\charscalex100 networks, Associative memory, Optical implementati
ons, Interconnections, \par\pard\li2829\sb15\sl-230\slmult0\fi0\tx8059 \up0 \exp
ndtw-2\charscalex100 Artificial Intelligence.\tab \up0 \expndtw-2\charscalex100
\ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\li2829\sb0\sl-230\slmult0\par\pard\li
2829\sb0\sl-230\slmult0\par\pard\li2829\sb119\sl-230\slmult0\fi0 \up0 \expndtw-2
\charscalex100 TEXT BOOK:\par\pard\li2829\sb0\sl-226\slmult0\fi360\tx3549 \up0 \
expndtw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 2.\tab \up0 \expndtw-2\chars
calex100 \ul0\nosupersub\cf3\f4\fs20 \u8220?Optical Computing An Introduction
\u8221?\ul0\nosupersub\cf4\f5\fs20 , Mohammed A. Karim,\par\pard\li2829\sb1\s
l-230\slmult0\fi720 \up0 \expndtw-2\charscalex100 John Wiley & Sons, 1992.\par\p

ard\li2829\sb0\sl-230\slmult0\par\pard\li2829\sb121\sl-230\slmult0\fi0 \up0 \exp
ndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS:\par\pard\li2829
\sb1\sl-221\slmult0\fi360\tx3549 \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf
4\f5\fs20 1.\tab \up0 \expndtw0\charscalex100 \ul0\nosupersub\cf3\f4\fs20 Optica
l Signal Processing\ul0\nosupersub\cf4\f5\fs20 by Vanderlugnt John willy & sons
NY\par\pard\li2829\sb3\sl-230\slmult0\fi720 \up0 \expndtw0\charscalex100 1992.\
par\pard\ql \li3189\ri2674\sb18\sl-240\slmult0\tx3549 \up0 \expndtw0\charscalex1
01 \ul0\nosupersub\cf2\f3\fs24 2.\ul0\nosupersub\cf47\f48\fs24 \ul0\nosupersub\
cf3\f4\fs20 Signal Processing in Optics\ul0\nosupersub\cf4\f5\fs20 - Bradly G
Boore Oxford University \line\tab \up0 \expndtw-4\charscalex100 Press 1998. \par
harscalex100 \ul0\nosupersub\cf2\f3\fs24 116 \par\pard\sect\sectd\fs24}

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lt0\fi0\tx4264\tx4737\tx6537\tx7977\tx8759 \up0 \expndtw-2\charscalex100 Hrs/ We

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ard\ql\li2829\sb218\sl-230\slmult0 \up0 \expndtw0\charscalex100 UNIT - 3: \par\p

t0\fi0\tx8191 \up0 \expndtw-2\charscalex100 (e) Introduction to LabView.\tab \up

tw-2\charscalex100 \ul0\nosupersub\cf4\f5\fs20 operator\tab \up0 \expndtw-2\char

tx8102 \up0 \expndtw-2\charscalex100 effect).\tab \up0 \expndtw-2\charscalex100

ql \li2829\sb229\sl-230\slmult0 \up0 \expndtw-4\charscalex100 12. Characteristic

r\pard\ql\li5834\sb0\sl-184\slmult0 \par\pard\ql\li5834\sb0\sl-184\slmult0 \par\

tial \up0 \expndtw-4\charscalex100 equations: Picard\u8217?s method, Runge-Kutta

{\sp{\sn pSegmentInfo}{\sv 2;10;16384;45824;1;45824;1;45824;1;45824;24577;32768}

{\sp{\sn pSegmentInfo}{\sv 2;10;16384;45824;1;45824;1;45824;1;45824;24577;32768}

{\sp{\sn pSegmentInfo}{\sv 2;10;16384;45824;1;45824;1;45824;1;45824;24577;32768}

ql \li2829\sb13\sl-230\slmult0 \up0 \expndtw-4\charscalex100 Text Books: \par\pa

29\sb7\sl-215\slmult0 \up0 \expndtw-4\charscalex100 instructions, Arithmetic ins

subsystem. Key differentiating factors between \par\pard\li2829\sb1\sl-204\slmu

-ROM,\ul0\nosupersub\cf4\f5\fs20 Texas Instruments, 2008 (can be\par\pard\li318

l \li2829\sb10\sl-230\slmult0 \up0 \expndtw0\charscalex107 Root-Locus Techniqu

b Code\tab \up0 \expndtw-2\charscalex100 :\tab \up0 \expndtw-2\charscalex100 10E

rscalex100 \ul0\nosupersub\cf3\f4\fs20 7 Hrs\par\pard\ql \li2829\sb216\sl-230\sl

t0\fi0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 REFERENCE BOOKS

expndtw0\charscalex102 Op-Amps frequency response and compensation:\ul0\nosu

f4\fs20 \u8220?Linear Integrated Circuits\u8221?, \ul0\nosupersub\cf4\f5\fs20 D.

74\sb0\sl-240\slmult0\tx3069 \up0 \expndtw-1\charscalex100 7. Programs to genera

\charscalex100 4 bit binary to gray converter\par\pard\ql \li3189\sb1\sl-216\slm

\pard\li2829\sb0\sl-228\slmult0\fi0\tx3189\tx3950\tx6895 \up0 \expndtw0\charscal

{\sp{\sn pSegmentInfo}{\sv 2;9;16384;45824;1;45824;1;45824;1;45824;32768}}

g28}{\bkmkend Pg28}\par\pard\ql \li5339\sb0\sl-230\slmult0 \par\pard\ql\li5339\s

\slmult0\fi0\tx8294 \up0 \expndtw-2\charscalex100 system - Methods of establishi

\pard\ql \li2829\sb0\sl-230\slmult0 \par\pard\ql\li2829\sb141\sl-230\slmult0 \up

8\sl-230\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 3 \par\pard\ql \li2829\sb1

par\pard\li2829\sb0\sl-228\slmult0\fi720 \up0 \expndtw-1\charscalex100 Applicati

{\sp{\sn pVerticies}{\sv 8;4;(0,20);(2638,20);(2638,0);(0,0)}}

\par\pard\ql \li7811\sb11\sl-230\slmult0 \up0 \expndtw-3\charscalex100 \ul0\nos

pndtw-1\charscalex100 TEXT BOOKS\ul0\nosupersub\cf4\f5\fs20 :\par\pard\li2829\sb

PERFORMANCE: \ul0\nosupersub\cf4\f5\fs20 Source coding \line \up0 \expndtw

India Pvt. Ltd, 2008\par\pard\li3189\sb1\sl-230\slmult0\fi0\tx3549 \up0 \expndtw

100 12.\ul0\nosupersub\cf15\f16\fs20 \ul0\nosupersub\cf4\f5\fs20 Circular conv

100 \ul0\nosupersub\cf4\f5\fs20 1.\tab \up0 \expndtw-1\charscalex100 Second orde

7\tx7077\tx8517 \up0 \expndtw-2\charscalex100 Total no. of Lecture Hrs.\tab \up0

es, Macros, \par\pard\li2829\sb17\sl-230\slmult0\fi0\tx8023 \up0 \expndtw-2\ch

harscalex100 microprocessor, Special\tab \up0 \expndtw-1\charscalex100 80386

gnal \line \up0 \expndtw-1\charscalex100 Operation and Models, MOSFET as an ampl

oadside array. \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 6 \par\

ce propagation, ground reflection, surface wave, diffraction. \line \up0 \expndt

operating systems.\tab \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs2

arscalex100 process communication in UNIX.\tab \up0 \expndtw-1\charscalex100 7\u

Bit manipulation instructions like checking: \par\pard\ql \li4269\ri3727\sb0\

sl-161\slmult0 \par\pard\ql\li5551\sb127\sl-161\slmult0 \up0 \expndtw-1\charscal

{\sp{\sn fFillOK}{\sv 1}}{\sp{\sn fFilled}{\sv 1}}{\sp{\sn fillColor}{\sv 65535}

{\sp{\sn fFillOK}{\sv 1}}{\sp{\sn fFilled}{\sv 1}}{\sp{\sn fillColor}{\sv 65535}

{\sp{\sn fFillOK}{\sv 1}}{\sp{\sn fFilled}{\sv 1}}{\sp{\sn fillColor}{\sv 65535}

\line \up0 \expndtw0\charscalex100 MOSFET Switch (upto Bidirectional Switches),

b100\sl-230\slmult0 \up0 \expndtw-2\charscalex100 \ul0\nosupersub\cf3\f4\fs20 SA

30\slmult0 \up0 \expndtw-2\charscalex100 UNIT - 7 & 8 \par\pard\ql \li2829\sb1\s