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1

Compal Confidential

QCL40 MB Schematic Document


LA-8224P
3

Rev: 0.2
2011.09.28
4

Compal Secret Data

Security Classification
2011/07/12

Issued Date

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Compal Electronics, Inc.


Cover Sheet

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
E

of

59

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Compal Confidential

QCL40

ZZZ1

PCB-MB

PCB P/N for Load BOM

NV
N13M-GE1
Gb1B-64
23x23mm

PEG 16X

+1.5V, +0.75VS

port 4

USB conn x1
USB Board
port 8

100MHz
5GB/s

Camera

Page 30

HDMI

Card Reader
RTS5137

port 10

RGB, HV Sync, DDC

HDMI, DDC
Page 35

Page 30

USB2.0

LVDS, EDID, DISPOFF#, PWM

Page 30

Page 33

DMI x4

100MHz
2.7GT/s

CRT Conn

Page 10, 11

rPGA 988B Socket


Page 4 ~ 9

+VCC_CORE, +VCCP,
+VCC_GFXCORE_AVG, +1.5V_CPU_VDDQ,
+1.8VS, _VCCSA

FDI x8
(UMA)

BANK 0, 1, 2, 3

Dual Channel

Ivy Bridge
Processor

Page 20 ~ 28

LCD conn

DDR3-SO-DIMM X 2

DDR3 1333/1600MHz 1.5V

Mobile

DA80000QT00

Memory Card Slot


SD/MMC

Page 34

Page 34

Intel
PANTHER-POINT
PCH

port 9

MiniCard-2

Page 40

port 0,1

USB3.0

USB3.0 conn x2

port 1,2

Page 36

HM77

Audio Jack (HP)


Azalia

Realtek
ALC269

FCBGA 989 Balls


Page 12 ~ 19

Page 33

Audio Jack (MIC)

Page 33

SATA

Speaker Connector

Page 33

Page 33

PCI-e
port 1

port 4

ASM1042 USB3.0
Controller
page 36

port 2

LAN/CRT Board
10/100/1000 LAN
Realtek GbE
RTL8111F

port 0

+1.05VS, +1.8VS, +3VS,


+3V_PCH, +5V_PCH, +RTCVCC,
+VCCAFDI_VRM

Page 31

Mini Card-1
WLAN
Bluetooth

Page 32

port 2

Page 31

USB3.0 conn x2

SPI ROM
4MB+2MB

Touch Pad CONN.

External board
Page 29,41

LS-4221P
USB/B

Page 38

ENE KB9012QF
Reserve KB930F
+3VLP/+3VALW

page 39

Int. KBD

Page 38

Page 33

SPI ROM
256KB

Fan Control
Page 37

Page 12

LPC BUS

Page 37

DC/DC Interface CKT.

SATA ODD Connector

Page 40

SPI

2.5" SATA HDD Connector

Compal Secret Data

Security Classification
Issued Date

Page 39

2011/07/12

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

Title

Compal Electronics, Inc.


Block Diagram

Size Document Number


Custom
Date:

Rev
0.2

LA-8224P
Sheet

Thursday, October 27, 2011


5

of

59

X76@:

VRAMX16X8
N13P-GS
ZZZ11

VRAMX16X4

N13P-GL

X76L11@

ZZZ

X76L01@

VRAMX8X8

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N13M-GE1

N13M-GE1 x8

ZZZ3

ZZZ7

X76L03@

X76L07@

PCI0
ER39

2G HYN

2G SAM

ZZZ12

X76L12@

2G SAM

ZZZ2

1G SAM
X76L02@

ZZZ4

2G HYN

ZZZ5

2G HYN
X76L04@

ZZZ8

1G HYN

X76L08@

X76L05@

ZZZ9

1G SAM

X76L09@

N13M-GE1

GL@

GE@

U10
U10

GS@

U10

N13M-GE1 x8
GE8@

GE@

U10

N13M-GE1 x8

N13P-GL

IU3@: USB3.0 by PCH


USB30@:USB3.0 controller IC
AI@: AI Charger
NAI@: Non AI Charger

DIS@: VGA componet


GE8@: N13M-GE1_GB1b

GE8@

GL@

N13M-GE1
N13P-GS

X76L10@

4G HYN

N13P-GL

GS@

9012@: EC(ENE 9012 chip)


930@: EC(ENE 930 chip)
XDP@: Intel debug port

BATT

PCH

EC

SODIMM

DGPU

V
X

X
V

X
X

X
X

X
V

PCH

PCH

KB930

EC_SMB_CK2
EC_SMB_DA2

KB930

PCH_SMBCLK
PCH_SMBDATA
PCH_SMLCLK
PCH_SMLDATA

CLK

MINI1

X
X

EC_SMB_CK1
EC_SMB_DA1

PCI2

None

PCH

LPC Debug Port

PCI4

USB2.0+3.0

USB2.0+3.0

USB2.0+3.0

None

None

None

None

JMINI1 (WLAN) Bluetooth

None

None

None

CAMERA

USB2

10

Card Reader

11

None

12

None

13

None

None

Power Plane

Description

S1

S3

VIN

Adapter power supply (19V)

N/A

Deep
S3
N/A
N/A

BATT+

Battery power supply (12.6V)

N/A

N/A

N/A

N/A

B+

AC or battery power rail for power circuit

N/A

N/A

N/A

N/A

+3VLP

3.3V power rail for 51ON power management

ON

ON

ON

ON

PCH

N/A

+3VALW

3.3V always on power rail

ON

ON

ON

+LAN_IO

3.3V power rail for ethernet

ON

ON

OFF

+3VS_WLAN

3.3V power rail for WLAN/BT Combo

ON

OFF

OFF

OFF

+3V_PCH

3.3V power rail for PCH suspend well plane

ON

ON

OFF

OFF

+3VS

3.3V power rail for DDR SPI,PCH,HDD,Audio,Card Reader

ON

OFF

OFF

OFF

+3VSG

3.3V power rail for VGA

ON

OFF

OFF

OFF

AC/ON; DC/OFF
OFF

+LCDVDD

3.3V power rail for LCD

ON

OFF

OFF

+5VALW

5V always on power rail

ON

ON

ON

+5V_PCH

5V power rail for PCH suspend well plane

ON

ON

OFF

OFF

+5VS

5V power rail for HDD,AUDIO,FAN,Touch PAD

ON

OFF

OFF

OFF

+5VS_ODD

5V power rail for SATA ODD

ON

OFF

OFF

OFF

+1.8VS

1.8V power rail for CPU,PCH

ON

OFF

OFF

OFF

+1.05VS

1.05V power rail for PCH

ON

OFF

OFF

OFF

+VCCP

1.05V power rail for CPU VCCIO,PCH

ON

OFF

OFF

OFF

+1.05VSG

1.05V power rail for N13P

ON

OFF

OFF

OFF

+1.5V

1.5V power rail for DDR3 system memory

ON

ON

ON

OFF

+1.5V_CPU_VDDQ

1.5V power rail CPU VDDQ

ON

OFF

OFF

OFF

+1.5VSG

1.5V power rail for N13P,VRAM

ON

OFF

OFF

OFF

+1.5VS

1.5V power rail for PCH,WLAN/BT combo

ON

OFF

OFF

OFF

+0.75VS

0.75V power rail for DDR VREF

ON

OFF

OFF

OFF

+VCCSA

VCCSA for CPU system agent

ON

OFF

OFF

OFF

+VCC_CORE

CORE Voltage for CPU

ON

OFF

OFF

OFF

1.5V power rail for N13P,VRAM

ON

OFF

OFF

OFF

CORE Voltage for N13P Graphics ON OFF OFF

ON

OFF

OFF

OFF

+VCC_GFXCORE_AXG

+VGA_CORE

SATA

DESTINATION

SATA0

HDD

SATA1

None

DIFFERENTIAL

DESTINATION

FLEX CLOCKS

DESTINATION

SATA2

ODD

CLKOUT_PCIE0

10/100/1G LAN

CLKOUTFLEX0

CLK_SD_48M

SATA3

None

CLKOUT_PCIE1

MINI CARD WLAN

CLKOUTFLEX1

None

SATA4

None

CLKOUT_PCIE2

None

CLKOUTFLEX2

None

SATA5

None

CLKOUT_PCIE3

USB3.0 controller

CLKOUTFLEX3

None

CLKOUT_PCIE4

None

CLKOUT_PCIE5

None

CLKOUT_PCIE6

None

CLKOUT_PCIE7

None

CLKOUT_PEG_B

S5

OFF
AC/ON; DC/OFF

SMBUS Control Table


SOURCE

EC

DESTINATION

USB2.0+3.0

X76L06@

1G HYN

N13P-GS

PCI1

USB2 PORT

Voltage Rails

4G ELP
ZZZ10

ZZZ6

USB3 PORT DESTINATION

PCH_LOOPBACK

PCI3

2G ELP

DESTINATION

CLKOUT

None

PCI EXPRESS

DESTINATION

Lane 1

10/100/1G LAN

Lane 2

MINI CARD WLAN

Lane 3

None

Lane 4

USB3.0 controller

Lane 5

None

Lane 6

None

Lane 7

None

Lane 8

None

Symbol Note :
: means Digital Ground
Compal Secret Data

Security Classification

: means Analog Ground

Issued Date

2011/07/12

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C
Date:

Compal Electronics, Inc.


Notes List
Document Number

Rev
0.2

LA-8224P
Thursday, October 27, 2011

Sheet

of

59

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1

+1.05VS

R1
24.9_0402_1%
JCPU1A
D

14
14
14
14

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

B27
B25
A25
B24

14
14
14
14

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

B28
B26
A24
B23

14
14
14
14

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

G21
E22
F21
D21

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

14
14
14
14

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

G22
D22
F20
C21

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

14
14
14
14
14
14
14
14
+1.05VS

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

14 FDI_FSYNC0
14 FDI_FSYNC1

14 FDI_INT
R2

14 FDI_LSYNC0
14 FDI_LSYNC1

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

A21
H19
E19
F18
B21
C20
D18
E17

FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

A22
G19
E20
G18
B20
C19
D19
F17

FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]

FDI_FSYNC0
FDI_FSYNC1

J18
J17

FDI_INT

H20

FDI_LSYNC0
FDI_LSYNC1

J19
H17

FDI0_FSYNC
FDI1_FSYNC

DMI

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

FDI_INT
FDI0_LSYNC
FDI1_LSYNC

24.9_0402_1%

eDP_COMPIO
and ICOMPO
signals
should be
shorted
near balls
and routed
with
typical
impedance
<25 mohms

A18
A17
B16
C15
D15
C17
F16
C16
G15
C18
E16
D16
F15

eDP_COMPIO
eDP_ICOMPO
eDP_HPD#
eDP_AUX
eDP_AUX#
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]

eDP

EDP_COMP

eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]

PCI EXPRESS* - GRAPHICS

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

Intel(R) FDI

14
14
14
14
14
14
14
14

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO

J22
J21
H22

JCPU1I

PEG_ICOMPI and RCOMPO signals should be shorted and routed


with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
- typical impedance = 14.5 mohms

PEG_COMP

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32

PCIE_GTX_CRX_N15
PCIE_GTX_CRX_N14
PCIE_GTX_CRX_N13
PCIE_GTX_CRX_N12
PCIE_GTX_CRX_N11
PCIE_GTX_CRX_N10
PCIE_GTX_CRX_N9
PCIE_GTX_CRX_N8
PCIE_GTX_CRX_N7
PCIE_GTX_CRX_N6
PCIE_GTX_CRX_N5
PCIE_GTX_CRX_N4
PCIE_GTX_CRX_N3
PCIE_GTX_CRX_N2
PCIE_GTX_CRX_N1
PCIE_GTX_CRX_N0

DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@

C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K

PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_N0

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32

PCIE_GTX_CRX_P15
PCIE_GTX_CRX_P14
PCIE_GTX_CRX_P13
PCIE_GTX_CRX_P12
PCIE_GTX_CRX_P11
PCIE_GTX_CRX_P10
PCIE_GTX_CRX_P9
PCIE_GTX_CRX_P8
PCIE_GTX_CRX_P7
PCIE_GTX_CRX_P6
PCIE_GTX_CRX_P5
PCIE_GTX_CRX_P4
PCIE_GTX_CRX_P3
PCIE_GTX_CRX_P2
PCIE_GTX_CRX_P1
PCIE_GTX_CRX_P0

DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@

C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K

PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_P0

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25

PCIE_CTX_GRX_N15
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N0

DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@

C33
C34
C35
C36
C37
C38
C39
C40
C41
C42
C43
C44
C45
C46
C47
C48

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K

PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_N0

M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25

PCIE_CTX_GRX_P15
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P12
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P0

DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@

C49
C50
C51
C52
C53
C54
C55
C56
C57
C58
C59
C60
C61
C62
C63
C64

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K

PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P0

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

PCIE_GTX_C_CRX_N[0..15] 20

PCIE_GTX_C_CRX_P[0..15] 20

PCIE_CTX_C_GRX_N[0..15] 20

PCIE_CTX_C_GRX_P[0..15] 20

T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
P9
P8
P6
P5
P3
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
L9
L8
L6
L5
L4
L3
L2
L1
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

VSS

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

TYCO_2013620-2_IVY BRIDGE
CONN@

TYCO_2013620-2_IVY BRIDGE
CONN@

Compal Secret Data

Security Classification
Issued Date

2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PROCESSOR(1/6) DMI,FDI,PEG

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

of

59

R576
R3
10K_0402_5%

Place near JXDP1

1
R11

2
0_0402_5%
2
0_0402_5%

S_PWG

D_PWG

R14
1
200_0402_1%

+3V_PCH

+3VS

+1.05VS

JCPU1B

PAD

T1

40 H_PECI

H_CATERR#

AL33

H_PECI

AN33

PECI

AL32

PROCHOT#

CATERR#

R23
B

1
2 H_PROCHOT#_R
56_0402_5%

40,43 H_PROCHOT#

H_THERMTRIP#

16 H_THERMTRIP#

AN32

THERMTRIP#

DPLL_REF_CLK
DPLL_REF_CLK#

SM_DRAMRST#

16 H_CPUPWRGD

H_CPUPWRGD_R AP33

R36
VDDPWRGOOD 1
2 VDDPWRGOOD_R
130_0402_1%

BUF_CPU_RST#

V8

AR33

PM_SYNC

UNCOREPWRGOOD

SM_DRAMPWROK

RESET#

JTAG & BPM

ER20
R684
H_CPUPWRGD1
2
0_0402_5%

PWR MANAGEMENT

14 H_PM_SYNC

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

A16
A15

CLK_CPU_DPLL_R
CLK_CPU_DPLL#_R

R8

H_DRAMRST#

AK1
A5
A4

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

CLK_CPU_DPLL#_R
CLK_CPU_DPLL_R

C72

BUFO_CPU_RST#

R21
1
1
R22

2
2

R17
1
2
43_0402_1%

BUF_CPU_RST#

1K_0402_1%
1K_0402_1%

+3VS
@

1
C70

H_DRAMRST#
2
100P_0402_50V8J

TCK
TMS
TRST#
TDI
TDO

DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

AP29
AP27

XDP_PRDY#
XDP_PREQ#

AR26
AR27
AP30

XDP_TCK
XDP_TMS
XDP_TRST#

AR28
AP26

XDP_TDI_R
XDP_TDO_R

1 R30
1 R31

2 0_0402_5% XDP@
2 0_0402_5% XDP@

AL35 XDP_DBRESET#_R11 R35


1 R37
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7

XDP_DBRESET#_R11K_0402_5% 1

2 R24

@
R20
0_0402_5%

H_CPUPWRGD_R

2 R25

10K_0402_5%1

XDP_TDI
XDP_TDO

DDR3 Compensation Signals

2 0_0402_5% XDP@ XDP_DBRESET#


2 0_0402_5%
@
@
@
@
@
@
@
@

T2
T3
T4
T5
T6
T7
T8
T9

XDP_DBRESET#_R 12,14

PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
@

SM_RCOMP0

140_0402_1%1

2 R34

SM_RCOMP1

25.5_0402_1%1

2 R38

SM_RCOMP2

200_0402_1%1

2 R39

PU/PD for JTAG signals


+1.05VS

ER20

C71
1

H_DRAMRST# 6

U2
Y

SN74LVC1G07DCKR_SC70-5

Reserve for EMI please close to JCPU1

AM34

+1.05VS

PRDY#
PREQ#

H_PM_SYNC

G
CLK_CPU_DMI 13
CLK_CPU_DMI# 13

SKTOCC#

BCLK
BCLK#

2 0_0402_5%
2 0_0402_5%

1
1

R15
75_0402_5%

PROC_SELECT#

CLOCKS

AN34

DDR3
MISC

16 H_SNB_IVB#

THERMAL

C26

MISC

15,32,36,40,41 PLT_RST#
R18
R19

Reserve for EMI please close to JCPU1

R16

CLK_CPU_DMI_R
CLK_CPU_DMI#_R

VDDPWRGOOD

74AHC1G09GW TSSOP 5P

H_PECI
2
100P_0402_50V8J

A28
A27

R4
200_0402_1%

NC

O
B

C69
0.1U_0402_16V4Z

H_PROCHOT# 62_0402_5%
1

1
@

14 PM_DRAM_PWRGD

U1

+1.5V_CPU_VDDQ

R9

14 SYSTEM_PWROK
27
28

Processor Pullups
+1.05VS

1
C68

+3VS

2
SYS_PWROK_XDP

XDP@

XDP@

@
R8
1K_0402_5%

+1.05VS

+3VALW

R267

+3VALW

ACES_87152-26051
CONN@

+3V_PCH

XDP_TCK

ER17

C65
0.1U_0402_16V4Z~D

XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS

C67
0.1U_0402_16V4Z~D

0_0402_5% 1 XDP@
PLT_RST# 1 XDP@
1K_0402_5%

H_CPUPWRGD_XDP
CFD_PWRBTN#_XDP
R6
XDP_HOOK2
R7
SYS_PWROK_XDP
R10
CLK_CPU_ITP
CLK_CPU_ITP#
+VCCP_XDP
2R12
XDP_RST#_R
R13
2
XDP_DBRESET#

JXDP1
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 10
11 11
12 12
13 13
14 14
15 15
16 16
17 17
18 18
19 19
20 20
21 21
22 22
23
23
24 24
25 25 G1
26 26 G2

C66
0.1U_0402_16V4Z~D

14,40 PBTN_OUT#
7
CFG0
14,51 VGATE
13 CLK_CPU_ITP
13 CLK_CPU_ITP#
+1.05VS

2
2
2
2

http://shop61976717.taobao.com
http://shop61976717.taobao.com

XDP_PREQ#
XDP_PRDY#

1K_0402_5%
R5
H_CPUPWRGD 1 XDP@
0_0402_5% 1 XDP@
1K_0402_5% 1 XDP@
0_0402_5% 1 XDP@

0_0402_5%

0_0402_5%

XDP_TMS

51_0402_5% 1

XDP_TDI_R

51_0402_5% 1

XDP_PREQ#

51_0402_5% 1

XDP_TDO_R

51_0402_5% 1

2 R29

XDP_TCK

51_0402_5% 1

2 R32

XDP_TRST#

51_0402_5% 1

2 R33

2 R26
2 R27
@

2 R28

XDP_DBRESET#_R1
2
100P_0402_50V8J

VDDPWRGOOD_R
2
100P_0402_50V8J
TYCO_2013620-2_IVY BRIDGE

Reserve for EMI please close to JCPU1


Reserve for EMI please close to JCPU1

CONN@
@

1
C421

H_CPUPWRGD_R
2
100P_0402_50V8J

1
C426

BUF_CPU_RST#
2
100P_0402_50V8J

ER20

Reserve for EMI please close to JCPU1


Reserve for EMI please close to JCPU1
5

Compal Secret Data

Security Classification
Issued Date

2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

Title

Compal Electronics, Inc.


PROCESSOR(2/6) PM,XDP,CLK

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
JCPU1C
JCPU1D

C5
D5
D3
D2
D6
C6
C2
C3
F10
F8
G10
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N10
N8
N7
M10
M9
N9
M7
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15

AE10
AF10
V6

10 DDR_A_BS0
10 DDR_A_BS1
10 DDR_A_BS2

AE8
AD9
AF9

10 DDR_A_CAS#
10 DDR_A_RAS#
10 DDR_A_WE#

SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]

AA5
AB5
V10

RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]

AB4
AA4
W9

RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]

DDR SYSTEM MEMORY A

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDRA_SCS0#
DDRA_SCS1#

SA_ODT[0]
SA_ODT[1]
RSVD_TP[9]
RSVD_TP[10]

AH3
AG3
AG2
AH2

DDRA_ODT0
DDRA_ODT1

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

SA_CAS#
SA_RAS#
SA_WE#

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AB3
AA3
W10

AK3
AL3
AG1
AH1

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

11 DDR_B_D[0..63]

DDRA_CLK1 10
DDRA_CLK1# 10
DDRA_CKE1 10

SA_CS#[0]
SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_BS[0]
SA_BS[1]
SA_BS[2]

DDRA_CLK0 10
DDRA_CLK0# 10
DDRA_CKE0 10

C4
G6
J3
M6
AL6
AM8
AR12
AM15

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

D4
F6
K3
N6
AL5
AM9
AR11
AM14

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15

10
10

10
10

DDR_A_DQS#[0..7]

DDR_A_DQS[0..7]

DDR_A_MA[0..15]

10

10

10

C9
A7
D10
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K10
K9
J9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15

AA9
AA7
R6

11 DDR_B_BS0
11 DDR_B_BS1
11 DDR_B_BS2

AA10
AB8
AB9

11 DDR_B_CAS#
11 DDR_B_RAS#
11 DDR_B_WE#

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

AE2
AD2
R9

DDRB_CLK0 11
DDRB_CLK0# 11
DDRB_CKE0 11

SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]

AE1
AD1
R10

DDRB_CLK1 11
DDRB_CLK1# 11
DDRB_CKE1 11

RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]

AB2
AA2
T9

SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]

RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]

DDR SYSTEM MEMORY B

10 DDR_A_D[0..63]
D

AB6
AA6
V9

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

AA1
AB1
T10

SB_CS#[0]
SB_CS#[1]
RSVD_TP[17]
RSVD_TP[18]

AD3
AE3
AD6
AE6

DDRB_SCS0#
DDRB_SCS1#

SB_ODT[0]
SB_ODT[1]
RSVD_TP[19]
RSVD_TP[20]

AE4
AD4
AD5
AE5

DDRB_ODT0
DDRB_ODT1

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

11
11

11
11
C

D7
F3
K6
N3
AN5
AP9
AK12
AP15

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

C7
G3
J6
M3
AN6
AP8
AK11
AP14

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15

DDR_B_DQS#[0..7]

11

DDR_B_DQS[0..7]

11

DDR_B_MA[0..15]

11

TYCO_2013620-2_IVY BRIDGE
CONN@
TYCO_2013620-2_IVY BRIDGE
CONN@

+1.5V

R40
1K_0402_5%

Q6

H_DRAMRST#

5 H_DRAMRST#

DDR3_DRAMRST#_R

1
R41

2
1K_0402_5%

DDR3_DRAMRST#

10,11

R42
4.99K_0402_1%

0_0402_5%

DRAMRST_CNTRL_PCH

R43

0_0402_5%

BSS138_SOT23

40

Instant ON
C73
0.047U_0402_16V4Z

Compal Secret Data

Security Classification
Issued Date

2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ER28

9,13,40

EC_DRAMRST_CNTRL_PCH

R44

Title

Compal Electronics, Inc.


PROCESSOR(3/6) DDRIII

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
CFG Straps for Processor
D

CFG2
R45
1K_0402_1%

JCPU1E

+VCC_GFXCORE_AXG

@
@
@
@
@
@
@
@

CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

RSVD33
RSVD34
RSVD35

L7
AG7
AE7
AK2

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

W8

1:(Default) Normal Operation; Lane #


definition matches socket pin map definition
0:Lane Reversed

AT26
AM33
AJ27
CFG4
@R47
@
R47
1K_0402_1%

AJ31
AH31
AJ33
AH33

VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
VSS_VAL_SENSE

AJ26

RSVD5

Please place as close as JCPU1

F25
F24
F23
D24
G25
G24
E23
D23
C30
A31
B30
B29
D30
B31
A30
C29
J20
B18

J15

RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23

T8
J16
H16
G16

RSVD24
RSVD25

RSVD27

RSVD_NCTF1
RSVD_NCTF2
RSVD_NCTF3
RSVD_NCTF4
RSVD_NCTF5

Display Port Presence Strap

AR35
AT34
AT33
AP35
AR34

CFG4

1 : Disabled; No Physical Display Port


attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

RSVD_NCTF6
RSVD_NCTF7
RSVD_NCTF8
RSVD_NCTF9
RSVD_NCTF10

B34
A33
A34
B35
C35

CFG6
CFG5

VSS_VAL_SENSE

RSVD37
RSVD38
RSVD39
RSVD40

RSVD51
RSVD52

R49
1K_0402_1%
@

AJ32
AK32

@ R50
1K_0402_1%

VSS_AXG_VAL_SENSE
VCC_VAL_SENSE

RSVD32

RESERVED

VCC_AXG_VAL_SENSE

R48
49.9_0402_1%
@

R46
49.9_0402_1%

T38
T39
T40
T41
T42
T43
T10
T11

RSVD28
RSVD29
RSVD30
RSVD31

AH27
AH26

+VCC_CORE

PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD

VCC_DIE_SENSE
VSS_DIE_SENSE

CFG4
CFG5
CFG6

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]

BCLK_ITP
BCLK_ITP#

RSVD_NCTF11
RSVD_NCTF12
RSVD_NCTF13

AN35
AM35

CLK_RES_ITP 13
CLK_RES_ITP# 13

PCIE Port Bifurcation Straps

AT2
AT1
AR1

11: (Default) x16 - Device 1 functions 1 and 2 disabled


CFG[6:5]

KEY

AK28
AK29
AL26
AL27
AK26
AL29
AL30
AM31
AM32
AM30
AM28
AM26
AN28
AN31
AN26
AM27
AK31
AN29

CFG2

CFG0

CFG0

CFG

B1

TYCO_2013620-2_IVY BRIDGE

10: x8, x8 - Device 1 function 1 enabled ; function 2


disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

CONN@

VSS_AXG_VAL_SENSE

VSS_VAL_SENSE

R51

R52
49.9_0402_1%

49.9_0402_1%
A

Please place as close as JCPU1


Compal Secret Data

Security Classification
Issued Date

2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PROCESSOR(4/6) RSVD,CFG

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
JCPU1F

POWER
+1.05VS

+VCC_CORE

PEG AND DDR

AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12

VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

VCCIO40

J23

2
0_0402_5%

R53

VR_SVID_CLK

51

R54
75_0402_5%
2

H_CPU_SVIDCLK

Place the PU
resistors close to CPU
1

VIDALERT#
VIDSCLK
VIDSOUT

AJ29
AJ30
AJ28

H_CPU_SVIDALRT# R55
H_CPU_SVIDCLK
VR_SVID_DAT

2
43_0402_1%

VR_SVID_ALRT# 51

+1.05VS

Place the PU
resistors close to CPU

VR_SVID_DAT

R56
130_0402_1%

C75
0.1U_0402_16V4Z
VR_SVID_DAT

51

+VCC_CORE

AJ35 VCCSENSE_R
AJ34 VSSSENSE_R

R58
R59

2 0_0402_5%
2 0_0402_5%

1
1

VCCSENSE 51
VSSSENSE 51

+1.05VS
1

VCC_SENSE
VSS_SENSE

R57
100_0402_1%

R60
B10
A10

R61
100_0402_1%

2
1
10_0402_1%
2

VCCIO_SENSE
VSS_SENSE_VCCIO

VCCIO_SENSE

48

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24

+1.05VS

SVID

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

C74
0.1U_0402_16V4Z

AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

SENSE LINES

97AAG35

8.5A

CORE SUPPLY

R62
10_0402_1%

TYCO_2013620-2_IVY BRIDGE
CONN@

Compal Secret Data

Security Classification
Issued Date

2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PROCESSOR(5/6) PWR,BYPASS

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
5A

+1.5V_CPU_VDDQ
ER19
Q7
AO4304L_SO8

1
3

RUN_ON_CPU1.5VS3

JCPU1H

Q4B
RUN_ON_CPU1.5VS3#

1
2
3

C76
10U_0805_10V4Z~D

8
7
6
5
R63
36.5K_0402_1%

R65
100K_0402_5%

+1.5V_CPU_VDDQ

+5VALW

R64
20K_0402_5%

+1.5V
+5VALW

5
1

C77
2200P_0402_50V7K

2N7002KDWH_SOT363-6

R66
1
2
0_0402_5%

Q4A
2
2N7002KDWH_SOT363-6
1

40 CPU1.5V_S3_GATE

RUN_ON_CPU1.5VS3#

42

+VCC_GFXCORE_AXG

R67
100_0402_1%
2

Place near CPU


VCC_AXG_SENSE 51

POWER

VSS_AXG_SENSE 51

JCPU1G

+V_SM_VREF

R72
1K_0402_1%

PMV45EN_SOT23-3

@
RUN_ON_CPU1.5VS3

R73
1K_0402_1%

+V_DDR_REFA_R
+V_DDR_REFB_R

B4
D1

SA_DIMM_VREFDQ
SB_DIMM_VREFDQ

@
@
1

VREF

SENSE
LINES

R71
1K_0402_1%
Q8

DDR3 -1.5V RAILS

1
+
2 3

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

VSS

TYCO_2013620-2_IVY BRIDGE

6A

CONN@
+VCCSA
1

H23

1
+
2 3

C85
330U_D2_2VM_R6M

+1.5V_CPU_VDDQ

+VCCSA_SENSE 50

+1.5V

C90

1 0.1U_0402_10V7K

C91

1 0.1U_0402_10V7K

C92

1 0.1U_0402_10V7K

C93

1 0.1U_0402_10V7K

VCCSA_SENSE

M27
M26
L26
J26
J25
J24
H26
H25

C89
10U_0603_6.3V6M

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

C88
10U_0805_6.3VAM

SA RAIL

C78
330U_D2_2VM_R6M

C84
10U_0805_6.3VAM

C83
10U_0805_6.3VAM

C82
10U_0805_6.3VAM

VCCSA_VID[0]
VCCSA_VID[1]

C22
C24

@ R74
0_0402_5%

H_VCCSA_VID0 50
H_VCCSA_VID1 50
2

1.8V RAIL

5A

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

C87
10U_0805_6.3VAM

VCCPLL1
VCCPLL2
VCCPLL3

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

C81
10U_0805_6.3VAM

VCCIO_SEL

A19

+3VS

VCCIO_SEL

TYCO_2013620-2_IVY BRIDGE

R75
10K_0402_5%

CONN@

2 3

1
R69 @

C86
10U_0805_6.3VAM

C80
10U_0805_6.3VAM

C97
330U_D2_2VM_R6M

C96
1U_0402_6.3V6K

C95
1U_0402_6.3V6K

C94
10U_0805_6.3VAM

0_0805_5%

B6
A6
A2

AL1 +V_SM_VREF_CNT

C79
10U_0805_6.3VAM

+1.8VS_VCCPLL

2
0_0402_5%

+1.5V_CPU_VDDQ

1.5A
2

+1.5V

+1.5V_CPU_VDDQ

ER23

ER23

AK35
AK34

R70
1K_0402_1%

SM_VREF

+1.8VS
R242

VAXG_SENSE
VSSAXG_SENSE

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54

C149
0.1U_0402_16V4Z

AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17

MISC

+V_SM_VREF should
have 10 mil trace width

2
1
100_0402_1%

GRAPHICS

33A

R68

+VCC_GFXCORE_AXG

AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25

Q9
BSS138_SOT23
2
G

S
2 0_0402_5%
2 0_0402_5%
3

+V_DDR_REFA
+V_DDR_REFB

Q10

2
G

+V_DDR_REFA_R
+V_DDR_REFB_R

R79
1K_0402_1%
@
BSS138_SOT23

DRAMRST_CNTRL_PCH

DRAMRST_CNTRL_PCH 6,13,40

@
@

1
1

R80
1K_0402_1%
@

R77
R78

Compal Secret Data

Security Classification
Issued Date

M3 Circuit (Processor Generated SO-DIMM VREF_DQ)

2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PROCESSOR(6/6) PWR,VSS

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

of

59

+1.5V
1

+1.5V

R81
1K_0402_1%
2

ER15

6 DDR_A_DQS[0..7]

1
2

1
2

C99
2.2U_0402_6.3V6M

1K_0402_1%

C98
0.1U_0402_10V6K

R82
D

6 DDR_A_DQS#[0..7]

JDIMM1
DDR_A_D0
DDR_A_D1

DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25

DDR_A_D26
DDR_A_D27

6 DDR_A_D[0..63]

+1.5V

DDR3 SO-DIMM A

+V_DDR_REFA

http://shop61976717.taobao.com
http://shop61976717.taobao.com

3.56A

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

6 DDR_A_MA[0..15]
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
D

DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
DDR3_DRAMRST#

DDR3_DRAMRST# 6,11

DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21

DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31

Layout Note:
Place near JDDRL

1
2

1
2

1
2

TYCO 2-1932323-1

1
2
1

206

DDR_A_D44
DDR_A_D45

R84
1K_0402_1%
2

G2

DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53

Layout Note:
Place near JDDRL.203,204

DDR_A_D54
DDR_A_D55

+0.75VS

DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62
DDR_A_D63

PCH_SMBDATA
PCH_SMBCLK

PCH_SMBDATA 11,13,41
PCH_SMBCLK 11,13,41

+0.75VS

0.65A@0.75V

Compal Secret Data

Security Classification
2011/07/12

Issued Date

DDR_A_DQS#5
DDR_A_DQS5

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

C107

G1

10U_0603_6.3V6M

205

C117
1U_0402_6.3V6K

R86
10K_0402_5%

R85
10K_0402_5%

C118
2.2U_0402_6.3V6M

DDR_A_D38
DDR_A_D39

ER15

C116
1U_0402_6.3V6K

ER15

C119
0.1U_0402_10V6K

+3VS

C115
1U_0402_6.3V6K

DDR_A_D36
DDR_A_D37

C114
1U_0402_6.3V6K

DDR_A_D58
DDR_A_D59

C113
1U_0402_6.3V6K

DDR_A_D56
DDR_A_D57

C106

DDR_A_D50
DDR_A_D51

10U_0603_6.3V6M

DDR_A_DQS#6
DDR_A_DQS6

+1.5V

C112
1U_0402_6.3V6K

DDR_A_D48
DDR_A_D49

C105

DDR_A_D42
DDR_A_D43

+VREF_CA
C111
1U_0402_6.3V6K

DDR_A_D40
DDR_A_D41

Layout Note: Place these 4 Caps near


Command and Control signals of JDDRL

C110
1U_0402_6.3V6K

DDR_A_D34
DDR_A_D35

DDRA_ODT1 6

C109
2.2U_0402_6.3V6M

DDR_A_DQS#4
DDR_A_DQS4

R83
1K_0402_1%

DDRA_SCS0# 6
DDRA_ODT0 6

C108
0.1U_0402_10V6K

DDR_A_D32
DDR_A_D33
B

DDRA_ODT1

+1.5V

DDR_A_BS1 6
DDR_A_RAS# 6

10U_0603_6.3V6M

6 DDRA_SCS1#

DDRA_SCS0#
DDRA_ODT0

DDRA_CLK1 6
DDRA_CLK1# 6

C104

DDR_A_MA13
DDRA_SCS1#

DDR_A_BS1
DDR_A_RAS#

10U_0603_6.3V6M

DDR_A_WE#
DDR_A_CAS#

6 DDR_A_WE#
6 DDR_A_CAS#

DDRA_CLK1
DDRA_CLK1#

C103

6 DDR_A_BS0

DDR_A_MA2
DDR_A_MA0

10U_0603_6.3V6M

DDR_A_MA10
DDR_A_BS0

DDR_A_MA6
DDR_A_MA4

C102

DDRA_CLK0
DDRA_CLK0#

6 DDRA_CLK0
6 DDRA_CLK0#

DDR_A_MA11
DDR_A_MA7

10U_0603_6.3V6M

DDR_A_MA3
DDR_A_MA1

DDRA_CKE1 6

DDR_A_MA15
DDR_A_MA14

C101

DDR_A_MA8
DDR_A_MA5

+1.5V
10U_0603_6.3V6M

DDR_A_MA12
DDR_A_MA9

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

DDRA_CKE1

C100
330U_B2_2.5VM_R15M

DDR_A_BS2

6 DDR_A_BS2

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

6 DDRA_CKE0

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

DDRA_CKE0

Title

Compal Electronics, Inc.


DDRIII-DDRL

Size Document Number


Custom
Date:

Rev
0.2

LA-8224P

Thursday, October 27, 2011

Sheet
1

10

of

59

+1.5V
+1.5V
1

DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19

1
2

1
R92

2
10K_0402_5%

205

G1

G2

DDRB_CKE1 6

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4

Layout Note:
Place near JDDRH.203 and 204

DDR_B_MA2
DDR_B_MA0

+0.75VS
DDRB_CLK1
DDRB_CLK1#

DDRB_CLK1 6
DDRB_CLK1# 6

DDR_B_BS1
DDR_B_RAS#

DDR_B_BS1 6
DDR_B_RAS# 6

DDRB_SCS0#
DDRB_ODT0

+1.5V
1

DDRB_SCS0# 6
DDRB_ODT0 6

DDRB_ODT1

R89
1K_0402_1%

DDRB_ODT1 6

+VREF_CB

DDR_B_D36
DDR_B_D37

DDR_B_D38
DDR_B_D39

ER15

R90
B

1K_0402_1%

DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53

DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
PCH_SMBDATA
PCH_SMBCLK

PCH_SMBDATA 10,13,41
PCH_SMBCLK 10,13,41
+0.75VS

0.65A@0.75V

206

TYCO_2-2013287-1

Compal Secret Data

Security Classification
2011/07/12

Issued Date

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

C130

C141
2.2U_0402_6.3V6M

10U_0603_6.3V6M

ER15

C142
0.1U_0402_10V6K

+3VS
A

10U_0603_6.3V6M

DDR_B_D58
DDR_B_D59
1 R91
2
10K_0402_5%

C138
1U_0603_10V4Z

DDR_B_D56
DDR_B_D57

C129

DDR_B_D50
DDR_B_D51

10U_0603_6.3V6M

DDR_B_DQS#6
DDR_B_DQS6

C137
1U_0603_10V4Z

DDR_B_D48
DDR_B_D49

C128

DDR_B_D42
DDR_B_D43

C136
1U_0603_10V4Z

DDR_B_D40
DDR_B_D41

C127

DDR_B_D34
DDR_B_D35

10U_0603_6.3V6M

DDR_B_MA15
DDR_B_MA14

C140
2.2U_0402_6.3V6M

DDR_B_DQS#4
DDR_B_DQS4

DDRB_CKE1

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

C139
0.1U_0402_10V6K

DDR_B_D32
DDR_B_D33

C135
1U_0603_10V4Z

DDR_B_MA13
DDRB_SCS1#

6 DDRB_SCS1#

DDR_B_D30
DDR_B_D31

C126

6 DDR_B_WE#
6 DDR_B_CAS#

10U_0603_6.3V6M

DDR_B_WE#
DDR_B_CAS#

DDR_B_DQS#3
DDR_B_DQS3

C125

DDR_B_MA10
DDR_B_BS0

6 DDR_B_BS0

10U_0603_6.3V6M

DDRB_CLK0
DDRB_CLK0#

6 DDRB_CLK0
6 DDRB_CLK0#

+1.5V

DDR_B_D28
DDR_B_D29

C124

DDR_B_MA3
DDR_B_MA1

+1.5V

Layout Note:
Place near JDDRH

10U_0603_6.3V6M

DDR_B_MA8
DDR_B_MA5

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

Layout Note: Place these 4 Caps near


Command and Control signals of JDDRH
DDR_B_D22
DDR_B_D23

C123

DDR_B_MA12
DDR_B_MA9

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

DDR_B_D20
DDR_B_D21

10U_0603_6.3V6M

6 DDR_B_BS2

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

DDR3_DRAMRST# 6,10

DDR_B_D14
DDR_B_D15

C122
330U_B2_2.5VM_R15M

DDR_B_BS2

DDR3_DRAMRST#

C134
1U_0402_6.3V6K

DDRB_CKE0

6 DDRB_CKE0

DDR_B_D12
DDR_B_D13

C133
1U_0402_6.3V6K

DDR_B_D6
DDR_B_D7

C132
1U_0402_6.3V6K

DDR_B_D26
DDR_B_D27

6 DDR_B_MA[0..15]

C131
1U_0402_6.3V6K

DDR_B_D24
DDR_B_D25

6 DDR_B_DQS[0..7]

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D16
DDR_B_D17

DDR_B_D4
DDR_B_D5

DDR_B_D10
DDR_B_D11

6 DDR_B_D[0..63]

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

DDR_B_DQS#1
DDR_B_DQS1

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

DDR_B_D8
DDR_B_D9

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

DDR_B_D2
DDR_B_D3

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

1K_0402_1%
2

1
2

DDR_B_D0
DDR_B_D1

R88
1

6 DDR_B_DQS#[0..7]

C121

0.1U_0402_10V6K
C120
2.2U_0402_6.3V6M

ER15

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JDIMM2
2

+V_DDR_REFB

+1.5V

3.56A

R87
1K_0402_1%

Title

Compal Electronics, Inc.


DDRIII-DDRH

Size

Document Number

Rev
0.2

LA-8224P
Date:

Thursday, October 27, 2011

Sheet
1

11

of

59

PCH_RTCX2

2
10M_0402_5%
Y1
1
2

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PCH_RTCX1

1
R93

+RTCVCC

32.768KHZ_12.5PF_9H03200019

C144
18P_0402_50V8J

SM_INTRUDER#

2
1M_0402_5%

R94

C145
18P_0402_50V8J

ER16

CLRP1 & CLRP2 place near DIMM


U3A
far away hot spot

CLRP2
SHORT PADS
ME CMOS

PCH_RTCRST#

D20

PCH_SRTCRST#

G22

SM_INTRUDER#

K22

INTRUDER#

PCH_INTVRMEN

C17

INTVRMEN

RTCX2
RTCRST#

FWH4 / LFRAME#
SRTCRST#

HDA_BIT_CLK

N34

HDA_SYNC

L34

HDA_SPKR

T10

33 HDA_SDIN0

HDA_RST#

K34

HDA_SDIN0

E34

Reserve for EMI


please close to R102

SPKR
HDA_RST#
HDA_SDIN0

G34

HDA_SDIN2

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

R118
100_0402_1%

PAD

T45

PCH_JTAG_TCK

J3

PAD

T46

PCH_JTAG_TMS

H7

PAD

T47

PCH_JTAG_TDI

K5

PAD

T48

PCH_JTAG_TDO

H1

JTAG_TCK

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

JTAG_TMS

SATAICOMPO

JTAG_TDI
JTAG_TDO

SATAICOMPI
SATA3RCOMPO

PCH_JTAG_TCK
1
51_0402_5%

T3

SPI_CLK

PCH_SPI_CS#_RR Y14

T1
5,14 XDP_DBRESET#_R

T49

PAD

PCH_SPI_SI_RR

V4

PCH_SPI_SO_RR

U3

+5VS

LPC_FRAME#

E36
K36

LPC_LDRQ0#
LPC_LDRQ1#

V5

SERIRQ

40,41
40,41
40,41
40,41

LPC_FRAME#
@
@

T12
T13

SERIRQ

AM3
AM1
AP7
AP5

40,41

PAD~D
PAD~D
40

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0

31
31
31
31

HDD1

+RTCVCC

AD7
AD5
AH5
AH4

SATA_PRX_DTX_N2
SATA_PRX_DTX_P2
SATA_PTX_DRX_N2
SATA_PTX_DRX_P2

PCH_INTVRMEN R106

31
31
31
31

HIntegrated
* LIntegrated

R104

1 10K_0402_5%

PCH_SATALED#R105

1 10K_0402_5%

BBS_BIT0_R

1 10K_0402_5%

SPI_MOSI
SPI_MISO

VRM enable
VRM disable

+3VS

1 1K_0402_5%

*LOW=Default
HIGH=No Reboot

Y3
Y1
AB3
AB1
+1.05VS_VCC_SATA

Y11
Y10

SATA_COMP

1
R114

2
37.4_0402_1%
+1.05VS_SATA3

AB12

SATA3COMPI

AB13

SATA3_COMP
1
R115

2
49.9_0402_1%

SATA3RBIAS

AH1

RBIAS_SATA3
1
R120

2
750_0402_1%

SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19

P3

PCH_SATALED#

V14

PCH_GPIO21

P1

BBS_BIT0_R

2
PCH_SATALED# 39

FLASH_EN

HDA_SYNC

10K_0402_5%

This signal has a weak internal pull-down


On Die PLL VR is supplied by
1.5V when smapled high
1.8V when sampled low
Needs to be pulled High for Chief River platfrom

+3V_PCH

+3V_PCH

1
4
9
19

+3V_SPI

+3VS

C150

2
R132

2 PCH_SPI_WP#
3.3K_0402_5%

R134

2 PCH_SPI_HOLD#
3.3K_0402_5%

0.1U_0402_16V4Z

PCH_SPI_CLK_RR

+3V_SPI

EMI
39,40
39,40
39,40
39,40

U5

8
PCH_SPI_WP#

PCH_SPI_HOLD# 7

C152
R139
2
1
1
2PCH_SPI_CLK_RRR
@
33_0402_5% @
22P_0402_50V8J

R131
1
2
0_0402_5%

+3VALW

PCH_SPI_CS#_R

PCH_SPI_CLK_R

PCH_SPI_SI_R

VCC

VSS

KSI4
KSI5
KSI6
KSI7

PCH_SPI_CS#_RR
PCH_SPI_CLK_RRR
PCH_SPI_SI_RR
PCH_SPI_SO_RR

24
22
18
17
14
23
21
16
15
13

KSI4
KSI5
KSI6
KSI7

VDD
VDD
VDD
VDD
A0
B0
C0
D0
E0
A1
B1
C1
D1
E1

SEL
YA
YB
YC
YD
YE
GND
GND
GND
GND

FLASH_EN

12

HDA_SYNC

FLASH_EN 40

2
5
6

PCH_SPI_CS#_R
PCH_SPI_CLK

8
11

PCH_SPI_SI_R
PCH_SPI_SO_R

R128

1 1K_0402_5%

+3V_SPI

1
2
0_0402_5%
R133

PCH_SPI_CLK_R

EMI

3
7
10
20
+RTCBATT

PI3V512QE_QSOP24

RTC Battery

W
HOLD

R136
1K_0402_5%

MAX. 8000mil

D1

+RTCVCC

C
Q

PCH_SPI_SO_R

W=20mils

C154

C155

R142
1
1
2PCH_SPI_CLK_R
@
0_0402_5%
@
10P_0402_50V8J

W=20mils

1
3

W25Q32BVSSIG_SO8

Reserve for EMI please close to U4

W=20mils +CHGRTC

DAN202UT106_SC70-3

PCH_SPI_WP#

Reserve for EMI please close to U5

40

EC_SPI_WP

2 PCH_WP
0_0402_5%
2
0_0402_5%
ER41

Q63
2
G

@
PCH_SPI_WP 1
R137
1
R135

R107

HDA_SPKR R110

PCH_GPIO21

R123

SPI_CS1#

BSS138_SOT23
Q11

R129
1M_0402_5%

1 10K_0402_5%

Y7
Y5
AD3
AD1

SPI ROM ( 4MByte )

HDA_SYNC

1
D

R127

U4

3
S

33 HDA_SYNC_AUDIO

2
33_0402_5%

R103

INTVRMEN

AB8
AB10
AF3
AF1

1 330K_0402_5%

SERIRQ

ODD

PANTHER-POINT_FCBGA989

+3VS

AM10
AM8
AP11
AP10

XDP_DBRESET#_R

D36

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

SPI_CS0#

SPI

PCH_SPI_CLK_RR
R124 2

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

1
2
1

PCH_JTAG_TDI

100_0402_1%

R117

A36

PCH_SPI_WP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

R116
100_0402_1%

HDA_SDOUT

ER35

200_0402_5%

PCH_JTAG_TMS

HDA_SDIN3

R113

200_0402_5%

PCH_JTAG_TDO

R112

200_0402_5%

+3V_PCH

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

C38
A38
B37
C37

0.1U_0402_16V4Z

R109

+3V_PCH

R111

A34

JTAG

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

HDA_SDIN1

C34

HDA_RST#
2
33_0402_5%
HDA_SDOUT
2
33_0402_5%

1
R108

+3V_PCH

SERIRQ

HDA_SYNC

33 HDA_SDOUT_AUDIO

LDRQ0#
LDRQ1# / GPIO23

HDA_BCLK

C148
10P_0402_50V8J

33 HDA_RST_AUDIO#

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

SATA 6G

HDA_BIT_CLK
2
33_0402_5%

1
R102

C20

SATA

HDA for AUDIO

PCH_RTCX2

RTCX1

IHDA

R101

33 HDA_BITCLK_AUDIO

A20

2 HDA_SDOUT
0_0402_5%~D

HDA_SDO

PCH_RTCX1

LPC

C147
1U_0603_10V4Z
40

CMOS
CLRP1
SHORT PADS

C146
1U_0603_10V4Z
1
2
R99
20K_0402_5%
1
2
R100 20K_0402_5%

RTC

+RTCVCC

SSM3K7002FU_SC70-3

Compal Secret Data

Security Classification
Issued Date
ER35

2011/07/12

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

Title

Compal Electronics, Inc.


PCH (1/8) SATA,HDA,SPI, LPC

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

12

of

59

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SMBALERT#
SMBCLK
U3B

SMBDATA
SML0CLK

2 0.1U_0402_10V7K
2 0.1U_0402_10V7K

PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C

36
36
36
36

--->

PCIE_PRX_USB3TX_N4
PCIE_PRX_USB3TX_P4
PCIE_PTX_USB3RX_N4
PCIE_PTX_USB3RX_P4

PCIE_PRX_USB3TX_N4
PCIE_PRX_USB3TX_P4
PCIE_PTX_USB3RX_N4_C
PCIE_PTX_USB3RX_P4_C

USB30@
2 0.1U_0402_10V7K
2 0.1U_0402_10V7K
USB30@

C1043 1
C1044 1

10/100/1G LAN --->

32 CLK_PCIE_LAN#
32 CLK_PCIE_LAN
+3V_PCH
32 LANCLK_REQ#

MiniWLAN (Mini Card 1)--->

41 CLK_PCIE_WLAN#
41 CLK_PCIE_WLAN
+3VS

R167 1
R168 1

2 0_0402_5%
2 0_0402_5%

PCIE_LAN#
PCIE_LAN

R169 1

2 10K_0402_5%

LANCLK_REQ#

R170 2
R171 2
R172 2

1 0_0402_5%
1 0_0402_5%
1 10K_0402_5%

PCIE_WLAN#
PCIE_WLAN
WLANCLK_REQ#

41 WLANCLK_REQ#

BE34
BF34
BB32
AY32

PERN2
PERP2
PETN2
PETP2

BG36
BJ36
AV34
AU34

PERN3
PERP3
PETN3
PETP3

BF36
BE36
AY34
BB34

PERN4
PERP4
PETN4
PETP4

BG37
BH37
AY36
BB36

PERN5
PERP5
PETN5
PETP5

BJ38
BG38
AU36
AV36

PERN6
PERP6
PETN6
PETP6

BG40
BJ40
AY40
BB40

PERN7
PERP7
PETN7
PETP7

BE38
BC38
AW38
AY38

PERN8
PERP8
PETN8
PETP8

Y40
Y39
J2
AB49
AB47
M1
AA48
AA47

R175

2 10K_0402_5%

SML0DATA

SMBCLK

H14

SMBCLK

PCH_SMLCLK

C9

SMBDATA

A12

DRAMRST_CNTRL_PCH

C8

SML0CLK

SML0DATA

G12

SML0DATA

SML1ALERT# / PCHHOT# / GPIO74

C13

PCH_HOT#

SML1CLK / GPIO58

E14

PCH_SMLCLK

SML1DATA / GPIO75

M16

PCH_SMLDATA

SMBDATA

ER03

MEMORY

PCH_SMLDATA
PCH_HOT#

SML0ALERT# / GPIO60
SML0CLK

DRAMRST_CNTRL_PCH

6,9,40
DRAMRST_CNTRL_PCH

USB3.0 controller

--->

36 CLK_PCIE_USB30#
36 CLK_PCIE_USB30
+3V_PCH
36 CLKREQ_USB30#

R1054 2 USB30@ 1 0_0402_5%


R1055 2 USB30@ 1 0_0402_5%
R176
10K_0402_5%
2
1

PCIE_USB30#
PCIE_USB30

R177

1 10K_0402_5%

PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P

T14

PAD

CL_DATA1

T11

T15

PAD

CL_RST1#

P10

T16

PAD

PEG_A_CLKRQ# / GPIO47

M10

PEG_CLKREQ#_R

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

AB37
AB38

CLK_PCIE_VGA#
CLK_PCIE_VGA

CLKOUT_DMI_N
CLKOUT_DMI_P

AV22
AU22

CLK_CPU_DMI#
CLK_CPU_DMI

CLKOUT_DP_N
CLKOUT_DP_P

AM12
AM13

CLKIN_DMI_N
CLKIN_DMI_P

BF18
BE18

CLKIN_DMI#
CLKIN_DMI

CLKIN_GND1_N
CLKIN_GND1_P

BJ30
BG30

CLKIN_DMI2#
CLKIN_DMI2

CLKIN_DOT_96N
CLKIN_DOT_96P

G24
E24

CLKIN_DOT96#
CLKIN_DOT96

CLKIN_SATA_N
CLKIN_SATA_P

AK7
AK5

CLKIN_SATA#
CLKIN_SATA

REFCLK14IN

K45

CLK_PCH_14M

CLKIN_PCILOOPBACK

H45

CLK_PCI_LPBACK

XTAL25_IN
XTAL25_OUT

V47
V49

XTAL25_IN
XTAL25_OUT

XCLK_RCOMP

Y47

CLKOUT_PCIE2N
CLKOUT_PCIE2P

CLKOUT_PCIE3N
CLKOUT_PCIE3P

CLKIN_DMI2#
CLKIN_DMI2
CLKIN_DMI#
CLKIN_DMI
CLKIN_DOT96#
CLKIN_DOT96
CLKIN_SATA#
CLKIN_SATA
CLK_PCH_14M

R158
R159
R160
R161
R162
R163
R164
R165
R166

1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2

10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%

If use extenal CLK gen, please place close to CLK gen


else, please place close to PCH

PCIECLKRQ1# / GPIO18

Y37
Y36

L12

2
100K_0402_5%
@

EC

M7

CL_CLK1

PEG_CLKREQ#_R

20

CLK_PCIE_VGA# 20
CLK_PCIE_VGA 20

VGA

CLK_CPU_DMI# 5
CLK_CPU_DMI 5

+3VS

+3VS

R173
2.2K_0402_5%

SMBCLK

R174
2.2K_0402_5%

PCH_SMBCLK

10,11,41

2N7002DW-T/R7_SOT363-6

PCIECLKRQ3# / GPIO25

+3V_PCH

2
1K_0402_1%

ER03

CLKOUT_PCIE0N
CLKOUT_PCIE0P

PCIECLKRQ2# / GPIO20

CLKOUT_PCIE4N
CLKOUT_PCIE4P

Q2A

Y43
Y45

2
10K_0402_5%

1
R157

ER17

V10

A8

1
R156

1
R750

+3VS

SMBALERT#

+3V_PCH

C160 1
C161 1

E12

1
10K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%

PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2
PCIE_PTX_WLANRX_P2

SMBALERT# / GPIO11

41
41
41
41

PERN1
PERP1
PETN1
PETP1

2 0.1U_0402_10V7K
2 0.1U_0402_10V7K

SMBUS

C158 1
C159 1

Link

USB3.0 controller

PCIE_PRX_GLANTX_N1
PCIE_PRX_GLANTX_P1
PCIE_PTX_GLANRX_N1
PCIE_PTX_GLANRX_P1

Controller

MiniWLAN (Mini Card 1)--->

32
32
32
32

BG34
BJ34
AV32
AU32

CLOCKS

10/100/1G LAN --->

PCIE_PRX_GLANTX_N1
PCIE_PRX_GLANTX_P1
PCIE_PTX_GLANRX_N1_C
PCIE_PTX_GLANRX_P1_C

PCI-E*

2
R149
1
R150
1
R151
1
R152
1
R153
1
R154
1
R155

PCIECLKRQ4# / GPIO26

SMBDATA

PCH_SMBDATA

10,11,41

2N7002DW-T/R7_SOT363-6

R178 2

1 10K_0402_5%

CLKOUT_PCIE5N
CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42
AB40
@
R180
CLK_PCI_LPBACK 2
33_0402_5%

@
C162
1
2
22P_0402_50V8J

+3V_PCH

R179 1

2 10K_0402_5%

PEG_B_CLKREQ#

Reserve for EMI please close to


U3
+3V_PCH

R182 1

2 10K_0402_5%

PCIE_CLKREQ6#

XTAL25_IN
2
1M_0402_5%

+3V_PCH
5 CLK_CPU_ITP#
5 CLK_CPU_ITP

Y2
1

3
GND

2
C163
12P_0402_50V8J

GND
4

CLKOUT_PCIE6N
CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38
V37
R184 1

CLK_CPU_ITP# R185
CLK_CPU_ITP R186

2 10K_0402_5%

2 XDP@
2
XDP@

1 0_0402_5%
1 0_0402_5%

GPIO46
CLK_BCLK_ITP#
CLK_BCLK_ITP

K12
AK14
AK13

CLKOUT_PCIE7N
CLKOUT_PCIE7P
PCIECLKRQ7# / GPIO46
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

3
R187
R188

7 CLK_RES_ITP#
7 CLK_RES_ITP
25MHZ_10PF_7V25000014
2
C164
12P_0402_50V8J

1
CLK_PCH_14M

@
R189
2
33_0402_5%

2
2

@
@

1 0_0402_5%
1 0_0402_5%

Q2B

CLK_PCI_LPBACK

15

PEG_B_CLKRQ# / GPIO56

V40
V42

XTAL25_OUT

1
R183

ER16

E6

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

XCLK_RCOMP

1
R181

2
90.9_0402_1%

+1.05VS_VCCDIFFCLKN

ER03

FLEX CLOCKS

+3V_PCH

V45
V46

CLKOUTFLEX0 / GPIO64

K43

CLKOUTFLEX1 / GPIO65

F47

CLK_SD_48M_R
R277

CLK_SD_48M
0_0402_5%
@ T17

PAD

CLKOUTFLEX2 / GPIO66

H47

T18

PAD

CLKOUTFLEX3 / GPIO67

K49

T19

PAD

CLK_SD_48M

PCH_SMLDATA

20,40
20,40

PANTHER-POINT_FCBGA989

@
C165
1
2
22P_0402_50V8J

Compal Secret Data

Security Classification
Issued Date

PCH_SMLCLK

PCH_SMLDATA

34

2011/07/12

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

PCH_SMLCLK

Title

Compal Electronics, Inc.


PCH (2/8) PCIE, SMBUS, CLK

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

13

of

59

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

4
4
4
4

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3

BE24
BC20
BJ18
BJ20

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

4
4
4
4

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3
DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN

AY24
AY20
AY18
AU18

DMI

4
4
4
4

AW24
AW20
BB18
AV18

DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_INT
+1.05VS_VCC_EXP
DMI_IRCOMP
2
49.9_0402_1%
RBIAS_CPY
2
750_0402_1%

1
R192
1
R193

DMI_ZCOMP

FDI_FSYNC0

AV12

FDI_FSYNC0

DMI_IRCOMP

FDI_FSYNC1

BC10

FDI_FSYNC1

BH21

DMI2RBIAS

FDI_LSYNC0

AV14

FDI_LSYNC0

FDI_LSYNC1

BB10

FDI_LSYNC1

DSWVRMEN

A18

@
2
0_0402_5%

DPWROK

E22

SYSTEM_PWROK
1
R196

SYSTEM_PWROK_I
0_0402_5%

2PM_PWROK_R
0_0402_5%

40 PCH_PWROK

R197

R198
5 PM_DRAM_PWRGD
40 PCH_RSMRST#

ER26

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

0_0402_5%

WAKE#

B9

CLKRUN# / GPIO32

N3

SUS_STAT# / GPIO61

G8

SLP_S3#

F4

PM_SLP_S3#

PWRBTN#

H20

ACPRESENT / GPIO31

PCH_GPIO72

E10

BATLOW# / GPIO72

RI#

A10

RI#

30 PCH_INV_PWM

P45

L_BKLTCTL

T40
K47

L_DDC_CLK
L_DDC_DATA

CTRL_CLK
CTRL_DATA

T45
P39

L_CTRL_CLK
L_CTRL_DATA

1 LVDS_IBG
2.37K_0402_1%

AF37
AF36

LVD_IBG
LVD_VBG

AE48
AE47

LVD_VREFH
LVD_VREFL

PCH_TXCLKPCH_TXCLK+

AK39
AK40

LVDSA_CLK#
LVDSA_CLK

PCH_TXOUT0PCH_TXOUT1PCH_TXOUT2-

AN48
AM47
AK47
AJ48

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

PCH_TXOUT0+
PCH_TXOUT1+
PCH_TXOUT2+

AN47
AM49
AK49
AJ47

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

AF40
AF39

LVDSB_CLK#
LVDSB_CLK

AH45
AH47
AF49
AF45

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

AH43
AH49
AF47
AF43

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

30 PCH_LCD_CLK
30 PCH_LCD_DATA

4
4
4
4
4
4
4
4

2
R191
T20
PAD

FDI_LSYNC1

2 0_0402_5%

PCH_DPWROK

2 0_0402_5%

PCH_RSMRST#_R

PCIE_WAKE#

T22

2 R199

PM_SLP_S4#

2
J47
100K_0402_5% M45

30
30

PCH_TXCLKPCH_TXCLK+

30
30
30

PCH_TXOUT0PCH_TXOUT1PCH_TXOUT2-

30
30
30

PCH_TXOUT0+
PCH_TXOUT1+
PCH_TXOUT2+

1
0_0402_5%

PCH_DPWROK

40

32,36,41

PM_CLKRUNEC#

40

PAD

SUSCLK_R

40
30 PCH_CRT_BLU
30 PCH_CRT_GRN
30 PCH_CRT_RED

PM_SLP_S5# 40
PM_SLP_S4# 40

30 PCH_CRT_DDC_CLK
30 PCH_CRT_DDC_DAT

PM_SLP_S3# 40

SLP_A#

G10

T23

PAD

SLP_SUS#

G16

T24

PAD

PMSYNCH

AP14

H_PM_SYNC

K14

PCH_GPIO29

T25

PAD

30 PCH_CRT_HSYNC
30 PCH_CRT_VSYNC

R201
1
1
R202

PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED

N48
P49
T49

CRT_BLUE
CRT_GREEN
CRT_RED

PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT

T39
M40

CRT_DDC_CLK
CRT_DDC_DATA

M47
M49

CRT_HSYNC
CRT_VSYNC

T43
T42

DAC_IREF
CRT_IRTN

33_0402_5%
2 HSYNC_PCH
2 VSYNC_PCH
33_0402_5%
CRT_IREF

RB751V-40_SOD323-2
1
R751

2
0_0402_5%
ER21

1
C166

SDVO_TVCLKINN
SDVO_TVCLKINP

AP43
AP45

SDVO_STALLN
SDVO_STALLP

AM42
AM40

SDVO_INTN
SDVO_INTP

AP39
AP40

SLP_LAN# / GPIO29

H_PM_SYNC

SDVO_CTRLCLK
SDVO_CTRLDATA

P38 HDMICLK_NB
M39 HDMIDAT_NB

DDPB_AUXN
DDPB_AUXP
DDPB_HPD

AT49
AT47
AT40 TMDS_B_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

35
35

TMDS_B_HPD

TMDS_B_DATA2#
TMDS_B_DATA2
TMDS_B_DATA1#
TMDS_B_DATA1
TMDS_B_DATA0#
TMDS_B_DATA0
TMDS_B_CLK#
TMDS_B_CLK

35

TMDS_B_DATA2# 35
TMDS_B_DATA2 35
TMDS_B_DATA1# 35
TMDS_B_DATA1 35
TMDS_B_DATA0# 35
TMDS_B_DATA0 35
TMDS_B_CLK# 35
TMDS_B_CLK 35

P46
P42

DDPC_AUXN
DDPC_AUXP
DDPC_HPD

AP47
AP49
AT38

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

DDPD_CTRLCLK
DDPD_CTRLDATA

HDMICLK_NB
HDMIDAT_NB

M43
M36

DDPD_AUXN
DDPD_AUXP
DDPD_HPD

AT45
AT43
BH41

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

PANTHER-POINT_FCBGA989

R204
1K_0402_0.5%
2

Reserve
40 AC_PRESENT

L_BKLTEN
L_VDD_EN

ACIN

SUSCLK

H4

SUSWARN#/SUSPWRDNACK/GPIO30

E20

FDI_LSYNC0

2
0_0402_5%

SUS_STAT#

SLP_S4#

K16

PBTN_OUT#_R
1
2
R203
0_0402_5%
D2 @
AC_PRESENT_R
1
2

PM_CLKRUN#
1 R529
2
0_0402_5%
@

SLP_S5# / GPIO63

RSMRST#

@
2SUSWARN#_R
0_0402_5%

1 R195

PM_SLP_S5#

C21

2 PCH_RSMRST#_R
0_0402_5%

WAKE#

D10

R200 1

FDI_FSYNC1

U3D

PCH_ENVDD

30

ER26

R800 1
@
PCH_DPWROK_R
1 R194

N14

DRAMPWROK

FDI_FSYNC0

PCH_ENBKL

PCH_ENBKL

1 R190

4
4
4
4
4
4
4
4

DSWODVREN

SUSCLK / GPIO62

B13

5,40 PBTN_OUT#
40,44

SUSACK#

PM_DRAM_PWRGD

R801 1

40 SUSWARN#

C12

XDP_DBRESET#_R

5,12 XDP_DBRESET#_R

SUSACK#_R

System Power Management

R802 1

FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7

FDI_INT

BJ24

ER26
SUSACK#

FDI_INT

BG25

4mil width and place


within 500mil of the PCH

40

AW16

FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7

Digital Display Interface

BC24
BE20
BG18
BG20

LVDS

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

DMI_CRX_PTX_P0
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CRX_PTX_P3

CRT

DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3

FDI

40

4
4
4
4

DMI_CRX_PTX_N0
DMI_CRX_PTX_N1
DMI_CRX_PTX_N2
DMI_CRX_PTX_N3

http://shop61976717.taobao.com
http://shop61976717.taobao.com

U3C

PANTHER-POINT_FCBGA989
<BOM Structure>

XDP_DBRESET#_R
2
100P_0402_50V8J

Reserve for EMI please close to U3


+3VS

+3VS
U7

+RTCVCC

1
2
2
R210
0_0402_5% B
PCH_PWROK
1 A

SYSTEM_PWROK

SYSTEM_PWROK

Del R205

+3VS
R211 1
R212 1

VGATE

5,51

ER01
PCH_CRT_DDC_CLK
2
2.2K_0402_5%
PCH_CRT_DDC_DAT
2
2.2K_0402_5%
CTRL_CLK
2
2.2K_0402_5%
CTRL_DATA
2
2.2K_0402_5%

1
R206
1
R207
1
R208
1
R209

DSWODVREN

R213

DSWODVREN

R214

2 2.2K_0402_5%
2 2.2K_0402_5%

PCH_LCD_CLK
PCH_LCD_DATA

1 330K_0402_5%

NC7SZ08P5X_NL_SC70-5
@

1 330K_0402_5%

+3V_PCH
ER23
R230 1

2 10K_0402_5%

PCH_GPIO72

R217 1

2 10K_0402_5%

RI#

R219 1

2 10K_0402_5%

WAKE#

R221 1

2 10K_0402_5%

AC_PRESENT_R

R222 1

2 200K_0402_5%

SUSWARN#

R223 1

2 10K_0402_5%
@

PCH_RSMRST#

R225 1

1 100K_0402_5%

R224
8.2K_0402_5%

R803 2

2 10K_0402_5%

PM_CLKRUN#
2

PCH_DPWROK

2 PCH_CRT_BLU
150_0402_1%~D
2 PCH_CRT_GRN
150_0402_1%~D
2 PCH_CRT_RED
150_0402_1%~D
2 PCH_ENVDD
100K_0402_5%~D

+3VS

ER26

1
R215
1
R216
1
R218
1
R220

PCH_GPIO29

DSWODVREN - On Die DSW VR Enable


HEnable
LDisable

SYSTEM_PWROK_I

2
@ R226
2
@ R227

1
100K_0402_5%
1
100K_0402_5%

R130
10K_0402_5%

Intel CRB EMRLDLKE2 Rev1.0

Compal Secret Data

Security Classification
Issued Date

PM_PWROK_R

2011/07/12

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PCH (3/8) DMI,FDI,PM,GFX,DP

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

14

of

59

U3E

USB3_RX1_N
USB3_RX2_N

37
37

USB3_RX1_P
USB3_RX2_P

37 USB3_TX1_P
37 USB3_TX2_P

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

20,29,54

DGPU_PWR_EN

41 PCH_WAN_RADIO_OFF#

C167
1
2
0.1U_0402_16V4Z~D

31

ODD_DA#

TP21
TP22
TP23
TP24

BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30

37 USB3_TX1_N
37 USB3_TX2_N

B21
M20
AY16
BG46

USB3Rn1
USB3Rn2
USB3Rn3
USB3Rn4
USB3Rp1
USB3Rp2
USB3Rp3
USB3Rp4
USB3Tn1
USB3Tn2
USB3Tn3
USB3Tn4
USB3Tp1
USB3Tp2
USB3Tp3
USB3Tp4

K40
K38
H38
G38

PIRQA#
PIRQB#
PIRQC#
PIRQD#

DGPU_HOLD_RST#
PCH_GPIO52
DGPU_PWR_EN

C46
C44
E40

REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

PCH_WAN_RADIO_OFF#

D47
E42
F46

GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

PCH_GPIO2
ODD_DA#
PCH_GPIO4
PCH_GPIO5

ODD_DA#

G42
G40
C42
D44

T26

K10
PCH_PLTRST#

CLK_PCI_LPBACK
CLK_PCI_LPC
CLK_LPC_DEBUG1

13 CLK_PCI_LPBACK
40 CLK_PCI_LPC
41 CLK_LPC_DEBUG1

R232
R233
R234

1 22_0402_5%
2 22_0402_5%
2 22_0402_5%

2
1
1

CLK_PCI0
CLK_PCI1
CLK_PCI3

C6
H49
H43
J48
K42
H40

RSVD1
RSVD2
RSVD3
RSVD4

AY7
AV7
AU3
BG4

RSVD5
RSVD6

AT10
BC8

RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

RSVD23
RSVD24

AV5
AV10

RSVD25

AT8

RSVD26
RSVD27
RSVD28
RSVD29

GPIO19 => BBS_BIT0


GPIO51 => BBS_BIT1
Boot BIOS Strap

BBS_BIT0

BBS_BIT1

Panther Point USB Port Mapping


USB 2.0 Port Number

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

1
2

AY5
BA2

AT12
BF3

USB20_N0
USB20_P0
USB20_N1
USB20_P1

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

USBRBIAS#

C33

USBRBIAS

B33

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

A14
K20
B17
C16
L16
A16
D14
C14

Reserved(NAND)

Reserved

SPI

USB 3.0 Port Number

NV_ALE

Boot BIOS
Location
LPC

Intel Anti-Theft Techonlogy

High=Endabled
NV_ALE
Low=Disable(floating)

*
+1.8VS

NV_ALE

Reserve for EMI please close to U3


PAD

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PCI

37
37

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20

USB

BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45

RSVD

@ R228 1

2 1K_0402_5%

USB2/3 port 1

USB20_N0 37
USB20_P0 37
USB20_N1 37
USB20_P1 37

USB2/3 port 2

USB20_N4
USB20_P4

USB20_N4 41
USB20_P4 41

Mini Card(WLAN)

Bluetooth

ER14

HM76 not Support USB Port6,7


USB20_N8
USB20_P8
USB20_N9
USB20_P9
USB20_N10
USB20_P10

USB20_N8
USB20_P8
USB20_N9
USB20_P9
USB20_N10
USB20_P10

30
30
33
33
34
34

+3V_PCH

Camera
USB2 Conn. R

USB_OC0#
USB_OC2#
USB_OC7#
USB_OC5#

Card Reader

USB_OC6#
USB_OC4#
USB_OC3#
USB_OC1#

Within 500 mils

USBRBIAS

1
R231

2
22.6_0402_1%

10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%

10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%

1
1
1
1

1
1
1
1

2
2
2
2

R776
R777
R778
R779

2
2
2
2

R780
R781
R782
R783

Over Current Pin Default Usage


OC Pin

PCH Mapping

Port 0 & 1

Port 2 & 3

Port 4 & 5

Port 6 & 7

Port 8 & 9

Port 10 & 11

Port 12 & 13

PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

USB_OC0#

USB_OC4#

37

37

(For USB Port0, 1)

(For USB Port9)

PANTHER-POINT_FCBGA989

U8

2
2
2
2

5,32,36,40,41

R788
R789
R790
R791

PLT_RST#

OUT

IN2

PCH_PLTRST#
DIS@
20 DGPU_RST#

1 R240
100_0402_5%

8.2K_0402_5%
8.2K_0402_5%

1
1

2 R792
2 R793

DGPU_HOLD_RST#

1 R244

2 10K_0402_5%

DGPU_PWR_EN

1 R288
@

2 10K_0402_5%

2
0_0402_5%

C169
1

DIS@
2
0.1U_0402_16V4Z~D

U9
B 2

PCH_PLTRST#

MC74VHC1G08DFT2G_SC70-5

Y
DIS@

R241
100K_0402_5%
DIS@

DGPU_HOLD_RST#

NC7SZ08P5X_NL_SC70-5

PCH_GPIO52
PCH_GPIO2

R243
100K_0402_5%

4
1

1
1
1
1

8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%

C168
1
2
0.1U_0402_16V4Z~D

IN1

+3VS

PCH_WAN_RADIO_OFF#
PCI_PIRQA#
ODD_DA#
PCH_GPIO5

1
R236

@
R238
10K_0402_5%

2
0_0402_5%
+3VS

R784
R785
R786
R787

2
2
2
2

VCC

1
1
1
1

8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%

PCH_GPIO4
PCI_PIRQB#
PCI_PIRQD#
PCI_PIRQC#

1
R235

+3VS

+3VS

GND

ER14

ER23

Compal Secret Data

Security Classification

Issued Date

2011/07/12

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.


PCH (4/8) PCI, USB, NVRAM

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

15

of

59

PCH_BT_ON

U3F
2 200K_0402_5%

R246

CRT_DET

R247

PCH_GPIO1

KB_RST#

PCH_GPIO48

40

2 10K_0402_5%
R250

40

2 10K_0402_5%

USB30_SMI#

ODD_EN#

DGPU_PWROK

40 EC_LID_OUT#

2 10K_0402_5%

C40

ODD_EN#

TACH5 / GPIO69

B41

PCH_GPIO69
GPIO70

@ T28

PAD

+3VS

GPIO71

@ T29

PAD

TACH2 / GPIO6

TACH6 / GPIO70

EC_SCI#

E38

TACH3 / GPIO7

TACH7 / GPIO71

A40

EC_SMI#

EC_SMI#

C10

GPIO8

EC_LID_OUT# 1
0_0402_5%

2 PCH_LID_SW_IN#
R498

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

A20GATE

R255

+3VS

PCH_GPIO16

U2

ER25

PCH_GPIO38

40

DS_WAKE#

DS_WAKE#

1
R804

PCH_GPIO39

2 PCH_GPIO27
0_0402_5%
PCH_GPIO28

ER26

PCH_GPIO49

41 PCH_BT_ON

PCH_BT_ON

USB30_SMI#

PCH_GPIO37

T5

SCLOCK / GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

ODD_DETECT#

V8

PCH_GPIO37

M5

SATA3GP / GPIO37

PCH_GPIO38

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

PCH_GPIO48

V13

30 CABC_SAVING

R265 1 0_0402_5%
@

+3VALW

@
1
10K_0402_5%
1

@ R266

PCH_GPIO27
10K_0402_5%

+3V_PCH

PCH_GPIO28

R268
B

HDD2_DETECT#

R269
PCH_LID_SW_IN#

AY10

2 1K_0402_5%

INIT3_3V#

T14

DF_TVS

AY1

TS_VSS1

AH8

TS_VSS2

AK11

TS_VSS3

AH10

TS_VSS4

AK10

+1.8VS

40

R254
2.2K_0402_5%

H_THERMTRIP#_C 1
390_0402_5%

DF_TVS
2
1K_0402_5%

40

2
R258

P37

SDATAOUT1 / GPIO48

VSS_NCTF_15

BG2

H_SNB_IVB#

R256

CLOSE TO THE BRANCHING POINT


H_THERMTRIP#

H_THERMTRIP#

DF_TVS

@
NC_1

@ T30

PAD

1
C170

H_CPUPWRGD
2
100P_0402_50V8J
C

SATA5GP / GPIO49 / TEMP_ALERT#

VSS_NCTF_16

BG48

GPIO57

VSS_NCTF_17

BH3

VSS_NCTF_18

BH47

A4

VSS_NCTF_1

VSS_NCTF_19

BJ4

A44

VSS_NCTF_2

VSS_NCTF_20

BJ44

A45

VSS_NCTF_3

VSS_NCTF_21

BJ45

A46

VSS_NCTF_4

VSS_NCTF_22

BJ46

A5

VSS_NCTF_5

VSS_NCTF_23

BJ5

A6

VSS_NCTF_6

VSS_NCTF_24

BJ6

B3

VSS_NCTF_7

VSS_NCTF_25

C2

B47

VSS_NCTF_8

VSS_NCTF_26

C48

BD1

VSS_NCTF_9

VSS_NCTF_27

D1

BD49

VSS_NCTF_10

VSS_NCTF_28

D49

BE1

VSS_NCTF_11

VSS_NCTF_29

E1

BE49

VSS_NCTF_12

VSS_NCTF_30

E49

BF1

VSS_NCTF_13

VSS_NCTF_31

F1

VSS_NCTF_32

F49

BF49

THRMTRIP#

V3

2 10K_0402_5%

H_CPUPWRGD

D6

2 10K_0402_5%

KB_RST#

HDD2_DETECT#

DS_WAKE#

2
R805

DMI Termination Voltage


Set to Vcc when HIGH
DF_TVS
Set to Vss when LOW

GATEA20

AY11

PCH_GPIO49

ER26

31

AU16
P5

SATA2GP / GPIO36

PCH_GPIO39

100K_0402_5%

CPU/MISC

PCH_GPIO22

PCH_GPIO37

TACH0 / GPIO17

GPIO

PCH_GPIO1

1
R257
2
R259
1
R260
1
R261
2
R262
1
R263

D40

GATEA20

P4

PROCPWRGD

RCIN#
DGPU_PWROK

40 DGPU_PWROK

31 ODD_DETECT#

R264

SATA4GP / GPIO16

PCH_GPIO69

2
R807

2
10K_0402_5%
1 @
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
1
10K_0402_5%
2
10K_0402_5%

PECI

NCTF

1
10K_0402_5%

ODD_EN#
ER25

R251
10K_0402_5%

C4
2 10K_0402_5%

R253

TACH4 / GPIO68

TACH1 / GPIO1

EC_SCI#

R252

H36

BMBUSY# / GPIO0

C41

36 USB30_SMI#

2 10K_0402_5%
R249

PCH_GPIO22

A42

2 10K_0402_5%
R248

T7

2 10K_0402_5%

PCH_GPIO16

2 10K_0402_5%

ODD_DETECT#

@
R245

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+3VS

CRT_DET

VSS_NCTF_14

Reserve for EMI please close to U3

PANTHER-POINT_FCBGA989

R270
EC_SMI#

2 10K_0402_5%

1
R271

GPIO28

On-Die PLL Voltage Regulator


This signal has a weak internal pull up

HOn-Die voltage regulator enable


LOn-Die PLL Voltage Regulator disable
1
@ R272

PCH_GPIO28

1K_0402_5%

+3VS

R273
10K_0402_5%

High: CRT Plugged

1
CRT_DET#

CRT_DET

30

Q12
2N7002_SOT23-3

2
G

Compal Secret Data

Security Classification
Issued Date

2011/07/12

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PCH (5/8) GPIO, CPU, MISC

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

16

of

59

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http://shop61976717.taobao.com

+1.05VS

POWER

U3G

PCH Power Rail Table


Refer to CPU EDS R1.5

+3VS

AN16
AN17
+1.05VS

AN26

R274
0_0805_5%

R275
0_0805_5%

AN27
+1.05VS_VCC_EXP

+3VS

AP23
1

C188
1U_0402_6.3V6K

C187
1U_0402_6.3V6K

1
C184
10U_0805_6.3V6M
2

C186
1U_0402_6.3V6K

+1.05VS_VCC_EXP
C185
1U_0402_6.3V6K

AP21

AP24
AP26
AT24

C190

VCCIO[16]
VCCIO[17]

VCCIO[19]

3709mA

AP17

VCCTX_LVDS[2]

C172
0.1U_0402_10V7K

0.001

V5REF

0.001

V5REF_Sus

0.001

Vcc3_3

3.3

0.228

VccADAC

3.3

0.001

VccADPLLA

1.05

0.075

VccADPLLB

1.05

0.075

VccCore

1.05

1.3

VccDMI

1.05

0.042

VccIO

1.05

3.709

VccASW

1.05

0.903

VccSPI

3.3

0.01

VccDSW

3.3

0.001

VccDFTERM

1.8

0.002

VccRTC

3.3

6 uA

VccSus3_3

3.3

0.065

+1.8VS

AK37
L2

Near AP43

VCCTX_LVDS[1]

1.05

+3VS

AM37
AM38
AP36

+VCCTX_LVDS
C180
C178 1
1
1
22U_0805_6.3V6M
0.01U_0402_16V7K
C179
0.01U_0402_16V7K
2
2
2

2
1
0.1UH_MLF1608DR10KT_10%_1608

0.1uH inductor, 200mA

AP37

VCC3_3[6]

V33

+3VS
1

VCC3_3[7]

V34
2

C182
0.1U_0402_10V7K

VCCVRM[3]

AT16
+VCCP_VCCDMI

VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]

VCCDMI[1]

75mA VCCCLKDMI

AT20

1
1

AB36

VCC3_3[3]

VCCVRM[2]
VccAFDIPLL
VCCIO[27]
VCCDMI[2]

2mA VCCDFTERM[2]
VCCDFTERM[3]
VCCDFTERM[4]

10mA VCCSPI

R387
1
2
0_0805_5%

+1.05VS_VCC_DMI_CCI
1

+1.05VS

R276

+VCCP_VCCDMI

2
VCCDFTERM[1]

0.1U_0402_10V7K

AU20

V_PROC_IO

C173
10U_0805_6.3V6M

+1.5VS

+1.5VS

+VCCP_VCCDMI

S0 Iccmax
Current (A)

AK36

VCCIO[18]

VCCIO[26]

+1.05VS

CRT
LVDS

VCCIO[15]

VCCIO[25]

BG6

Voltage

VCCAPLLEXP

AN34

AP16

VCCTX_LVDS[4]

AN33

BH29
1

L1
2
1
BLM18PG181SN1_0603

VCCIO[28]

FDI

AN21

U47

+VCCADAC

2
0_0805_5%

C183
+1.05VS 2
1U_0402_6.3V6K

ER23
C189
1U_0402_6.3V6K

VccSusHDA

3.3 / 1.5

VccVRM

1.8 / 1.5

0.01

AG16
AG17
AJ16

AJ17

V1

0.167

+1.8VS

C191
0.1U_0402_10V7K

BJ22

VSSADAC

40mAVCCTX_LVDS[3]

HVCMOS

AN19

U48

VSSALVDS

DMI

+1.05VS

1mA VCCADAC

1mAVCCALVDS

DFT / SPI

VCC CORE

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]

VCCIO

C177
1U_0402_6.3V6K

C176
1U_0402_6.3V6K

C174
10U_0805_6.3V6M
2

C175
1U_0402_6.3V6K

AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31

C171
0.01U_0402_16V7K

Voltage Rail
1300mA

@
2
R278

+3V_VCCPSPI

2
C193
R279
1U_0402_6.3V6K

1.05

0.075

VccSSC

1.05

0.095

VccDIFFCLKN

1.05

0.055

VccALVDS

3.3

0.001

VccTX_LVDS

1.8

0.04

1
+3V_PCH
0_0603_5%

PANTHER-POINT_FCBGA989

VccCLKDMI

1
+3VS
0_0603_5%
B

Compal Secret Data

Security Classification
Issued Date

2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PCH (6/8) PWR

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

17

of

59

+VCCACLK
1
0_0603_5%

POWER

AL24

@
C200
1U_0402_6.3V6K

AA19

AA24
1
AA26
C204
22U_0805_6.3V6M

AA27
AA29

+1.05VS

AC26

C208
1U_0402_6.3V6K~D

C207
1U_0402_6.3V6K~D

C206
1U_0402_6.3V6K~D

AA31

AC27
AC29
AC31
AD29
AD31

ER23

W21
R289

W23

1
@

C213
1U_0402_6.3V6K

+3VS_VCC_CLKF33

2
0_0805_5%

C212
10U_0805_10V4Z

DCPSUS[3]

VCCSUS3_3[10]

W24
W26
W29
W31
W33

VCCASW[1]
VCCIO[34]

903mA

2
R285

+1.05VM_VCCSUS

1
0_0603_5%

+VCCRTCEXT
+1.5VS

N16

1mA

VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]

V5REF_SUS
DCPSUS[4]
VCCSUS3_3[1]

1mA

VCCASW[15]

V5REF

VCCSUS3_3[2]

Y49

BD47

+1.05VS_VCCA_B_DPL

+1.05VS_VCCDIFFCLKN

2
R287

+1.05VS

18mil

+1.05VS_VCCDIFFCLKN

1
0_0603_5% 1

18mil

C220
1U_0402_6.3V6K

AG33

1
+
2

+1.05VS_VCCA_B_DPL

1
+
2

C230
1U_0402_6.3V6K

C227
0.1U_0402_10V7K

A22

AN24

P34

VCC3_3[2]

VCCASW[20]

VCCVRM[4]

VCCIO[13]
VCCIO[6]

VCCADPLLA75mA
VCCADPLLB75mA

VCCAPLLSATA
VCCVRM[1]

VCCIO[7]
VCCDIFFCLKN[1]
55mA
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]

N20

VCCRTC

2
+3VS

R283
10_0402_5%

+3V_PCH

C209
1U_0402_6.3V

D4
RB751V40_SC76-2

+3VS

2
C211
0.1U_0402_10V7K

W16

+PCH_V5REF_RUN

1
AA16

C210
1U_0603_10V6K

+3VS

T34
1

AJ2

C214
0.1U_0402_10V7K

+1.05VS_SATA3

1
AF13

R284
C215
0.1U_0402_10V7K

2
1

+1.05VS

C216
1U_0402_6.3V6K

+1.05VS_SATA3

AH14

1
0_0805_5%

AH13

AF14
AK1
+1.5VS
AF11
+1.05VS_VCC_SATA
+1.05VS_VCC_SATA

AC16
AC17

VCCIO[4]

AD17

2
1

VCCASW[23]
VCCASW[21]

10mA

VCCSUSHDA

+1.05VS

+1.05VS

V21
T19

+VCCSUSHDA

P32
1

PANTHER-POINT_FCBGA989

Issued Date

1
0_0805_5%

T21

R291

0_0402_5%

+3V_PCH
If it support 3.3V audio signals
POP:RH12 (0ohm)

2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

If it support 1.5V audio signals


POP:RH12 (180 ohm)/RH13 (150 ohm)

Compal Secret Data

Security Classification

C202
0.1U_0603_25V7K

VCCIO[3]

VCCASW[22]

1mA

+5VS

DCPSST

V_PROC_IO

+PCH_V5REF_SUS

R286
VCCIO[2]

VCCSSC95mA

DCPSUS[1]
DCPSUS[2]

D3
RB751V40_SC76-2

+PCH_V5REF_RUN

2
DCPRTC

R282
10_0402_5%

+3V_PCH

VCCASW[19]

+3V_PCH

VCCASW[18]

+RTCVCC

C235
1U_0402_6.3V6K

1
2
L9
10UH_LBR2012T100M_20%~D

C233
220U_B2_2.5VM_R35M

+1.05VS

T17
V19

@
C224
1U_0402_6.3V6K

BJ8

+1.05VS_VCCA_A_DPL
C232
220U_B2_2.5VM_R35M

C234
1U_0402_6.3V6K

1
C225
4.7U_0603_6.3V6K

C226
0.1U_0402_10V7K

L8
10UH_LBR2012T100M_20%~D
1
2

+VCCA_USBSUS

+1.05VM_VCCSUS
C223
0.1U_0402_10V7K

V16

C229
0.1U_0402_10V7K

1
C222
1U_0402_6.3V6K

C228
0.1U_0402_10V7K

AN23

2
+VCCSST

+1.05VS

M26

VCCSUS3_3[5]

VCC3_3[8]

MISC

1U_0402_6.3V6K

+5V_PCH

+VCCA_USBSUS

+3VS

HDA

+3V_PCH

VCCASW[17]

C218
AF17
AF33
AF34
AG34

+1.05VS
+PCH_V5REF_SUS

P22

VCC3_3[4]

CPU

+1.05VS

BF47

+3V_PCH

T26

P20

VCCASW[16]

RTC

P24

N22

VCC3_3[1]

SATA

+1.05VS_VCCA_A_DPL

V24

VCCSUS3_3[4]

VCCIO[12]

C217
0.1U_0402_10V7K

V23

VCCSUS3_3[3]

+1.05VS

VCCASW[2]

VCCIO[5]
+1.05VS

T24

R292
150_0402_1%
2
1

+3VS

VCCSUS3_3[9]

VCCSUS3_3[6]

AA21

VCCIO[14]

T23

VCCSUS3_3[8]

+VCCSUS1

VCCSUS3_3[7]

119mA
VCCAPLLDMI2

AL29

T29

C205

BH23

VCCIO[33]

+1.05VS

C203
22U_0805_6.3V6M
2

VCCIO[32]

C195
1U_0402_6.3V6K

VCC3_3[5]

T27

T38

P28

DCPSUSBYP

+3VS_VCC_CLKF33

1
@ C196
0.1U_0402_10V7K

VCCIO[31]

V12

+1.05VS
1

@ C201
1U_0402_6.3V6K

+PCH_VCCDSW

P26

VCCDSW3_33mA

C221
1U_0402_6.3V6K

2
0_0603_5%

T16

N26

VCCIO[30]

C231
0.1U_0402_10V7K

1
R290

+VCCPDSW

USB

VCCIO[29]

0.1U_0402_10V7K

C194
0.1U_0402_10V7K

Clock and Miscellaneous

ER10

+3VALW

VCCACLK

C199
0.1U_0402_10V7K

U3J
AD49

C198
0.1U_0402_10V7K

PCI/GPIO/LPC

2
R280

+3V_PCH
2
0_0603_5%

http://shop61976717.taobao.com
http://shop61976717.taobao.com

+1.05VS

1
R281

Title

Compal Electronics, Inc.


PCH (7/8) PWR

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

18

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
U3I
AY4
AY42
AY46
AY8
B11
B15
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3

U3H
D

H5
AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3

VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

PANTHER-POINT_FCBGA989

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

PANTHER-POINT_FCBGA989

Compal Secret Data

Security Classification
Issued Date

2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PCH (8/8) VSS

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

19

of

59

PCIE_GTX_C_CRX_N[0..15]

4 PCIE_GTX_C_CRX_N[0..15]

PCIE_CTX_C_GRX_N[0..15]

4 PCIE_CTX_C_GRX_N[0..15]

+3VSG

@ 1
2
R901
10K_0402_5%
@ 1
2
R902
10K_0402_5%
@ 1
2
R903
10K_0402_5%
2 DIS@ 1
R904
10K_0402_5%
@ 1
2
R905
10K_0402_5%
2 DIS@ 1
R906
10K_0402_5%

PCIE_CTX_C_GRX_P[0..15]

4 PCIE_CTX_C_GRX_P[0..15]

http://shop61976717.taobao.com
http://shop61976717.taobao.com

PCIE_GTX_C_CRX_P[0..15]

4 PCIE_GTX_C_CRX_P[0..15]

for GS4, the boot voltage is 0.975V


for GV4, the boot voltage is 0.85V

U10A

GPIO

I/O

GPIO0

GPU_VID4

GPIO1

GPU_VID3

GPIO2

LCD_BL_PWM

GPIO3

LCD_VDD

GPIO4

LCD_BLEN

GPIO5

GPU_VID1

GPIO6

GPU_VID2

GPIO7

3D Vision

GPIO8

I/O

OVERT#

GPIO9

I/O

ALERT#

USAGE

Part 1 of 5

PEG_CLKREQ#
R937

VID_1
VID_2

R907
R908
R909
R910
R911
R912

1
1
1
1
1
1

DIS@
DIS@
DIS@
DIS@
DIS@
DIS@

2
2
2
2
2
2

JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N

I2CA_SCL
I2CA_SDA
I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
GPIO20
GPIO21
I2CS_SCL
I2CS_SDA

XTAL_SSIN
XTAL_OUTBUFF

PEX_CLKREQ_N

GPU_VID0
GPU_VID1
GPU_VID2
GPU_VID3
GPU_VID4
GPU_VID5
1
R915
1
R916
DIS@ 1
R917
@ 1
R918
DIS@ 1
R919
@ 1
R920

ER34

DIS@

DIS@

1 10K_0402_5%
1 10K_0402_5%

VID_0
ACIN_BUF_VGA
VID_5

54
54
54
54
54
54

AD2
AD1
AE2
AD3
AE3

+3VSG
1

AF1
AE1

XTAL_OUT
XTAL_IN

10K_0402_5% U11
ACIN_BUF_VGA

R1
T3
R2
R3
A2
B1

VGA_BUF#

ACIN_BUF

R922
R923

DIS@
1
DIS@
1

40

GPIO10 O

MEM_VREF_CTL

GPIO11 O

GPU_VID0

GPIO12 I

PWR_LEVEL

GPIO13 O

GPU_VID5

GPIO14 I

HPD_AB

GPIO15 I

HPD_C

GPIO16 O

MEM_VDD_CTL

GPIO17 I

HPD_D

GPIO18 I

HPD_E

GPIO19 I

HPD_F

GPIO20

Reserved

GPIO21

Reserved

54

NC7SZ08P5X_NL_SC70-5
R428
0_0402_5%
DIS@

2
1
DIS@
D5
CH751H-40PT_SOD323-2

GPU_JTAG_TCK
GPU_JTAG_TDI
GPU_JTAG_TDO
GPU_JTAG_TMS

AD25

R6
V6

AF3
AG4
AE4
AF4
AG3

Y
G

T5
R4
T4

ER34

R315
DIS@

U6
U4

DACB_RED
DACB_BLUE
DACB_GREEN

TESTMODE

PEX_RST_N

0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

+3VSG
R913 2 DIS@
R914 2 DIS@

ER42

PEX_TERMP

AE9

VID_0
VID_1
VID_2
VID_3
VID_4
VID_5

2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%

GPIO
DACA
DACB

PCI EXPRESS

DACB_HSYNC
DACB_VSYNC

DACB_VREF
DACB_RSET

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N

AG10

VID_4
VID_3

+3VSG

2 10K_0402_5%
2 10K_0402_5%

VGA_DDC_CLK
VGA_DDC_DATA
I2CB_SCL
I2CB_SDA
VGA_LCD_CLK
VGA_LCD_DATA

VGA_DDC_CLK
R924 1 DIS@
VGA_DDC_DATA R925 1 DIS@

2 2.2K_0402_5%
2 2.2K_0402_5%

I2CB_SCL
I2CB_SDA

R926
R927

1 DIS@
1 DIS@

2 2.2K_0402_5%
2 2.2K_0402_5%

VGA_LCD_CLK
R928
VGA_LCD_DATA R929

1 DIS@
1 DIS@

2 2.2K_0402_5%
2 2.2K_0402_5%

I2CS_SCL
I2CS_SDA

1 DIS@
1 DIS@

2 2.2K_0402_5%
2 2.2K_0402_5%

R930
R931

A3
A4
T1
T2

I2CS_SCL
I2CS_SDA
+3VSG

D11

XTAL_SSIN

R934

E9

XTAL_OUTBUFF

R936

E10

XTALOUT

D10

XTALIN

DIS@
1
DIS@
1

AF10
AE10

2
10K_0402_5%

DACA_RED
DACA_BLUE
DACA_GREEN

PEX_REFCLK
PEX_REFCLK_N

AD9

1 DIS@

DACA_HSYNC
DACA_VSYNC

N1
G1
C1
M2
M3
K3
K2
J2
C2
M1
D2
D1
J3
J1
K1
F3
G3
G2
F1
F2

2 10K_0402_5%
I2CS_SCL

2 10K_0402_5%

PCH_SMLCLK

13,40

DMN66D0LDW-7_SOT363-6
Q901A DIS@

+3VSG
5

PEX_TSTCLK_OUT+
PEX_TSTCLK_OUT1
DIS@ 200_0402_1%
PEX_TREMP
1
DIS@ 2.49K_0402_1%

15 DGPU_RST#
3

+3VSG

PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N

AB10
AC10

13 CLK_PCIE_VGA
13 CLK_PCIE_VGA#
2
R933
2
R935

AD10
AD11
AD12
AC12
AB11
AB12
AD13
AD14
AD15
AC15
AB14
AB15
AC16
AD16
AD17
AD18
AC18
AB18
AB19
AB20
AD19
AD20
AD21
AC21
AB21
AB22
AC22
AD22
AD23
AD24
AE25
AE26

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19

DACA_VREF
DACA_RSET

TEST

PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N

I2C

PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_N15

AE12
AF12
AG12
AG13
AF13
AE13
AE15
AF15
AG15
AG16
AF16
AE16
AE18
AF18
AG18
AG19
AF19
AE19
AE21
AF21
AG21
AG22
AF22
AE22
AE24
AF24
AG24
AF25
AG25
AG26
AF27
AE27

CLK

PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N15

N13M-GE1-S-A1_BGA533
@
I2CS_SDA

PCH_SMLDATA

13,40

DMN66D0LDW-7_SOT363-6
Q901B DIS@
DGPU_PWR_EN

15,29,54

+3V_PCH

DIS@
R939
10K_0402_5%
XTALOUT

XTALIN

DIS@
Q900
2N7002H_SOT23-3

R932

1M_0402_5%

2
G

R938
10K_0402_5%

3
3
1

PEG_CLKREQ#_R
1

@
R940
2.2K_0402_5%
2

for safe

1 DIS@
2
R900
0_0402_5%

PEG_CLKREQ#
DIS@
C901
12P_0402_50V8J

@
R941
2.2K_0402_5%

3
GND
Y3
DIS@ 4

1
GND

ER16

2
2

C900 DIS@
12P_0402_50V8J

13 PEG_CLKREQ#_R

27MHZ_10PF_7V27000050
1

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/07/12

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

N13M PEG 1/9


Size
C
Date:

Document Number

Rev
0.2

LA-8224P
Thursday, October 27, 2011

Sheet
E

20

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
MDA[15..0]

MDA[31..16]

27

MDA[47..32]

28

MDA[63..48]

MDA[31..16]
MDA[47..32]
MDA[63..48]

U10B

CMDA[30..0]

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

G24
F27
F25
F26
G26
G27
G25
J25
J24
H24
H22
J26
G22
G23
J22
J27
M24
L24
J23
K23
K22
M23
K24
M27
N27
M26
K26
K27
K25
M25
L22

CMDA0
CMDA1
CMDA2
CMDA3
CMDA4
CMDA5
CMDA6
CMDA7
CMDA8
CMDA9
CMDA10
CMDA11
CMDA12
CMDA13
CMDA14
CMDA15
CMDA16
CMDA17
CMDA18
CMDA19
CMDA20
CMDA21
CMDA22
CMDA23
CMDA24
CMDA25
CMDA26
CMDA27
CMDA28
CMDA29
CMDA30

FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7

C26
B19
D19
D23
T24
AA23
AB27
T26

DQMA0
DQMA1
DQMA2
DQMA3
DQMA4
DQMA5
DQMA6
DQMA7

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

D25
A18
E18
B24
R22
Y24
AA27
R27

FBA_DQS_W P0
FBA_DQS_W P1
FBA_DQS_W P2
FBA_DQS_W P3
FBA_DQS_W P4
FBA_DQS_W P5
FBA_DQS_W P6
FBA_DQS_W P7

C25
A19
E19
A24
T22
AA24
AA26
T27

25,26,27,28

DQMA[3..0]

25,26

DQMA[7..4]

27,28

DQSA#0
DQSA#1
DQSA#2
DQSA#3
DQSA#4
DQSA#5
DQSA#6
DQSA#7

DQSA#[3..0]

25,26

DQSA#[7..4]

27,28

DQSA[3..0]

25,26

DQSA[7..4]

27,28

+1.5VSG

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

DQSA0
DQSA1
DQSA2
DQSA3
DQSA4
DQSA5
DQSA6
DQSA7

R947
1.1K_0402_1%
DIS@

D22
E24
E22
D24
B27
D27
C27
D26
A21
B21
C21
C19
C18
D18
B18
C16
E21
F20
D20
F21
D17
F18
D16
E16
A22
C24
D21
B22
C22
A25
B25
A26
U24
V24
V23
T23
R24
P24
P22
R23
AC24
AB23
AB24
W 24
AA22
W 23
W 22
V22
AA25
W 27
W 26
W 25
AD27
AB26
AD26
AB25
V25
R25
V26
V27
R26
T25
N25
N26

MEMORY INTERFACE

Part 2 of 5
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

+FB_VREF

+FB_VREF

FB_VREF

A16

FBA_CLK0
FBA_CLK0_N

F24
F23

CLKA0
CLKA0#

25,26
25,26

FBA_CLK1
FBA_CLK1_N

N24
N23

CLKA1
CLKA1#

27,28
27,28

FBA_DEBUG

M22 FBA_DEBUG0
1
R949

2
10K_0402_5%

26

R948
1.1K_0402_1%
DIS@

MDA[15..0]

DIS@ C902
0.1U_0402_16V4Z

VRAM Interface

25

+1.5VSG

@
N13M-GE1-S-A1_BGA533
@

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2011/07/12

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

N13M VRAM 2/9


Size Document Number
Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet

21

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
D

U10C
Part 3 of 5

G4
G5
P4
N4
M5
M4
L4
K4
H4
J4

IFPC_AUX_I2CW_SCL
IFPC_AUX_I2CW_SDA_N
IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N

D3
D4
F5
F4
E4
D5
C3
C4
B3
B4

IFPD_AUX_I2CX_SCL
IFPD_AUX_I2CX_SDA_N
IFPD_L0
IFPD_L0_N
IFPD_L1
IFPD_L1_N
IFPD_L2
IFPD_L2_N
IFPD_L3
IFPD_L3_N

F7
G6
D6
C6
A6
A7
B6
B7
E6
E7

IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N
IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N

BUFRST_N

THERMDN
THERMDP

STRAP4
STRAP3

ROM_CS_N
ROM_SCLK
ROM_SI
ROM_SO

R968 1 DIS@

N5

IFPC_RSET
IFPD_RSET
IFPE_RSET

@ 1
2
R347
4.99K_0402_1%
@ 1
2
R355
15K_0402_1%

@ 1
2
R346
10K_0402_1%
@ 1
2
R354
30K_0402_1%

2
1
R344
@
10K_0402_1%

2
1
R343
@
34.8K_0402_1%

@ 1
2
R342
4.99K_0402_1%

2
1
R341
@
10K_0402_1%
ER22

same QCL-40

D8
D9

N2

STRAP4

F9

STRAP3

B10

Need check with NVIDIA


For N13M-GE1 GB1b-64_256Mx8 strap table
GPU

R969
10K_0402_5%
1 DIS@ 2

ROM_CS#

C9

ROM_SCLK

A10

ROM_SI

Frenq.

Memory Size

strap0

strap1

strap2

strap3

strap4

ROM_SI

ROM_SO

667+ MHz

256M* 8* 8
2GB

HYNIX SA000056O00
H5TQ2G83CFR-H9C

R
PH 45K

R
PL 45K

R
PH 5K

R
PL 5K

R
PL 10K

R
PL 10K

R
PL 30K

R
PH 5K

N13M-GE1

667+ MHz

256M* 8* 8
2GB

ELPIDA SA000056P00
EDJ2108BCSE-DJ-F

R
PH 45K

R
PL 45K

R
PH 5K

R
PL 5K

R
PL 10K

R
PL 5K

R
PL 30K

R
PH 5K

N13M-GE1

667+ MHz

512M* 8* 8
4GB

HYNIX SA00005BL00
H5TQ4G83MFR-PBC

R
PH 45K

R
PL 45K

R
PH 5K

R
PL 5K

R
PL 10K

R
PL 15K

R
PL 30K

R
PH 5K

667+ MHz

512M* 8* 8
4GB

ELPIDA SA00005AA00
EDJ4208BBBG-GN-F

R
PH 45K

R
PL 45K

R
PH 5K

R
PL 5K

R
PL 10K

R
PL 20K

R
PL 30K

R
PH 5K

N13M-GE1
+3VSG

C10 ROM_SO
N13M-GE1

IFPAB_RSET

2 DIS@ 1
R340
45.3K_0402_1%

100K_0402_5%
2

@ 1
2
R345
4.99K_0402_1%

STRAP2

@ 1
2
R353
4.99K_0402_1%

STRAP1

A9

ROM_SI
ROM_SO
ROM_SCLK

STRAP3
STRAP4
2
1
R352 DIS@
10K_0402_1%

STRAP0

B9

STRAP0
STRAP1
STRAP2

+3VSG

2
1
R351
@
4.99K_0402_1%

STRAP2

MULTI_STRAP_REF0_GND 1 DIS@ 2
T6
R954
40.2K_0402_1%
W6
Y6
AA6
N3

C7

+3VSG

Straps

@ 1
2
R350
4.99K_0402_1%

STRAP1

R950
10K_0402_5%
1 DIS@ 2

2 DIS@ 1
R349
45.3K_0402_1%

STRAP0

C15
D15
J5

@ 1
2
R348
4.99K_0402_1%

NC
DBG
STRAP

IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N

NC
NC
PGOOD

MULTI_STRAP_REF2_GND
DBG_DATA1
DBG_DATA2
DBG_DATA3
DBG_DATA4

GENERAL

AB3
AB2
W1
V1
W3
W2
AA2
AA3
AB1
AA1

MULTI LEVEL STRAPS

SERIAL

IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N

LVDS / TMDS

AC4
AD4
V5
V4
AA5
AA4
W4
Y4
AB4
AB5

AB6

R970 1 @

2 1K_0402_1%

R5

R971 1 @

2 1K_0402_1%

M6

R972 1 @

2 1K_0402_1%

F8

R973 1 @

2 1K_0402_1%

Memory Config

SA000056A10
C.S N13M-GE1-S-A1 FCBGA533
NVIDIA GB1b-64 GF119-660-A1 ()
VRAM 256*8*8

N13M-GE1-S-A1_BGA533
@

ROM_SCLK

256M*8*8
1.SA000056O00
DDR3 1600 256*8 1.5V FBGA78
HYNIX/H5TQ2G83CFR-PBC
2.SA000056P00
DDR3 1600 256*8 1.5V FBGA78
ELPIDA/EDJ2108BDBG-GN-F

512M*8*8
1.SA00005BL00
DDR3 1600 512M*8 1.5V FBGA78
HYNIX/H5TQ4G83MFR-PBC
2.SA00005AA00
DDR3 1600 512M*8 1.5V FBGA78
ELPIDA/EDJ4208BBBG-GN-F

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

N13M LVDS 3/9


Size Document Number
Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

22

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
+VGA_CORE

Under GPU

U10D

AG9
V3
1 R975

+IFPAB_IOVDD

V2

10K_0402_5% 2

DIS@ 1 R976

+IFPCD_IOVDD

J6

10K_0402_5% 2

DIS@ 1 R977

+IFPE_IOVDD

H6

10K_0402_5% 2

DIS@ 1 R979

10K_0402_5% 2

DIS@ 1 R980

+IFPC_PLLVDD

P6

10K_0402_5% 2

DIS@ 1 R982

+IFPD_PLLVDD

N6

10K_0402_5% 2

DIS@ 1 R984

+IFPE_PLLVDD

D7

+IFPAB_PLLVDD

AD5

PEX_SVDD_3V3

PLLVDD
FB_PLLAVDD

IFPA_IOVDD
FB_PLLAVDD
IFPB_IOVDD
FB_DLLAVDD

+PEX_PLLVDD

K5
R19
AC19

+FB_ADD

DIS@ C911
22U_0805_6.3V6M

DIS@ C912
22U_0805_6.3V6M
2

DIS@ C919
22U_0805_6.3V6M

+1.05VSG

Under GPU

L901
BLM18PG181SN1D_2P
1
2
DIS@

150mA
150mA

+PLLVDD

2
0.1U_0402_16V4Z

T19

1
+1.05VSG
2

+1.05VSG

100mA

L902
DIS@
1
2
BLM18PG300SN1D_2P

+PLLVDD

IFPE_IOVDD

DACA_VDD
DACB_VDD

AG2

IFPD_PLLVDD

VDD_SENSE

IFPE_PLLVDD

VDD_SENSE

2 10K_0402_5%
1

W5
+1.5VSG

IFPAB_PLLVDD
FB_CAL_PD_VDDQ

R978 1 DIS@

B15
W15

FB_CAL_PD_VDDQ
1 DIS@
2
40.2_0402_1%
R981
VCCSENSE_VGA_R 1 DIS@ 2
R983
0_0402_5%

+1.05VSG
L900
DIS@
2
1
BLM18PG121SN1D_0603

Place Near GPU Balls


Under GPU

IFPCD_IOVDD

IFPC_PLLVDD

Near GPU

+PEX_PLLVDD

Place Near GPU Balls

110mA

DIS@ 1
C943

Near GPU

150mA

C939 1
2DIS@
0.1U_0402_16V4Z
C940 1
DIS@
2
0.1U_0402_16V4Z

DIS@ C918
22U_0805_6.3V6M

DIS@ C917
10U_0603_6.3V6M

DIS@ C916
10U_0603_6.3V6M

DIS@ C915
4.7U_0603_6.3V6K

DIS@ C914
1U_0402_6.3V6K

+1.05VSG

K6
L6

DIS@ C910
10U_0603_6.3V6M

DIS@ C909
10U_0603_6.3V6M

DIS@ C908
0.1U_0402_16V4Z

DIS@ C907
0.1U_0402_16V4Z

DIS@ C906
0.1U_0402_16V4Z

DIS@ C905
0.1U_0402_16V4Z
1

DIS@C933
DIS@
C933
22U_0805_6.3V6M

Near GPU

Under GPU

AG7
AF7
AE7
AD8
AD7
AC9
AF9

DIS@ C904
1U_0402_6.3V6K

DIS@ C903
4.7U_0603_6.3V6K

3.5A

DIS@ C936
4.7U_0603_6.3V6K

SP_PLLVDD

10K_0402_5% 2 DIS@

VID_PLLVDD

VCCSENSE_VGA 54

DIS@ C945
22U_0805_6.3V6M

PEX_PLLVDD

DIS@ C935
1U_0402_6.3V6K

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

Under GPU

DIS@ C934
0.1U_0402_16V4Z

DIS@ C944
0.1U_0402_16V4Z

A12
B12
C12
D12
E12
F12

DIS@ C938
0.1U_0402_16V4Z

4.7U_0603_6.3V6K
DIS@ C937

210mA

DIS@C932
DIS@
C932
22U_0805_6.3V6M

Near GPU

DIS@ C931
10U_0603_6.3V6M

PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD

DIS@ C930
10U_0603_6.3V6M

DIS@ C942
22U_0805_6.3V6M

AG6
AF6
AE6
AD6
AC13
AC7
AB17
AB16
AB13
AB9
AB8
AB7

DIS@ C941
4.7U_0603_6.3V6K

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

A13
B13
C13
D13
D14
E13
F13
F14
F15
F16
F17
F19
F22
H23
H26
J15
J16
J18
J19
L19
L23
L26
M19
N22
U22
Y22

DIS@ C929
4.7U_0603_6.3V6K

DIS@ C926
4.7U_0603_6.3V6K

+1.5VSG

Near GPU

8A
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

DIS@ C928
1U_0402_6.3V6K

+3VSG

DIS@ C925
1U_0402_6.3V6K

DIS@ C924
1U_0402_6.3V6K

DIS@ C923
0.1U_0402_16V4Z

R974
0_0603_5%

DIS@ C922
0.1U_0402_16V4Z

120mA

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

DIS@ C913
1U_0402_6.3V6K

Under GPU (one per pin)


DIS@ 2

DIS@ C921
0.1U_0402_16V4Z

Part 4 of 5
J9
J10
J12
J13
L9
M9
M11
M17
N9
N11
N12
N13
N14
N15
N16
N17
N19
P11
P12
P13
P14
P15
P16
P17
R9
R11
R12
R13
R14
R15
R16
R17
T9
T11
T17
U9
U19
W9
W10
W12
W13
W18
W19

DIS@ C927
1U_0402_6.3V6K

+3VSG

DIS@ C920
0.1U_0402_16V4Z

50A

POWER

E15

N13M-GE1-S-A1_BGA533
@
+1.05VSG
L903
DIS@
1
2
BLM18PG300SN1D_2P

DIS@ C947
22U_0805_6.3V6M

DIS@ C946
1U_0402_6.3V6K

+FB_ADD

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

N13M POWER & GND 4/9


Size Document Number
Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

23

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
U10E

54 VSSSENSE_VGA

2 DIS@ 1 VSSSENSE_VGA_R
0_0402_5%
R987

W16
E14

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

Part 5 of 5

GND

B2
B5
B8
B11
B14
B17
B20
B23
B26
E2
E5
E8
E11
E17
E20
E23
E26
H2
H5
J11
J14
J17
K9
K19
L2
L5
L11
L12
L13
L14
L15
L16
L17
M12
M13
M14
M15
M16
P2
P5
P9
P19
P23
P26
T12
T13

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

U2
U5
U11
U12
U13
U14
U15
U16
U17
U23
U26
V9
V19
W11
W14
W17
Y2
Y5
Y23
Y26
AC2
AC5
AC6
AC8
AC11
AC14
AC17
AC20
AC23
AC26
AF2
AF5
AF8
AF11
AF14
AF17
AF20
AF23
AF26
T16
T15
T14
F6

FB_CAL_PU_GND

A15

R985

FB_CAL_TERM_GND

B16

R986

F11

R988

GND_SENSE MULTI_STRAP_REF0_GND
GND_SENSE MULTI_STRAP_REF1_GND

2 42.2_0402_1%
DIS@
2 51.1_0402_1%
DIS@
2 40.2K_0402_1%
DIS@

F10

R989

2 40.2K_0402_1%

1
DIS@

N13M-GE1-S-A1_BGA533
@

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

N13M POWER & GND 5/9


Size Document Number
Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

24

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com

VRAM DDR3 chips

Mode D
Address

256Mx8 DDR3 *8==>2GB

0..31

32..63

CS0_L#

CMD0
CMD1

DQSA[7..0]

21,26,27,28 DQSA[7..0]

MDA1
MDA6
MDA3
MDA5
MDA0
MDA4
MDA2
MDA7

CMDA[30..0]
Group0

+1.5VSG

B3
C7
C2
C8
E3
E8
D2
E7

DQMA0
ZQ0
1

DIS@
R990
240_0402_1%

DIS@
R993
240_0402_1%

+1.5VSG

DIS@
R994
240_0402_1%

C949
DIS@
0.1U_0402_16V4Z

+MEM_VREF1
DIS@
R995
240_0402_1%

C948
DIS@
0.1U_0402_16V4Z

+MEM_VREF0
C

DIS@
R991
243_0402_1%

+MEM_VREF0
CMDA26
CMDA27
CMDA12
CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4

ER11
CMDA14

A7
B7
H8

DQS
DQS#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

+1.5VSG

U13

VREFDQ
VREFCA

J3
K8
J2

BA2
BA1
BA0

F1
H1
A3
J7
F9
H9

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14

DQSA1
DQSA#1
+1.5VSG

A2
A9
D7
G2
G8
K1
K9
M1
M9

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

NF/TDQS#
DM/TDQS
ZQ

E1
J8

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7

C1
E2
B9
E9

VDDQ
VDDQ
VDDQ
VDDQ

Group1

ODT
CK
CK#
CKE
CS#
RAS#
CAS#
WE#
RESET#

H2
F3
G3
H3
N2

CMDA0
CMDA30
CMDA15
CMDA13
CMDA5

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

B2
B8
C9
D1
D9

NC
NC
NC
NC
NC
NC

CMDA26
CMDA27
CMDA12

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

VREFDQ
VREFCA

J3
K8
J2

CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4

BA2
BA1
BA0

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14

F1
H1
A3
J7
F9
H9

ER11
CMDA14

H5TQ2G83CFR-H9C_FBGA78
@

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

NF/TDQS#
DM/TDQS
ZQ

+MEM_VREF1 E1
J8

DIS@
R992
243_0402_1%

VDDQ
VDDQ
VDDQ
VDDQ

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

A7
B7
H8

ZQ1
CMDA2
CLKA0
CLKA0#
CMDA3

DQS
DQS#

B3
C7
C2
C8
E3
E8
D2
E7

DQMA1

G1
F7
G7
G9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

C3
D3

MDA11
MDA14
MDA10
MDA13
MDA8
MDA12
MDA9
MDA15

MDA[63..0]

21,26,27,28 MDA[63..0]
21,26,27,28 CMDA[30..0]

C3
D3

DQSA0
DQSA#0

DQMA[7..0]

21,26,27,28 DQMA[7..0]

+1.5VSG

U12
DQSA#[7..0]

21,26,27,28 DQSA#[7..0]

+1.5VSG

A2
A9
D7
G2
G8
K1
K9
M1
M9

ODT
CK
CK#
CKE

G1
F7
G7
G9

CMDA2
CLKA0
CLKA0#
CMDA3

CS#
RAS#
CAS#
WE#
RESET#

H2
F3
G3
H3
N2

CMDA0
CMDA30
CMDA15
CMDA13
CMDA5

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

B2
B8
C9
D1
D9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NC
NC
NC
NC
NC
NC

C1
E2
B9
E9

CMD2

ODT_L

CMD3

CKE

CMD4

A14

CMD5

RST

RST

CMD6

A9

A9

CMD7

A7

A7

CMD8

A2

A2

CMD9

A0

A0

CMD10

A4

A4

CMD11

A1

A1

CMD12

BA0

BA0

CMD13

WE*

WE*

CMD14

A15

A15

CMD15

CAS*

A14

CAS*
CS0_H#

CMD16
CMD17

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

CMD18

ODT_H

CMD19

CKE_H

CMD20

A13

CMD21

A8

A8

CMD22

A6

A6

CMD23

A11

A11

CMD24

A5

A5

CMD25

A3

A3

CMD26

BA2

BA2

CMD27

BA1

BA1

CMD28

A12

A12

CMD29

A10

A10

CMD30

RAS*

RAS*

LOW

HIGH

A13

Not Available

H5TQ2G83CFR-H9C_FBGA78
@

place on 1st T trunk

CLKA0
1

21,26 CLKA0

DIS@
R997
160_0402_1%
21,26 CLKA0#

R996 1 DIS@
R998 1 DIS@

2 10K_0402_5%
2 10K_0402_5%

CMDA5

R999 1 DIS@

2 10K_0402_5%

Command Bit

DDR3

Default Pull-down

ODTx

10k

CKEx

10k

RST

CLKA0#

CMDA2
CMDA3

CS*

10k
No Termination

+1.5VSG

Elpida : SAxxxxxxxxx (S IC D3 256MX8/1333 xxxxxxxxxxxxxxx )

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

Hynix : SA000054600 (S IC D3 256MX8/1333 H5TQ2G83CFR-H9C FBGA )

DIS@ C961
0.1U_0402_16V4Z

DIS@ C960
0.1U_0402_16V4Z

DIS@ C959
0.1U_0402_16V4Z

DIS@ C958
0.1U_0402_16V4Z

DIS@ C957
1U_0402_6.3V6K

DIS@ C955
0.1U_0402_16V4Z

DIS@ C956
1U_0402_6.3V6K

DIS@ C954
0.1U_0402_16V4Z

DIS@ C953
0.1U_0402_16V4Z

DIS@ C952
0.1U_0402_16V4Z

DIS@ C951
1U_0402_6.3V6K

DIS@ C950
1U_0402_6.3V6K

+1.5VSG

2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

N13M DDR3 6/9


Size Document Number
Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

25

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
VRAM DDR3 chips
256Mx8 DDR3 *8==>2GB
D

Mode D
Address

CMD0
DQMA[7..0]

21,25,27,28 DQSA#[7..0]

DQSA2
DQSA#2

DQSA[7..0]

21,25,27,28 DQSA[7..0]

MDA22
MDA17
MDA23
MDA19
MDA21
MDA16
MDA20
MDA18

MDA[63..0]

21,25,27,28 MDA[63..0]

Group2

+1.5VSG

DIS@
R1003
240_0402_1%

1
1

+MEM_VREF2

DIS@
R1001
243_0402_1%

CMDA26
CMDA27
CMDA12

C962
DIS@
0.1U_0402_16V4Z

+MEM_VREF2

CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4

+1.5VSG
DIS@
R1004
240_0402_1%

DIS@
R1005
240_0402_1%

ER11

C963
DIS@
0.1U_0402_16V4Z

+MEM_VREF3

C3
D3
B3
C7
C2
C8
E3
E8
D2
E7

DQMA2
ZQ2

DIS@
R1000
240_0402_1%

+1.5VSG

U14

DQSA#[7..0]

CMDA14

A7
B7
H8
E1
J8
J3
K8
J2
K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7
F1
H1
A3
J7
F9
H9

DQS
DQS#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
NF/TDQS#
DM/TDQS
ZQ

VDDQ
VDDQ
VDDQ
VDDQ

C1
E2
B9
E9

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

A2
A9
D7
G2
G8
K1
K9
M1
M9

ODT
CK
CK#
CKE

VREFDQ
VREFCA
BA2
BA1
BA0

CS#
RAS#
CAS#
WE#
RESET#

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NC
NC
NC
NC
NC
NC

+1.5VSG

U15
DQSA3
DQSA#3

+1.5VSG

MDA29
MDA28
MDA30
MDA27
MDA25
MDA26
MDA31
MDA24

Group3

CMDA2
CLKA0
CLKA0#
CMDA3

H2
F3
G3
H3
N2

CMDA0
CMDA30
CMDA15
CMDA13
CMDA5

DIS@
R1002
243_0402_1%

+MEM_VREF3
CMDA26
CMDA27
CMDA12
CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4

B2
B8
C9
D1
D9
A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

C3
D3
B3
C7
C2
C8
E3
E8
D2
E7

DQMA3
ZQ3

G1
F7
G7
G9

CMDA[30..0]

21,25,27,28 CMDA[30..0]

ER11
CMDA14

A7
B7
H8
E1
J8
J3
K8
J2
K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7
F1
H1
A3
J7
F9
H9

H5TQ2G83CFR-H9C_FBGA78
@

DQS
DQS#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
NF/TDQS#
DM/TDQS
ZQ

VDDQ
VDDQ
VDDQ
VDDQ

C1
E2
B9
E9

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

A2
A9
D7
G2
G8
K1
K9
M1
M9

ODT
CK
CK#
CKE

VREFDQ
VREFCA
BA2
BA1
BA0

CS#
RAS#
CAS#
WE#
RESET#

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14

G1
F7
G7
G9

CMDA2
CLKA0
CLKA0#
CMDA3

H2
F3
G3
H3
N2

CMDA0
CMDA30
CMDA15
CMDA13
CMDA5

CMD2

ODT_L

CMD3

CKE

CMD4

A14

CMD5

RST

RST

CMD6

A9

A9

CMD7

A7

A7

CMD8

A2

A2

CMD9

A0

A0

CMD10

A4

A4

CMD11

A1

A1

CMD12

BA0

BA0

CMD13

WE*

WE*

CMD14

A15

A15

CMD15

CAS*

CAS*

A14

CS0_H#

CMD18

ODT_H

CMD19

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

CMD17

H5TQ2G83CFR-H9C_FBGA78
@

CLKA0

CKE_H

CMD20

A13

A13

CMD21

A8

A8

CMD22

A6

A6

CMD23

A11

A11

CMD24

A5

A5

CMD25

A3

A3

CMD26

BA2

BA2

CMD27

BA1

BA1

CMD28

A12

A12

CMD29

A10

A10

CMD30

RAS*

RAS*

LOW

HIGH

Not Available

CLKA0#

DIS@ C975
0.1U_0402_16V4Z

DIS@ C974
0.1U_0402_16V4Z

DIS@ C973
0.1U_0402_16V4Z

DIS@ C972
0.1U_0402_16V4Z

DIS@ C971
1U_0402_6.3V6K

DIS@
C969
0.1U_0402_16V4Z

DIS@
C968
0.1U_0402_16V4Z

DIS@
C967
0.1U_0402_16V4Z

DIS@
C966
0.1U_0402_16V4Z

+1.5VSG

DIS@ C965
1U_0402_6.3V6K

DIS@ C964
1U_0402_6.3V6K

+1.5VSG

DIS@ C970
1U_0402_6.3V6K

21,25 CLKA0#

CS0_L#

CMD16
B2
B8
C9
D1
D9

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

NC
NC
NC
NC
NC
NC

+1.5VSG

21,25 CLKA0

32..63

CMD1

21,25,27,28 DQMA[7..0]

0..31

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

N13M DDR3 7/9


Size Document Number
Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

26

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com

VRAM DDR3 chips

Mode D
Address

256Mx8 DDR3 *8==>2GB

CMD0

32..63

0..31
CS0_L#

CMD1

DQSA[7..0]

21,25,26,28 DQSA[7..0]

+1.5VSG

U17

MDA[63..0]

21,25,26,28 MDA[63..0]

CMDA[30..0]

21,25,26,28 CMDA[30..0]

Group4

+1.5VSG

DIS@
R1006
240_0402_1%

DIS@
R1009
240_0402_1%

+1.5VSG

DIS@
R1010
240_0402_1%

DIS@
R1011
240_0402_1%

C977
DIS@
0.1U_0402_16V4Z

+MEM_VREF5

C976
DIS@
0.1U_0402_16V4Z

+MEM_VREF4
C

DIS@
R1007
243_0402_1%

C3
D3

MDA37
MDA32
MDA38
MDA33
MDA39
MDA35
MDA36
MDA34

B3
C7
C2
C8
E3
E8
D2
E7

DQMA4
ZQ4

A7
B7
H8

+MEM_VREF4
CMDA26
CMDA27
CMDA12
CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4

ER11
CMDA14

DQS
DQS#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

VREFDQ
VREFCA

J3
K8
J2

BA2
BA1
BA0

F1
H1
A3
J7
F9
H9

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14

DQSA5
DQSA#5
+1.5VSG

A2
A9
D7
G2
G8
K1
K9
M1
M9

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

NF/TDQS#
DM/TDQS
ZQ

E1
J8

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7

C1
E2
B9
E9

VDDQ
VDDQ
VDDQ
VDDQ

Group5

ODT
CK
CK#
CKE

G1
F7
G7
G9

CMDA18
CLKA1
CLKA1#
CMDA19

CS#
RAS#
CAS#
WE#
RESET#

H2
F3
G3
H3
N2

CMDA16
CMDA30
CMDA15
CMDA13
CMDA5

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

B2
B8
C9
D1
D9

C3
D3

MDA45
MDA40
MDA46
MDA44
MDA47
MDA41
MDA43
MDA42

B3
C7
C2
C8
E3
E8
D2
E7

DQMA5
ZQ5

A7
B7
H8

DQS
DQS#

CMDA26
CMDA27
CMDA12

VREFDQ
VREFCA
BA2
BA1
BA0

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7

ER11

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14

F1
H1
A3
J7
F9
H9

CMDA14

H5TQ2G83CFR-H9C_FBGA78
@

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

NF/TDQS#
DM/TDQS
ZQ

J3
K8
J2

CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4

VDDQ
VDDQ
VDDQ
VDDQ

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

+MEM_VREF5 E1
J8

DIS@
R1008
243_0402_1%

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NC
NC
NC
NC
NC
NC

DQSA4
DQSA#4

DQMA[7..0]

21,25,26,28 DQMA[7..0]

21,25,26,28 DQSA#[7..0]

+1.5VSG

U16
DQSA#[7..0]

+1.5VSG

A2
A9
D7
G2
G8
K1
K9
M1
M9

ODT
CK
CK#
CKE

G1
F7
G7
G9

CMDA18
CLKA1
CLKA1#
CMDA19

CS#
RAS#
CAS#
WE#
RESET#

H2
F3
G3
H3
N2

CMDA16
CMDA30
CMDA15
CMDA13
CMDA5

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

B2
B8
C9
D1
D9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NC
NC
NC
NC
NC
NC

C1
E2
B9
E9

CMD2

ODT_L

CMD3

CKE

CMD4

A14

CMD5

RST

RST

CMD6

A9

A9

CMD7

A7

A7

CMD8

A2

A2

CMD9

A0

A0

CMD10

A4

A4

CMD11

A1

A1

CMD12

BA0

BA0

CMD13

WE*

WE*

CMD14

A15

A15

CMD15

CAS*

CAS*

A14

CMD16

CS0_H#

CMD17

CMD18

ODT_H

CMD19

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

CKE_H

CMD20

A13

A13

CMD21

A8

A8

CMD22

A6

A6

CMD23

A11

A11

CMD24

A5

A5

CMD25

A3

A3

CMD26

BA2

BA2

CMD27

BA1

BA1

CMD28

A12

A12

CMD29

A10

A10

CMD30

RAS*

RAS*

LOW

HIGH

Not Available

H5TQ2G83CFR-H9C_FBGA78
@

place on 1st T trunk

CLKA1
1

21,28 CLKA1

DIS@
R1012
160_0402_1%
2

DIS@ C989
0.1U_0402_16V4Z

DIS@ C988
0.1U_0402_16V4Z

DIS@ C987
0.1U_0402_16V4Z

DIS@ C986
0.1U_0402_16V4Z

DIS@ C983
0.1U_0402_16V4Z

DIS@ C982
0.1U_0402_16V4Z

DIS@ C981
0.1U_0402_16V4Z

DIS@ C980
0.1U_0402_16V4Z

DIS@
R1013 1
R1014 1 DIS@

2 10K_0402_5%
2 10K_0402_5%

+1.5VSG

DIS@ C979
1U_0402_6.3V6K

DIS@ C978
1U_0402_6.3V6K

+1.5VSG

DIS@ C985
1U_0402_6.3V6K

CLKA1#

DIS@ C984
1U_0402_6.3V6K

21,28 CLKA1#

CMDA18
CMDA19

Hynix : SA000054600 (S IC D3 256MX8/1333 H5TQ2G83CFR-H9C FBGA )


Elpida : SAxxxxxxxxx (S IC D3 256MX8/1333 xxxxxxxxxxxxxxx )

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

N13M DDR3 8/9


Size Document Number
Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

27

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
VRAM DDR3 chips
256Mx8 DDR3 *8==>2GB
Mode D
Address

CMD0

0..31

32..63

CS0_L#

CMD1
DQMA[7..0]

DQSA#[7..0]

21,25,26,27 DQSA#[7..0]

DQSA6
DQSA#6
MDA53
MDA50
MDA55
MDA51
MDA54
MDA49
MDA52
MDA48

MDA[63..0]

21,25,26,27 MDA[63..0]

Group6

+1.5VSG

B3
C7
C2
C8
E3
E8
D2
E7
A7
B7
H8

DQMA6
ZQ6
1

DIS@
R1015
240_0402_1%

DIS@
R1018
240_0402_1%

+1.5VSG
DIS@
R1019
240_0402_1%

DIS@
R1016
243_0402_1%
2

C990
DIS@
0.1U_0402_16V4Z

+MEM_VREF6

C3
D3

DQSA[7..0]

21,25,26,27 DQSA[7..0]

+MEM_VREF6

E1
J8

CMDA26
CMDA27
CMDA12

J3
K8
J2

CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7

C991
DIS@
0.1U_0402_16V4Z

+MEM_VREF7
DIS@
R1020
240_0402_1%

+1.5VSG

U18

F1
H1
A3
J7
F9
H9

ER11
CMDA14

DQS
DQS#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

VDDQ
VDDQ
VDDQ
VDDQ

C1
E2
B9
E9

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

A2
A9
D7
G2
G8
K1
K9
M1
M9

NF/TDQS#
DM/TDQS
ZQ

ODT
CK
CK#
CKE

VREFDQ
VREFCA
BA2
BA1
BA0

CS#
RAS#
CAS#
WE#
RESET#

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NC
NC
NC
NC
NC
NC

+1.5VSG

U19
DQSA7
DQSA#7

+1.5VSG

C3
D3

MDA61
MDA60
MDA56
MDA57
MDA58
MDA63
MDA59
MDA62

Group7

B3
C7
C2
C8
E3
E8
D2
E7
A7
B7
H8

DQMA7
ZQ7

G1
F7
G7
G9

CMDA18
CLKA1
CLKA1#
CMDA19

H2
F3
G3
H3
N2

CMDA16
CMDA30
CMDA15
CMDA13
CMDA5

CMDA[30..0]

21,25,26,27 CMDA[30..0]

DIS@
R1017
243_0402_1%

21,25,26,27 DQMA[7..0]

+MEM_VREF7

E1
J8

CMDA26
CMDA27
CMDA12

J3
K8
J2

CMDA9
CMDA11
CMDA8
CMDA25
CMDA10
CMDA24
CMDA22
CMDA7
CMDA21
CMDA6
CMDA29
CMDA23
CMDA28
CMDA20
CMDA4

B2
B8
C9
D1
D9
A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7

ER11

F1
H1
A3
J7
F9
H9

CMDA14

H5TQ2G83CFR-H9C_FBGA78
@

DQS
DQS#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

VDDQ
VDDQ
VDDQ
VDDQ

C1
E2
B9
E9

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

A2
A9
D7
G2
G8
K1
K9
M1
M9

NF/TDQS#
DM/TDQS
ZQ

ODT
CK
CK#
CKE

VREFDQ
VREFCA
BA2
BA1
BA0

CS#
RAS#
CAS#
WE#
RESET#

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14

G1
F7
G7
G9

CMDA18
CLKA1
CLKA1#
CMDA19

H2
F3
G3
H3
N2

CMDA16
CMDA30
CMDA15
CMDA13
CMDA5

ODT_L

CMD3

CKE

CMD4

A14

CMD5

RST

RST

CMD6

A9

A9

CMD7

A7

A7

CMD8

A2

A2

CMD9

A0

A0

CMD10

A4

A4

CMD11

A1

A1

CMD12

BA0

BA0

CMD13

WE*

WE*

CMD14

A15

A15

CMD15

CAS*

CAS*

A14

CS0_H#

CMD16
CMD17
CMD18

B2
B8
C9
D1
D9

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

ODT_H

CMD19

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NC
NC
NC
NC
NC
NC

+1.5VSG

CMD2

H5TQ2G83CFR-H9C_FBGA78
@

CKE_H

CMD20

A13

A13

CMD21

A8

A8

CMD22

A6

A6

CMD23

A11

A11

CMD24

A5

A5

CMD25

A3

A3

CMD26

BA2

BA2

CMD27

BA1

BA1

CMD28

A12

A12

CMD29

A10

A10

CMD30

RAS*

RAS*

LOW

HIGH

Not Available

CLKA1
CLKA1#

DIS@ C1003
0.1U_0402_16V4Z

DIS@ C1002
0.1U_0402_16V4Z

DIS@ C1001
0.1U_0402_16V4Z

DIS@ C1000
0.1U_0402_16V4Z

DIS@ C999
1U_0402_6.3V6K

DIS@ C998
1U_0402_6.3V6K

DIS@
C997
0.1U_0402_16V4Z

DIS@
C996
0.1U_0402_16V4Z

+1.5VSG

DIS@
C995
0.1U_0402_16V4Z

+1.5VSG

DIS@
C994
0.1U_0402_16V4Z

CLKA1#

DIS@ C993
1U_0402_6.3V6K

CLKA1

21,27

DIS@ C992
1U_0402_6.3V6K

21,27

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

N13M DDR3 9/9


Size Document Number
Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

28

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
+VCCP to +1.05VSG

SSM3K7002BFU_SC70-3
1
C397
0.1U_0402_16V7K

ER19

2
R429
10_0603_5%
1

ER19
Q14
2
G

VGA_PWROK#

SSM3K7002BFU_SC70-3

SSM3K7002BFU_SC70-3
ER19
Q16
2
G

C395

VGA_PWROK#

2 R433
1
0_0402_5%

0.1U_0603_25V7K
SSM3K7002BFU_SC70-3
1
C396
0.1U_0402_16V7K
@

Q17
2
G

2 R434
1
0_0402_5%

VGA_PWROK#

2
1
1

1.05VSG_GATE

2
100K_0402_5%

ER09
D

1 C387
1U_0402_6.3V6K

1
R431

+VSBP

1
C386

ER15
1
2
3

10U_0603_6.3V6M

@
VGA_PWROK#

+1.05VSG

8
7
6
5
C391

ER19
Q15
2
G

10U_0603_6.3V6M
C390

1.5VSG_GATE
2
10K_0402_5%

1
R432

+VSBP

10U_0603_6.3V6M

ER09

C300
330U_B2_2.5VM_R15M

R430
10_0603_5%

1U_0402_6.3V6K

+1.5VSG

1 C389

1
C388

1
2
3

C393

ER15

8
7
6
5

ER19
U20
AO4304L_SO8

+1.5VSG

10U_0603_6.3V6M

10U_0603_6.3V6M
C392

10U_0603_6.3V6M

ER19
U21
AO4304L_SO8

+1.05VS
+1.5V

+1.5V to +1.5VSG

C394
0.1U_0603_25V7K

ER06

+3VS to +3VSG
Q3
+3VSG
AO3404AL_SOT23

+3VALW
ER15

VGA_PWROK

SSM3K7002BFU_SC70-3

Q58
2N7002_SOT23-3

15,20,54

R666
10K_0402_5%

C402

DGPU_PWR_EN

DGPU_PWR_EN

0.1U_0603_25V7K

DGPU_PWR_EN#
D

2
G

40,54 VGA_PWROK

DGPU_PWR_EN#

Q59
2N7002_SOT23-3

2
G

ER19
Q18
2
G

R667
100K_0402_5%
DGPU_PWR_EN#

R668
10K_0402_5%
2

R665
100K_0402_5%
VGA_PWROK#

2
G

R435
200_0603_5%

1U_0402_6.3V6K

1 C399

1
C398

ER19
Q19
2
G

SSM3K7002BFU_SC70-3
1
C403
0.1U_0402_16V7K

3VSG_GATE

2
100K_0402_5%

2 R437
1
0_0402_5%

10U_0603_6.3V6M

C401

DGPU_PWR_EN#

1
R436

10U_0603_6.3V6M
C400

10U_0603_6.3V6M

+VSBP

+3VALW

ER09

+3VS

Compal Secret Data

Security Classification
Issued Date

2011/07/12

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PCH (2/8) PCIE, SMBUS, CLK

Size Document Number


Custom
Date:

Rev
0.2

LA-8224P

Thursday, October 27, 2011

Sheet
1

29

of

59

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http://shop61976717.taobao.com
D6

BLUE

GREEN

L30ESDL5V0C3-2 C/A SOT-23

CRT

D7

L30ESDL5V0C3-2 C/A SOT-23

L15
RED
1
2
CHILISIN NBQ160808T-800Y-N 0603

PCH_CRT_RED

14 PCH_CRT_RED

PCH_CRT_GRN

GREEN
1
2
CHILISIN NBQ160808T-800Y-N 0603

HSYNC_L

VSYNC_L

PCH_CRT_BLU

C410

C411

10P_0402_50V8J

C409

10P_0402_50V8J

C408

10P_0402_50V8J

10P_0402_50V8J

C407

10P_0402_50V8J

VGA_DDC_DATA_C

JCRT1

VGA_DDC_DATA_C
GREEN

10K_0402_5%
1
2
2

1
2

@
22P_0402_50V8J
C428

1
R458

Panel Backlight Control


BKOFF#

B+_L
L36
1
2
FBMA-L11-201209-221LMA30T_0805

DISPOFF#

33
33

14 PCH_TXOUT014 PCH_TXOUT0+
14 PCH_TXOUT114 PCH_TXOUT1+
14 PCH_TXOUT214 PCH_TXOUT2+

14 PCH_TXCLK14 PCH_TXCLK+

DMIC_CLK
DMIC_DATA
15
15

BKOFF#

33_0402_5%
2

@
22P_0402_50V8J
C429

@
33_0402_5%
R453

33_0402_5%
R452
2

R455
40

680P_0402_50V7K @
1

W=60mils

INVTPWM

R451

+3VS

R456
10K_0402_5%

USB20_N8
USB20_P8

USB20_N8
USB20_P8

Camera

W=80mils

+LCDVDD

B+_L

1
2

16 CABC_SAVING
2

14 PCH_LCD_CLK
14 PCH_LCD_DATA

INVTPWM
DISPOFF#
CABC_SAVING

+3VS

1
2

C637
0.1U_0603_50V_X7R

For EMI, close to JLVDS1.

C523
2

JLVDS1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

G1
G2
G3
G4
G5

41
42
43
44
45

ACES_50398-04071-001
CONN@

PWR_SRC_ON

R675
100K_0402_5%~D

C613
1000P_0402_50V7K

@
C640

0.1U_0402_16V4Z

2 0_0805_5%

R739
@

2.2K_0402_5%

R676 1

60mil

Q54
SI3457BDV-T1-E3_TSOP6~D
+B+_Q
6
4
5
2
1
1

R738
@

2.2K_0402_5%

+3VS

B+

+5VS

B+

@
2
0_0402_5%

14 PCH_INV_PWM

Q1B
2N7002DW-7-F_SOT363-6

60mil

SUYIN_070546FR015S251ZR
CONN@

@ C418
470P_0402_50V8J

40 EC_INV_PWM

0.047U_0402_16V7K

100K_0402_5%

R457

C427

5
1

2
0_0402_5%

0_0402_5%
1

2N7002DW-7-F_SOT363-6
Q1A

2
G

1
C423

4.7U_0805_10V4Z

1
1
R450

10P_0402_50V8J

R449
2
1
220K_0402_1%

14 PCH_ENVDD

10P_0402_50V8J

P
OE#

5
1
3
2

6 2

0.1U_0402_16V4Z

3
2

W=80mils

VGA_DDC_CLK_C
@ C417
470P_0402_50V8J

Q22

For EMI, close to JLVDS1.

R454
4.7K_0402_5%
@

0.1U_0402_16V4Z

C425

C422
4.7U_0805_10V4Z

R682
100K_0402_5%

Panel PWM Control

1
R447
100_0805_5%

C424

+3VS
Q23
PJ2301 1P SOT23-3

Q21

BSS138_SOT23

CRT_DET#

BSS138_SOT23

@ C420
33P_0402_50V8K

16

16
17

G
G

+3VS

ER19

+LCDVDD
+5VALW

@ C419
33P_0402_50V8K

VGA_DDC_CLK_C

VGA_DDC_DATA_C

LCD POWER CIRCUIT

@ C416

+LCDVDD

PCH_CRT_DDC_CLK

14 PCH_CRT_DDC_CLK

@ C415

VSYNC_L

2
10_0402_5%

R448
47K_0402_5%

D_CRT_VSYNC 1
R446

3
G

U24
SN74AHCT1G125GW_SOT353-5

+LCDVDD

PCH_CRT_DDC_DAT

14 PCH_CRT_DDC_DAT

VSYNC_L
R679

R680

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

5
1
P
OE#
G

HSYNC_L

2
10_0402_5%

1
2
C413
0.1U_0402_16V4Z

HSYNC_L
BLUE

4.7K_0402_5%

1
R442

4.7K_0402_5%

D_CRT_HSYNC

PCH_CRT_VSYNC

+5VS_CRTVCC
2

R441
2

U23
SN74AHCT1G125GW_SOT353-5

14 PCH_CRT_VSYNC

CRTTEST

T36

+5VS_CRTVCC

+CRT_VCC
ER38

+3VS

R678
0_0402_5%

L30ESDL5V0C3-2 C/A SOT-23

RED

PCH_CRT_HSYNC

C405
@

ESD

1
2
C412
0.1U_0402_16V4Z

VGA_DDC_CLK_C

+5VS

14 PCH_CRT_HSYNC

SMD1812P075TF .75A 13.2V


1
C404

D10
C406

10P_0402_50V8J

R440

W=40mils

L30ESDL5V0C3-2 C/A SOT-23

BLUE
1
2
CHILISIN NBQ160808T-800Y-N 0603

2
1
150_0402_1%

R439

2
1
150_0402_1%

2
1
150_0402_1%

R438

L17
14 PCH_CRT_BLU

D8
RB491D_SOT23-3

D9

L16
14 PCH_CRT_GRN

L14
1+5VS_CRTVCC 1

100P_0402_50V8J
C414

+CRT_VCC

W=40mils

+5VS

1
3

+CRT_VCC

0.1U_0402_16V4Z

0.1U_0402_16V4Z

RED

R674
0_0402_5%
1
@

+LCDVDD

R76
100K_0402_5%

Q31
SSM3K7002FU_SC70-3~D

2
G

Compal Secret Data

Security Classification

Issued Date

2011/07/12

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

LVDS/CRT CONN
Size
C
Date:

Compal Electronics, Inc.


Document Number

Rev
0.2

LA-8224P
Thursday, October 27, 2011

Sheet
1

30

of

59

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http://shop61976717.taobao.com
SATA HDD Conn.
BELLW_80039-1022
12 SATA_PTX_DRX_P0
12 SATA_PTX_DRX_N0
1

12 SATA_PRX_DTX_N0
12 SATA_PRX_DTX_P0

SATA_PTX_DRX_P0
SATA_PTX_DRX_N0

C430 1
C431 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0

C432 1
C433 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PRX_C_DTX_N0
SATA_PRX_C_DTX_P0

+3VS

+5VS

R459 1

0.1U_0402_16V4Z

+5VS_HDD

2 0_0805_5%
10U_0603_6.3V6M
C435

C434

0.1U_0402_16V4Z
1 C436
C437

ER15

1U_0402_6.3V6K

C438

1
2
3
4
5
6
7

GND
RX+
RXGND
TXTX+
GND

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
Rsv
GND
12V
12V
12V

GND
GND

24
23

2
JHDD1
CONN@

1000P_0402_50V7K

Q24

+5VS

SI3456DDV-T1-GE3_TSOP6
D

R460
4

+5VS_ODD_R

SATA ODD Conn.

+5VS_ODD

0_1206_5%
G

C439
1U_0402_6.3V6K

6
5
2
1

2
+VSBP
2

JODD1

R462
S
1

SSM3K7002BFU_SC70-3

1
C444
2

12 SATA_PTX_DRX_P2
12 SATA_PTX_DRX_N2

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PTX_DRX_P2_C
SATA_PTX_DRX_N2_C

12 SATA_PRX_DTX_N2
12 SATA_PRX_DTX_P2

C442 1
C443 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PRX_DTX_N2_C
SATA_PRX_DTX_P2_C

16 ODD_DETECT#

1
R463
+5VS_ODD
1
R464

0.1U_0402_25V6

ODD_EN
D

1.5M_0402_5%

ODD_EN#

16

ER19
Q25
2
G

330K_0402_5%
R461

C440 1
C441 1

15 ODD_DA#

ODD_DETECT#_R
0_0402_5%

80mils
2

ODD_DA#_R
0_0402_5%

1
2
3
4
5
6
7

GND
A+
AGND
BB+
GND

8
9
10
11
12
13

DP
+5V
+5V
MD
GND
GND

GND
GND

15
14

SANTA_204901-1

Placea caps. near ODD CONN.


+5VS_ODD

0.1U_0402_16V4Z
1

C445

1000P_0402_50V7K
ER15

1U_0402_6.3V6K

C446

10U_0805_10V4Z
1 C447

C448

Issued Date

2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Title

HDD & ODD CONN


Size
B

Document Number

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011


G

Sheet

31
H

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
+LAN_IO

C452

C453

C454

C455

0.1U_0402_16V7K

+LAN_IO_DISC
ER19
Q27
2 EN_WOL#
G

C451

0.1U_0402_16V7K

1
1

These caps close to Pin 3,6,9,13,29,41,45

1
C462

0.1U_0402_16V7K

1
C461

0.1U_0402_16V7K

1
C460

0.1U_0402_16V7K

1
C459

0.1U_0402_16V7K

1
C458

0.1U_0402_16V7K

C457

0.1U_0402_16V7K

AO3419L 1P SOT23-3

C450

0.1U_0402_16V7K

1
C449

W=20mils

0.1U_0402_16V7K

R465
470_0603_5%

1.5A

0.1U_0402_16V7K

+LAN_IO
Q26
3
1

0.1U_0402_16V7K

+3VALW

+5VALW

+LAN_VDD
0.1U_0402_16V7K

W=60mils

W=60mils

C456
1U_0402_6.3V6K

SSM3K7002BFU_SC70-3

R467
1
2 EN_WOL#
220K_0402_5%~N

These caps close to Pin 12,27,39,42,47,48

C464

U25
ER19

20.1U_0402_16V7K

PCIE_PRX_C_GLANTX_N1

23
17
18

13 PCIE_PTX_GLANRX_P1
13 PCIE_PTX_GLANRX_N1

HSOP

LED3/EEDO
LED1/EESK
LED0

HSON
HSIP
HSIN

EECS/SCL
EEDI/SDA

31
37
40

Q29
SSM3K7002BFU_SC70-3

R472
1

30 R473 1
32 R474 1

2 10K_0402_5%
2 10K_0402_5%

12P_0402_50V8J
+LAN_SROUT1.05

16

5,15,36,40,41 PLT_RST#

25

PERSTB

13 CLK_PCIE_LAN
13 CLK_PCIE_LAN#

19
20

REFCLK_P
REFCLK_N

43

XTLI

44

LAN_WAKE#

R475
+3VS

XTLO

ISOLATEB

28
26

CLKREQB

MDIP0
MDIN0
MDIP1
MDIN1
NC/MDIP2
NC/MDIN2
NC/MDIP3
NC/MDIN3

R476 1
R478 1

+LAN_IO

1
2
+LAN_IO
R479
0_0402_5%
3.3V : Enable switching regulator
0V
: Disable switching regulator

R480 1

2 10K_0402_5%
2 1K_0402_5%

14
15
38
33

+LAN_VDDREG
2 2.49K_0402_1%

34
35
46
24
49

LAN_MDIP0
LAN_MDIN0
LAN_MDIP1
LAN_MDIN1
LAN_MDIP2
LAN_MDIN2
LAN_MDIP3
LAN_MDIN3

W=60mils

2.2UH +-5% NLC252018T-2R2J-N

1
C471
2

1
C472
2

0.01U_0402_16V7K

4
5
6

+V_DAC
LAN_MDIP2
LAN_MDIN2

7
8
9

+V_DAC
LAN_MDIP3
LAN_MDIN3

10
11
12

DVDD10
DVDD10
DVDD10

These components close to Pin 36


( Should be place within 200 mils )

+LAN_VDD

ER16

ISOLATEB

DVDD33
DVDD33

NC/SMBCLK
NC/SMBDATA
GPO/SMBALERT

AVDD33
AVDD33
AVDD33
AVDD33

ENSWREG
EVDD10
VDDREG
VDDREG

AVDD10
AVDD10
AVDD10
AVDD10

RSET
GND
PGND

REGOUT

27
39
12
42
47
48
21

+LAN_IO

+LAN_EVDD10
JLAN1

3
6
9
45
36

+LAN_VDD

R481
R482
R483
R484

RJ45_RX1+
RJ45_RX1-

TCT3
TD3+
TD3-

MCT3
MX3+
MX3-

18
17
16

RJ45_TX2+
RJ45_TX2-

RJ45_TX3+

RJ45_RX1-

PR2-

RJ45_TX2-

PR3-

RJ45_TX2+

RJ45_RX1+

RJ45_TX0-

RJ45_TX0+

D16

D18

@
1

LSE-200NX3216TRLF_1206-2
2

D19

@
1

LSE-200NX3216TRLF_1206-2
2

LANGAN

D20

@
1

LSE-200NX3216TRLF_1206-2
2

LANGAN

0.1U_0603_25V7K
R486

D21

@
1

LSE-200NX3216TRLF_1206-2
2

ESD

0.1U_0603_25V7K

PR4+

PR3+
PR2+
PR1PR1+

SHLD2

10

+LAN_IO

LAN_MDIN1

I/O4

I/O2

VDD

GND

I/O3

I/O1

LAN_MDIP0

ESD

LAN_MDIN3

AZC099-04S.R7G_SOT23-6

Issued Date

I/O4

I/O2

VDD

GND

I/O3

I/O1

2011/07/12

LAN_MDIP2

LAN_MDIN2

AZC099-04S.R7G_SOT23-6

Compal Electronics, Inc.

Compal Secret Data

Security Classification

D17
LAN_MDIP3

+LAN_IO

LAN_MDIN0

D15
AZC199-02SPR7G_SOT23-3

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

PR4-

SANTA_130452-07
CONN@

LAN_MDIP1

R485

C475
100P_1206_2KV7K

RJ45_TX3+
RJ45_TX3-

TAIMAG_IH-160

2
2
2
2

04/19

ER37
A

1
1
1
1

75_0603_1%
75_0603_1%
75_0603_1%
75_0603_1%

MCT2
MX2+
MX2-

RJ45_TX0+
RJ45_TX0-

SHLD1

RJ45_TX3+LAN_SROUT1.05

TCT2
TD2+
TD2-

MCT4
MX4+
MX4-

XTLO

12P_0402_50V8J

LANWAKEB

21
20
19

TCT4
TD4+
TD4-

25MHZ_10PF_7V25000014

1
1

13
29
41

24
23
22

15
14
13

C474 1

+V_DAC
LAN_MDIP1
LAN_MDIN1

C473

CKXTAL2

MCT1
MX1+
MX1-

TCT1
TD1+
TD1-

GND

RTL8111F-CGT QFN 48P

1
2
3

Y4

TS1
+V_DAC
LAN_MDIP0
LAN_MDIN0

XTLI

0_0402_5%
<BOM Structure>

GND

W=60mils

CKXTAL1

1K_0402_5%
R477
15K_0402_5%

1
2
4
5
7
8
10
11

2
3

+LAN_VDD

L19

13 LANCLK_REQ#

C469

13 PCIE_PRX_GLANTX_N1

C470 1

LAN_WAKE#

22

1
C467

PCIE_PRX_C_GLANTX_P1

1
C466

20.1U_0402_16V7K

C468 1

C465

+LAN_EVDD10

4.7U_0603_6.3V6K

13 PCIE_PRX_GLANTX_P1

14,36,41 PCIE_WAKE#

2
G

R471
10K_0402_5%

R469
1
2
0_0603_5%

1U_0402_6.3V6K

SSM3K7002BFU_SC70-3
R470
10K_0402_5%

W=20mils

+LAN_VDD

+LAN_VDDREG

0.1U_0402_16V7K

W=40mils

R468
1
2
0_0603_5%

+LAN_IO

C463
0.1U_0603_25V7K

0.1U_0402_16V7K

+LAN_IO
1

0.1U_0402_16V7K

4.7U_0603_6.3V6K

EN_WOL
2

40

ER19
Q28
2
G

R466
100K_0402_5%

Title

LAN RTL8111F
Size Document Number
Custom LA-8224P
Date:

Rev
0.2

Thursday, October 27, 2011

Sheet
1

32

of

59

http://shop61976717.taobao.com
EMI
http://shop61976717.taobao.com

close to JSPK1

30

DMIC_DATA

30

DMIC_CLK

40

DMIC_DATA

R499 1

DMIC_CLK

2 0_0402_5% DMIC_DATA_CODEC

EC_MUTE#

R500 1

DMIC_CLK_CODEC
FBMA-L10-160808-301LMT_2P

12 HDA_RST_AUDIO#

MIC_JD
HP_JD

PD#

2 0_0402_5%

HDA_RST_AUDIO#

+3VS

SPK_R1

1
1 C482

SPKOUT_R2

R492 1

2 0_0603_5%

SPK_R2

HP_OUT_L
HP_OUT_R

32
33

HP_OUTL
HP_OUTR

MIC1_L
MIC1_R
MIC2_L
MIC2_R
GPIO0/DMIC_DATA

GPIO1/DMIC_CLK

3
2
C498

10

HDA_SYNC_AUDIO

BCLK

HDA_BITCLK_AUDIO

HDA_SDOUT_AUDIO

HDA_SDIN_AUDIO1 R501
2
33_0402_5%

SDATA_IN

RESET#

EAPD
SPDIFO

PCBEEP
SENSE A
MIC2_VREFO
SENSE B
MIC1_VREFO_R
LDO_CAP

CBP
CBN

VREF

MIC1_VREFO_L

JDREF

PVSS2
PVSS1
DVSS2
DVSS1

CPVEE
AVSS1
AVSS2

HDA_SYNC_AUDIO

ESD

48

0_0402_5%

1
C496
@

12

HDA_SDIN0 12

EAPD

18
17

40
+MIC1_VREFO_R
+MIC1_VREFO_L

R736
R737

2
2

1 2.2K_0402_1%
1 2.2K_0402_1%

15
15

29

USB20_N9
USB20_P9

+MIC1_VREFO_R

19

AC_JDREF

34
26
37

CONN@
ACES_51524-0160N-001

+USB_VCCC

20

27

YSDA0502C 3P C/A SOT-23

HDA_SDOUT_AUDIO 12

1 R502

AC97_VREF

D23

HDA_BITCLK_AUDIO 12

47

30
28

E&T_3801-Q04N-01R
CONN@

2
0.22U_0603_16V7K
@

HDA_SYNC_AUDIO

SYNC

SDATA_OUT
PD#

EMI

R494
@

0_0402_5%

HDA_BITCLK_AUDIO

SPKOUT_R1
SPKOUT_R2

2
35
2.2U_0603_16V6K
31

1
C486

1
2
3
4

22P_0402_50V8J

45
44

13

1
2
3
4

YSDA0502C 3P C/A SOT-23

10P_0402_50V8J

SPK_OUT_R+
SPK_OUT_R-

JSPK1
SPK_R1
SPK_R2
SPK_L1
SPK_L2

2
0.22U_0603_16V7K
@
1U_0603_10V6K

2 0_0603_5%

2
0.22U_0603_16V7K
@

R490 1

10P_0402_50V8J

LINE2_L
LINE2_R

11

10U_0805_10V6K

38

25

14
15

43
42
49
7

SPKOUT_R1

1
C478

D22

AVDD2

AVDD1

46

39

SPKOUT_L1
SPKOUT_L2

36
1

C494

40
41

18

C499

SPK_L2

MONO_OUT
SENSE_A

+MIC1_VREFO_L

2 0_0603_5%

HDA_SDOUT_AUDIO
2

SPK_OUT_L+
SPK_OUT_L-

U26

LINE1_L
LINE1_R

12
1 R503
2
20K_0402_1%
2 R504
1
39.2K_0402_1%

23
24

2 C495 4.7U_0603_6.3V6K MIC1_C 21


MIC2_C 22
2 C497 4.7U_0603_6.3V6K
16
17

L21
EC_MUTE#

R489 1

1 R505
2
20K_0402_1%
1
2
C501
2.2U_0603_16V6K

1
C502

C503

1
C500
2

10U_0805_10V6K

MIC2

SPKOUT_L2

+5VS

0.1U_0402_16V7K

MIC1_R 1
2
1K_0402_5%
MIC2_R 1
1 R496
2
1K_0402_5%
1 R495

C490

L20
2
1
MBK1608800YZF 0603

10U_0805_10V6K

MIC1
2

PVDD2

C493
22P_0402_50V8J
@

PVDD1

C492

C491

C489

DVDD

EMI
DMIC_CLK

C488

DVDD_IO

0.1U_0402_16V7K

+3VS

2
0.22U_0603_16V7K
@
1U_0603_10V6K

+5VS_PVDD +VDDA

+3VS_DVDD

R493
2
1
0_0603_5%

10U_0603_6.3V6M

C487
22P_0402_50V8J
@

1
1 C476

@ C483

0.1U_0402_16V7K

DMIC_DATA
1

1
C485

10U_0603_6.3V6M

0.1U_0402_16V7K

1
C484

SPK_L1

@ C477

+3VS_DVDD_R

2
1
0_0603_5%

+3VS_DVDD

2 0_0603_5%

R491

0.1U_0402_16V7K

1
C481

R487 1

1
C480

SPKOUT_L1

0.1U_0402_16V7K

1
C479

0.1U_0402_16V7K

R488
2
1
0_0805_5%

+5VS

10U_0805_10V6K

+5VS_PVDD

MIC_JD

L34
MIC2

MIC1

2
L35
2

MIC-2
BLM18PG121SN1D_0603
MIC-1
BLM18PG121SN1D_0603
1
1

C638
220P_0402_50V7K

C639
220P_0402_50V7K

GND
GND
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JAU1

ALC269Q-VB5-GR_QFN48_7X7

HP_JD
HP_OUTR
HP_OUTL

16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

4.7K_0402_5%
R506 @
HDA_RST_AUDIO#
1

@
0.1U_0402_16V7K
C508

R507 1

2 0_0402_5%

R508 1

2 0_0402_5%

R509 1

2 0_0402_5%

R510 1

2 0_0402_5%

2 @

2 @

2 @

0.1U_0402_16V7K
2 @

C504

0.1U_0402_16V7K

C505

0.1U_0402_16V7K

C506
C507

0.1U_0402_16V7K

Issued Date

2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D

Compal Electronics, Inc.

Compal Secret Data

Security Classification
For EMI (on MIC and Headphone AGND to connected with
DGND)

Title

HD CODEC ALC269
Size Document Number
Custom LA-8224P
Date:

Thursday, October 27, 2011


G

Rev
0.2
Sheet

33
H

of

59

http://shop61976717.taobao.com
Card Reader Connector
http://shop61976717.taobao.com
+CARDPWR

JCR1
SDCMD
SDCLK
D

SDD0
SDD1
SDD2
SDD3

NC

8
9
10
11
12

SP1
SP2
SP3
SP4
SP5

@
1
R636
CLK_SD_48M

2
1
10_0402_5% @ C614

2
10P_0402_50V8J

CLK_SD_48M 13
+3VS_CR

23
22
21
20
19
18
16
15
14
13

SDD2
SDD3

+3VS_CR

ER05

NC
SP14
SP13
SP12
SP11
SP10
SP9
SP8
SP7
SP6

24

SDCMD
1
0_0402_5%
SDCD#

SDCLK
R634 EMI

R774
100K_0402_5%

R775
100K_0402_5%

RTS5137-GR_QFN24_4X4
SDWP#

100K_0402_5%
R768
2

3V3_IN
CARD_3V3
V18

17

SDWP

R773
100K_0402_5%

SDCD#

CLK_IN

25

SDD1
SDD0

GPIO0
DM
DP

2N7002DW-7-F_SOT363-6
Q20B

SDCD

2
<BOM Structure>
2N7002DW-7-F_SOT363-6
Q20A
1

10mil
SDWP

4
5
6

REFE

2
3

+CARDPWR

C616
1U_0402_6.3V6K

30mil

12
13

GND SW
GND SW

WP SW
CD SW

U40

+RREF

10
11

T-SOL_156-2000302604
CONN@

10mil

C623

1
0.1U_0402_16V4Z

DAT0
DAT1
DAT2
CD/DAT3

C619
4.7U_0805_10V4Z

+VREG

SDWP#
SDCD

30mil

2
1
0_0603_5%
@
2
1
C615
100P_0402_50V8J
R497 1
2
6.2K_0603_1%
USB20_N10
USB20_N10
USB20_P10
USB20_P10
+3VS_CR

8
9
1
2

15
15

VDD
CMD
CLK
VSS
VSS

+3VS_CR
R633

EPAD

+3VS

5
3
6
4
7

+CARDPWR

R635
100K_0402_5%

C617
0.1U_0402_16V4Z

C618
0.1U_0402_16V4Z

ER33
C622
0.1U_0402_16V4Z
SDCLK

Close to connector

C612
R632
2
1
1
2 SDCLK
@
33_0402_5% @
22P_0402_50V8J

EMI

1
C621

close U40

22P_0402_50V8J

30mil

EMI

close JCR1

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

RTS5137 Media Card Controller


Size Document Number
Custom
LA-8224P
Date:

Rev
0.2

Thursday, October 27, 2011

Sheet
1

34

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com

+3VS

ER38

ER38

D25
9

HDMI_R_D0+

HDMI_R_D0-

HDMI_R_D2-

HDMI_R_D2-

HDMI_R_CK+

HDMI_R_CK+

HDMI_R_D2+

HDMI_R_D2+

HDMI_R_CK-

HDMI_R_CK-

R663
1M_0402_5%

TMDS_B_HPD

14 TMDS_B_HPD

AP2330W-7_SC59-3

For ESD request.

OUT

D26

C636

I/O4

I/O2

HDMI_SDATA
2

+5VS

VDD

GND

0.1U_0402_16V7K

W=40mils

GND

+5VS

HDMI_SCLK

TMDS_B_DATA2
TMDS_B_DATA2#

14 TMDS_B_DATA2
14 TMDS_B_DATA2#

@
2

HDMI_D0+
HDMI_D0HDMI_D1+
HDMI_D1-

36,41,42

HDMI_D2+
HDMI_D2-

2
G

SUSP

680_0402_5%
2
680_0402_5%
2
680_0402_5%
2
680_0402_5%
2
680_0402_5%
2
680_0402_5%
2
680_0402_5%
2
680_0402_5%
2

R656
1
2
10K_0402_5%

R643

@
@

C634
@

HDMI_R_D2HDMI_R_D2+
HDMI_R_D1HDMI_R_D1+
HDMI_R_D0HDMI_R_D0+
HDMI_R_CKHDMI_CKHDMI_R_CK+

1
R644

1
ER19
Q55
2
G

C628

EN_HDMI

ER19
Q56

+5VS

HDMI_R_CK-

2
0_0402_5%

L32 @
D

SSM3K7002BFU_SC70-3
R645
TMDS_GND
1
R649
1
R646
1
R653
1
R659
1
R647
1
R651
1
R652
1

TMDS_B_DATA1
TMDS_B_DATA1#

14 TMDS_B_DATA1
14 TMDS_B_DATA1#

R664

+HDMI_5V_OUT
F1
1

+HDMI_5V

W=40mils0.5A 15VDC_FUSE

SI3456BDV-T1-E3 1N TSOP6

470K_0402_5%

TMDS_B_DATA0
TMDS_B_DATA0#

14 TMDS_B_DATA0
14 TMDS_B_DATA0#

HDMI_CK+
HDMI_CK-

1
1 C625
C624
1
1 C630
C631
1
1 C633
C627
1
1 C629
C632

2
0.1U_0402_16V7K 2
0.1U_0402_16V7K
2
0.1U_0402_16V7K 2
0.1U_0402_16V7K
2
0.1U_0402_16V7K 2
0.1U_0402_16V7K
2
0.1U_0402_16V7K 2
0.1U_0402_16V7K

TMDS_B_CLK
TMDS_B_CLK#

14 TMDS_B_CLK
14 TMDS_B_CLK#

2
+VSBP

1.5M_0402_5%

For ESD request.

@
6
5
2
1

C626
@

AZC099-04S.R7G_SOT23-6

1
1U_0603_10V6K

I/O1

C635

Q53
S

I/O3

W=40mils

U41

+HDMI_5V_OUT

IN

0.1U_0402_16V7K

L05ESDL5V0NA-4

1U_0603_10V4Z

L05ESDL5V0NA-4

R638
20K_0402_5%
2

HDMI_DETECT

0.1U_0402_16V7K

Q57
SSM3K7002BFU_SC70-3
ER19

HDMI_DETECT

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1+

HDMI_R_D1-

HDMI_R_D1+

D24
HDMI_R_D1-

WCM-2012-900T_0805

+HDMI_5V_OUT

3
JHDMI1

HDMI_DETECT

SSM3K7002BFU_SC70-3
HDMI_CK+

1
R648

2
0_0402_5%

HDMI_SDATA
HDMI_SCLK

HDMI_D0+

1
R658

2
0_0402_5%

L31 @
4
1

HDMI_R_D0+
HDMI_R_CK-

WCM-2012-900T_0805

HDMI_R_CK+
HDMI_R_D0-

HDMI_R_D0+
HDMI_R_D1-

HDMI
+3VS

+3VS

1
R654

2
0_0402_5%

HDMI_R_D0-

HDMI_D1+

1
R639

2
0_0402_5%

HDMI_R_D1+

HDMI_L_SCLK

Q52B
4

HDMI_SCLK

4
L33

3
@

1
R642

1
R662

2
0_0402_5%

HDMI_R_D1-

@ 47P_0402_50V8J

1 C641

HDMI_R_CK-

@ 47P_0402_50V8J

1 C642

HDMI_R_CK+

@ 47P_0402_50V8J

1 C643

1
R661

2
0_0402_5%

HDMI_R_D2+

HDMI_R_D0+

@ 47P_0402_50V8J

1 C644

HDMI_R_D0-

@ 47P_0402_50V8J

1 C645

HDMI_R_D1+

@ 47P_0402_50V8J

1 C646

HDMI_R_D1-

@ 47P_0402_50V8J

1 C647

HDMI_R_D2+

@ 47P_0402_50V8J

1 C648

HDMI_R_D2-

2
HDMI_D2+

2.2K_0402_5%

2
0_0402_5%

Q52A
1

HDMI_L_SDATA

1
6

HDMI_SDATA
4

2N7002DW-T/R7_SOT363-6

L30

5V PULL UP IN CONNECTER SIDE


HDMI_D2-

Issued Date

1
R655

2011/07/12

Deciphered Date

2
0_0402_5%

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HDMI_R_D2-

close to JHDMI

Title

Compal Electronics, Inc.


HDMI Connector

Size
C
Date:

WCM-2012-900T_0805

Compal Secret Data

Security Classification

EMI

WCM-2012-900T_0805

2
HDMIDAT_NB

14 HDMIDAT_NB

20
21
22
23

RV91, RV92 place near JHDMI connect

2N7002DW-T/R7_SOT363-6

R640

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+

SUYIN_100042GR019M26DZL
CONN@

ER37
4

HDMI_D11

HDMI_R_D1+
HDMI_R_D2HDMI_R_D2+

R641
2.2K_0402_5%

R660

2
0_0402_5%

1
R657

2.2K_0402_5%

5
HDMICLK_NB

14 HDMICLK_NB

HDMI_D0+HDMI_5V_OUT

2.2K_0402_5%
1
2
2
1

R650
1

19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

HDMI_R_CK+

Document Number

Rev
0.2

LA-8224P
Thursday, October 27, 2011

Sheet
1

35

of

59

+3VS

Mount
USB30@
C1005
12P_0402_50V8J

USB_PESEL
R1033

* Other applaction

+1.2VS

Express Card/Mini Card Mount

R1026
100K_0402_5%
USB_PORST#

2
G
Y9 USB30@
20MHZ_12PF_X3G020000FC1H-X

2
G

+1.2VUSB

@
R1025
100K_0402_5%

C1004
1 22P_0402_50V8J

S4/S5

reference delay circuit

S3
+3V_PCH

USB30_XT1

Mount

* S3

USB_PESEL
USB_PEPWRDET
USB_TEST_EN
USB_GPIO0
USB_GPIO1
USB_GPIO2

@
1
2 4.7K_0402_5%
@
1
2 4.7K_0402_5%
1 USB30@2 4.7K_0402_5%
USB30@
1
2 4.7K_0402_5%
@
1
2 4.7K_0402_5%
@
1
2 4.7K_0402_5%

R1032 1 USB30@2 12.1K_0402_1%

R1022

R1034
S1

R1033
R1034
R1036
R1037
R1028
R1031

USB_UREXT

USB_PEPWRDET

USB_OCI#A
USB_OCI#B

2 10K_0402_5%
2 10K_0402_5%

+3VS

3
4

1 @
1 @

+3VS

USB_PE_REXT R1030 1 USB30@2 12.1K_0402_1%

1
2

R1023
R1024

USB30_SMI#
USB_PEPWRDET

ER43

1 @
2 4.7K_0402_5%
1 USB30@2 4.7K_0402_5%

For WAKE Function

R1021
R1022

http://shop61976717.taobao.com
http://shop61976717.taobao.com

+3V_PCH

USB30_XT2

2
ER16

1
C1006
22P_0402_50V8J

SSM3K7002BFU_SC70-3

SSM3K7002BFU_SC70-3

1 @

C1007
1U_0402_6.3V6K

Power Sequence

@
Q903
ER19

@
Q902
ER19

+3VS

ASM1042
+1.2VS
+1.2VS

+5VALW/+3VALW

U90

USB30@

+3V_PCH/+1.2VUSB

USB_PORST#

USB30@ C1011 1U_0402_6.3V6K


37
37

T90 PAD @
T91 PAD @

U2DN_B
U2DP_B

U2DN_B
U2DP_B

+3V_PCH
U2DN_A
U2DP_A

U2DN_A
U2DP_A

USB30@
R1043

14,32,41 PCIE_WAKE#
+3VS
5,15,32,40,41

R1044
@
2

4.7K_0402_5%
1
37 USB_OCI#A
37

1
2
USB30@ R1045 0_0402_5%

PLT_RST#

USB_OCI#B

0_0402_5%

USB_OCI#A
USB_OCI#B
PLT_RST#_USB30
USB_TEST_EN

GND4

CLK_PCIE_USB30#
CLK_PCIE_USB30
U3RXDN_A
U3RXDP_A

+VDD12U
U3RXDN_A 37
U3RXDP_A 37

U3TXDN_A_C
U3TXDP_A_C
USB_UREXT

U3TXDN_A_C 37
U3TXDP_A_C 37

U3TXDN_B_C
U3TXDP_B_C

+VDD33U
U3TXDN_B_C 37
U3TXDP_B_C 37

U3RXDN_B
U3RXDP_B
+VDD12U

ER07

ER04

65

CS#
VCC 8
WP#
SCLK 6
HOLD#
SI 5
GND
SO 2
MX25L5121EMC-20G SOP 8P

35,41,42 SUSP

USB_SPISCK
USB_SPISI
USB_SPISO
2 C1016
USB30@

C1045
2
1
@
22P_0402_50V8J

0.1U_0402_16V4Z

R1082
USB_SPISCK
1
2
33_0402_5% @

Reserve for EMI please close to U90

+3VALW to +1.2V Transfer

FBMA-L11-201209-221LMA30T_0805
+VDD12U
+1.2VS

USB30@ L904
1

Pin 35

Pin 48

USB30@ 1
C1023

+3VALW

+5VALW

USB30@ USB30@

Pin 54

40,42 PCH_PWR_EN

R1053 1
USB30@

USB30@

1
R1050
5.1K_0402_1%
USB30@

2 USB30@

C1036
0.1U_0603_25V7K
USB30@

+3VALW

+1.2VUSB

1A
2

R1046
USB30@

+1.2VS

U91

5
9
6
7
8

VIN
VOUT
VIN
VOUT
VCNTL
POK
FB

3
4

1A

EN
GND 1
APL5930KAI-TRG_SO8
USB30@

2
0_0402_5%

1
R1051
10K_0402_1%
1

USB30@
R1052
20K_0402_1%

USB30@

Pin 62

C1032
10U_0603_6.3V6M

Pin 49

USB30@ 1
C1022

0.1U_0402_16V4Z

Pin 32

USB30@ 1
C1031

0.1U_0402_16V4Z

Pin 16

USB30@ 1
C1030

0.1U_0402_16V4Z

Pin 34

USB30@ 1
C1029

0.1U_0402_16V4Z

USB30@ 1
C1028

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Pin 20

USB30@ C1020

10U_0603_6.3V6M

0.1U_0402_16V4Z

USB30@ 1
C1027

0.1U_0402_16V4Z

10U_0603_6.3V6M

USB30@ 1
C1026

0.1U_0402_16V4Z

USB30@ 1
C1021
USB30@ 1
C1025

+5VALW

C1019
10U_0603_6.3V6M

+1.2VS

C1018
1U_0603_10V6K~N

+1.2VUSB

Q905 D
2
G
USB30@
S
SSM3K7002BFU_SC70-3
ER19
SUSP

1
3
7
4

2
USB_SPICS#

ASM1042_TQFN64_9X9
ER29

USB30@
1.2VS_GATE
1
2
R1049
330K_0402_5%

+VSBP

4.7K_0402_5%
USB30@
U92

Q904
AO3404AL_SOT23

+1.2VUSB

U3RXDN_B 37
U3RXDP_B 37
+VDD12U
+1.2VUSB

R1048 @

4.7K_0402_5%

13
13

+VDD12U

+3VS
USB30@ R1047

PCIE_PTX_USB3RX_N4 13
PCIE_PTX_USB3RX_P4 13
USB30_XT1
USB30_XT2

C1037

PCIE_PRX_USB3TX_N4 13
PCIE_PRX_USB3TX_P4 13

10U_0603_6.3V6M

1
C1012
0.1U_0402_16V4Z

(TQFN 64)

1 0.1U_0402_16V7K
1 0.1U_0402_16V7K

+1.2VUSB TO +1.2VS

37
37

+1.2VUSB

ASM1042

Close to ASM1042

ER04

USB_GPIO0
USB_PE_REXT +VDD33U
+VDD33U
USB30@ C1009 2
USB30@ C1010 2

T1: 2~80ms
T2: >200ms

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

2
G

2 @

GPIO0
GND3
VCC12_3
PE_REXT
VCC33P
PE_TXN
PE_TXP
GNDA3
PE_RXN
PE_RXP
VDD12P
XI
XO
PE_CLKN
PE_CLKP
VCC12_4
VDD12U_2
U3RXN_A
U3RXP_A
GNDA2
U3TXN_A
U3TXP_A
UREXT
VCC33U
U3TXN_B
U3TXP_B
GNDA1
U3RXN_B
U3RXP_B
VDD12U_1
VSUS12_2
GND2

R1029

GPIO1
SMI#
GPIO2
PE_SEL
PE_PWRDET
PE_CLKREQ#
VCC33_1
SPI_CLK
SPI_DO
SPI_CS#
SPI_DI
GND1
PORST#
UART_RX
UART_TX
VCC12_1
U2DN_B
U2DP_B
VSUS33_1
VSUS12_1
U2DN_A
U2DP_A
VSUS33_2
PE_WAKE#
PPON_A
PPON_B
OCI_A#
OCI_B#
PE_RST#
TEST_EN
VCC33_2
VCC12_2

13 CLKREQ_USB30#

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

PE_RST#

USB_GPIO1
USB30_SMI#
USB_GPIO2
1U_0402_6.3V6K @ C1008
USB_PESEL
USB_PEPWRDET
1
2
CLKREQ_USB30#_R
1
2
@
R1039 0_0402_5% USB_SPISCK
1 0_0402_5%
USB_SPISI
USB30@ R1040 47K_0402_5%
USB_SPICS#
USB_SPISO
2
1
+3VS

T2

USB30_SMI#

16

PORST#

1.5M_0402_5%

+3VS/+1.2VS
T1

USB30@

+3VS
+3V_PCH
A

Pin 60

Pin 41

0.1U_0402_16V4Z

Pin 31

0.1U_0402_16V4Z

Pin 7

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Pin 23

10U_0603_6.3V6M

Pin 19

0.1U_0402_16V4Z

USB30@ 1
C1040

0.1U_0402_16V4Z

USB30@ 1
C1039

10U_0603_6.3V6M

USB30@
1
C1038

USB30@ 1
C1042

USB30@ +VDD33U
L905
1
2
FBMA-L11-201209-221LMA30T_0805
USB30@ 1
USB30@ 1
C1034
C1035

+3VS

1 USB30@ 1
USB30@ C1014
C1041

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2010/10/1

2012/06/30

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

Title

USB3.0 controller
Size Document Number
Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

36

of

59

USB3_RX1_P_L

USB3_RX1_N_L

DLP11TB800UL2L_4P
1
4

USB3_RX1_P_R

+5VALW

USB3_RX1_N_R

2 2.2U_0402_6.3V6M

AI@
GND
IN
IN
EN#

OUT
OUT
OUT
OC#

8
7
6
5

ER36
AP2301MPG-13 MSOP 8P
A

Low Active

40
0_0402_5%
1 IU3@
2
R515
0_0402_5%
USB30@
1
2
R1056
1
C512
@ 1000P_0402_50V7K

@ 1
R514
@ 1
R517

USB_OC0# 15
USB_OCI#A 36

R512 1

USBAI_EN

2
0_0402_5%
2
0_0402_5%

L23
USB3_TX1_P_L 2
C524

USB3_TX1_P_C
1
0.1U_0402_10V7K

USB3_TX1_N_L 2
C525

USB3_TX1_N_C
1
0.1U_0402_10V7K

2 0_0402_5%
USB20_N0_R
USB20_P0_R

DLP11TB800UL2L_4P
1

8
7
6
5

+5VALW

USB3_TX1_P_R

R516
100K_0402_5%
AI@
C511
0.1U_0402_16V7K~N
AI@

CB
CEN
TDM
DM
TDP
DP
VDD
SELCDP
Thermal Pad

1
2
3
4
9

CEN#
USB20_N0_CON
USB20_P0_CON
SELCDP

T44

PAD

R672

SELCDP

SLG55584AVTR_TDFN8_2X2
1

ER02

@ 1
R518

L24
2

USB3_RX2_N_L

+5VALW

USB20_N0_R

R745 1 NAI@

2 0_0402_5%

USB20_N0_CON

USB20_P0_R

R746 1 NAI@

2 0_0402_5%

USB20_P0_CON

2
0_0402_5%

@ 1
R519
USB3_RX2_P_L

USB3_TX1_N_R

CB

U28

SELCDP

R673

Function

DCP autodetect charger mode

S0 charging with SDP only

S0 charging with SDP or CDP

4.7K_0402_5%

AI@

1
2
3
4

2
1 0.22U_0603_16V7K
USBAI_PEN#
40 USBAI_PEN#

U28
4.7K_0402_5%

C510

AI@

L22

+USB_VCCA

C509 @ 1

2
0_0402_5%

+5VALW

ER15
U27

http://shop61976717.taobao.com
http://shop61976717.taobao.com
AI CHARGER
@ 1
R511

@
1

2
0_0402_5%
DLP11TB800UL2L_4P
1
4

USB3_RX2_P_R
USB3_RX2_N_R

ER15
+USB_VCCB

U29
C515 @ 1
C516

2 2.2U_0402_6.3V6M

2
1 0.22U_0603_16V7K
USBSW_EN#
40 USBSW_EN#

1
2
3
4

ER36

GND
IN
IN
EN#

OUT
OUT
OUT
OC#

8
7
6
5

AP2301MPG-13 MSOP 8P

Low Active

0_0402_5%
1 IU3@
2
R523
0_0402_5%
1 USB30@2
R1057
1
C517
@ 1000P_0402_50V7K

L25
USB_OCI#B 36

@ 1
R520
@ 1
R522

USB_OC0# 15
USB3_TX2_P_L 2
C580

USB3_TX2_P_C
1
0.1U_0402_10V7K

USB3_TX2_N_L 2
C581

USB3_TX2_N_C
1
0.1U_0402_10V7K

2
0_0402_5%
2
0_0402_5%
DLP11TB800UL2L_4P
1

2 R521
@

1 0_0402_5%

USB3_TX2_P_R
L26

@ 1
R524

USB20_N0_CON

USB20_P0_CON

USB3_TX2_N_R

USB20_N0_C

USB20_P0_C

charger port: left side & near user


+USB_VCCA
JUSB1

W=80mils

2 R525
@

1 0_0402_5%
C513
470P_0402_50V7K

1
2
3
4
5
6
7
8
9

USB20_N0_C
USB20_P0_C

WCM-2012HS-900T

2
0_0402_5%

C514
47U_0805_6.3V

USB3_RX1_N_R
USB3_RX1_P_R
USB3_TX1_N_R
USB3_TX1_P_R

+5VALW

2 R526
@

ER38
D27

ER15
C518 @ 1
C519

USB3_RX1_P_R

USB3_RX1_N_R

USB3_RX1_N_R

USB3_TX1_P_R

USB3_TX1_P_R

USB20_N1_R

USB20_P1_R

2 2.2U_0402_6.3V6M

2
1 0.22U_0603_16V7K
USBSW_EN#
40 USBSW_EN#
ER36

1
2
3
4

GND
IN
IN
EN#

OUT
OUT
OUT
OC#

8
7
6
5

0_0402_5%
2
R527

USB3_TX1_N_R

USB3_TX1_N_R

2 R528
@

3
1

10
11
12
13

SANTA_373280-1
CONN@

USB20_N1_C

USB20_P1_C

WCM-2012HS-900T

USB_OC4# 15

AP2301MPG-13 MSOP 8P

Low Active

1 0_0402_5%

GND
GND
GND
GND

L27

+USB_VCCC

U30

USB3_RX1_P_R

VBUS
DD+
GND
StdA-SSRXStdA-SSRX+
GND-DRAIN
StdA-SSTXStdA-SSTX+

C522
@ 1000P_0402_50V7K

1 0_0402_5%

L05ESDL5V0NA-4

+USB_VCCB

Co-lay USB3.0 ( PCH & ASM1042)

JUSB2

W=80mils
USB20_N1_C
USB20_P1_C

ER38
C

D28

D29
15 USB3_RX1_P
15 USB3_RX1_N

R1058 1 IU3@
R1059 1 IU3@

36 U3RXDP_A
36 U3RXDN_A

R1060 1 USB30@2 0_0402_5%


R1061 1 USB30@2 0_0402_5%
R1062 1 IU3@
R1063 1 IU3@

15 USB3_TX1_P
15 USB3_TX1_N

2 0_0402_5%
2 0_0402_5%

2 0_0402_5%
2 0_0402_5%

USB3_RX1_P_L
USB3_RX1_N_L

USB3_RX2_P_R

USB20_N0_C

USB3_RX2_P_R

USB3_RX2_N_R

USB3_RX2_N_R

USB3_TX2_P_R

USB3_TX2_P_R

USB3_TX2_N_R

USB3_TX2_N_R

USB3_TX1_P_L
USB3_TX1_N_L

+5VALW

USB20_P0_C

I/O4

I/O2

VDD

GND

I/O3

I/O1

USB20_N1_C
C520
470P_0402_50V7K

C521
47U_0805_6.3V

USB3_TX2_N_R
USB3_TX2_P_R

USB3_RX2_N_R
USB3_RX2_P_R

1
2
3
4
5
6
7
8
9

VBUS
DD+
GND
StdA-SSRXStdA-SSRX+
GND-DRAIN
StdA-SSTXStdA-SSTX+

GND
GND
GND
GND

10
11
12
13

SANTA_373280-1
CONN@

USB20_P1_C

AZC099-04S.R7G_SOT23-6
R1064 1 USB30@2 0_0402_5%
R1065 1 USB30@2 0_0402_5%

36 U3TXDP_A_C
36 U3TXDN_A_C

3
L05ESDL5V0NA-4

Co-lay USB3.0 ( PCH & ASM1042)

15 USB3_RX2_P
15 USB3_RX2_N

R1066 1 IU3@
R1067 1 IU3@

2 0_0402_5%
2 0_0402_5%

36 U3RXDP_B
36 U3RXDN_B

R1068 1 USB30@2 0_0402_5%


R1070 1 USB30@2 0_0402_5%

15 USB3_TX2_P
15 USB3_TX2_N

R1073 1 IU3@
R1075 1 IU3@

36 U3TXDP_B_C
36 U3TXDN_B_C

R1076 1 USB30@2 0_0402_5%


R1078 1 USB30@2 0_0402_5%

2 0_0402_5%
2 0_0402_5%

USB3_RX2_P_L
USB3_RX2_N_L
USB20_N0
USB20_P0

R1069 1 IU3@
R1071 1 IU3@

36
36

U2DN_A
U2DP_A

R1072 1 USB30@2 0_0402_5%


R1074 1 USB30@2 0_0402_5%

15
15

USB20_N1
USB20_P1

R1077 1 IU3@
R1079 1 IU3@

36
36

U2DN_B
U2DP_B

R1080 1 USB30@2 0_0402_5%


R1081 1 USB30@2 0_0402_5%

15
15
USB3_TX2_P_L
USB3_TX2_N_L

2 0_0402_5%
2 0_0402_5%

2 0_0402_5%
2 0_0402_5%

USB20_N0_R
USB20_P0_R

USB20_N1_R
USB20_P1_R

Compal Secret Data

Security Classification
Issued Date

2011/07/12

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1

Title

Compal Electronics, Inc.


USB2.0/USB3.0 CONN

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011


5

Sheet

37

of

59

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http://shop61976717.taobao.com
Screw Hole
H11

ER18

R530
930@
100K_0402_5%

H17

H18

H10

H_3P0

H9
H_3P0

H20
H_3P0

H_3P0

H12

H_3P0

H7

H6

ON/OFF
51_ON#

51_ON#

40

3.1

43

DAN202UT106_SC70-3
930@

H_3P1

PW R_ON_LED#

H_3P1

2
ON/OFFBTN# 1

6
5

H_3P0

D30

H5

H_3P0

R531
9012@
100K_0402_5%

Bottom Side
SW 1
SMT1-05-A_4P
1
3

3.0

2 0_0402_5%

R513 1
9012@

H3

+3VL

+3VALW

H_2P7

ON/OFF switch

2.7

Power Button

H_3P1

H16

2
G

R532
930@
10K_0402_5%

PJSOT24CH_SOT23-3
D31

930@
Q30
2N7002_SOT23-3

ER24
H2

3.8

EC_ON

EC_ON

40,45

H_3P3

ER31
2

3.3

3
2

ON/OFFBTN#

ON/OFFBTN#

SW 5
NTC010-BB1G-C100C
2
1

H_3P8

3.8

H4
H_3P8

H1

H_3P8

LED6
PW R_ON_LED#

PW R_ON_LED# 39,40
H13

19-213A-T1D-CP2Q2HY-3T_W HITE

4.3

H14
H_4P3

H15
H_4P3

H19
H_4P3

2
2
300_0402_5%

1
R669

+5VALW

H_4P3

Fan Control Circuit

ER15

+5VS

FD2

FIDUCIAL_C40M80

FIDUCIAL_C40M80

FD4
@

FIDUCIAL_C40M80

FIDUCIAL_C40M80

U32

R533
10K_0402_5%

40

8
7
6
5

FAN_SPEED

FAN_SPEED

+3VS

FD3

FD1

GND
GND
GND
GND

EN
VIN
VOUT
VSET

1
2
3
4

JFAN1

1
2
3

FAN_SPEED
C528
10U_0603_6.3V6M

2
40

C527
1000P_0402_50V7K

+5VS_FAN

APL5607KI-TRG_SO8
C529
1000P_0402_50V7K

C526
2.2U_0402_6.3V6M

1
2 GND
3 GND

4
5

ACES_88231-03041
CONN@

FAN_SET

place as close as EC
4

Compal Secret Data

Security Classification
2011/07/12

Issued Date

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Compal Electronics, Inc.


PWRBTN/ FAN / Screws

Size
Document Number
Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
E

38

of

59

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http://shop61976717.taobao.com

KSI4
KSI0
KSI5
KSI6
KSI1
KSO2
KSO1
KSO0
KSO4

KSO14
KSO6
KSO7
KSO13
KSO8
KSO9

Touch/B Connector

ER12

CONN@
ACES_88514-02401-071
26
25

KSO14
KSO9
KSO3
KSO1
KSO13
KSI5
KSI1
KSI7
KSI6
KSI4
KSI2
KSI0
KSI3
KSO12
KSO10
KSO11
KSO6
KSO8
KSO4
KSO2
KSO5
KSO7
KSO0
KSO15

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

GND2
GND1

+5VS

C564
1

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JKB1

TP_CLK

0.1U_0402_16V4Z

LEFT_BTN#

TP_DATA

JTP1
8
7

G2 6
G1 5
4
3
2
1

6
5
4
3
2
1

RIGHT_BTN#
ER38

D33
LEFT_BTN#
RIGHT_BTN#

ACES_51524-0060N-001
CONN@

D34

TP_CLK 40
TP_DATA 40
@

C571
100P_0402_50V8J

KSO5

12,40

KSO[0..15] 40

C570
100P_0402_50V8J

KSO3

KSI[0..7]

KSI3

KSO[0..15]

L30ESDL5V0C3-2 C/A SOT-23

LEFT_BTN#

L30ESDL5V0C3-2 C/A SOT-23

SW3
NTC010-BB1G-C100C
1

2
4

RIGHT_BTN#

SW4
NTC010-BB1G-C100C
1

3
5

KSI2

KSI[0..7]

KSI7

KSO15

INT_KBD Conn.

2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J

KSO12

1
C553
1
C554
@
1
C555
@
1
C556
@
1
C557
@
1
C558
@
1
C559
@
1
C560
@
1
C561
@
1
C562
@
1
C563
@
1
C565
@
1
C566
@
1
C567
@
1
C568
@
1
C569
@
1
C572
@
1
C573
@
1
C574
@
1
C575
@
1
C576
@
1
C577
@
1
C578
@
1
C579

KSO11

KSO10

ER31

PWR_ON_LED# 38,40

YSDA0502C 3P C/A SOT-23


D36

HT-121UYG_YELLOW-GREEN

Green
LED1
+3VS

1
R577

2
200_0402_5%

1
3

2
HT-121UYG_YELLOW-GREEN

HT-210UD-UYG_AMB-GREEN
2

2
100_0402_5%

BATT_CHG_LED#

(Hall Effect Switch)


+3VALW

YSDA0502C 3P C/A SOT-23


D37
@
WL_BT_LED#

CAPS_LED#

Green
BATT_CHG_LED# 40

R581

YSDA0502C 3P C/A SOT-23

C582
0.1U_0402_16V4Z

2
300_0402_5%

UYG

UD

2
200_0402_5%

Green

APX9131AAI-TRG_SOT23-3

WL_BT_LED# 40

LED8
2
200_0402_5%

1
3

Green
2

ER32

C583
10P_0402_50V8J

ESD

BT/WLAN LED
1

LID_SW_IN# 40
1

GND
2

YG

VOUT

LED5
1
3

R578
47K_0402_5%

BATT_CHG_LOW_LED# 40

R580

HT-121UYG_YELLOW-GREEN

R671

U36

Amber
ER30

1
R582

LED3

+3VS

Lid Switch

@
1

+3VALW

+3VS

PCH_SATALED# 12

YG

BATT_CHG_LOW_LED#

Green
YG

@
1

2
1
200_0402_5%3

PWR_ON_LED#

1
R579

PCH_SATALED#

LED2
+3VALW

D35

R681
10K_0402_5%

VDD

LED

+5VALW

YG

HT-121UYG_YELLOW-GREEN

CAPS_LED# 40

Compal Secret Data

Security Classification
Issued Date

2011/07/12

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Compal Electronics, Inc.


KB/EC ROM/TP/FUN/LED

Size
B
Date:

Document Number

Rev
0.2

LA-8224P
Thursday, October 27, 2011

Sheet

39

of

59

0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
C530
C531
C532
C533
2
2
0.1U_0402_16V4Z

C534

1
1
1000P_0402_50V7K

KSI[0..7]

C535
1000P_0402_50V7K

KSI[0..7]

KSO[0..15]

R535
0_0402_5%
930@
+3VLP_EC

12,39

KSO[0..15]

ID

BRD ID

Ra

Board ID

Vab

+3VALW

100K

ER18

0.1U_0402_16V4Z
C536
ECAGND
2 R537
2
1
0_0402_5%
9012@

Rb

39

0V

+3VL

R536
100K_0402_1%

Ra
1

2
2
0.1U_0402_16V4Z

L28
FBMA-L11-160808-800LMT_0603
1
2 +EC_VCCA

+3VALW_EC

14" - N13M-GE1_Gb1B-64

+3VALW
1
R534
0_0805_5%

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QCL40 x8

AD_BID0

15 CLK_PCI_LPC
R540 2

+3VALW

C540

5,15,32,36,41

1 47K_0402_5%
2

EC_RST#
EC_SCI#
PM_CLKRUN#

16
EC_SCI#
14 PM_CLKRUNEC#

0.1U_0402_16V4Z

PLT_RST#

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

+3VALW

2 EC_SMB_CK1_R
2.2K_0402_5%
2 EC_SMB_DA1_R
2.2K_0402_5%
2 FLASH_EN
@ 10K_0402_5%

1
R543
1
R546
1
R548

+3VS

R551

EC_SCI#
10K_0402_5%

ER03
1

R677
@

VGA_BUF#
10K_0402_5%

ER34

43,44
43,44
13,20
13,20

EC_SMB_CK1 1 R560
EC_SMB_DA1 1 R561
1 R562
2 0_0402_5%
1 R563
2 0_0402_5%

EC_SMB_CK1
EC_SMB_DA1
PCH_SMLCLK
PCH_SMLDATA

EC_SMB_CK1_R
2 0_0402_5%
EC_SMB_DA1_R
2 0_0402_5%
EC_SMB_CK2
EC_SMB_DA2

12
13
37
20
38

DA Output
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

77
78
79
80

EC_SMB_CK1/GPIO44
EC_SMB_DA1/GPIO45
SM
EC_SMB_CK2/GPIO46
EC_SMB_DA2/GPIO47

14 AC_PRESENT

ER26

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
GPIO0A
GPIO0B
GPIO0C
GPIO0D
EC_INVT_PWM/GPIO11
FAN_SPEED1/GPIO14
EC_PME#/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
PCH_PWROK/GPIO18
SUSP_LED#/GPIO19
NUM_LED#/GPIO1A

VR_HOT#

C552
47P_0402_50V8J

2 R573
PROCHOT

NC

1
C551

1 100K_0402_5%
2
20P_0402_50V8

R575
100K_0402_5%

XCLKI/GPIO5D
XCLKO/GPIO5E

1
BATT_TEMP

DAC_BRIG/GPIO3C
EN_DFAN1/GPIO3D
IREF/GPIO3E
CHGVADJ/GPIO3F

68
70
71
72

USBAI_PEN#
FAN_SET
PCH_DPWROK

USBSW_EN#
1
10K_0402_5%
USBAI_PEN#
1
10K_0402_5%

ER26

ADP_I

43,44

DRAMRST_CNTRL_PCH

2
0.1U_0402_16V4Z

R744
R743

Co-lay KB930/KB9012 PECI


Stuff

6,9,13

USBAI_PEN# 37
FAN_SET 38
PCH_DPWROK 14
EC_DRAMRST_CNTRL_PCH

83
84
85
86
87
88

EC_MUTE_R
USBAI_EN

CPU1.5V_S3_GATE/GPXIOA00
WOL_EN/GPXIOA01
ME_EN/GPXIOA02
VCIN0_PH/GPXIOD00

97
98
99
109

CPU1.5V_S3_GATE
EN_WOL
HDA_SDO
R550 2
1
0_0402_5% 9012@

SPIDI/GPIO5B
SPIDO/GPIO5C
SPICLK/GPIO58
SPICS#/GPIO5A

119
120
126
128

ENBKL/GPIO40
PECI_KB930/GPIO41
FSTCHG/GPIO50
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
PWR_LED#/GPIO54
BATT_LOW_LED#/GPIO55
SYSON/GPIO56
VR_ON/GPIO57
PM_SLP_S4#/GPIO59

73
74
89
90
91
92
93
95
121
127

R544 2

1 0_0402_5%
USBAI_EN
BT_ON
EAPD
TP_CLK
TP_DATA

EAPD
TP_CLK
TP_DATA

KB930

R559

KB9012

R571
C541

ER26

TP_CLK

TP_DATA

EC_MUTE#

37
41
33
39
39

SPI Device Interface


SPI Flash ROM

GPIO
Bus

GPIO

R553
R555
R557

1 930@
1 930@
1 930@

EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04
PROCHOT_IN/GPXIOA05
H_PROCHOT#_EC/GPXIOA06
VCOUT0_PH/GPXIOA07
GPO
BKOFF#/GPXIOA08
PBTN_OUT#/GPXIOA09
PCH_APWROK/GPXIOA10
SA_PGOOD/GPXIOA11

PCH_RSMRST#
100
EC_LID_OUT#
101
102 0_0402_5% 2 R566
103
104
BKOFF#
105
PBTN_OUT#
106
107
SA_PGOOD
108

AC_IN/GPXIOD01
EC_ON/GPXIOD02
ON/OFF/GPXIOD03
GPI
LID_SW#/GPXIOD04
SUSP#/GPXIOD05
GPXIOD06
PECI_KB9012/GPXIOD07

110
112
114
115
116
117
118

ACIN_D
EC_ON
ON/OFF
LID_SW_IN#
SUSP#

V18R

124

+V18R

+3VALW_EC

D32

100P_0402_50V8J
1

@
1

ACIN

14,44

RB751V-40_SOD323-2

PCH_ENBKL

1
R752

2
0_0402_5%
@

PCH_ENBKL

ER35

1
C543

EC_SPI_WP
2
100P_0402_50V8J

14
EC_SPI_WP

ER26

R559 1

39

2 43_0402_1%
930@

H_PECI

12

Reserve for EMI please close to U4


C544
2
1
@
22P_0402_50V8J

SPI_CLK

EMI
ER13

PCH_RSMRST# 14
EC_LID_OUT# 16
Turbo_V
PROCHOT 43

C542
2

ACIN

10K_0402_5%

ER21

ACIN_D

0_0402_5%

BATT_CHG_LED# 39
CAPS_LED# 39
SUSACK# 14
BATT_CHG_LOW_LED#
SYSON
42,49
VR_ON
51
PM_SLP_S4# 14

2
R545

2 200K_0402_5%
R549

FRD#
FWR#
SPI_CLK
FSEL#

1
9012@

+3VL

930@

33_0402_5%
33_0402_5%
33_0402_5%

R571 1
9012@
1

KB9012QF-A3_LQFP128_14X14

20mil

EC_MUTE#
1 @
2
R547 100K_0402_5%

ER27
R558
1
2
EC_SPI_WP
@ T37
PAD
BATT_CHG_LED#
CAPS_LED#
SUSACK#
BATT_CHG_LOW_LED#
SYSON
VR_ON
PM_SLP_S4#

2 0.1U_0402_16V4Z

ER18

EC_MUTE# 33

CPU1.5V_S3_GATE 9
EN_WOL 32
HDA_SDO 12
NTC_V
43

2
2
2

SA_PGOOD

1
R541
1
R542

4.7K_0402_5%

2
1
@
22P_0402_50V8J

43
9012@ 2 R568
R569

10_0402_5%

1 930@
0_0402_5%

Del Y5 , C545, C546


C547

BKOFF# 30
PBTN_OUT# 5,14
WL_BT_LED# 39
SA_PGOOD 50

MAINPWON

43,45

R567
1
2SPI_CLK
33_0402_5% @

Reserve for EMI please close to U6

PCH_PWROK
PCH_PWROK
1
R554

EC_ON
38,45
ON/OFF 38
LID_SW_IN# 39
SUSP#
42,46,48,49
WL_OFF# 41
H_PECI
2
43_0402_1%

SPI ROM

10K_0402_5%

20mils
1

C550
4.7U_0805_10V4Z

+3VALW

128KB

930@

C549
0.1U_0402_16V4Z

U35
FRD#
2 930@
0_0402_5%

L29

FSEL#
SPI_SO

1
R574

ECAGND 2
1
FBMA-L11-160808-800LMT_0603

1
2
3
4

CS#
SO
WP#
GND

VCC
HOLD#
SCLK
SI

8
7
6
5

SPI_CLK
FWR#

MX25L1005AMC-12G_SO8
SA00002C100
930@

Compal Secret Data

Security Classification

Close to IMVP7

Issued Date

2011/07/12

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

0_0402_5%

ECAGND
1
100P_0402_50V8J

2
C538

C537

BATT_TEMPA 43

ADP_I
AD_BID0

SN74LVC1G06DCKR_SC70-5
1

122
123

14 SUSCLK_R

63
64
65
66
75
76

EC_MUTE#/GPIO4A
USB_EN#/GPIO4B
CAP_INT#/GPIO4C
EAPD/GPIO4D
TP_CLK/GPIO4E
TP_DATA/GPIO4F

PS2 Interface

1 @

H_PROCHOT#

PWR_ON_LED#

C548

0_0402_5%

R572

U34
5,43 H_PROCHOT#

0.1U_0402_16V4Z~D

14 PCH_PWROK
+3VS

9012@
1 R570
2
0_0402_5%
38,39 PWR_ON_LED#

BATT_TEMP/GPIO38
GPIO39
ADP_I/GPIO3A
GPIO3B
GPIO42
IMON/GPIO43

USBSW_EN# 37
VGA_PWROK 29,54
DGPU_PWROK 16
DS_WAKE# 16

4.7K_0402_5%

GND/GND
GND/GND
GND/GND
GND/GND
GND0

VR_HOT#

VGA_BUF#
EC_INV_PWM
FAN_SPEED
SUSWARN#
E51TXD_P80DATA
E51RXD_P80CLK

51

20
30
38
14
41
41

PM_SLP_S3#_R
PM_SLP_S5#_R
EC_SMI#
PCH_PWR_EN
FLASH_EN
AC_PRESENT
VGA_BUF#
EC_INV_PWM
FAN_SPEED
SUSWARN#
E51TXD_P80DATA
E51RXD_P80CLK

21
23
26
27

+5VS

11
24
35
94
113

ER21

1 R564
2 0_0402_5%
1 R565
2 0_0402_5%
16
EC_SMI#
36,42 PCH_PWR_EN
12 FLASH_EN

67

AD Input

CLK_PCI_EC
PCIRST#/GPIO05
EC_RST#
EC_SCII#/GPIO0E
GPIO1D

USBSW_EN#
VGA_PWROK
DGPU_PWROK
DS_WAKE#

GPIO0F
BEEP#/GPIO10
GPIO12
ACOFF/GPIO13

PWM Output

14 PM_SLP_S3#
14 PM_SLP_S5#

EC_VDD/AVCC

GATEA20/GPIO00
KBRST#/GPIO01
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC & MISC
LPC_AD0

R538

Rb
+3VALW

AGND/AGND

R539 2

1
2
3
4
5
7
8
10

69

C539
@ 22P_0402_50V8J
2
1

GATEA20
KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

16
GATEA20
16
KB_RST#
12
SERIRQ
12,41 LPC_FRAME#
12,41
LPC_AD3
12,41
LPC_AD2
1 @ 33_0402_5% 12,41
LPC_AD1
12,41
LPC_AD0

EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD0
EC_VDD/VCC

U33

9
22
33
96
111
125

Title

Compal Electronics, Inc.


EC ENE-KB930/Co-lay 9012

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

40

of

59

http://shop61976717.taobao.com
WLAN/BT combo
http://shop61976717.taobao.com

+3VS

+1.5VS

@ 1 0_1206_5%

R583 2

C588

4.7U_0805_10V4Z

0.1U_0402_16V4Z

4.7U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C589
0.1U_0402_16V4Z

C590

R585
100_0603_5%

PCI_RST#_R
CLK_LPC_DEBUG1_R
13 PCIE_PRX_WLANTX_N2
13 PCIE_PRX_WLANTX_P2

13 PCIE_PTX_WLANRX_N2
13 PCIE_PTX_WLANRX_P2
+3VS_WLAN

R594 1
R595 1

2 0_0402_5%
2 0_0402_5%

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

GND1

@
1

100K_0402_5%
PCH_BT_ON
BT_ON

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND2

54

3VSWLAN_GATE
2
47K_0402_5%

1
R670

+VSBP
+3VS_WLAN
+1.5VS_WLAN

0_0402_5%1
0_0402_5%1
PLT_RST#
R590 1
R591 1

LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R
LPC_AD0_R
2 R588
2@ R589 WL_OFF#

2 0_0603_5%
@
2 0_0603_5%
0_0402_5%
MINI1_SMBCLK R592 1
@
2
MINI1_SMBDATA
@
1
2
R593 0_0402_5%

35,36,42

SUSP

SUSP

ER19
Q60
2
G

SSM3K7002BFU_SC70-3
PCH_WAN_RADIO_OFF#
WL_OFF# 40
PLT_RST# 5,15,32,36,40

2 0_0402_5%
@ 2

13 CLK_PCIE_WLAN#
13 CLK_PCIE_WLAN

16 PCH_BT_ON
40 BT_ON

D
1

15

S
2

C592
0.1U_0603_25V7K

ER19
Q32
2
G

SUSP

SUSP

35,36,42

R587 1
0_0402_5%

13 WLANCLK_REQ#

2 R596

3VS_WLAN_CHG

JMINI1
R586 1
PCH_BT_ON

E51TXD_P80DATA
E51RXD_P80CLK

PCIE_WAKE#

14,32,36 PCIE_WAKE#

40 E51TXD_P80DATA
40 E51RXD_P80CLK

+1.5VS_WLAN
1
C587

80mil

C591
22U_0805_6.3V6M

C586

1
2
3

C585

8
7
6
5
4

C584

+3VS_WLAN
U37
AO4478L 1N SO8

+3VS_WLAN
10U_0603_6.3V6M

+3VS_WLAN

+3VALW

R584
0_1206_5%

SSM3K7002BFU_SC70-3

+3VS_WLAN
+3VALW
PCH_SMBCLK 10,11,13
PCH_SMBDATA 10,11,13

USB20_N4 15
USB20_P4 15
2

ACES_88913-5204
CONN@
R597 1
R598 1

2 1K_0402_0.5%
2@ 1K_0402_0.5%

5.2 mm High

Reserve for SW mini-pcie debug card.


Series resistors closed to KBC side.
LPC_FRAME#_R
R599
LPC_AD3_R
R600
LPC_AD2_R
R601
LPC_AD1_R
R602
LPC_AD0_R
R603
PCI_RST#_R
R604
CLK_LPC_DEBUG1_R
R605

1
1
1
1
1
1
1

2
2
2
2
2
2
2

0_0402_5% LPC_FRAME#
0_0402_5% LPC_AD3
0_0402_5% LPC_AD2
0_0402_5% LPC_AD1
0_0402_5% LPC_AD0
0_0402_5% PLT_RST#
CLK_LPC_DEBUG1
0_0402_5%

LPC_FRAME# 12,40
LPC_AD3 12,40
LPC_AD2 12,40
LPC_AD1 12,40
LPC_AD0 12,40
CLK_LPC_DEBUG1

15

C593
R606
2
1
1
2CLK_LPC_DEBUG1_R
@
33_0402_5% @
22P_0402_50V8J

Reserve for EMI please close to JMINI1

Compal Secret Data

Security Classification
Issued Date

2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Compal Electronics, Inc.


WLAN/ WWAN/ m-SATA

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
E

41

of

59

1
C599
0.1U_0603_25V7K

SSM3K7002BFU_SC70-3

2
1

C609
0.1U_0603_25V7K

2
1

10mil
R618 2

1 200K_0402_5%

1
2

20mil

3V_GATE

ER19
Q41
2
G

PCH_PWR_EN#

+VSBP

R615
470_0603_5%

ER19
Q43
2
G

PCH_PWR_EN#

SSM3K7002BFU_SC70-3

SSM3K7002BFU_SC70-3

PCH_PWR_EN#

4
10U_0805_10V4Z

AO3419L 1P SOT23-3

SUSP

40mil

1
2
3

Q39
3

8
7
6
5

C607

20mil

1
1

ER19
Q40
2
G

ER15

R614
220_0603_5%

R617
20K_0402_5%

+3V_PCH

R612

Q38
SI4178DY-T1-GE3_SO8

C608
0.1U_0402_16V7K~N

SSM3K7002BFU_SC70-3

+5V_PCH

SSM3K7002BFU_SC70-3

SUSP

R613
@
1
2
0_0603_5%

SUSP

ER19
Q35
2
G

ER19

+3VALW

SSM3K7002BFU_SC70-3

C606
1U_0603_10V4Z

3VS_GATE

Q36
2
G

C603
10U_0805_10V4Z

1 C602

1U_0402_6.3V6K

3VS_GATE
1
200K_0402_5%
ER19
Q42
2
G

2
2

+5VALW

C601

10U_0603_6.3V6M

C600
0.22U_0603_16V4Z

+3VS

1
2
3

C605

C604

2
R616

R609
470_0603_5%

@
2
1
0_0805_5%

U39
+3VALW
SI4178DY-T1-GE3_SO8

8
7
6
5

D
R611
2
1
47K_0402_5%

SUSP#

2
3

SUSP

ER19
Q37
2
G

R608
100K_0402_5%

SUSP

2
G

SSM3K7002BFU_SC70-3

1
1

Q34

+1.5VS

AO3413L_SOT23-3

2
1
2

R607
10_0603_5%

Q33

+1.5V

C598

ER19

ER08

10U_0603_6.3V6M

+1.5V TO +1.5VS

C595

1U_0603_10V6K

C597

C594

1
2
3

10U_0805_10V4Z

10U_0805_10V4Z

10U_0603_6.3V6M

8
7
6
5

http://shop61976717.taobao.com
http://shop61976717.taobao.com

+5VS

5VS_GATE
2
47K_0402_5%

1
R610

10U_0603_6.3V6M

+VSBP

ER16

C596

+VSBP

U38
+5VALW
SI4178DY-T1-GE3_SO8

10U_0805_10V4Z

+5VALW TO +5VS +3VALW TO +3VS

C610
0.1U_0603_25V7K

SSM3K7002BFU_SC70-3

+5VALW

+5VALW

+5VALW

R718
100K_0402_5%

ER19

SSM3K7002BFU_SC70-3

R735
100K_0402_5%

S
R621
10K_0402_5%

R622
10K_0402_5%

Q61
2
G

36,40 PCH_PWR_EN

Q44
2N7002_SOT23-3

2
G

SYSON

2
G

40,46,48,49 SUSP#
3

40,49

Q45
2N7002_SOT23-3

1
D

PCH_PWR_EN#

SYSON#

SUSP

SUSP

35,36,41

R619
100K_0402_5%

R620
100K_0402_5%

+1.5V_CPU_VDDQ

2
D

ER19
9 RUN_ON_CPU1.5VS3#

SSM3K7002BFU_SC70-3
@
R629

2
G

SSM3K7002BFU_SC70-3

SSM3K7002BFU_SC70-3

ER19
Q47
2
G

Q50

ER19

SUSP

1
3

ER19
Q49
2
G

2
D
SUSP

ER19
Q48
2
G

SYSON#

Q51

2
G

SSM3K7002BFU_SC70-3

R623
22_0603_5%~D

+DDR_CHG

+1.5V_D

SSM3K7002BFU_SC70-3

SSM3K7002BFU_SC70-3

+V1.05S_D

+V1.05S_VCCP_D

470_0402_5%

+1.5V_CPU_VDDQ_CHG

470_0402_5%

Q46
2
G

R624
220_0402_5%~D

R627

470_0402_5%
ER19

SUSP

R626

R628

49

0.75VR_EN

R625
100K_0402_5%

10.75VR_EN

1
1

48,50 +V1.05S_VCCP_PWRGOOD

+0.75VS

+1.05VS

+1.05VS
+1.5V

0_0402_5%
R630
SUSP
0_0402_5%

Compal Secret Data

Security Classification
Issued Date

2011/07/12

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Compal Electronics, Inc.


DC/DC Interface

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
E

42

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com

PL1
HCB2012KF-121T50_0805
1
2

DCIN jack P/N:DC301008L00,


need doble confirm P/N with ME
PJPDC1

1VSB_N_003

PR18
0_0402_5%
2VSB_N_002 2
G

1
PR28
100_0402_1%
1
2
1
PR31
100_0402_1%

3
@PJSOT24CW _SOT323-3
EC_SMB_CK1 40,44

PD2
2

1
40

NTC_V

20K_0402_1%
40

PR7
1
1
2

PQ3
TP0610K-T1-E3_SOT23-3

PC9
0.1U_0603_25V7K

PR14
22K_0402_1%
1
2

+VSBP

+3VL

VSB_N_001

PJ3
2

+CHGRTC

D
PQ4
SSM3K7002FU_SC70-3

PC10
.1U_0402_16V7K

PR16
100K_0402_1%

VL

MAINPWON 40,45

PH1
100K_0402_1%_NCP15WF104F03RC

1
@0_0402_5%

PC7
0.01U_0402_25V7K

POK

Turbo_V
2

B+

45

1
PR4
@10K_0402_1%

@29.4K_0402_1%

2
1
PR13
100K_0402_1%

PC6
1000P_0402_50V7K

ADP_OCP_2 1

PC128
10U_0805_25V6K
2
1

BATT+

2
Turbo_V

PR73
@0_0402_5%
2

2
1
PR3
@21.5K_0402_1%

OT2 RHYST2

PR6

PC8
0.22U_0603_25V7K

@SUYIN_200045GR009G28DZR

PD1

PR27
1K_0402_1%

EC_SMCA
EC_SMDA
TS_A

OT1 TMSNS2

PR9
PL4
HCB2012KF-121T50_0805
1
2

@PJSOT24CW_SOT323-3

1
2
3
4
5
6
7
8
9
10
11

NTC_V
OTP_N_002

@G718TM1U_SOT23-8

VMB

PJP2
1
2
3
4
5
6
7
8
9
GND
GND

PROCHOT

2ADP_OCP_1
G
S @SSM3K7002FU_SC70-3

40

GND RHYST1

OTP_N_003

2
PR5
1

@100K_0402_1%

PQ1

VCC TMSNS1

2
1
PR56
12.1K_0402_1%

PU1
1

+3VS

PC4
@0.1U_0603_16V7K

5,40 H_PROCHOT#

PL3
HCB2012KF-121T50_0805
1
2

ADP_I
PR2
1K_0402_1%

40,44

1
2

+3VL

PC5
100P_0402_50V8J

@SINGA_SDC2003-004111F

PC3
1000P_0402_50V7K

V-

GND_4

PC2
100P_0402_50V8J

V+

GND_3

1
1

VL
V-

GND_2

PC1
1000P_0402_50V7K

GND_1

For KB930 --> Keep PU1 circuit


(Vth = 0.825V)
For KB9012 (Red square) --> Remove PU1 circuit, but keep PR56
PH1, PR2, PQ1, PR7,PQ15,PR73,PR56

PH1 under CPU botten side :


CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C

VIN

PL2
HCB2012KF-121T50_0805
1
2

ADPIN
4

JUMP_43X39

RTC Battery
PBJ1

EC_SMB_DA1 40,44

+
+

+RTCBATT

PR29
1

+3VALW

100K_0402_5%

@LOTES_AAA-BAT-054-K01

PR30
1

BATT_TEMPA 40

1K_0402_1%

VIN

PQ5
TP0610K-T1-E3_SOT23-3

PR20
68_1206_5%

VS
PC12
0.1U_0603_25V7K

PC11
0.22U_0603_25V7K

PR23
100K_0402_1%

N1

PR19
68_1206_5%
2

PD4
LL4148_LL34-2

BATT+

VS_N_001
1

PD3
RLS4148_LL34-2

38

2
PR24
22K_0402_1%

51_ON#

VS_N_002

Compal Secret Data

Security Classification
Issued Date

For KB9012 --> Remove all 51_ON# circuit

2009/01/23

Deciphered Date

2010/01/23

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title
Size

Compal Electronics, Inc.


PWR-DCIN / BATT CONN / OTP
Document Number

Rev
0.2

PBL22 LA-7391P M/B


Date:

Thursday, October 27, 2011


D

Sheet

43

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com

for reverse input protection

SI1304BDL-T1-E3_SC70-3

PQ106 D
2
G
S
PR103
2

B+

ACDRV

SRN

SRP1

11

BQ24725_BATDRV

PR124
1

ILIM

SDA

SCL
9

10

1
2

PC125
0.01U_0402_25V7K

PR121
100K_0402_1%

PR106
0_0402_5%

PC109
0.01U_0402_50V7K

1
2

PC108
2200P_0402_50V7K
2
1

1
2

PC107
10U_0805_25V6K

PC106
10U_0805_25V6K

PC120
@10U_0805_25V6K
2
1

CSON1

1
1

3
2
1

Remember to change PC124 from SE000006S80


to SE025104K80 (2011-02-22)

210K_0402_1%

EC_SMB_CK1 40,43

EC_SMB_DA1 40,43
PC127

PC126
0.1U_0402_25V6

ILIM and external DPM


3.97A

Max.
1

Typ
17.23V
17.63V

H-->L
L--> H

Vin Dectector

PR122
154K_0402_1%

2
255K_0402_1%

PR123
66.5K_0402_1%

PR119

VIN

+3VALW

BQ24725_ILIM
PD8
@RB751V-40_SOD323-2

PR120

Min.

10K_0402_1%

100_0402_5%

14,40 ACIN

Pre_chg

PR118

IOUT

10K_0402_1%

BATDRV

BQ24725_ACDET

+3VLP

ACOK

@10K_0402_1%

+3VALW
PR126

For KB930 --> Keep PR117


For KB9012 (Red square) --> Remove PR117
Keep PR126

2BQ24725_ACOK5

ACDET

PR117
1

1
2

BQ24725_ACDRV

PR115
10_0603_1%
2 CSOP1
PR116
6.8_0603_5%
12 SRN 1
2 CSON1
13

SRP

PC123
680P_0402_50V7K

CMSRC

2
PC124
0.1U_0603_16V7K

BQ24725RGRR_VQFN20_3P5X3P5
BQ24725_CMSRC

PR102
0.02_1206_1%
4

14

GND

DL_CHG

CHG

PC122
0.1U_0402_25V6
2
1

15

LODRV

CSOP1

5
6
7
8
PQ105
AO4468L_SO8

BQ24725_LX

16

17

18

19

20

PL101
4.7UH_ETQP3W4R7WFN_5.5A_20%

PC121
0.1U_0402_25V6

1
PR111

BATT+

PC119
1
2

REGN

ACP

BTST

HIDRV

ACN

PHASE

PAD

PC114
0.01U_0402_50V7K

PC101
0.1U_0402_25V6

PC102
@0.1U_0402_25V6
2
1

1
2

1
2

PC104
10U_0805_25V6K

PC103
10U_0805_25V6K
2
1

2DH_CHG1
4
0_0402_5%

PR114
4.7_1206_5%

BQ24725_ACN

21

BQ24725_BATDRV_1

PR125
DH_CHG

1U_0603_25V6K
PU101

PQ104
S TR AON7408L 1N DFN
PD102
RB751V-40_SOD323-2
1

3
2
1

1U_0603_25V6K

1
2
3

PR107
4.12K_0603_1%

PC116
1

DH_CHG

BQ24725_VCC
2

PC118
1
2

VCC

PC117
0.1U_0603_25V7K

1
2

BQ24725_BATDRV 1

0.047U_0402_25V7K

BQ24725_LX

1 1

2
2

BQ24725_ACP

PR109
4.12K_0603_1%

8
7
6
5

PD101
BAS40CW_SOT323-3

PC113
0.1U_0402_25V6

1
2

PR108
4.12K_0603_1%

BQ24725_ACDRV_1

VIN

PC111
PC105
10U_0805_25V6K
2
1

2.2_0603_5%
BQ24725_REGN
2
1

1UH_10.3A_20%

S TR MDS2659URH
PQ103

BQ24725_BST 2

PR110
10_1206_1%

10U_0805_25V6K

0.01_2512_1%
PR101
1
4

PL102

PC115
0.1U_0402_25V6

1
2

PC110
0.1U_0402_25V6

1
2

1
2
3

S TR MDS2659URH
PQ102
8
7
6
5

P2

PC112
2200P_0402_50V7K

8
7
6
5

P1
S TR MDS2659URH
PQ101
1
2
3

PR105
0_0402_5%

VIN

3M_0402_5%

PC130
10U_0805_25V6K
2
1

1M_0402_5%

PC129
10U_0805_25V6K
2
1

PR104

ADP_I

100P_0402_50V8J

40,43

Please locate the RC


Near EC chip
2011-02-22

Compal Secret Data

Security Classification
Issued Date

2009/01/23

Deciphered Date

2010/01/23

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Compal Electronics, Inc.


PWR-CHARGER

Size

Document Number

Rev
0.2

PBL22 LA-7391P M/B


Date:

Thursday, October 27, 2011


D

Sheet

44

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
1

2VREF_51125

PC308
1U_0603_16V6K
1

1
2

PC306
10U_0805_25V6K

PC312
2200P_0402_50V7K
2
1

ENTRIP1
1

2
FB1

PQ305
S TR AON7408L 1N DFN

LG_5V

3
2
1

2
4

43

SNUB_5V

18

17

16

POK
RT8205LZQW(2)_WQFN24_4X4

EN0
PQ306

VL

1
2
PC318
4.7U_0805_10V6K

+5VALWP

PC320
1U_0603_10V6K

+
2

FDMC7692S_MLP8-5

1
2

PR315
95.3K_0402_1%

3
2
1

AO4468L_SO8

1
PC305

19

PL305
2.2UH_ETQP3W2R2WFN_8.5A_20%
1
2

150U_D2_6.3VY_R18M

20

LX_5V
1

UG_5V

PR313
@4.7_1206_5%

21

22

PR309
PC315
2.2_0402_5%
0.1U_0402_10V7K
BST_5V 1
2 BST1_5V 1
2

23

PR323
0_0402_5%

PC317
@680P_0402_50V7K

VIN

PR314
499K_0402_1%
2

24

NC

LGATE1
VREG5

PHASE1

LGATE2

15

PHASE2

GND

12

UGATE1

13

B++

BOOT1

EN

PGOOD

BOOT2

SKIPSEL

8
7
6
5

11
LG_3V

VREG3

B++

PR307
174K_0402_1%
2

VO1

UGATE2

PQ304

PC314
8
0.1U_0402_10V7K
PR308
BST1_3V 1
1
2
2 BST_3V 9
2.2_0402_5%
UG_3V 10
LX_3V

1
2
3

PC303

150U_D2_6.3VY_R18M

+3VALWP

PR312
PC316
@4.7_1206_5%
@680P_0402_50V7K
2
1 SNUB_3V
2
1

PL303
4.7UH_FMJ-0630T-4R7 HF_5.5A_20%
2
1

VO2

14

PR318

0_0402_5%

1
2
3
2

PR306
20K_0402_1%
2

P PAD

S TR AON7408L 1N DFN

PR305
30.9K_0402_1%
2

ENTRIP1

25

REF

PC313
10U_0805_6.3V6M

PU301
PQ303

TONSEL

FB2

1
2

PC304
4.7U_0805_25V6-K

PC310
2200P_0402_50V7K
2
1

PC309
0.1U_0402_25V6
2
1

PR303
133K_0402_1%
1

FB_5V 1

ENTRIP2

+3VLP

PC322
@680P_0603_50V7K
2
1

FB_3V

ENTRIP2

PL301
HCB2012KF-121T50_0805

PR302
20K_0402_1%
1
2

B++

B+

PC311
0.1U_0402_25V6
2
1

PR301
13.7K_0402_1%
1

ENTRIP1

ENTRIP2
3

B++

2N_3_5V_001

PQ307A
SSM6N7002FU_US6

PQ307B
SSM6N7002FU_US6

5
G

G
1

PC319
0.1U_0603_25V7K

2VREF_51125

+3VLP

+3VL
PJP302
2

1
PAD-OPEN 2x2m

PR322
2.2K_0402_5%
1
2

PQ308
DRC5115E0L_SOD323-3

VL

VL
PJP305
1

+5VALWP

PC321
4.7U_0805_25V6-K

PR319
@100K_0402_1%

PJP301
2

+5VALW

(5A,200mils ,Via NO.= 10)

+3VALWP

1
PAD-OPEN 2x2m

PAD-OPEN 4x4m
PJP303

N_3_5V_002 2

2
1
PR320
@42.2K_0402_1%

VS

1
2
100K_0402_5%

PR321
1
2
0_0402_5%

40,43 MAINPWON

38,40 EC_ON

PR317

+3VALW

(4A,120mils ,Via NO.= 8)

PAD-OPEN 4x4m

For KB930 --> Keep PR319, Remove PR322


For KB9012 (Red square) --> Remove PR319
Keep PR322

Compal Secret Data

Security Classification
2007/08/02

Issued Date

2008/08/02

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Compal Electronics, Inc.


PWR-3.3VALWP/5VALWP

Size Document Number


Custom
Date:

Rev
0.2

LA-8224P

Thursday, October 27, 2011

Sheet
E

45

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
1

1
2

PC402
22U_0805_6.3VAM

1
2

PR402
10K_0402_1%

PC401
22U_0805_6.3VAM

PC404
68P_0402_50V8J
2
1

1
FB_1.8VSP

SY8033BDBC_DFN10_3X3

PR401
20K_0402_1%
2

FB

+1.8VSP

NC
7

11
2

PR405
@47K_0402_5%

EN

LX

SVIN

TP

PR404 0_0402_5%

EN_1.8VSP

PC405
@0.1U_0402_10V7K

40,42,48,49 SUSP#

PL401
1UH_VMPI0703AR-1R0M-Z01_11A_20%
1
2

LX_1.8VSP

PR403
4.7_1206_5%

SNUB_1.8VSP

PVIN

LX

PC406
680P_0603_50V7K

PG

PVIN

NC

PC403
22U_0805_6.3VAM

10

VIN_1.8VSP

PU401

HCB1608KF-121T30_0603
1
2

PL402
+5VALW

PJP401
1

+1.8VSP

+1.8VS

(3A,120mils ,Via NO.= 6)

PAD-OPEN 4x4m
3

Compal Secret Data

Security Classification
Issued Date

2009/01/23

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Compal Electronics, Inc.


PWR-1.8VSP

Size

Document Number

Rev
0.2

PBL22 LA-7391P M/B


Date:

Thursday, October 27, 2011


D

Sheet

46

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
D

(8.5A,360mils ,Via NO.= 17)

PJP606,PJP607,PU605

Compal Secret Data

Security Classification
Issued Date

2010/07/20

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PWR-V1.05S_VCCP

Size
Document Number
Custom
Date:

Rev
0.2

PBL22 LA-7391P M/B

Thursday, October 27, 2011

Sheet
1

47

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
PL702
HCB1608KF-121T30_0603
2
1

+1.05VSP_B+

PU701

PGOOD

VBST

10

TRIP

DRVH

UG_+1.05VSP
SW _+1.05VSP

EN

SW

FB_+1.05VSP

VFB

V5IN

RF_+1.05VSP

TST

DRVL

PC711
@680P_0603_50V7K
2
1

PL701
S COIL .47U 20% FDVE0630-H-R47M=P3 17.7A
1
2

+1.05VS
1

PR701

PR709
1
2
@1.2K_0402_1%

PC701
PR710

PC709

0.1U 25V 0402

680P_0402_50V7K

+1.05VS

PC710
@1000P_0402_50V7K
1
2 +1.05VSP1

MDU1512

SNUB_+1.05VSP2

3
2
1

PC707
1U_0603_10V6K

PR706
4.7_1206_5%

330U_D2_2.5VY_R15M

PQ702

11
2

TP

TPS51212DSCR_SON10_3X3

S TR AON7518 1N DFN

UG_+1.05VSP1

+5VALW

LG_+1.05VSP

PR707
470K_0402_1%

PC708
@0.1U_0402_16V7K

PR711
1
2
0_0402_5%

40,42,46,49 SUSP#

BST_+1.05VSP

B+

3
2
1

42,50 +V1.05S_VCCP_PWRGOOD
PR704
TRIP_+1.05VSP
1
2
80.6K_0402_1%
EN_+1.05VSP
PR705
0_0402_5%
1
2

PR703
1
2
4.7_0402_5%

PC703
10U_0805_25V6K

PQ701
PC706
0.22U_0402_10V6K
BST1_+1.05VSP 1
2

PC702
10U_0805_25V6K
2
1

PR712
100K_0402_1%

PC705
2200P_0402_50V7K
2
1

PC704
0.1U_0402_25V6
2
1

+3VS

4.99K_0402_1%
2
1

PR708
100_0402_5%
2
1

VCCIO_SENSE1

VCCIO_SENSE

PU601,PR708

PR702
10K_0402_1%

(12A,480mils ,Via NO.= 24)

Compal Secret Data

Security Classification
Issued Date

2010/07/20

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PWR-V1.05SP

Size
Document Number
Custom
Date:

Rev
0.2

PBL22 LA-7391P M/B

Thursday, October 27, 2011

Sheet
1

48

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
PL502
HCB1608KF-121T30_0603
1
2

1.5V_B+

PR511
1
2
0_0402_5%

40,42

SYSON

VDDQ

PC517
@10U_0805_6.3V6K

PC508
10U_0805_6.3V6K

VTTREF

20
VTT

18

19
VLDOIN

1.5V_B+

VTTREF_1.5V

+1.5VP
1

PC511
0.033U_0402_16V7K

PR501
10.2K_0402_1%
2
1

+1.5VP
1

2
PR502
10K_0402_1%

PR503
887K_0402_1%
1
2

PC513
.1U_0402_16V7K

EN_1.5V

Note: S3 - sleep ; S5 - power off


PR509

42 0.75VR_EN

PC514
@0.1U_0402_10V7K

GND

PR508
0_0402_5%
1
2

VTTREF_1.5V
off
on
on

VTTSNS

EN_0.75VSP

+0.75VSP
off
off
on

FB_1.5V

TON_1.5V

PC512

1
2
3

+5VALW

Level
L
L
H

21

FB

VDD

S3

11

S5

VDDP

@680P_0402_50V7K

Mode
S5
S3
S0

PAD

VTTGND

RT8207MZQW _W QFN20_3X3

PC510
1U_0603_10V6K

FDMC7692S_MLP8-5

UGATE

CS

12

VDD_1.5V

+5VALW

13

1
4

PGND

TON

1
2
3
1
PR506
@4.7_1206_5%

PC501

SNUB_+1.5VP

330U_D2_2.5VY_R15M

PC509
1U_0603_10V6K
1
2

PR507
5.1_0603_5%

14

PU501

CS_1.5V

1
PQ502

LGATE

+1.5VP

PR505
20K_0402_1%
1
2

S TR AON7408L 1N DFN

15

BOOT

16

DL_1.5V

17

SW _1.5V

4
PL501
1UH_VMPI0703AR-1R0M-Z01_11A_20%

+0.75VSP

DH_1.5V

PHASE

0.22U_0402_10V6K

1
5

PC506

PC503
@4.7U_0805_25V6-K

1
2

PC502
10U_0805_25V6K
2
1

PC505
2200P_0402_50V7K
2
1

PC504
0.1U_0402_25V6
2
1

PC516
@680P_0603_50V7K
2
1

PQ501

DH_1.5V_1

+1.5V

BOOT_1.5V

PC507
10U_0805_6.3V6K

PR504
1
2
2.2_0402_5%

BST_1.5V

PGOOD

B+

10

0.75Volt +/- 5%
TDC 0.525A
Peak Current 0.75A
OCP Current 0.9A

@0_0402_5%

PR510

40,42,46,48 SUSP#

PJP501

0_0402_5%

PAD-OPEN 4x4m

PC515
@0.1U_0402_10V7K

PJP502

+1.5VP

+1.5V

(9A,360mils ,Via NO.= 18)

PAD-OPEN 4x4m

PJP503
+0.75VSP

+0.75VS

(2A,80mils ,Via NO.= 4)

PAD-OPEN 3x3m

Compal Secret Data

Security Classification
Issued Date

2010/07/20

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PWR-1.5VP / +0.75VSP

Size
Document Number
Custom
Date:

Rev
0.2

PBL22 LA-7391P M/B

Thursday, October 27, 2011

Sheet
1

49

of

59

http://shop61976717.taobao.com
http://shop61976717.taobao.com
The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.

VID [0]
0
0
1
1

VID[1]
0
1
0
1

VCCSA Vout
0.9V
0.8V
0.725V
0.675V

output voltage adjustable network

PC805
@680P_0402_50V7K

+VCC_SAP
TDC 4.2A
Peak Current 6A
OCP current 7.2A
PR801
@4.7_1206_5%

VOUT

EN

VID1

VID0

PR804
100K_0402_5%
2
1

3
4
5

+VCCSA_EN

+3VS

0_0402_5%
PR806

42,48

PC804
22U_0805_6.3V6M
1
2

PG

+VCCSAP

PC803
22U_0805_6.3V6M
1
2

LX

FB

SA_PGOOD 40

PC802
22U_0805_6.3V6M
1
2

SVIN

PC801
22U_0805_6.3V6M
1
2

PL801
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1
2

+VCCSA_PHASE

PC809
@0.1U_0402_10V7K
2
1

10
1

LX

1K_0402_5%
PR805
1
2

PC815
68P_0402_50V8J
+VCCSAP_FB 2

PVIN

GND

11

1K_0402_5%
PR802
1
2

@22U_0805_6.3VAM

PC819
2
1

22U_0805_6.3VAM
PC820
2
1

0.1U_0603_25V7K
PC817
2
1

+VCCSA_PWR_SRC

13

HCB1608KF-121T30_0603
1
2

2200P_0402_50V7K
PC818

+5VALW

PU801
SY8037DCC_DFN12_3X3
12
PVIN
LX

PL803

+V1.05S_VCCP_PWRGOOD

H_VCCSA_VID0

H_VCCSA_VID1

PR812
100_0402_5%
2
1

PR811
0_0402_5%
2
1

PJP801

+VCCSAP

+VCCSA_SENSE 9

+VCCSA

PAD-OPEN 4x4m

Compal Secret Data

Security Classification

Issued Date

2010/07/20

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

PWR-VCC_SAP
Size
C
Date:

Compal Electronics, Inc.


Document Number

Rev
0.2

PBL22 LA-7391P M/B


Thursday, October 27, 2011

Sheet
1

50

of

59

2 PR207

PR257

806_0402_1%

LG2

6132P_VCCP

LG1
HG1

BST1

806_0402_1%

DROOP

PC247
1
2

23.7K_0402_1%

2
CSREF

1000P_0402_50V7K

3P: 806
2P: 1K
A

SW2

52

SW1

52

2
PR231
@0_0402_5%

CSP2A

Option for
2 phase CPU

PR264
@0_0402_5%

CSREF

PR2392
1
6.98K_0402_1%
PC265
3P:
0.047U_0402_16V7K

SWN3

CSP3

52

3Phase: @
2Phase: install

CSP3

52

DRVEN

install
2P: @

TSENSE

CSREF

CSREF

CSP1

52

3P: 1500p
2P: 1200p

CSREF

1
2

CSP2

PC243
1000P_0402_50V7K

PR2462
6.98K_0402_1%

SWN2

52

SWN1

52

PC260
0.047U_0402_16V7K

PR2582
1
6.98K_0402_1%
PC248
0.047U_0402_16V7K

PUT CLOSE
TO VCORE
Phase 1
Inductor

PR261 2
143K_0603_1%

SWN1

PR253 2
143K_0603_1%

SWN2

PR256 2
143K_0603_1%

SWN3

1500P_0402_50V7K

2 PC268
220P_0402_50V7K

1 PR262 2NTC_PH201 1 PR255 2


75K_0402_1%
165K_0402_1%

PH202
100K_0402_1%_TSM0B104F4251RZ

PH201

PUT CLOSE
TO VCORE
HOT SPOT

3P: install
2P: @

1
220K_0402_5%_ERTJ0EV224J

Issued Date

Compal Secret Data


2009/12/01

2010/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Option for
1 phase GFX

6132_PWM 52

Security Classification

2Phase: @
1Phase: install

52

CSSUM
PC258
1
2

3P: 3.65K
2P: 9.53K

PC251
1
2

PC245
52
PR274 2
1
1
2
0_0402_5%
2.2U_0603_10V7K
PR265 2
1
52
+5VS
0_0402_5%
PC238
52
PR233 2 BST1_1 1
1
2
2.2_0603_5%
0.22U_0402_10V6K

+5VS
SW3

3P: 73.2K
2P: 41.2K

PR236 2
73.2K_0402_1%

TSENSE

3P: 2200p
2P: 3300p

PC267
2
0.22U_0402_10V6K

2
HG2

52
PR226 2 BST2_1 1
1
2.2_0603_5%
52

LG3

BST2

100K_0402_1%_TSM0B104F4251RZ

PUT CLOSE
TO V_GT
HOT SPOT

PR222
PC241
1
2 BST3_1 1
2
2.2_0603_5%
0.22U_0402_10V6K
52

3P: 21K
2P: 12.4K
CSCOMP

3P: 23.7K
2P: 24.9K

HG3

22P_0402_50V8J

PR252
1

1
2

3P: 348
2P: 1.21K

0.033U_0402_16V7K

PC266

CSCOMP

BST3

.1U_0402_16V7K
CSP1
CSP2
CSP3

PR249
PC256
2
1COMP_CPU1 2
1
6.04K_0402_1%
2200P_0402_50V7K

3P: 6.04K
2P: 4.32K

PR260

52

PH204

+5VS

1K_0402_1%

8.06K_0402_1%

PC263
2
1

PR247
PC262
1
2FB_CPU1 1
2
49.9_0402_1%
680P_0402_50V7K

PC242
1
2FB_CPU3 1
2
10_0402_1%
0.033U_0402_25V7K
PR263
FB_CPU2
1
2

TRBST#

45
44
43
42
41
40
39
38
37
36
35
34
33
32
31

PC254
1
2

PR250

SWN2A

2P: 36K
1P: 26.1K

PR259

3P: 330p
2P: 1000p

52

2P: install
1P: @

PC249
0.047U_0402_16V7K
1
2
PR218
6.98K_0402_1%

PR248

CSP2A
CSP1A
TSENSEA

PAD
VSNA
VSPA
DIFFA
TRBSTA#
FBA
COMPA
IOUTA
ILIMA
DROOPA
CSCOMPA
CSSUMA
CSREFA
CSP2A
CSP1A
TSNSA

3P: 22p
2P: 10p

PC246
1000P_0402_50V7K
VSP

SWN1A

6132_PWMA 52

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

PR254
1
2
0_0402_5%

VSN

1
2
21K_0402_1%

VCCSENSE

PR237
1
2
0_0402_5%

.1U_0402_16V7K

VGATE

VSSSENSE

5,14
8

PR220
1
2
36K_0402_1%

TRBST#
FB_CPU
COMP_CPU
IMON
ILIM_CPU
DROOP

VR_HOT#

CSP2A

.1U_0402_16V7K

VCC
PWMA
VDDBP
BSTA
VRDYA
HGA
EN
SWA
SDIO
LGA
ALERT#
BST2
SCLK
HG2
VBOOT NCP6132BMNR2G_QFN60_7X7
SW2
ROSC
LG2
VRMP
PVCC
VRHOT#
PGND
VRDY
LG1
VSN
SW1
VSP
HG1
DIFF
BST1

2
40

1PR215
2
21.5K_0402_1%
CSCOMPA
DIFFA
TRBSTA#
FBA
COMPA
IMONA
ILIMA
DROOPA

1
2

0.01U_0402_25V7K

1
PR235
10K_0402_5%

PC264
1
2

TRBST#
FB
COMP
IOUT
ILIM
DROOP
CSCOMP
CSSUM
CSREF
CSP3
CSP2
CSP1
TSNS
DRVEN
PWM

1
2

PR234
75_0402_1%

PC271
47P_0402_50V8J

6132_VCC

2
PR224

+1.05vs

6.98K_0402_1%
2

PU201

1
2.2U_0603_10V7K
2
PR228
3
VR_ON_CPU
1
2
4
40
VR_ON
PC270
0_0402_5%
VR_SVID_DAT1 5
.1U_0402_16V7K
VR_SVID_ALRT# 6
PR232
PR227
VR_SVID_CLK
7
95.3K_0402_1%
1
2 VBOOT
8
10K_0402_1%
ROSC_CPU
1
2VR_SVID_DAT1
1
2
9
PR266
0_0402_5%
VRMP
CPU_B+
1
2
10
VR_HOT#
11
PR230 1K_0402_1%
VGATE
12
13
PC239
14
+3VS
DIFF_CPU
15
54.9_0402_1%

2
1

130_0402_1%

PR223

+1.05vs

PR213
1

TSENSEA

CSREFA

61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46

PR221 2
1
2_0603_5%
PC259
1
2

CSP1A
PC257
1000P_0402_50V7K

PC255
0.047U_0402_16V7K

CSREFA 52

CSSUMA

9 VSS_AXG_SENSE

+5VS

CSREFA
SWN1A

68K_0603_1%

PC237
1000P_0402_50V7K

2P: 1.65K
1P: 1K

2P: install
1P: @

68K_0603_1%

2P: 21.5K
1P: 15.8K
9 VCC_AXG_SENSE

SWN2A

3300P_0402_25V7K

5.11K_0402_1%

1 PR211

CSREFA

1000P_0402_50V7K

PR210 10P_0402_50V8J PC252


2 COMPA1 1
2

PC235
1
2

DROOPA

PR216
2

1 PR212

8 VR_SVID_DAT
8 VR_SVID_ALRT#
8 VR_SVID_CLK

1.65K_0402_1%

1K_0402_1%

PC269
.1U_0402_16V7K

PR206
CSCOMPA

165K_0402_1%
560P_0402_50V7K

1 PR209

PH203
220K_0402_5%_ERTJ0EV224J

NTC_PH203

PR251 1

FBA2

1
2
10_0402_1%

PC244
1
2

8.25K_0402_1%

PC240
1
2

8.25K_0402_1%

PR208

4700P_0402_25V7K

24K_0402_1%

2P: 24K
1P: 24.9K

10.7K_0402_1%

PC236

PUT CLOSE
TO GT
Inductor

1.21K_0402_1%

PR204
FBA1

PC261
1
2

TRBSTA#

.1U_0402_16V7K
1 PR202 2

PC253
1
2

680P_0402_50V7K

PR205
1
2
75K_0402_1%

PC214
1
2

FBA3

10_0402_1%
PR203
1

PC250
1
2

1200P_0402_50V7K

PR201

1
D

560P_0402_50V7K

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Title

Compal Electronics, Inc.


PWR-CPU_CORE

Size Document Number


Custom
Date:

Rev
0.2

PBL22 LA-7391P M/B

Thursday, October 27, 2011

Sheet
1

51

of

59

PQ202

PC283
2200P_0402_25V7K
2
1

PC203
10U_0805_25V6K
2
1

5
3
2
1

3
2
1

PQ204
1

CSREF 51

S TR FDMS0308AS 1N POWER56-8

PR281
4.7_1206_5%

PR282
V1N_CPU 2

1SNUB_CPU1

LG1

51

LG2

S TR FDMS0308AS 1N POWER56-8

10_0402_1%
SWN1

51

PR283
V2N_CPU 2

CSREF 51

10_0402_1%
SWN2

51

PC284
1

3
2
1

51

SW2

+VCC_CORE

PL202
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1
4
1

PC211
@100U_25V_M

SNUB_CPU2

51

PR280
4.7_1206_5%

PR219
0_0603_5%
2
1

HG2

@ PQ212
@S TR AON7518 1N DFN

PC212
100U_25V_M
2

51

PQ203
S TR AON7518 1N DFN

1
1

PC281
2200P_0402_25V7K
2
1

PC280
0.1U_0402_25V6
2
1

PC202
10U_0805_25V6K
2
1

PC201
10U_0805_25V6K
2
1

PL201
0.36UH_VMPI1004AR-R36M-Z03_30A_20%

SW1

AXG_B+

+VCC_CORE

CPU_B+

CPU_B+

PL207
HCB2012KF-121T50_0805
2
1

51

PL206
HCB2012KF-121T50_0805
2
1

B+

PC213
@680P_0603_50V7K
2
1

@ PQ211
@S TR AON7518 1N DFN

3
2
1

PQ201
S TR AON7518 1N DFN

5
HG1

3
2
1

51

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CPU_B+

PR214
0_0603_5%
2
1

PC282
0.1U_0402_25V6
2
1

PC204
10U_0805_25V6K
2
1

3
2
1

PC285

680P_0402_50V7K

680P_0402_50V7K

PC292
2200P_0402_25V7K
2
1

PC291
0.1U_0402_25V6
2
1

PC208
10U_0805_25V6K
2
1

PC207
10U_0805_25V6K
2
1

SW3

PL204

QC 45W CPU
VID1=0.9V
IccMax=94A
Icc_Dyn=66A
Icc_TDC=56A
R_LL=1.9m ohm
OCP~110A

+VCC_CORE
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1

51

@ PQ213
@S TR AON7518 1N DFN

3
2
1

HG3

3
2
1

51

PR217
0_0603_5%
2
1

PQ207
S TR AON7518 1N DFN

CPU_B+

DC 35W CPU
VID1=1.05V
IccMax=53A
Icc_Dyn=43A
Icc_TDC=33A
R_LL=1.9m ohm
OCP~65A

PQ206
4

LG3

SNUB_CPU3

S TR FDMS0308AS 1N POWER56-8

3
2
1

51

V3N_CPU 2

PR271 1

DC 35W CPU
solution: 2+1
MOS: cpu_core -->
1(CSD17308)
1(TPCA8059)
Gfx_core -->
1(CSD17308)
1(TPCA8057)

PR268
4.7_1206_5%

QC 45W CPU
solution: 3+2
MOS: cpu_core -->
1(CSD17308)
1(TPCA8059)
Gfx_core -->
1(CSD17308)
1(TPCA8059)

CSREF 51

10_0402_1%
PC296
SWN3

51

680P_0402_50V7K

PR286
4.7_1206_5%

PQ208
2
SNUB_GFX1

6132_PWM
DRVEN

+5VS

2 PR287

2 PR267 1EN_GFX2 3
2K_0402_1%
1VCC_GFX2 2
1
4
PR273
PR276
0_0402_5%
0_0402_5%

CSREFA 51

10_0402_1%

PWM
EN
VCC

DRVH
SW
GND
DRVL

SW2A

NCP5911MNTBG_DFN8_2X2
LG2A

3
2
1
PC290

PC294
2200P_0402_25V7K
2
1

+VCC_GFXCORE_AXG

PR269
4.7_1206_5%

PC298
2.2U_0603_10V7K

S TR FDMS0308AS 1N POWER56-8

680P_0402_50V7K

PL205
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1
4
2

PQ210

PC293
0.1U_0402_25V6
2
1

PC209
10U_0805_25V6K
2
1

5
3
2
1

HG2A

SWN1A 51

S TR FDMS0308AS 1N POWER56-8
1

2
51
51

@ PQ215
@S TR AON7518 1N DFN

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

LG1A

FLAG

V2N_GFX

BST

PR229
0_0603_5%
2
1

DRVL

51

GND

PC288
2200P_0402_25V7K
2
1

PC287
0.1U_0402_25V6
2
1
4

VCC

3
2
1

NCP5911MNTBG_DFN8_2X2
PC289
2.2U_0603_10V7K

PC205
10U_0805_25V6K
2
1

5
3
2
1

SW1A

PR270
2
1
10_0402_1%

SNUB_GFX2

SW

4
PU203

PL203

PQ209
S TR AON7518 1N DFN

EN

DRVH

PC295
0.22U_0402_10V6K

3
2
1

PWM

BSTA2_1

+VCC_GFXCORE_AXG

V1N_GFX

HG1A

1 PR288

2.2_0603_5%

1EN_GFX1
51
DRVEN
2K_0402_1%
+5VS
2
1VCC_GFX1 2
1
PR272
PR275
0_0402_5%
0_0402_5%

BSTA2

PR285
2

FLAG

51 6132_PWMA

BST

PR225
0_0603_5%
2
1

@ PQ214
@S TR AON7518 1N DFN

PQ205
S TR AON7518 1N DFN

PU202
1

3
2
1

1
2

PC286

0.22U_0402_10V6K

BSTA1_1

PC206
10U_0805_25V6K
2
1

PR284
1
2
2.2_0603_5%

BSTA1

2Phase: install
1Phase:: @

PC210
10U_0805_25V6K
2
1

AXG_B+
AXG_B+
B

CSREFA

SWN2A 51

PC297

680P_0402_50V7K
A

QC 45W GT2
VID1=1.23V
IccMax=46A
Icc_Dyn=37A
Icc_TDC=38A
R_LL=3.9m ohm
OCP~55A

DC 35W GT2
VID1=1.23V
IccMax=33A
Icc_Dyn=20.2A
Icc_TDC=21.5A
R_LL=3.9m ohm
OCP~40A

Compal Secret Data

Security Classification

Issued Date

2009/12/01

Deciphered Date

2010/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

PWR-CPU_CORE
Size
C
Date:

Compal Electronics, Inc.


Document Number

Rev
0.2

PBL22 LA-7391P M/B


Thursday, October 27, 2011

Sheet
1

52

of

59

1
2

PC1158
22U_0805_6.3V6M

1
+

PC765

@330U_D2_2V_Y

PC764

330U_D2_2V_Y

PC1166

PC1165

PC1126
22U_0805_6.3V6M

PC761
22U_0805_6.3V6M

PC760
22U_0805_6.3V6M

@330U_D2_2V_Y

1
PC1125
22U_0805_6.3V6M

PC1164

1
PC1124
22U_0805_6.3V6M

330U_D2_2V_Y

1
PC1123
22U_0805_6.3V6M

PC1120
22U_0805_6.3V6M
330U_D2_2V_Y

1
PC1122
22U_0805_6.3V6M

PC1163

1
PC1121
22U_0805_6.3V6M

PC1119
22U_0805_6.3V6M

330U_D2_2V_Y

PC1118
22U_0805_6.3V6M

PC763

PC1117
22U_0805_6.3V6M

330U_D2_2V_Y

PC1116
22U_0805_6.3V6M

PC762
22U_0805_6.3V6M

PC759
22U_0805_6.3V6M

2
1

PC758
22U_0805_6.3V6M

2
1

+1.05vs
1
1

PC757
22U_0805_6.3V6M

PC1115
22U_0805_6.3V6M
PC1162
22U_0805_6.3V6M

PC756
22U_0805_6.3V6M

PC1114
22U_0805_6.3V6M

PC1161
22U_0805_6.3V6M

PC755
22U_0805_6.3V6M

PC1113
22U_0805_6.3V6M

PC1160
22U_0805_6.3V6M

PC754
22U_0805_6.3V6M

PC1112
22U_0805_6.3V6M

PC1159
22U_0805_6.3V6M

PC753
22U_0805_6.3V6M

PC1111
22U_0805_6.3V6M

PC752
22U_0805_6.3V6M

1
1

Socket Top

7 x 22 F (0805)
2 x (0805) no-stuff
sites
+1.05vs

PC751
22U_0805_6.3V6M

PC1157
22U_0805_6.3V6M

PC1156
22U_0805_6.3V6M

+VCC_CORE
1

5 x 22 F (0805)
5 x (0805) no-stuff
sites
D

PC1155
22U_0805_6.3V6M

PC1110
10U_0805_6.3V6M

PC1154
22U_0805_6.3V6M

PC1109
10U_0805_6.3V6M

PC1153
22U_0805_6.3V6M

PC1108
10U_0805_6.3V6M

PC1152
22U_0805_6.3V6M

PC1107
10U_0805_6.3V6M

Socket Bottom
+VCC_GFXCORE_AXG

PC1151
22U_0805_6.3V6M

PC1106
10U_0805_6.3V6M

+VCC_GFXCORE_AXG

PC1105
10U_0805_6.3V6M

1
PC1104
10U_0805_6.3V6M

PC1103
10U_0805_6.3V6M

PC1102
10U_0805_6.3V6M

+VCC_CORE

PC1101
10U_0805_6.3V6M

http://shop61976717.taobao.com
http://shop61976717.taobao.com
Below is 458544_CRV_PDDG_0.5 Table 5-8.

+VCC_CORE

+VCC_CORE
Chief River
1
+

1
+

PC1127
330U_D2_2V_Y

1
PC1128
330U_D2_2V_Y

1
PC1129
330U_D2_2V_Y

330uF*9m

470uF*4.5m

22uF

10uF

16

10

1
PC1130
330U_D2_2V_Y

PC1131
330U_D2_2V_Y

8layer for DC CPU

8layer for QC CPU

16

10

6layer for DC CPU

16

10

6layer for QC CPU

16

10

GFX_CORE DC

12

GFX_CORE QC

12

1.05V_VCCP

12

Compal Secret Data

Security Classification
2008/09/15

Issued Date

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PWR - PROCESSOR DECOUPLING

Size

Document Number

Rev
0.2

LA-8224P
Date:

Thursday, October 27, 2011

Sheet
1

53

of

59

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http://shop61976717.taobao.com

BOOT2_2_VGA

UGATE2_VGA

1
2

1
2

PC926
47U_0805_6.3V6M

PC935
4.7U_0603_6.3V6M

PC927
@22U_0805_6.3V6M
2
1
PC934
4.7U_0603_6.3V6M
2
1

PC928
22U_0805_6.3V6M

PC933
4.7U_0603_6.3V6M
2
1

PC929
22U_0805_6.3V6M

PC930
22U_0805_6.3V6M

PC906
10U_0805_25V6K
2
1

PC905
10U_0805_25V6K

PC953
2200P_0402_50V7K
2
1

S TR AON7518 1N DFN

PL901
0.36UH_VMPI1004AR-R36M-Z03_30A_20%

SNUB1_VGA

+VGA_CORE
V1N_VGA

1
PR939
1_0402_1% +

Layout Note:
Place near Phase1 Choke

+
2

VSUM-_VGA

1P : @
2P: install

VSUM+_VGA

PC902
330U_D2_2V_Y

S TR FDMS0309S 1N POWER56-8

3
2
1

PH901
10K_0402_1%_TSM0A103F34D1RZ

PR936
4.7_1206_5%

PR938
10K_0402_1%

LGATE1_VGA

PR937
3.65K_0805_1%
2
1

LF1_VGA
1

PQ902

PC901
330U_D2_2V_Y

PHASE1_VGA

BOOT1_1_VGA

UGATE1_VGA1

PC954
0.22U_0603_10V7K
1
2

3
2
1

PR934
2.2_0603_5%
2
1

3
2
1

PR916
0_0603_5%
2
1

UGATE1_VGA

PC952
0.1U_0402_25V6
2
1

PQ906

PQ901
@S TR AON7518 1N DFN

ISEN1_VGA

1
VSUM-_VGA

PC961
680P_0402_50V7K

PC962
0.1U_0402_16V7K

20W
solution:1P
OCP:38A

25W ~30W
solution:2P
OCP:75A

Compal Secret Data

Security Classification

Issued Date

2008/09/15

Deciphered Date

2012/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Compal Electronics, Inc.


PWR - VGA_COREP

Size

Document Number

Rev
0.2

LA-8224P
Date:

PC932
4.7U_0603_6.3V6M
2
1

1
2

PC913
4.7U_0603_6.3V6M
PC965
0.1U_0402_10V7K
2
1

1
2

PC912
4.7U_0603_6.3V6M
2
1

1
2

VGA
(20W ~ 35W
bulk cap
330uF_9m * 4)
35W--> 5 * 0.1uF +15 * 4.7u + 22u * 3 + 330_9m * 4

PC957
0.022U_0603_25V7K
2
1

+VGA_B+

PR943
1.58K_0402_1%
1
2

1P: 0.1uF
2P: 0.22uF

Near VGA Core

PC931
4.7U_0603_6.3V6M
2
1

+5VS

1P: 866
2P: 1.58K

+
2

PC904
470U 2V M D2 LESR4.5M SX H1.9

SNUB2_VGA

PC919
4.7U_0603_6.3V6M

PC911
4.7U_0603_6.3V6M
2
1

PC925
4.7U_0603_6.3V6M
2
1

PC922
4.7U_0603_6.3V6M
2
1
PC967
0.1U_0402_10V7K

PC924
4.7U_0603_6.3V6M
2
1

PC921
4.7U_0603_6.3V6M
2
1
PC966
0.1U_0402_10V7K
2
1

1
2

PC920
4.7U_0603_6.3V6M
2
1

1
2

PC951
0.22U_0603_25V7K

PC950
1U_0603_10V6K
2
1

+VGA_B+

PR932
@82.5_0402_5%

1P: @

PC960
@0.01U_0402_25V7K

PR942
10_0402_5%
1
2

PC959
@330P_0402_50V7K
2
1

PR940
0_0402_5%
1
2

1
PC958
0.01U_0402_50V7K

PC955
@330P_0402_50V7K

VSUM_VGA_N001

+5VS

VSUM+_VGA

PR931
10_0402_5%

PR935
0_0402_5%

24 VSSSENSE_VGA

PC949
0.22U_0402_10V6K

1P: @
2P: 0.22u

+5VS VSUM-_VGA
2

23 VCCSENSE_VGA

0_0402_5%
2

1P: 68nF
2P: 0.022uF

PC956
0.22U_0603_10V7K
2
1

1
1

+VGA_CORE

1
2

1P: install
2P: @

PC943
1U_0603_10V6K

BOOT1_VGA

PR944
@0_0402_5%

PC948
0.22U_0402_10V6K

PR930
249K_0402_1%

1P: 120K
2P: @249K

+5VS

PC968
0.1U_0402_10V7K
2
1

1
0_0402_5%
2

PR929
1_0402_5%
1
2

ISEN1_VGA

PR925
IMON_VGA 1

ISEN2_VGA

PR928
267K_0402_1%

ISL62883CHRTZ-T_TQFN40_5X5

VSEN_VGA

2FB2_VGA1

VCCP_VGA

PR933
2.61K_0402_1%
NTC_VGA
2
1

680P_0402_50V7K
PR926
3.48K_0402_1%
1
2

PC947
150P_0402_50V8J

VSUM-_VGA
VSUM+_VGA ISEN2_VGA

PR921
0_0402_5%

PR927
VIN_VGA 1

Under VGA Core

PC923
4.7U_0603_6.3V6M
2
1

40
39
38
37
36
35
34
33
32
31
CLK_EN#
DPRSLPVR
VR_ON
VID6
VID5
VID4
VID3
VID2
VID1
VID0

PR946
1
2
@0_0402_5%

PR920
VCCP_VGA11
2
0_0402_5%

PR941
11K_0402_1%
2
1

PR924
499_0402_1%
PC945
2FB1_VGA1
2

AGND

VDD_VGA

41

30
29
28
27
26
25
24
23
22
21

ISEN1
VSEN
RTN
ISUMISUM+
VDD
VIN
IMON
BOOT1
UGATE1

1
2

PC944
1000P_0402_50V7K

PR923
8.06K_0402_1%
2
1

PC942
@22P_0402_50V8J

PC946
47P_0402_50V8J
1
2

PC941
1U_0603_10V6K
1
2

1P : @
2P: install

BOOT2
UGATE2
PHASE2
VSSP2
LGATE2
VCCP
PWM3
LGATE1
VSSP1
PHASE1

PGOOD
PSI#
RBIAS
VR_TT#
NTC
VW
COMP
FB
ISEN3
ISEN2

11
12
13
14
15
16
17
18
19
20

1
2
3
4
5
6
7
8
9
10

RTN_VGA
ISUM-_VGA

RBIAS_VGA
PSI#_VGA

VGA_VR_TT#
NTC_MOSFET_VGA
VW_VGA
COMP_VGA
FB_VGA
1
2ISEN3_VGA

470K_0402_5%_TSM0B474J4702RE

PR922
@249K_0402_1%
1
2

PU901

@56P_0402_50V8
2

PR909
1_0402_1%

+VGA_CORE

2
PR912
100K_0402_5%
2

PR914 14.7K_0402_1%
PH902
1
2NTC_MOS_VGA 1

+VGA_CORE
V2N_VGA

+VGA_CORE

PR913
0_0402_5%
PC909
1

PC940

3
2
1

PR918
100K_0402_5%
2

PR919
47K_0402_1%
2
1

ACIN_BUF

1
2
4.7_1206_5%

680P_0402_50V7K

20

PR906

S TR FDMS0309S 1N POWER56-8

PR907
3.65K_0805_1%
2
1

LGATE2_VGA

PD901
@RB751V-40TE17_SOD323-2
2
1

+3VS

+3VS

LF2_VGA

PQ904

PR915
1.91K_0402_1%

1P: @
2P: 100K

1P : @
2P: install

PL902
0.36UH_VMPI1004AR-R36M-Z03_30A_20%

5
CLK_ENABLE#_VGA

29,40 VGA_PWROK

PC971
@680P_0603_50V7K
2
1

1
2

@S TR AON7518 1N DFN

UGATE2_VGA1
PHASE2_VGA

HWPU

PC908
10U_0805_25V6K
2
1

3
2
1

PC938
0.22U_0603_10V7K
PR911
1
2
0_0603_5%
2
1

3
2
1

20
20
20
20
20
20

BOOT2_VGA

GPU_VID6
GPU_VID5
GPU_VID4
GPU_VID3
GPU_VID2
GPU_VID1
GPU_VID0

PR910
1.91K_0402_1%
1
2

.1U_0402_16V7K

1P: @
2P: 1.91K
+3VS

B+

PC903
330U_D2_2V_Y

PC939
DPRSLPVR_VGA

4
PR904
2.2_0603_5%
2
1

PR908
10K_0402_1%

PR905
10K_0402_1%
1
2

PR903
150K_0402_1%
1
2VRON_VGA

DGPU_PWR_EN

PQ905

PL903
HCB2012KF-121T50_0805
1
2
PL904
HCB2012KF-121T50_0805
1
2

PR902
0_0402_5%

GPU_VID5
GPU_VID4
GPU_VID3
GPU_VID2
GPU_VID1
GPU_VID0

PR945
68K_0402_1%

15,20,29

S TR AON7518 1N DFN

PQ903

PC907
10U_0805_25V6K

1P : @
2P: install
1

PC937
2200P_0402_50V7K
2
1

PC936
0.1U_0402_25V6
2
1

+VGA_B+

Thursday, October 27, 2011


D

Sheet

54

of

59

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http://shop61976717.taobao.com
Power block
CPU OTP

Page 56

Turn Off

Input
Switch Page 57

DC IN

B+
+3VALWP: TDC:6A
+5VALWP: TDC:6.1A
RT8205LZQW(2) WQFN

CHARGER
CC:0A~3.64A
CV:12.6V(6cell)
BQ24725RGRR

Always
Page 52

+1.8VP: TDC:1.2A
SY8033BDBC

SUSP#
Page 59

Page 57
C

Battery

Page 60

+V1.05SP: TDC:7.9A
TPS51212DSCR

Page 61

SUSP#

+1.5VP: TDC:16A
TPS51212DSCR
DGPU_PWR_EN
B

SUSP#

+VCCPP: TDC:8.5A
TPS51212DSCR

SYSON
Page 62

+VGA_CORE
TDC:23A
TPS51212DSCR

+0.75VSP: TDC:2A
APL5331KAC-TRL

Page 65

+3VALW
Page 62

+VCCSAP: TDC:4.2A
TPS51461RGER

+VCC_CORE
TDC: 52A
ISL95832HRTZ-T

VR_ON

+V1.05S_VCCP_PWRGOOD
Page 63

Page 64

+VCC_GFXCORE_AXG
TDC: 38A
ISL95832HRTZ-T

VR_ON
A

Page 64
Compal Secret Data

Security Classification
2010/08/03

Issued Date

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


POWER BLOCK DIAGRAM

Size Document Number


Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

55

of

59

Versionhttp://shop61976717.taobao.com
Change List ( P. I. R. List )
Page 1
http://shop61976717.taobao.com

Item Page#

Title

Date

Request
Owner

Issue Description

Solution Description

Rev.

Compal Secret Data

Security Classification
2008/09/15

Issued Date

2012/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PWR - PIR

Size

Document Number

Rev
0.2

LA-8224P
Date:

Thursday, October 27, 2011

Sheet
1

56

of

59

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http://shop61976717.taobao.com

Timing Diagram for G3 or S4-5/M-off (Suspend Well Off) to S0/M0 [non Deep S4/S5 Platform]

ACIN/BATT-IN
+5VALW/+3VALW
D

VCCSUS
(+5V_PCH/+3V_PCH)

PCH_RSMRST#

T3>0ms

PM_SLP_SUS#

T5<90ms

AC_PRESENT

PWRBTN_OUT#

T0>16ms

PM_SLP_S5#
PM_SLP_S4#

PM_SLP_S3#

T9>30us

T10>30us

CPU1.5V_S3_GATE

CPU1.5V_S3_GATE may come up before SUSP# and come down after SUSP#

T>?ms

SUSP#
+V1.05S_VCCP(CPU),
+V1.05S(VccASW)

T=?ms
T11>1ms PCH_APWROK may come up anytime before PCH_PWROK, but not after PCH_PWROK assertion

PCH_APWROK

SA_PGOOD
T>?ms

VR_ON
T33<5ms

CPU SVID BUS


50<T36<2000us

+VCC_CORE
T37<5ms
B

VGATE
T14>99ms

PCH_PWROK

T20>2ms

H_CPUPWRGD
T18>0ms
2ms<T17<650ms

PM_DRAM_PWRGD
SYSTEM_PWROK

SM_DRAMPWROK

+1.8VS_VCCPLL
T43>100ms

PLT_RST#

H_CPUPWRGD to PLT_RST# 1ms<T25<100ms

Color

Command

Signal Names

Timing of these signals is set by PCH or processor

Signal Names

Timing of these signals should be met by the platform (EC)

Signal Names

Timing of these signals is set by IntelR MVP

Signal Names

Voltage rails or chip-to-chip buses

Security Classification
Issued Date

Compal Secret Data


2009/12/01

Deciphered Date

2011/12/31

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Power Sequence
Size

Document Number

Rev
0.2

LA-8224P
Date:

Thursday, October 27, 2011


1

Sheet

57

of

59

Versionhttp://shop61976717.taobao.com
Change List ( P. I. R. List )
Page 1/2
http://shop61976717.taobao.com
Item
D

Fixed Issue

PG#

0.2

14

For non AI co-lay

0.2

37

HW Design (SMBus leakage)

0.2

HW Design (TMDS_B_HPD)

ER03
ER04

Rev.

ER01
ER02

Reason for change

+3VS Leakage
Can`t detect USB30 (JUSB2)

HW Design (PCB2)

0.2

Modify List
Delete

Date

R205

Add R745,R746 for non AI

09/21

AI parts change to AI@

13

Delete Q3. ( connect pin S & D )

40

Del R552, R556

36

Swap U90.39/40 to U90.36/37 net


Change R1040 to 47K from 4.7K ohm
Reserve R1029

09/21
09/22

remove R135, R137

09/21

ER05

Design change for card reader

0.2

34

ER06

HW Design (PURC demand)

0.2

29

Change to Q3(AO3404L) from U22(AO4430L)

09/21

Change R1049 to 330k


Change Q904 to AO3404L from AP2301GN
Change R1046 to 1.5M

09/21

ER07

HW Design(PCB2)

0.2

36

ER08

HW Design (PURC demand)

0.2

42

Change Q33 to AO3413L from AP2301GN

09/21

29

Change R433 to 0 ohm


Change R432 to 10K
Change R435 to 200 ohm

09/21

18

Reserve R290

09/21

Add CMDA14 signal (U12~U19 pin J7)

09/28

Fine-tune GPU timing

0.2

ER10

HW Design (reserve)

0.2

25,26,
27,28

un-stuff C396

ER11

HW Design(PCB2) for add VRAM DDR3 512MX8

0.2

ER12

HW Design (change)

0.2

39

Reverse JKB1 connector

09/30

ER13

HW Design

0.2

40

Del Y5 , C545 , C546

09/30

ER14

HW Design (PURC demand)

0.2

15

Change P/N C387,C389,C399,C436,C447,C602


Change P/N C509,C515,C518,C526.(0402)
Change P/N C99,C109,C118,C120,C140,C141.(0402)

10/03

Change R607 to 10 ohm


Change Y1,C144,C145
Change Y2,C163,C164

10/07

ER15

HW Design (PURC demand)

0.2

29,31
37,38
10,11

ER16

HW Design(XTAL fine-tune)

0.2

42,12
13,32
20,36

HW Design for instant on function

0.2

13
5

HW Design ( power jumper change to +3VL)

0.2

38
40

ER17
ER18

09/21

Add Q20,R773,R775
Reserve R768,R774.
Change Net name at Card reader Conn

ER09

Phase

Del R229,R230 (10K)

Add R776~R783 (10K)

Del R237,R239,R242 (8.2K)

Add R784~R793 (8.2K)

Change Y3,C900,C901.
Change Y4,C469,C473.
Change Y9

09/30

Reserve R750
R576 pin2 change to +3V_PCH from +3VS
Change R576 to 0

10/07

jumper

10/07

PJP302 (change +3VLP to +3VL @P38,P40)

Change P/N Q7,U20,U21.

ER19

HW Design (PURC demand)

0.2

Change P/N Q14~Q19,Q25,Q27~Q29,Q32,Q34~Q37,Q40~Q43,


Q46~Q51,Q55~Q57,Q60,Q61,Q902,Q903,Q905.

10/14

Change P/N Q23

ER20

EMI solution

0.2

Add R684 to 0 (H_CPUPWRGD)

ER21

Refer to ORB design

0.2

14

un-stuff D2, Add R751

40

un-stuff D32, R547,

10/14

Add R752

10/14

Assign U33.18 to AC_PRESENT signal.


change for GPU H/W strapping STRAP1 to PL 45K
ohm to enhanced the PCIe PEG driving.

ER22

0.2

22

Change R349 from 34.8K to 45.3K

10/14

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2009/12/01

2011/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

EE-PIR-1
Size Document Number
Custom

Rev
0.2

LA-8224P

Date:

Thursday, October 27, 2011

Sheet
1

58

of

59

Versionhttp://shop61976717.taobao.com
Change List ( P. I. R. List )
Page 2/2
http://shop61976717.taobao.com
Item

Fixed Issue

Reason for change


modify parts for Intel review feedback message.

Rev.

PG#

Modify List

Date

09
18
17
14
15

Add R289 Add C149 0.1uf


Del L6, Add R289 , un-stuff C212
Del L4, Add R387
Add R230
Stuff R244

10/14

0.2

38

Modify H2 size

10/17

Add R807

10/19
10/19

0.2

ER23

Phase
D

ER24

Modify H2 size

ER25

Refer to Intel review feedback item 45.

0.2

16

ER26

Reserve for Deep Sx

0.2

14,16

Add unstuff R800,R801,R802,R803,R804,R805

40

Add PCH_DPWROK,DS_WAKE#,SUSACK#,SUSWARN#

ER27

Reserve for ROM protect

0.2

40

Add unstuff R806

ER28

For Instant On function control by EC

0.2

06

Stuff R44, Unstuff R43

ER29

RF request

0.2

36

Reserve R1082 , C1045

10/19

ER30

For LED issue

0.2

39

change LED3 footprint to LED_HT-210UD-UYG_3P

10/20

ER31

PRUC request

0.2

Change SW3,SW4,SW5

10/20

ER32

PRUC request

0.2

39

Change U36

P/N

10/20

ER33

For EMI request (without MS_CLK)

0.2

34

Remove R637,C611,R631,C620.

10/20

20
40

Add R428, Revise U11 I/O signal.

12

Add Q63, R135, R137.

40

Change U33.41 net to EC_SPI_WP.

37

Change C510, C516, C519 to 0.22uF/16V.

32

Change R485 , R486 to 0.1uF

10/19
10/19

ER34

dGPU thermal throttling.

0.2

ER35

SPI flash data crisis prevention.

0.2

ER36

Power switch EOS issue prevention.

0.2

For EMI request

ER37

38
39

0.2

35

Change D6,D7,D9,D10,D33,D34.

ER39

Modify X76 table (N13P-GS & N13M-GE1 x8)

0.2

ER40

update Power circuit

0.2

43~56

ER41

Modify PCH_SPI_WP#

0.2

ER42

Add test point for DFT

ER43

For ASM1042 OC# pull-up

10/20
10/20
10/20
B

30,39

0.2

remove R806.

Reserve C641~C648
Change D27,D29,D24,D25.

For ESD request

10/20

Un-stuff R730.

37,35

ER38

singal control by EC

P/N

10/20

update X76 table (add ZZZ9 ~ZZZ12 for N13P-GS &


N13M-GE1 x8) & P/N

10/25

update Power circuit. (PC211)

10/26

12

Stuff R135

10/26

0.2

20

Add GPU_JTAG_TCK,GPU_JTAG_TDI,GPU_JTAG_TDO,
GPU_JTAG_TMS

10/27

0.2

37

Reserve

10/27 b

R1023,R1024

un-stuff

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2009/12/01

2011/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

EE-PIR-2
Size Document Number
Custom

Rev
0.2

LA-8224P

Date:

Friday, October 28, 2011

Sheet
1

59

of

59

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