1.

INTRODUCTION
1.1 Transistor
A transistor is a semiconductor device used to amplify and switch electronic signals and
power. It is composed of a semiconductor material with at least three terminals for connection to
an external circuit. A voltage or current applied to one pair of the transistor's terminals changes
the current flowing through another pair of terminals. Because the controlled (output) power can
be higher than the controlling (input) power, a transistor can amplify a signal.
The transistor is the fundamental building block of modern electronic devices, and is
ubiquitous in modern electronic systems. Following its development in the early 1950s the
transistor revolutionized the field of electronics, and paved the way for smaller and cheaper
radios, calculators, and computers, among other things.
The thermionic triode, a vacuum tube invented in 1907, propelled the electronics age
forward, enabling amplified radio technology and long-distance telephony. The triode, however,
was a fragile device that consumed a lot of power. Physicist Julius Edgar Lilienfeld filed a patent
for a field-effect transistor (FET) in Canada in 1925, which was intended to be a solid-state
replacement for the triode.
From November 17, 1947 to December 23, 1947, John Bardeen and Walter Brattain at
AT&T's Bell Labs in the United States, performed experiments and observed that when two gold
point contacts were applied to a crystal of germanium, a signal was produced with the output
power greater than the input. The transistor is the key active component in practically all modern
electronics. Many consider it to be one of the greatest inventions of the 20th century.

1.1.1 Advantages
The key advantages that have allowed transistors to replace their vacuum tube predecessors in
most applications are

Small size and minimal weight, allowing the development of miniaturized electronic
devices.
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Highly automated manufacturing processes, resulting in low per-unit cost.

Lower possible operating voltages, making transistors suitable for small, battery-powered
applications.

No warm-up period for cathode heaters required after power application.

Lower power dissipation and generally greater energy efficiency.

Higher reliability and greater physical ruggedness.

Extremely long life. Some transistorized devices have been in service for more than 50
years.

Complementary devices available, facilitating the design of complementary symmetry

circuits, something not possible with vacuum tubes.

Insensitivity to mechanical shock and vibration, thus avoiding the problem of

microphones in audio applications.

1.1.2 Limitations

Silicon transistors typically do not operate at voltages higher than about 1000 volts (SiC
devices can be operated as high as 3000 volts). In contrast, vacuum tubes have been
developed that can be operated at tens of thousands of volts.

High-power, high-frequency operation, such as that used in over-the-air television

broadcasting, is better achieved in vacuum tubes due to improved electron mobility in a
vacuum.

Silicon transistors are much more vulnerable than vacuum tubes to an electromagnetic
pulse generated by a high-altitude nuclear explosion.

Vacuum tubes create a distortion, the so-called tube sound, that some people find to be
more tolerable to the ear.

1.2 History
Very-large-scale integration (VLSI) is the process of creating integrated circuits by
combining thousands of transistors into a single chip. VLSI began in the 1970s when complex
semiconductor and communication technologies were being developed.
During the 1920s, several inventors attempted devices that were intended to control the
current in solid state diodes and convert them into triodes. Success, however, had to wait until
after World War II, during which the attempt to improve silicon and germanium crystals for use
as radar detectors led to improvements both in fabrication and in the theoretical understanding of
the quantum mechanical states of carriers in semiconductors and after which the scientists who
had been diverted to radar development returned to solid state device development. With the
invention of transistors at Bell labs, in 1947, the field of electronics got a new direction which
shifted from power consuming vacuum tubes to solid state devices.
Another problem was the size of the circuits. A complex circuit, like a computer, was
dependent on speed. If the components of the computer were too large or the wires
interconnecting them too long, the electric signals couldn't travel fast enough through the circuit,
thus making the computer too slow to be effective.
Jack Kilby at Texas Instruments found a solution to this problem in 1958. Kilby's idea
was to make all the components and the chip out of the same block (monolith) of semiconductor
material. When the rest of the workers returned from vacation, Kilby presented his new idea to
his superiors. He was allowed to build a test version of his circuit. In September 1958, he had his
first integrated circuit ready. Although the first integrated circuit was pretty crude and had some
problems, the idea was groundbreaking. By making all the parts out of the same block of
material and adding the metal needed to connect them as a layer on top of it, there was no more
need for individual discrete components. No more wires and components had to be assembled
manually. The circuits could be made smaller and the manufacturing process could be automated.
From here the idea of integrating all components on a single silicon wafer came into existence
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and which led to development in small-scale integration (SSI) in the early 1960s, medium-scale
integration (MSI) in the late 1960s, and large-scale integration (LSI) and VLSI in the 1970s and
1980s with tens of thousands of transistors on a single chip (later hundreds of thousands and now
millions).

1.2.1 Developments
The first semiconductor chips held two transistors each. Subsequent advances added
more and more transistors, and, as a consequence, more individual functions or systems were
integrated over time. The first integrated circuits held only a few devices, perhaps as many as ten
diodes, transistors, resistors and capacitors, making it possible to fabricate one or more logic
gates on a single device. Now known retrospectively as small-scale integration (SSI),
improvements in technique led to devices with hundreds of logic gates, known as medium-scale
integration (MSI). Further improvements led to large-scale integration (LSI), i.e. systems with at
least a thousand logic gates. Current technology has moved far past this mark and today's
microprocessors have many millions of gates and billions of individual transistors
As microprocessors become more complex due to technology scaling microprocessor designers
have encountered several challenges which force them to think beyond the design plane, and
look ahead to post-silicon:

Power usage/Heat dissipation As threshold voltage have ceased to scale with advancing
process technology, has not scaled proportionally. Maintaining logic complexity when
scaling the design down only means that the power dissipation per area will go up. This
has given rise to techniques such as dynamic voltage and scaling (DVFS) to minimize
overall power.

Process variation As photolithography techniques tend closer to the fundamental laws

of optics, achieving high accuracy in doping concentrations and etched wires is becoming
more difficult and prone to errors due to variation. Designers now must simulate across
multiple fabrication process corners before a chip is certified ready for production.

Stricter design rules Due to lithography and etch issues with scaling, design rules for
layout have become increasingly stringent. Designers must keep ever more of these rules
in mind while laying out custom circuits. The overhead for custom design is now

reaching a tipping point, with many design houses opting to switch to Electronic design
automation (EDA) tools to automate their design process.

2.

MOORES LAW.

2.1 Prediction
In 1965, Gordon Moore sketched out his prediction of the pace of silicon technology.
Decades later, Moores Law remains true, driven largely by Intels unparalleled silicon expertise.
According to Moores Law, the number of transistors on a chip roughly doubles every two years.
As a result the scale gets smaller and smaller. For decades, Intel has met this formidable
challenge through investments in technology and manufacturing resulting in the unparalleled
silicon expertise that has made Moores Law a reality.

Figure 2.1 Moores law

Nearly 40 years ago, Intel co-founder Gordon Moore forecasted the rapid pace of technology
innovation. His prediction, popularly known as Moores Law, states that transistor density on
integrated circuits doubles about every two years. Today, Intel continues to lead the industry,
driving Moores Law to in-crease functionality and performance and decrease costs, bringing
growth to industries worldwide.

2.2 Present
Moores Law is not a law of science founded in scientific investigation but an uncannily
accurate projection based on observation.
The present time, researchers are struggling to keep Moores Law on track. Processor
clock rates have stalled, as chip designers have struggled to control energy costs and heat
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dissipation, but the industrys response has been straightforward simply increase the number
of processor cores on a single chip, together with associated cache memory, so that aggregate
performance continues to track or exceed Moores Law projections.
The law states that the complexity (i.e., number of transistors per chip) for minimum
component costs has increased at a rate of roughly a factor of two per year. Certainly over the
short term this rate can be expected to continue, if not to increase. Over the longer term, the rate
of increase is a bit more uncertain, although there is no reason to believe it will not remain nearly
constant for at least 10 years. That means by 1975, the number of components per integrated
circuit for minimum cost will be 65,000.
Anyone working in the computer industry will at some time hear about Moores Law
because of its ability to predict future processor transistor density and thus performance. In 1965,
just four years after the first planar integrated circuit was discovered (not microprocessor), Dr.
Gordon E. Moore with Intel had observed exponential growth in the number of transistors that
could be manufactured on a chip. Dr. Moore went on to predict this exponential growth would
continue. As it turned out, Intel has been able to manufacture microprocessor chips that at least
doubled the number of transistors over a 12-month period or so and yet the cost per transistor has
dropped over time.
Moores law says that computer power doubles for the same cost about every two years,
implying rapidly falling cost, increased power and proliferation. If this continues, the equivalent
price of a $600 iPhone would be $18.75 in 2020, $0.59 in 2030 and overall power or cost
improving 1,000,000 times by 2050. How should we account for this possible scenario in our
investment strategies and plan for potential impact? What products and services have good
present potential but could be enormous if Moores law continues?
The table below shows the projected relative computing power if Moores Law continues at its
current pace:

Table 1.1 Relative computing power if Moores law continues

If this technological progress continues for another forty years, computing hardware in
2050 will be more than one million times more powerful than today. And thats building on a
base that already seems amazingly advanced.

3. TRANSISTOR TECHNOLOGIES
3.1 1st Transistor - Thermionic triode

Figure 3.1 thermionic triode

A triode is an electronic amplification device having three active electrodes. The term
most commonly applies to a vacuum tube (or valve in British English) with three elements: the
filament or cathode, the grid, and the plate or anode. The triode vacuum tube was the first
electronic amplification device, which propelled the electronics age forward, by enabling
amplified radio technology and long-distance telephony. Triodes were widely used in consumer
electronics until the 1950s, when bipolar junction transistors replaced them. The word is derived
from the Greek , trodos, from tri- (three) and hods (road, way), originally meaning the
place where three roads meet.
The directly-heated cathode (or indirectly by means of a filament) produces an electron
charge by thermionic emission. This electron stream is attracted to the positively-charged plate
(anode), inducing a current. Applying a negative DC voltage ("bias") to the control grid will
repel some of the electron stream back towards the cathode, thus isolating the plate from the
cathode; full bias will turn the tube off by blocking all current from the cathode. Conversely,
increasing the positive DC voltage on the plate will attract more electrons toward it. As grid bias
is increased, more of the electron current is repelled, resulting in a smaller current at the plate. If
an AC signal is superimposed on the grid, that signal will be amplified and directed toward the
plate as the negative DC bias is increased.
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The triode is very similar in operation to the n-channel JFET; it is normally on, and
progressively switched off as the grid/gate is pulled increasingly negative of the source/cathode.

3.2 1st Semiconductor Transistor Point contact transistor

Figure 3.2 point contact transistor

A point-contact transistor was the first type of solid-state electronic transistor ever
constructed. It was made by researchers John Bardeen and Walter Houser Brattain at Bell
Laboratories in December 1947. They worked in a group led by physicist William Bradford
Shockley. The group had been working together on experiments and theories of electric field
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effects in solid state materials, with the aim of replacing vacuum tubes with a smaller, less
power-consuming device.
The critical experiment, carried out on December 16, 1947, consisted of a block of
germanium, a semiconductor, with two very closely spaced gold contacts held against it by a
spring. Brattain attached a small strip of gold foil over the point of a plastic triangle a
configuration which is essentially a point-contact diode. He then carefully sliced through the
gold at the tip of the triangle. This produced two electrically isolated gold contacts very close to
each other.
The piece of germanium used had a surface layer with an excess of electrons. When an
electric signal traveled in through the gold foil, it injected holes (points which lack electrons).
This created a thin layer which had a scarcity of electrons.
A small positive current applied to one of the two contacts had an influence on the current
which flowed between the other contact and the base upon which the block of germanium was
mounted. In fact, a small change in the first contact current, caused a greater change in the
second contact current, thus it was an amplifier. The first contact is the "emitter" and the second
contact is the "collector". The low-current input terminal into the point-contact transistor is the
emitter, while the output high current terminals are the base and collector. This differs from the
later type of bipolar junction transistor invented in 1951 that operates as transistors still do, with
the low current input terminal as the base and the two high current output terminals are the
emitter and collector.

3.3 Other new Semiconductor Technologies for Transistor

3.3.1 Traditional Planar Transistor

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Figure 3.3 planar transistor

In 1959, Dawon Kahng and Martin M. (John) Atalla at Bell Labs invented the metaloxide
semiconductor field-effect transistor (MOSFET) as an offshoot to the patented FET design.
Operationally and structurally different from the bipolar junction transistor, the MOSFET was
made by putting an insulating layer on the surface of the semiconductor and then placing a
metallic gate electrode on that. It used crystalline silicon for the semiconductor and a thermally
oxidized layer of silicon dioxide for the insulator.
The metaloxidesemiconductor field-effect transistor (MOSFET, MOS-FET, or MOS FET)
is a transistor used for amplifying or switching electronic signals. Although the MOSFET is a
four-terminal device with source (S), gate (G), drain (D), and body (B) terminals, the body (or
substrate) of the MOSFET often is connected to the source terminal, making it a three-terminal
device like other field-effect transistors. When two terminals are connected to each other (shortcircuited) only three terminals appear in electrical diagrams. The MOSFET is by far the most
common transistor in both digital and analog circuits, though the bipolar junction transistor was
at one time much more common.
The MOSFET is used in digital complementary metaloxidesemiconductor (CMOS) logic,
which uses p- and n-channel MOSFETs as building blocks. Overheating is a major concern in
integrated circuits since ever more transistors are packed into ever smaller chips. CMOS logic
reduces power consumption because no current flows (ideally), and thus no power is consumed,
except when the inputs to logic gates are being switched. CMOS accomplishes this current
reduction by complementing every nMOSFET with a pMOSFET and connecting both gates and
both drains together. A high voltage on the gates will cause the nMOSFET to conduct and the
pMOSFET not to conduct and a low voltage on the gates causes the reverse. During the
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switching time as the voltage goes from one state to another, both MOSFETs will conduct
briefly. This arrangement greatly reduces power consumption and heat generation.

Difficulties arising due to MOSFET size reduction

Producing MOSFETs with channel lengths much smaller than a micrometer is a challenge, and
the difficulties of semiconductor device fabrication are always a limiting factor in advancing
integrated circuit technology. In recent years, the small size of the MOSFET, below a few tens of
nanometers, has created operational problems.

Higher sub threshold conduction

As MOSFET geometries shrink, the voltage that can be applied to the gate must be
reduced to maintain reliability. To maintain performance, the threshold voltage of the MOSFET
has to be reduced as well. As threshold voltage is reduced, the transistor cannot be switched from
complete turn-off to complete turn-on with the limited voltage swing available; the circuit design
is a compromise between strong current in the "on" case and low current in the "off" case, and
the application determines whether to favor one over the other. Sub threshold leakage (including
sub threshold conduction, gate-oxide leakage and reverse-biased junction leakage), which was
ignored in the past, now can consume upwards of half of the total power consumption of modern
high-performance VLSI chips.

Increased gate-oxide leakage

The gate oxide, which serves as insulator between the gate and channel, should be made
as thin as possible to increase the channel conductivity and performance when the transistor is on
and to reduce sub threshold leakage when the transistor is off. However, with current gate oxides
with a thickness of around 1.2 nm (which in silicon is ~5 atoms thick) the quantum mechanical
phenomenon of electron tunneling occurs between the gate and channel, leading to increased
power consumption.
Insulators that have a larger dielectric constant than silicon dioxide (referred to as high-k
dielectrics), such as group IVb metal silicates e.g. hafnium and zirconium silicates and oxides are
being used to reduce the gate leakage from the 45 nanometer technology node onwards.
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Increasing the dielectric constant of the gate dielectric allows a thicker layer while maintaining a
high capacitance (capacitance is proportional to dielectric constant and inversely proportional to
dielectric thickness). All else equal, a higher dielectric thickness reduces the quantum tunneling
current through the dielectric between the gate and the channel. On the other hand, the barrier
height of the new gate insulator is an important consideration; the difference in conduction band
energy between the semiconductor and the dielectric (and the corresponding difference in
valence band energy) also affects leakage current level. For the traditional gate oxide, silicon
dioxide, the former barrier is approximately 8 eV. For many alternative dielectrics the value is
significantly lower, tending to increase the tunneling current, somewhat negating the advantage
of higher dielectric constant.

Increased junction leakage

To make devices smaller, junction design has become more complex, leading to higher
doping levels, shallower junctions, "halo" doping and so forth, all to decrease drain-induced
barrier lowering (see the section on junction design). To keep these complex junctions in place,
the annealing steps formerly used to remove damage and electrically active defects must be
curtailed increasing junction leakage. Heavier doping is also associated with thinner depletion
layers and more recombination centers that result in increased leakage current, even without
lattice damage.

Lower output resistance

For analog operation, good gain requires high MOSFET output impedance, which is to
say, the MOSFET current should vary only slightly with the applied drain-to-source voltage. As
devices are made smaller, the influence of the drain competes more successfully with that of the
gate due to the growing proximity of these two electrodes, increasing the sensitivity of the
MOSFET current to the drain voltage. To counteract the resulting decrease in output resistance,
circuits are made more complex, either by requiring more devices, for example the cascade and
cascade amplifiers, or by feedback circuitry using operational amplifiers, for example a circuit
like that in the adjacent figure.

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Lower transconductance
The transconductance of the MOSFET decides its gain and is proportional to hole or
electron mobility (depending on device type), at least for low drain voltages. As MOSFET size is
reduced, the fields in the channel increase and the dopant impurity levels increase. Both changes
reduce the carrier mobility, and hence the transconductance. As channel lengths are reduced
without proportional reduction in drain voltage, raising the electric field in the channel, the result
is velocity saturation of the carriers, limiting the current and the transconductance.

Interconnect capacitance
Traditionally, switching time was roughly proportional to the gate capacitance of gates.
However, with transistors becoming smaller and more transistors being placed on the chip,
interconnect capacitance (the capacitance of the metal-layer connections between different parts
of the chip) is becoming a large percentage of capacitance. Signals have to travel through the
interconnect, which leads to increased delay and lower performance.

Process variations
With MOSFETS becoming smaller, the number of atoms in the silicon that produce many
of the transistor's properties is becoming fewer, with the result that control of dopant numbers
and placement is more erratic. During chip manufacturing, random process variations affect all
transistor dimensions: length, width, junction depths, oxide thickness etc., and become a greater
percentage of overall transistor size as the transistor shrinks. The transistor characteristics
become less certain, more statistical. The random nature of manufacture means we do not know
which particular example MOSFETs actually will end up in a particular instance of the circuit.
This uncertainty forces a less optimal design because the design must work for a great variety of
possible component MOSFETs. See process variation, design for manufacturability, reliability
engineering, and statistical process control.

Modeling challenges
Modern ICs are computer-simulated with the goal of obtaining working circuits from the
very first manufactured lot. As devices are miniaturized, the complexity of the processing makes
it difficult to predict exactly what the final devices look like, and modeling of physical processes
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becomes more challenging as well. In addition, microscopic variations in structure due simply to
the probabilistic nature of atomic processes require statistical (not just deterministic) predictions.
These factors combine to make adequate simulation and "right the first time" manufacture
difficult.

3.3.2 Ballistic Transistor

Figure 3.4 Ballistic Transistor

Ballistic deflection transistors are electronic devices being developed for very high-speed
integrated circuits. Instead of switching the flow of several electrons using gates, as it is done in
field-effect transistors, they manipulate the course of single electrons using electromagnetic
forces. Free flowing electrons are forced around a wedge-shaped obstacle (the 'deflector') on one
of two paths, corresponding to a logical '1' or '0'. Initially impelled by the circuits electric field,
electrons proceed on their respective paths via this electromagnetic deflection. The 'ballistic' title
was chosen to reflect the property of an individual electron traversing the transistor material: a
two-dimensional electron gas, acting as a thin sheet semiconductor.

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The Ballistic Deflection Transistor (BDT) should produce far less heat and run far faster
than standard transistors because it does not start and stop the flow of its electrons the way
conventional designs do. It resembles a roadway intersection, except in the middle of the
intersection sits a triangular block. From the "south" an electron is fired, as it approaches the
crossroads, it passes through an electrical field that pushes the electron slightly east or west.
When the electron reaches the middle of the intersection, it bounces off one side of the triangle
block and is deflected straight along either the east or west roads. In this way, if the electron
current travels along the east road, it may be counted as a zero, and as a one if it travels down the
west road.
A traditional transistor registers a "one" as a collection of electrons on a capacitor, and a
"zero" when those electrons are removed. Moving electrons on and off the capacitor is akin to
filling and emptying a bucket of water. The drawback to this method is that it takes time to fill
and empty that bucket. That refill time limits the speed of the transistorthe transistors in
today's laptops run at perhaps two gigahertz, meaning two billion refills every second. A second
drawback is that these transistors produce immense amounts of heat when that energy is emptied.
The BDT design should also be able to resist much of the electrical noise present in all
electronic devices because the noise would only be present in the electrical "steering" field, and
calculations show the variations of the noise would cancel themselves out as the electron passes
through.
The BDT is "ballistic" because it is made from a sheet of semiconductor material called a
"2D electron gas," which allows the electrons to travel without hitting impurities, which would
impede the transistor's performance.

3.3.3 Carbon Nanotube FET

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A carbon nanotube field-effect transistor (CNTFET) refers to a field-effect transistor that

utilizes a single carbon nanotube or an array of carbon nanotubes as the channel material instead
of bulk silicon in the traditional MOSFET structure. First demonstrated in 1998, there have been
major developments in CNTFETs

Figure 3.5 Carbon Nanotube FET

According to Moore's law, the dimensions of individual devices in an integrated circuit

have been decreased by a factor of approximately two every two years. This scaling down of
devices has been the driving force in technological advances since late 20th century. However, as
noted by ITRS 2009 edition, further scaling down has faced serious limits related to fabrication
technology and device performances as the critical dimension shrunk down to sub-22 nm range.
The limits involve electron tunneling through short channels and thin insulator films, the
associated leakage currents, passive power dissipation, short channel effects, and variations in
device structure and doping. These limits can be overcome to some extent and facilitate further
scaling down of device dimensions by modifying the channel material in the traditional bulk
MOSFET structure with a single carbon nanotube or an array of carbon nanotubes.
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Key Advantages
Better Control over channel formation.
Better threshold voltage.
Better sub threshold slope.
High mobility.
High current density.
High trans-conductance.

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4. TRI GATE TRANSISTOR

Tri-gate or 3-D are the terms used by Intel Corporation to describe their non-planar
transistor architecture planned for use in future microprocessors. These transistors employ a
single gate stacked on top of two vertical gates allowing for essentially three times the surface
area for electrons to travel. Intel reports that their tri-gate transistors reduce leakage and consume
far less power than current transistors. This allows up to 37% higher speed, and a power
consumption at under 50% of the previous type of transistors used by Intel.
Intel explains, "The additional control enables as much transistor current flowing as
possible when the transistor is in the 'on' state (for performance), and as close to zero as possible
when it is in the 'off' state (to minimize power), and enables the transistor to switch very quickly
between the two states (again, for performance)."
The worlds first demonstration of a 22nm microprocessor --code-named Ivy Bridge
--that will be the first high-volume chip to use 3-D Tri-Gate transistors. Further to increase the
drive strength for increased performance, multiple fins are used. Figure 2.a shows such a design
with just a single fin while that of figure 2.b and figure 2.c show designs with two and three fins
respectively.

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Figure 4.1 22nm tri-gate transistor with single fin

Figure 4.1 22nm tri-gate transistor with two fins

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Figure 4.1 22nm tri-gate transistor with three fins

4.1 PERFORMANCE TEST RESULTS

The performance tests were done by Intel with other planar devices of different
technologies and the test results are obtained for Gate voltage versus Channel current shown in
figure 3 (fig 3.a and fig 3.b) and Operating Voltage versus Transistor Gate Delay shown in
figure4 (fig4.a- fig4.d).

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Figure 4.4 Comparison of Planar and Tri-Gate

Figure 3.b comparison of Planar and Tri-Gate with and without reduced threshold voltage

4.2 Transistor gate delay

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Fig.4.6. Operating voltage Vs Gate delay

Fig. 4.6.b operating voltage Vs Gate delay

Fig. 4.6.c operating voltage Vs Gate delay

Fig. 4.6.d operating voltage Vs Gate delay

5. CONCLUSION
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As transistors get smaller, parasitic leakage currents and power dissipation become
significant issues. By integrating the novel three-dimensional design of the tri-gate transistor
with advanced semiconductor technology such as strain engineering and high-k/metal gate stack,
Intel has developed an innovative approach toward addressing the current leakage problem while
continuing to improve device performance.
Because tri-gate transistors greatly improve performance and energy efficiency, they
enable to extend the scaling of silicon transistors. Intel expects that the tri-gate transistors could
become the basic building block for microprocessors in future technology nodes. The technology
can be integrated into an economical, high-volume manufacturing process, leading to highperformance and low-power products.

6. REFERENCES

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1)http://www.intel.com/technology/mooreslaw
2)http://en.wikipedia.org/wiki/Multigate_device
3)http://www.intel.com(*pdf) files downloaded:
a)Trigate_press_briefing_0606
b) Intel_Transistor_BackgroundeR
c) 22nm-Details_Presentation
d)22nm-Announcement_Presentation

4) Vaidhyanadhan Subramanian- Multiple gate field effect transistior for future CMOS
technologies- http:// www.tr.ieitejournals.org
5) Jack Kavalieros, Brian Doyle, Suman Datta, Gilbert Dewey, Mark Doczy, Ben Jin, Dan
Lionberger, Matthew Metz, Willy Rachmady, Marko Radosavljevic, Uday Shah, Nancy Zelick
and Robert Chau- Tri-Gate Transistor Architecture with High-k Gate Dielectrics, Metal Gates
and Strain Engineering- Components Research, Technology and Manufacturing Group, Intel
Corporation, Mail Stop RA3-252, 5200 NE Elam Young Parkway, Hillsboro
97124, USA Email : Robert.S.Chau@Intel.com.

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