ABSTRACT

The enhancement of security against Side Channel Attack (SCA) to

digitally transmit data is a key aspect in data transmission. The hardware
implementation of a recently proposed low-power asynchronous Advanced
Encryption Standard (AES) substitution box (S-Box) design that is capable of
being resistant to SCA is proposed. A specified SCA standard evaluation fieldprogrammable gate array (FPGA) board is used to implement both synchronous
and asynchronous S-Box designs. This asynchronous S-Box is based on selftime logic referred to as Null Convention Logic (NCL), which supports a few
beneficial properties for resisting SCAs: clock free and dual-rail encoding.
These beneficial properties make it difficult for an attacker to decipher secret
keys embedded within the cryptographic circuit of the FPGA board.
Comparisons on the resistance to SCAs of both the original and proposed S-Box
design are presented, using differential power analysis (DPA) and correlation
power analysis (CPA) attacks. The power measurement results showed that the
NCL S-Box have lower total power consumption than the original and was
effective against Side Channel Attacks.

LIST OF FIGURES
FIG NO.

TITLE

PAGE NO.

2.1

Proposed system block diagram

2.2

Multiplicative inverse block

2.3

NCL multiplexer diagram

11

2.4

NCL XOR and NCL AND logic diagram

12

6.1

Affine Transformation NCL

29

6.2

Inverse Affine Transformation NCL

30

6.3

NCL Multiplexer

30

6.4

Multiplicative Inverse

31

6.5

S-Box encryption and decryption

32

6.6

AES encryption

33

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LIST OF TABLES
TABLE NO.

TITLE

PAGE NO.

2.1

S-Box final output

13

2.2

Inverse S-Box final output

14

6.1

Device utilization summary

35

6.2

Power analysis without SCA

37

6.3

Power analysis with SCA

39

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LIST OF ABBREVIATIONS
3DES

- Triple Data Encryption Standard

AddRoundKey

- Add the Round Key

AES

- Advanced Encryption Standard

ASIC

- Application-Specific Integrated Circuit

CLB

- Configurable Logic Block

CMOS

- Complementary Metal-Oxide-Semiconductor

DES

- Data Encryption Standard

FPGA

- Field Programmable Gate Array

GF

- Galois Field

InvSubBytes

- Inverse Substitution Bytes

NCL

- Null Convention Logic

NIST

- National Institute of Standards and Technology

S-Box

- Substitution-Box

SubBytes

- Substitution Bytes

SCA

- Side Channel Attack

VHDL

- Very high-speed integrated circuit Hardware

Description Language

VLSI

- Very Large Scale Integrated circuits

XOR

- Exclusive-OR

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