`timescale 1ns / 1ps

// PBcylon.v
// Scott R. Gravenhorst
// PicoBlaze Cylon LED Display
// 07-01-2006
// I'm an old C guy, so this is named "Main"...
module Main( led, clk ); // led is the same 'led' in PBcylon_Main.uc
f
output [7:0] led; // connection to LEDs
input clk; // 50MHz clock
reg [7:0] LED_reg; // A flipflop bank (8) to hold LED states
wire [9:0] address; // wires to connect uC address lines to ROM
wire [17:0] instruction; // wires to connect uC data lines, to ROM
wire [7:0] out_port; // wires to connect uC output port to the L
ED flipflops
// Instantiate the uC (kcpsm3) This uses file kcpsm3.v
kcpsm3 mcu( address, instruction, port_id, write_strobe, out_port, read_stro
be, in_port, interrupt, interrupt_ack, reset, clk );
// Instantiate the pbcylon ROM which contains the assembled pbcylon uC code.
// This uses file pbcylon.v (see text regarding assembly).
pbcylon CylonProcess( address, instruction, proc_reset, clk );
assign interrupt = 0; // ground the interrupt line
assign led = LED_reg; // Connect the outputs of the LED state fli
pflops to the LEDs
always @ ( posedge clk ) // on each positive edge of the 50 MHz cloc
k
begin
if ( write_strobe == 1'b1 ) // if write strobe is high, then out_port d
ata is valid NOW
LED_reg = out_port; // so send out_port data to the LED state f
lipflops' inputs
end
endmodule
// Note that because only one PicoBlaze output port is used,
// I did not need to include any port decoding logic
================================================================================
=========================
Now the UCF file (PBcylon_Main.ucf):
================================================================================
=========================
# Period constraint for 50MHz operation
#
NET "clk" PERIOD = 20.0ns HIGH 50%;
#
# soldered 50MHz Clock.
#
NET "clk" LOC = "C9" | IOSTANDARD = LVTTL;
#
# Define the pins for the eight LEDs, giving them the name 'led'
NET "led<0>" LOC = "F12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "led<1>" LOC = "E12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "led<2>" LOC = "E11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "led<3>" LOC = "F11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "led<4>" LOC = "C11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "led<5>" LOC = "D11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "led<6>" LOC = "E9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "led<7>" LOC = "F9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;