Scribd Logo
Upload

Welcome to Scribd!

  • HP Compaq 6910p Compal LA-3261p

    Uploaded by

    Tim O Brien
    521 views55 pages
    The document contains schematics and diagrams for a mobile computer system. It includes a block diagram showing the system's components like the Intel Merom CPU, Intel Crestline chipset, memory, ports, and other devices. Notes pages provide more details on the voltage rails, IRQ assignments, and component connections. The document contains proprietary information for Compal Electronics and confidential engineering drawings.

    Original Description:

    Copyright

    © Attribution Non-Commercial (BY-NC)

    Available Formats

    PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Report this Document
    The document contains schematics and diagrams for a mobile computer system. It includes a block diagram showing the system's components like the Intel Merom CPU, Intel Crestline chipset, memory, ports, and other devices. Notes pages provide more details on the voltage rails, IRQ assignments, and component connections. The document contains proprietary information for Compal Electronics and confidential engineering drawings.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    521 views55 pages

    HP Compaq 6910p Compal LA-3261p

    Uploaded by

    Tim O Brien
    The document contains schematics and diagrams for a mobile computer system. It includes a block diagram showing the system's components like the Intel Merom CPU, Intel Crestline chipset, memory, ports, and other devices. Notes pages provide more details on the voltage rails, IRQ assignments, and component connections. The document contains proprietary information for Compal Electronics and confidential engineering drawings.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 55

    A

    Compal confidential

    Schematics Document
    Mobile Merom uFCPGA with Intel
    Crestline_PM+ICH8-M core logic
    3

    IBT00 LA-3261P UMA


    2007-03-28

    REV:1A (MV2)

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    A

    Title

    Compal Electronics, Inc.


    Cover Sheet

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4

    Wednesday, March 28, 2007

    Sheet
    E

    of

    55

    Chimay UMA

    Compal confidential
    File Name : LA-3261P

    Thermal Sensor
    ADM1032ARMZ

    Mobile Merom

    uFCPGA-478 CPU

    P4

    P4, 5, 6

    Fan conn

    CRT & TV OUT

    P4

    H_A#(3..35)

    P16

    Clock Generator
    ICS 9LPRS355

    FSB

    H_D#(0..63)

    667/800MHz 1.05V

    DDR2 667MHz 1.8V

    Intel Crestline MCH

    LVDS Panel Interface

    DDR2-SO-DIMM X2
    BANK 0, 1, 2, 3

    FCBGA 1299
    USB conn x2
    (Docking)

    P7, 8, 9, 10, 11, 12


    2

    CH7307C

    DVI (Docking)

    P33

    DMI X4

    P16

    Intel ICH8-M
    10/100/1000 LAN
    Intel 82566MM

    Mini-Card
    P25

    Ricoh R5C853 & R5C851

    P23

    P28

    Azalia

    BT Conn

    P28

    SATA Master

    mBGA-676

    PATA Slave

    Mini-Card WWAN

    P18, 19, 20, 21

    P25

    MDC

    P25

    AD1981HD

    Slot 0/Smart Card

    RJ45/11 CONN

    P26

    AMP & Audio Jack


    MAX9710

    P27
    3

    P24

    1394 port

    SPI ROM & Debug port

    6in1 Slot

    SATA HDD Connector


    P22

    16Mb*2 or 32Mb*1

    P28

    LED

    Multi-bay II Connector

    daughter board

    P22

    LPC BUS
    RTC CKT.
    P19

    TPM1.2
    SLB9635TT

    Power OK CKT.
    P35

    SMSC KBC 1070


    SMSC KBC 1021-NU

    P30

    Power On/Off CKT.

    SMSC Super I/O


    LPC47N217 P29

    P31

    Touch Pad CONN.

    P32

    P32

    TrackPoint CONN.
    P32

    DC/DC Interface CKT.

    Int.KBD
    P32

    C OM1
    ( Docking
    )
    P33

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    LPT
    ( Docking
    )
    P33

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

    P34

    P33

    Docking CONN.

    P30

    P30

    P32

    Audio CKT

    SPI

    daughter board

    USB conn x3

    USB2.0

    PCI

    P33

    FingerPrinter 2501B
    P30
    USBx1

    C-Link

    PCI-E BUS
    CardBus Controller & PCMCIA conn

    P15

    P13, 14

    Dual Channel

    P17

    SDVO

    TSSOP-64

    CK505

    Title

    *RJ-45(LED*2)
    *RJ-11(Pass Through)
    *CRT
    *COMPOSITE Video Out
    *TVOUT
    *DVI
    *LINE IN
    *LINE OUT
    *PCI-E x2
    *Serial Port
    *Parallel Port
    *PS/2 x2
    *USB x2
    *DC JACK

    Compal Electronics, Inc.


    Block Diagram

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4

    Tuesday, March 27, 2007

    Sheet
    E

    of

    55

    Voltage Rails

    O MEANS ON

    X MEANS OFF

    +3VS

    power
    plane

    +2.5VS
    +1.8VS

    +B
    LDO3

    +5VALW

    +1.8V

    LDO5

    +3VALW

    +5V
    +0.9V

    State

    +1.5VS

    +3VM

    +1.25VS
    +VGA_CORE
    +CPU_CORE

    CLOCK

    +1.05VM
    +1.25VM

    +VCCP

    S0

    S3/M1

    S3

    S5 S4/AC

    S5 S4/ Battery only

    S5 S4/AC & Battery


    don't exist

    Device

    IRQ
    +5VS

    System Timer

    Keyboard

    N/A

    Serial port (COM2),LAN/Modem

    Serial port (COM1)

    Audio/VGA

    Floppy

    Parallel port

    System CMOS/Real-time clock

    Microsoft ACPI

    10

    N/A,Momem,LAN

    11

    Mass strorage control/ PCI simple communication control

    12

    synactic PS2 port GlidePAD

    13

    Numeric Data Process

    14

    Primary IDE interface,HDD

    15

    Secondary IDE innterface,CD-ROM

    16

    Mobile Intel Crestline Express Chipset Family


    Microsoft UAA Bus Driver for High Definition Audio
    Intel 82801H (ICH8 Family) PCI Express Root Port -27D0

    PCI Devices

    Broadcom NetXtreme Gigabit Ethernet

    EXTERNAL

    IDSEL#

    CARD BUS & 1394

    AD22

    REQ/G NT#
    2

    PI RQ

    17

    Intel 82801H (ICH8 Family)PCI Express Root Port - 27D2


    Broadcom 802.11b/g WLAN

    C,D,E,G

    Intel 82801H (ICH8 Family)USB Universal Host Controll

    DMA Channel
    DMA0
    DMA1
    DMA2
    DMA3
    DMA4
    DMA5
    DMA6
    DMA7

    18

    Device
    MODEM / LAN
    ECP
    FLOPPY DISK
    AUDIO
    (Cascade)
    Unused
    Unused
    Unused

    Ricoh R5C853 Gemcore based SmartCard Control


    19

    Walk-up0 (Right side)

    Fingerprint

    Reserve

    WWAN

    Walk-up1 (Left Side)

    Walk-up2 (Left Side)

    Bluetooth

    Reserve

    20

    Docking

    Docking

    Intel 82801H (ICH8 Family)USB Universal Host Controll


    Intel 82801H (ICH8 Family)USB2 Enhanced Host Controll

    21

    23

    Intel 82801H (ICH8 Family)USB Universal Host Controll


    SDA Standard Compliant SD Host Controller
    HP Mobile Data Protection Sensor

    Compal Secret Data

    Security Classification
    2005/03/10

    Issued Date

    Intel 82801H (ICH8 Family)PCI Express Root Port - 27D6


    Intel 82801H (ICH8 Family)USB Universal Host Controll

    Destination

    Ricoh R5C853 Cardbus Control


    Ricoh R5C853 Integrates FlashMedia Control

    22

    USB PORT#

    Intel 82801H (ICH8 Family)USB Universal Host Controll

    Deciphered Date

    2006/03/10

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    A

    Title

    Compal Electronics, Inc.


    Notes List

    Size Document Number


    Custom LA-3261P U MA
    Date:

    Tuesday, March 27, 2007

    R ev
    0.4
    Sheet

    of

    55

    layout note: Change R237 to 649 ohm if using XTP to ITP adapter

    XDP Connector

    +3VS

    R243
    XDP_DBRESET#_R

    2 @ 1K_0402_5%

    +VCCP

    04/10 no stuff
    JP51
    1
    3
    5
    7
    9
    11
    13
    15
    17
    19
    21
    23
    25
    27
    29
    31
    33
    35
    37
    39
    41
    43
    45
    47
    49
    51
    53
    55
    57
    59

    XDP_BPM#5
    XDP_BPM#4
    D

    XDP_BPM#3
    XDP_BPM#2
    XDP_BPM#1
    XDP_BPM#0

    H_REQ#0
    H_REQ#1
    H_REQ#2
    H_REQ#3
    H_REQ#4

    19
    19
    19

    H_A20M#
    H_FERR#
    H_IGNNE#

    19
    19
    19
    19

    H_A20M#
    H_FERR#
    H_IGNNE#

    A6
    A5
    C4

    H_STPCLK#
    H_INTR
    H_NMI
    H_SMI#

    H_STPCLK#
    H_INTR
    H_NMI
    H_SMI#

    D5
    C6
    B4
    A3
    M4
    N5
    T2
    V3
    B2
    C3
    D2
    D22
    D3
    F6

    H_BR0#

    D20
    B3

    H_IERR#
    H_INIT#

    LOCK#

    H4

    H_LOCK#

    RESET#
    RS[0]#
    RS[1]#
    RS[2]#
    TRDY#

    C1
    F3
    F4
    G3
    G2

    H_RESET#
    H_RS#0
    H_RS#1
    H_RS#2
    H_TRDY#

    G6
    E4

    H_HIT#
    H_HITM#

    IERR#
    INIT#

    HIT#
    HITM#

    A[17]#
    A[18]#
    A[19]#
    A[20]#
    A[21]#
    A[22]#
    A[23]#
    A[24]#
    A[25]#
    A[26]#
    A[27]#
    A[28]#
    A[29]#
    A[30]#
    A[31]#
    A[32]#
    A[33]#
    A[34]#
    A[35]#
    ADSTB[1]#

    BPM[0]#
    BPM[1]#
    BPM[2]#
    BPM[3]#
    PRDY#
    PREQ#
    TCK
    TDI
    TDO
    TMS
    TRST#
    DBR#

    AD4
    AD3
    AD1
    AC4
    AC2
    AC1
    AC5
    AA6
    AB3
    AB5
    AB6
    C20

    PROCHOT#
    THERMDA
    THERMDC
    THERMTRIP#

    XDP_BPM#0
    XDP_BPM#1
    XDP_BPM#2
    XDP_BPM#3
    XDP_BPM#4
    XDP_BPM#5
    XDP_TCK
    XDP_TDI
    XDP_TDO
    XDP_TMS
    XDP_TRST#
    XDP_DBRESET#
    H_PROCHOT#

    THERMAL

    H_ADS# 7
    H_BNR# 7
    H_BPRI# 7
    H_DEFER# 7
    H_DRDY# 7
    H_DBSY# 7
    H_BR0#
    H_INIT#

    5 H_PWRGOOD_R
    R172
    56_0402_5%
    2
    1

    H_PWRGOOD_R
    XDP_HOOK1

    +VCCP
    1

    +VCCP

    19

    C1099

    H_LOCK# 7

    2
    XDP_TCK

    H_RESET# 7
    H_RS#0 7
    H_RS#1 7
    H_RS#2 7
    H_TRDY# 7

    0.1U_0402_16V4Z

    H_THERMDA_R1 R1798
    H_THERMDC_R1 R1799

    C7

    H_THERMTRIP#

    H CLK
    BCLK[0]
    BCLK[1]

    A22
    A21

    CLK_CPU_BCLK
    CLK_CPU_BCLK#

    R143 1

    XDP_TMS

    R236 1

    54.9_0402_1%

    XDP_TDO

    R1670 1

    54.9_0402_1%

    XDP_BPM#5

    R241 1

    54.9_0402_1%

    XDP_HOOK1

    R1430 1

    2 @ 54.9_0402_1%

    XDP_TRST#

    R237 1

    51_0402_1%

    XDP_TCK

    R239 1

    54.9_0402_1%

    54.9_0402_1%

    CLK_CPU_XDP
    CLK_CPU_XDP#

    CLK_CPU_XDP 15
    CLK_CPU_XDP# 15
    1K_0402_1%
    +VCCP
    H_RESET#_R
    1 R1431 2 H_RESET#
    XDP_DBRESET#_R 2
    1 XDP_DBRESET#
    200_0402_1%
    XDP_TDO
    R1432
    XDP_TRST#
    XDP_TDI
    XDP_TMS
    XDP_PRE
    1 R1433 2 0_0402_5%

    Place R1431 within 200ps (~1") to CPU

    H_HIT# 7
    H_HITM# 7

    Thermal Sensor ADM1032ARMZ


    +3VS
    XDP_DBRESET# 20
    H_PROCHOT# 43

    R410
    2
    1
    68_0402_5%

    C273

    +VCCP

    0.1U_0402_16V4Z

    D21
    A24
    B25

    XDP_TDI

    SAMTE_BSH-030-01-L-D-A

    conn@

    2 0_0402_5%
    2 0_0402_5%

    H_THERMDA
    H_THERMDC

    R227
    10K_0402_5%

    1
    U16
    1

    H_THERMTRIP# 7,19
    C264
    1
    2

    STPCLK#
    LINT0
    LINT1
    SMI#
    RSVD[01]
    RSVD[02]
    RSVD[03]
    RSVD[04]
    RSVD[05]
    RSVD[06]
    RSVD[07]
    RSVD[08]
    RSVD[09]
    RSVD[10]

    F1

    BR0#

    REQ[0]#
    REQ[1]#
    REQ[2]#
    REQ[3]#
    REQ[4]#

    A20M#
    FERR#
    IGNNE#

    H_DEFER#
    H_DRD Y#
    H_DBSY#

    DEFER#
    DRDY#
    DBSY#

    ICH

    H_ADSTB#1

    Y2
    U5
    R3
    W6
    U4
    Y5
    U1
    R4
    T5
    T3
    W2
    W5
    Y4
    U2
    V4
    W3
    AA4
    AB2
    AA3
    V1

    H5
    F21
    E1

    ADS#
    BNR#
    BPRI#

    ADDR GROUP 1

    H_A#17
    H_A#18
    H_A#19
    H_A#20
    H_A#21
    H_A#22
    H_A#23
    H_A#24
    H_A#25
    H_A#26
    H_A#27
    H_A#28
    H_A#29
    H_A#30
    H_A#31
    H_A#32
    H_A#33
    H_A#34
    H_A#35
    H_ADSTB#1

    K3
    H2
    K2
    J3
    L1

    H_ADS#
    H_BNR#
    H_BPRI#

    2
    4
    6
    8
    10
    12
    14
    16
    18
    20
    22
    24
    26
    28
    30
    32
    34
    36
    38
    40
    42
    44
    46
    48
    50
    52
    54
    56
    58
    60

    H_REQ#0
    H_REQ#1
    H_REQ#2
    H_REQ#3
    H_REQ#4
    H_A#[17..35]

    H1
    E2
    G5

    CONTROL

    7
    7
    7
    7
    7
    7

    A[3]#
    A[4]#
    A[5]#
    A[6]#
    A[7]#
    A[8]#
    A[9]#
    A[10]#
    A[11]#
    A[12]#
    A[13]#
    A[14]#
    A[15]#
    A[16]#
    ADSTB[0]#

    XDP/ITP SIGNALS

    H_ADSTB#0

    J4
    L5
    L4
    K5
    M3
    N2
    J1
    N3
    P5
    P2
    L2
    P4
    P1
    R1
    M1

    ADDR GROUP 0

    JP12A
    H_A#3
    H_A#4
    H_A#5
    H_A#6
    H_A#7
    H_A#8
    H_A#9
    H_A#10
    H_A#11
    H_A#12
    H_A#13
    H_A#14
    H_A#15
    H_A#16
    H_ADSTB#0

    GND1
    OBSFN_C0
    OBSFN_C1
    GND3
    OBSDATA_C0
    OBSDATA_C1
    GND5
    OBSDATA_C2
    OBSDATA_C3
    GND7
    OBSFN_D0
    OBSFN_D1
    GND9
    OBSDATA_D0
    OBSDATA_D1
    GND11
    OBSDATA_D2
    OBSDATA_D3
    GND13
    ITPCLK/HOOK4
    ITPCLK#/HOOK5
    VCC_OBS_CD
    RESET#/HOOK6
    DBR#/HOOK7
    GND15
    TD0
    TRST#
    TDI
    TMS
    GND17

    H_THERMDA

    H_THERMDC

    THERM#

    2200P_0402_50V7K

    CLK_CPU_BCLK 15
    CLK_CPU_BCLK# 15

    VDD

    SCLK

    D+

    SDATA

    D-

    ALERT#

    THERM#

    GND

    ICH_SM_CLK

    ICH_SM_DA

    THERM_SCI#

    H_A#[3..16]

    THERM_SCI# 20

    R228
    1

    +3VS

    H_THERMDA, H_THERMDC routing together,


    Trace width / Spacing = 10 / 10 mil
    RESERVED

    GND0
    OBSFN_A0
    OBSFN_A1
    GND2
    OBSDATA_A0
    OBSDATA_A1
    GND4
    OBSDATA_A2
    OBSDATA_A3
    GND6
    OBSFN_B0
    OBSFN_B1
    GND8
    OBSDATA_B0
    OBSDATA_B1
    GND10
    OBSDATA_B2
    OBSDATA_B3
    GND12
    PWRGOOD/HOOK0
    HOOK1
    VCC_OBS_AB
    HOOK2
    HOOK3
    GND14
    SDA
    SCL
    TCK1
    TCK0
    GND16

    ADM1032ARMZ-2REEL_MSOP8

    Address:100_1100

    10K_0402_5%

    1113 Add resistors in series with the diode signals going to ADM1032.

    20,25 ICH_SM_CLK
    20,25 ICH_SM_DA

    ICH_SM_CLK
    ICH_SM_DA

    For Merom, R1798 and R1799 are 0ohm


    For Penryn, R1798 and R1799 are 100ohm.

    Merom Ball-out Rev 1a


    conn@

    PWM Fan Control circuit

    +VCCP

    0308 change design


    +3VS

    R1255

    3
    1 OCP#
    @ Q85
    MMBT3904_SOT23

    OCP#

    THERM#

    20,44

    conn@
    JP8

    U24

    INB

    1
    2
    3

    +5VS

    INA

    H_PROCHOT#

    FAN_PWM

    31

    2 2

    @ 56_0402_5%

    TC7SH00FU_SSOP5

    1
    2
    3

    G1
    G2

    4
    5

    ACES_85204-03001

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    Compal Electronics, Inc.


    Merom(1/3)-AGTL+/XDP

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4

    Tuesday, March 27, 2007

    Sheet
    1

    of

    55

    +VCC_CORE

    C1101

    2 @ 1K_0402_5%
    2 @ 1K_0402_5%
    1

    15
    15
    15

    CPU_BSEL0
    CPU_BSEL1
    CPU_BSEL2

    CPU_BSEL0
    CPU_BSEL1
    CPU_BSEL2

    B22
    B23
    C21

    GTLREF
    TEST1
    TEST2
    TEST3
    TEST4
    TEST5
    TEST6

    COMP[0]
    COMP[1]
    COMP[2]
    COMP[3]

    R26
    U26
    AA1
    Y1

    COMP0
    COMP1
    COMP2
    COMP3

    DPRSTP#
    DPSLP#
    DPWR#
    PWRGOOD
    SLP#
    PSI#

    E5
    B5
    D24
    D6
    D7
    AE6

    H_DPRSTP#
    H_DPSLP#
    H_DPWR#
    H_PWRGOOD
    H_CPUSLP#
    H_PSI#

    MISC

    BSEL[0]
    BSEL[1]
    BSEL[2]

    Merom Ball-out Rev 1a


    conn@

    R1436
    2
    1 H_PWRGOOD_R
    1K_0402_5%

    layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

    CPU_BSEL

    CPU_BSEL2

    CPU_BSEL1

    CPU_BSEL0

    166

    200

    H_DPRSTP# 7,19,43
    H_DPSLP# 19
    H_DPWR# 7
    H_PWRGOOD 19
    H_CPUSLP# 7
    H_PSI#
    43

    H_PWRGOOD_R 4

    Resistor placed within


    0.5" of CPU pin.Trace
    should be at least 25
    mils away from any other
    toggling signal.
    COMP[0,2] trace width is
    18 mils. COMP[1,3] trace
    width is 4 mils.

    VCC[001]
    VCC[002]
    VCC[003]
    VCC[004]
    VCC[005]
    VCC[006]
    VCC[007]
    VCC[008]
    VCC[009]
    VCC[010]
    VCC[011]
    VCC[012]
    VCC[013]
    VCC[014]
    VCC[015]
    VCC[016]
    VCC[017]
    VCC[018]
    VCC[019]
    VCC[020]
    VCC[021]
    VCC[022]
    VCC[023]
    VCC[024]
    VCC[025]
    VCC[026]
    VCC[027]
    VCC[028]
    VCC[029]
    VCC[030]
    VCC[031]
    VCC[032]
    VCC[033]
    VCC[034]
    VCC[035]
    VCC[036]
    VCC[037]
    VCC[038]
    VCC[039]
    VCC[040]
    VCC[041]
    VCC[042]
    VCC[043]
    VCC[044]
    VCC[045]
    VCC[046]
    VCC[047]
    VCC[048]
    VCC[049]
    VCC[050]
    VCC[051]
    VCC[052]
    VCC[053]
    VCC[054]
    VCC[055]
    VCC[056]
    VCC[057]
    VCC[058]
    VCC[059]
    VCC[060]
    VCC[061]
    VCC[062]
    VCC[063]
    VCC[064]
    VCC[065]
    VCC[066]
    VCC[067]

    AB20
    AB7
    AC7
    AC9
    AC12
    AC13
    AC15
    AC17
    AC18
    AD7
    AD9
    AD10
    AD12
    AD14
    AD15
    AD17
    AD18
    AE9
    AE10
    AE12
    AE13
    AE15
    AE17
    AE18
    AE20
    AF9
    AF10
    AF12
    AF14
    AF15
    AF17
    AF18
    AF20

    VCC[068]
    VCC[069]
    VCC[070]
    VCC[071]
    VCC[072]
    VCC[073]
    VCC[074]
    VCC[075]
    VCC[076]
    VCC[077]
    VCC[078]
    VCC[079]
    VCC[080]
    VCC[081]
    VCC[082]
    VCC[083]
    VCC[084]
    VCC[085]
    VCC[086]
    VCC[087]
    VCC[088]
    VCC[089]
    VCC[090]
    VCC[091]
    VCC[092]
    VCC[093]
    VCC[094]
    VCC[095]
    VCC[096]
    VCC[097]
    VCC[098]
    VCC[099]
    VCC[100]

    G21
    V6
    J6
    K6
    M6
    J21
    K21
    M21
    N21
    N6
    R21
    R6
    T21
    T6
    V21
    W21

    VCCP[01]
    VCCP[02]
    VCCP[03]
    VCCP[04]
    VCCP[05]
    VCCP[06]
    VCCP[07]
    VCCP[08]
    VCCP[09]
    VCCP[10]
    VCCP[11]
    VCCP[12]
    VCCP[13]
    VCCP[14]
    VCCP[15]
    VCCP[16]

    +VCCP
    R1434
    2
    2
    R1435

    0_0402_5%
    1
    1
    0_0402_5%

    0228 change value


    C

    1
    C1100 +
    2

    330U_D2E_2.5VM_R7

    B26
    C26

    VCCA[01]
    VCCA[02]

    AD6
    AF5
    AE5
    AF4
    AE3
    AF3
    AE2

    VID[0]
    VID[1]
    VID[2]
    VID[3]
    VID[4]
    VID[5]
    VID[6]
    VCCSENSE
    VSSSENSE

    Merom Ball-out Rev 1a


    conn@

    CPU_VID0
    CPU_VID1
    CPU_VID2
    CPU_VID3
    CPU_VID4
    CPU_VID5
    CPU_VID6

    AF7

    VCCSENSE

    AE7

    VSSSENSE

    43
    43
    43
    43
    43
    43
    43

    VCCSENSE 43

    +1.5VS

    0.01U_0402_16V7K

    R1264 1
    R1265 1

    H_DSTBN#3 7
    H_DSTBP#3 7
    H_DINV#3 7

    A7
    A9
    A10
    A12
    A13
    A15
    A17
    A18
    A20
    B7
    B9
    B10
    B12
    B14
    B15
    B17
    B18
    B20
    C9
    C10
    C12
    C13
    C15
    C17
    C18
    D9
    D10
    D12
    D14
    D15
    D17
    D18
    E7
    E9
    E10
    E12
    E13
    E15
    E17
    E18
    E20
    F7
    F9
    F10
    F12
    F14
    F15
    F17
    F18
    F20
    AA7
    AA9
    AA10
    AA12
    AA13
    AA15
    AA17
    AA18
    AA20
    AB9
    AC10
    AB10
    AB12
    AB14
    AB15
    AB17
    AB18

    C520

    AD26
    C23
    D25
    C24
    AF26
    AF1
    A26

    H_DSTBN#1
    H_DSTBP#1
    H_DINV#1

    H_D#48
    H_D#49
    H_D#50
    H_D#51
    H_D#52
    H_D#53
    H_D#54
    H_D#55
    H_D#56
    H_D#57
    H_D#58
    H_D#59
    H_D#60
    H_D#61
    H_D#62
    H_D#63
    H_DSTBN#3
    H_DSTBP#3
    H_DINV#3

    D[48]#
    D[49]#
    D[50]#
    D[51]#
    D[52]#
    D[53]#
    D[54]#
    D[55]#
    D[56]#
    D[57]#
    D[58]#
    D[59]#
    D[60]#
    D[61]#
    D[62]#
    D[63]#
    DSTBN[3]#
    DSTBP[3]#
    DINV[3]#

    H_DSTBN#2 7
    H_DSTBP#2 7
    H_DINV#2 7
    H_D#[48..63] 7

    R244
    27.4_0402_1%
    2
    1

    7
    7
    7

    AE24
    AD24
    AA21
    AB22
    AB21
    AC26
    AD20
    AE22
    AF23
    AC25
    AE21
    AD21
    AC22
    AD23
    AF22
    AC23
    AE25
    AF24
    AC20

    D[32]#
    D[33]#
    D[34]#
    D[35]#
    D[36]#
    D[37]#
    D[38]#
    D[39]#
    D[40]#
    D[41]#
    D[42]#
    D[43]#
    D[44]#
    D[45]#
    D[46]#
    D[47]#
    DSTBN[2]#
    DSTBP[2]#
    DINV[2]#

    JP12C

    R245
    54.9_0402_1%
    2
    1

    V_CPU_GTLREF
    TEST1
    TEST2
    TEST3
    T1
    TEST4
    @ 0.1U_0402_16V4Z
    TEST5
    T2
    TEST6
    T3

    D[16]#
    D[17]#
    D[18]#
    D[19]#
    D[20]#
    D[21]#
    D[22]#
    D[23]#
    D[24]#
    D[25]#
    D[26]#
    D[27]#
    D[28]#
    D[29]#
    D[30]#
    D[31]#
    DSTBN[1]#
    DSTBP[1]#
    DINV[1]#

    H_D#32
    H_D#33
    H_D#34
    H_D#35
    H_D#36
    H_D#37
    H_D#38
    H_D#39
    H_D#40
    H_D#41
    H_D#42
    H_D#43
    H_D#44
    H_D#45
    H_D#46
    H_D#47
    H_DSTBN#2
    H_DSTBP#2
    H_DINV#2

    DATA GRP 2

    N22
    K25
    P26
    R23
    L23
    M24
    L22
    M23
    P25
    P23
    P22
    T24
    R24
    L25
    T25
    N25
    L26
    M26
    N24

    H_DSTBN#0
    H_DSTBP#0
    H_DINV#0
    H_D#[16..31]

    Y22
    AB24
    V24
    V26
    V23
    T22
    U25
    U23
    Y25
    W22
    Y23
    W24
    W25
    AA23
    AA24
    AB25
    Y26
    AA26
    U22

    R355
    27.4_0402_1%
    2
    1

    7
    7
    7
    7

    D[0]#
    D[1]#
    D[2]#
    D[3]#
    D[4]#
    D[5]#
    D[6]#
    D[7]#
    D[8]#
    D[9]#
    D[10]#
    D[11]#
    D[12]#
    D[13]#
    D[14]#
    D[15]#
    DSTBN[0]#
    DSTBP[0]#
    DINV[0]#

    DATA GRP 1

    H_D#16
    H_D#17
    H_D#18
    H_D#19
    H_D#20
    H_D#21
    H_D#22
    H_D#23
    H_D#24
    H_D#25
    H_D#26
    H_D#27
    H_D#28
    H_D#29
    H_D#30
    H_D#31
    H_DSTBN#1
    H_DSTBP#1
    H_DINV#1

    DATA GRP 0

    E22
    F24
    E26
    G22
    F23
    G25
    E25
    E23
    K24
    G24
    J24
    J23
    H22
    F26
    K22
    H23
    J26
    H26
    H25

    +VCC_CORE

    H_D#[32..47] 7

    JP12B
    H_D#0
    H_D#1
    H_D#2
    H_D#3
    H_D#4
    H_D#5
    H_D#6
    H_D#7
    H_D#8
    H_D#9
    H_D#10
    H_D#11
    H_D#12
    H_D#13
    H_D#14
    H_D#15
    H_DSTBN#0
    H_DSTBP#0
    H_DINV#0

    R1220
    54.9_0402_1%
    2
    1

    H_D#[0..15]

    DATA GRP 3

    10U_0805_6.3V6M
    C531

    Near pin B26

    VSSSENSE 43
    B

    Length match within 25 mils.


    The trace width/space/other is
    20/7/25.

    +VCCP

    R1268
    1K_0402_1%
    2

    +VCC_CORE
    R1269
    100_0402_1%
    2

    VCCSENSE

    R1270
    100_0402_1%
    1
    2

    VSSSENSE

    V_CPU_GTLREF

    R1271
    2K_0402_1%

    Close to CPU pin AD26


    within 500mils.

    Close to CPU pin


    within 500mils.

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    Compal Electronics, Inc.


    Merom(2/3)-AGTL+/PWR

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4

    Tuesday, March 27, 2007

    Sheet
    1

    of

    55

    +VCC_CORE

    1
    Place these capacitors on L8
    (North side,Secondary Layer)
    D

    C899
    10U_0805_6.3V6M

    C900
    10U_0805_6.3V6M

    C901
    10U_0805_6.3V6M

    C902
    10U_0805_6.3V6M

    C903
    10U_0805_6.3V6M

    C904
    10U_0805_6.3V6M

    C905
    10U_0805_6.3V6M

    C906
    10U_0805_6.3V6M
    D

    JP12D

    A4
    A8
    A11
    A14
    A16
    A19
    A23
    AF2
    B6
    B8
    B11
    B13
    B16
    B19
    B21
    B24
    C5
    C8
    C11
    C14
    C16
    C19
    C2
    C22
    C25
    D1
    D4
    D8
    D11
    D13
    D16
    D19
    D23
    D26
    E3
    E6
    E8
    E11
    E14
    E16
    E19
    E21
    E24
    F5
    F8
    F11
    F13
    F16
    F19
    F2
    F22
    F25
    G4
    G1
    G23
    G26
    H3
    H6
    H21
    H24
    J2
    J5
    J22
    J25
    K1
    K4
    K23
    K26
    L3
    L6
    L21
    L24
    M2
    M5
    M22
    M25
    N1
    N4
    N23
    N26
    P3

    VSS[001]
    VSS[002]
    VSS[003]
    VSS[004]
    VSS[005]
    VSS[006]
    VSS[007]
    VSS[008]
    VSS[009]
    VSS[010]
    VSS[011]
    VSS[012]
    VSS[013]
    VSS[014]
    VSS[015]
    VSS[016]
    VSS[017]
    VSS[018]
    VSS[019]
    VSS[020]
    VSS[021]
    VSS[022]
    VSS[023]
    VSS[024]
    VSS[025]
    VSS[026]
    VSS[027]
    VSS[028]
    VSS[029]
    VSS[030]
    VSS[031]
    VSS[032]
    VSS[033]
    VSS[034]
    VSS[035]
    VSS[036]
    VSS[037]
    VSS[038]
    VSS[039]
    VSS[040]
    VSS[041]
    VSS[042]
    VSS[043]
    VSS[044]
    VSS[045]
    VSS[046]
    VSS[047]
    VSS[048]
    VSS[049]
    VSS[050]
    VSS[051]
    VSS[052]
    VSS[053]
    VSS[054]
    VSS[055]
    VSS[056]
    VSS[057]
    VSS[058]
    VSS[059]
    VSS[060]
    VSS[061]
    VSS[062]
    VSS[063]
    VSS[064]
    VSS[065]
    VSS[066]
    VSS[067]
    VSS[068]
    VSS[069]
    VSS[070]
    VSS[071]
    VSS[072]
    VSS[073]
    VSS[074]
    VSS[075]
    VSS[076]
    VSS[077]
    VSS[078]
    VSS[079]
    VSS[080]
    VSS[081]

    VSS[082]
    VSS[083]
    VSS[084]
    VSS[085]
    VSS[086]
    VSS[087]
    VSS[088]
    VSS[089]
    VSS[090]
    VSS[091]
    VSS[092]
    VSS[093]
    VSS[094]
    VSS[095]
    VSS[096]
    VSS[097]
    VSS[098]
    VSS[099]
    VSS[100]
    VSS[101]
    VSS[102]
    VSS[103]
    VSS[104]
    VSS[105]
    VSS[106]
    VSS[107]
    VSS[108]
    VSS[109]
    VSS[110]
    VSS[111]
    VSS[112]
    VSS[113]
    VSS[114]
    VSS[115]
    VSS[116]
    VSS[117]
    VSS[118]
    VSS[119]
    VSS[120]
    VSS[121]
    VSS[122]
    VSS[123]
    VSS[124]
    VSS[125]
    VSS[126]
    VSS[127]
    VSS[128]
    VSS[129]
    VSS[130]
    VSS[131]
    VSS[132]
    VSS[133]
    VSS[134]
    VSS[135]
    VSS[136]
    VSS[137]
    VSS[138]
    VSS[139]
    VSS[140]
    VSS[141]
    VSS[142]
    VSS[143]
    VSS[144]
    VSS[145]
    VSS[146]
    VSS[147]
    VSS[148]
    VSS[149]
    VSS[150]
    VSS[151]
    VSS[152]
    VSS[153]
    VSS[154]
    VSS[155]
    VSS[156]
    VSS[157]
    VSS[158]
    VSS[159]
    VSS[160]
    VSS[161]
    VSS[162]
    VSS[163]

    Merom Ball-out Rev 1a


    conn@
    .

    P6
    P21
    P24
    R2
    R5
    R22
    R25
    T1
    T4
    T23
    T26
    U3
    U6
    U21
    U24
    V2
    V5
    V22
    V25
    W1
    W4
    W23
    W26
    Y3
    Y6
    Y21
    Y24
    AA2
    AA5
    AA8
    AA11
    AA14
    AA16
    AA19
    AA22
    AA25
    AB1
    AB4
    AB8
    AB11
    AB13
    AB16
    AB19
    AB23
    AB26
    AC3
    AC6
    AC8
    AC11
    AC14
    AC16
    AC19
    AC21
    AC24
    AD2
    AD5
    AD8
    AD11
    AD13
    AD16
    AD19
    AD22
    AD25
    AE1
    AE4
    AE8
    AE11
    AE14
    AE16
    AE19
    AE23
    AE26
    A2
    AF6
    AF8
    AF11
    AF13
    AF16
    AF19
    AF21
    A25
    AF25

    +VCC_CORE

    1
    Place these capacitors on L8
    (North side,Secondary Layer)

    C907
    10U_0805_6.3V6M

    C908
    10U_0805_6.3V6M

    C909
    10U_0805_6.3V6M

    C910
    10U_0805_6.3V6M

    C911
    10U_0805_6.3V6M

    C912
    10U_0805_6.3V6M

    C913
    10U_0805_6.3V6M

    C914
    10U_0805_6.3V6M

    +VCC_CORE

    1
    Place these capacitors on L8
    (Sorth side,Secondary Layer)

    C915
    10U_0805_6.3V6M

    C916
    10U_0805_6.3V6M

    C917
    10U_0805_6.3V6M

    C918
    10U_0805_6.3V6M

    C919
    10U_0805_6.3V6M

    C920
    10U_0805_6.3V6M

    C921
    10U_0805_6.3V6M

    C922
    10U_0805_6.3V6M

    +VCC_CORE

    1
    Place these capacitors on L8
    (Sorth side,Secondary Layer)

    C923
    10U_0805_6.3V6M

    C924
    10U_0805_6.3V6M

    C925
    10U_0805_6.3V6M

    C926
    10U_0805_6.3V6M

    C927
    10U_0805_6.3V6M

    C928
    10U_0805_6.3V6M

    C929
    10U_0805_6.3V6M

    C930
    C

    10U_0805_6.3V6M

    Mid Frequence Decoupling

    ESR <= 1.5m ohm


    Capacitor > 1980uF

    Near CPU CORE regulator

    +VCC_CORE
    330U_D2E_2.5VM_R7

    330U_D2E_2.5VM_R7

    0314 change to mount


    B

    C931
    330U_D2E_2.5VM_R7

    C932

    C933

    C935

    C936

    330U_D2E_2.5VM_R7

    C937

    330U_D2E_2.5VM_R7

    C934

    @
    820U_E9_2_5V_M_R7

    330U_D2E_2.5VM_R7

    Place these inside


    socket cavity on L8
    (North side
    Secondary)
    +VCCP

    C940
    0.1U_0402_10V6K

    C941
    0.1U_0402_10V6K

    C942
    0.1U_0402_10V6K

    C943
    0.1U_0402_10V6K

    C944
    0.1U_0402_10V6K

    C945
    0.1U_0402_10V6K

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    Compal Electronics, Inc.


    Merom(3/3)-GND&Bypass

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4

    Tuesday, March 27, 2007

    Sheet
    1

    of

    55

    MUXING

    SM_VREF_0
    SM_VREF_1

    PEG_CLK
    PEG_CLK#

    2
    1

    DMI_TXN_0
    DMI_TXN_1
    DMI_TXN_2
    DMI_TXN_3
    DMI_TXP_0
    DMI_TXP_1
    DMI_TXP_2
    DMI_TXP_3

    GFX_VID_0
    GFX_VID_1
    GFX_VID_2
    GFX_VID_3
    GFX_VR_EN

    K44
    K45

    CLK_MCH_3GPLL
    CLK_MCH_3GPLL#

    AN47
    AJ38
    AN42
    AN46

    DMI_TXN0
    DMI_TXN1
    DMI_TXN2
    DMI_TXN3

    AM47
    AJ39
    AN41
    AN45

    DMI_TXP0
    DMI_TXP1
    DMI_TXP2
    DMI_TXP3

    AJ46
    AJ41
    AM40
    AM44

    DMI_RXN0
    DMI_RXN1
    DMI_RXN2
    DMI_RXN3

    AJ47
    AJ42
    AM39
    AM43

    DMI_RXP0
    DMI_RXP1
    DMI_RXP2
    DMI_RXP3

    E35
    A39
    C38
    B39
    E36

    DFGT_VID_0
    DFGT_VID_1
    DFGT_VID_2
    DFGT_VID_3
    DFGT_VR_EN

    DMI_TXP0
    DMI_TXP1
    DMI_TXP2
    DMI_TXP3

    20
    20
    20
    20

    DMI_RXN0
    DMI_RXN1
    DMI_RXN2
    DMI_RXN3

    20
    20
    20
    20

    DMI_RXP0
    DMI_RXP1
    DMI_RXP2
    DMI_RXP3

    20
    20
    20
    20

    DFGT_VID_0 45
    DFGT_VID_1 45
    DFGT_VID_2 45
    DFGT_VID_3 45
    DFGT_VR_EN 45

    1
    SDVO_CTRL_CLK
    SDVO_CTRL_DATA
    CLK_REQ#
    ICH_SYNC#
    TEST_1
    TEST_2

    R1445

    PLT_RST# 16,18,22,30

    1K_0402_1%

    R1443
    392_0402_1%

    SDVO_SCLK 16
    SDVO_SDAT 16

    CLKREQ#_B 15
    MCH_ICH_SYNC# 20

    04/10 change size

    DFGT_VID_0
    DFGT_VID_1
    DFGT_VID_3

    A37
    R32

    R1442

    CL_CLK0 20
    CL_DATA0 20
    M_PWROK 20,35
    CL_RST# 20
    CL_VREF

    SDVO_SCLK
    SDVO_SDAT
    CLKREQ#_B
    M CH_ICH_SYNC#

    H35
    K36
    G39
    G40

    20K_0402_5%
    PLT_RST#

    20
    20
    20
    20

    C1106

    R1446
    1

    DMI_TXN0
    DMI_TXN1
    DMI_TXN2
    DMI_TXN3

    0.1U_0402_16V4Z 1

    R1444

    CLK_MCH_3GPLL 15
    CLK_MCH_3GPLL# 15

    CL_CLK0
    CL_DATA0
    M_PWROK
    CL_RST#
    CL_VREF

    AM49
    AK50
    AT43
    AN49
    AM50

    CRESTLINE_1p0

    PLT_RST#_R

    CLK_MCH_DREFCLK 15
    CLK_MCH_DREFCLK# 15
    MCH_SSCDREFCLK 15
    MCH_SSCDREFCLK# 15

    0621 add CLK and DAT for DVI

    0_0402_5%

    +3VS

    DFGT_VID_2

    100_0402_5%

    0830 Add pull-up and pull-down resistor.

    Near B3 pin

    Compal Secret Data


    2006/02/13

    Issued Date

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    CLK_MCH_DREFCLK
    CLK_MCH_DREFCLK#
    MCH_SSCDREFCLK
    MCH_SSCDREFCLK#

    CL_CLK
    CL_DATA
    CL_PWROK
    CL_RST#
    CL_VREF

    @ 1K_0402_1%
    2

    B42
    C42
    H48
    H47

    +1.25VM_AXD

    R1204

    V_DDR_MCH_REF

    22K_0402_5%

    AR49
    AW4

    +1.8V

    NC_1
    NC_2
    NC_3
    NC_4
    NC_5
    NC_6
    NC_7
    NC_8
    NC_9
    NC_10
    NC_11
    NC_12
    NC_13
    NC_14
    NC_15
    NC_16

    2
    2

    R1195

    1226 Add C

    BJ51
    BK51
    BK50
    BL50
    BL49
    BL3
    BL2
    BK1
    BJ1
    E1
    A5
    C51
    B50
    A50
    A49
    BK2

    PM_BM_BUSY#
    PM_DPRSTP#
    PM_EXT_TS#_0
    PM_EXT_TS#_1
    PWROK
    RSTIN#
    THERMTRIP#
    DPRSLPVR

    20_0402_1%
    1
    1
    20_0402_1%

    R1789
    2

    0309 add

    0612 add
    1128 Install R1739

    G41
    L39
    L36
    J36
    AW49
    AV20
    N20
    G36

    +1.8V

    R1194

    PM_POK_R

    R1739 0_0402_5%
    2
    1
    20,43 DPRSLPVR

    PM_BMBUSY#
    H_DPRSTP#
    PM_EXTTS#0
    PM_EXTTS#1
    PM_POK_R
    PLT_RST#_R
    THERMTRIP#
    DPRSLPVR

    13
    13
    14
    14

    22K_0402_5%

    20 PM_BMBUSY#
    5,19,43 H_DPRSTP#
    13 PM_EXTTS#0
    14 PM_EXTTS#1

    M_ODT0
    M_ODT1
    M_ODT2
    M_ODT3

    R1788
    2

    CFG18
    CFG19
    CFG20

    13
    13
    14
    14

    CFG16

    DDR_CS0_DIMMA#
    DDR_CS1_DIMMA#
    DDR_CS2_DIMMB#
    DDR_CS3_DIMMB#

    DMI_RXP_0
    DMI_RXP_1
    DMI_RXP_2
    DMI_RXP_3

    CFG_0
    CFG_1
    CFG_2
    CFG_3
    CFG_4
    CFG_5
    CFG_6
    CFG_7
    CFG_8
    CFG_9
    CFG_10
    CFG_11
    CFG_12
    CFG_13
    CFG_14
    CFG_15
    CFG_16
    CFG_17
    CFG_18
    CFG_19
    CFG_20

    13
    13
    14
    14

    22K_0402_5%

    9
    9

    CFG18
    CFG19
    CFG20

    C FG9
    CFG10
    CFG11
    CFG12
    CFG13

    Security Classification

    within 100 mils from NB

    DDR

    2
    1
    2

    C1105

    CFG16

    P27
    N27
    N24
    C21
    C23
    F23
    N23
    G23
    J20
    C20
    R24
    L23
    J23
    E23
    E20
    K23
    M20
    M24
    L32
    N33
    L35

    C FG5
    C FG6
    C FG7

    V_DDR_MCH_REF
    C895
    0.1U_0402_16V4Z

    13,14,42 V_DDR_MCH_REF

    0.1U_0402_16V4Z
    C896

    1
    R1206

    MCH_CLKSEL0
    MCH_CLKSEL1
    MCH_CLKSEL2

    R1201
    @ 1K_0402_1%

    221_0603_1%

    2
    1
    R1210
    2

    SMRCOMP_VOH
    SMRCOMP_VOL

    DMI_RXN_0
    DMI_RXN_1
    DMI_RXN_2
    DMI_RXN_3

    Layout Note:
    V_DDR_MCH_REF
    trace width and
    spacing is 20/20.

    H_SWNG
    100_0402_1%

    R1199
    24.9_0402_1%
    2
    1

    C60

    1K_0402_1%

    R1208
    2
    1
    R1212
    2

    2K_0402_1%

    0_0402_5%
    1
    1
    0_0402_5%

    9
    9

    9
    9
    9

    BK31
    BL31

    SM_RCOMP_VOH
    SM_RCOMP_VOL

    10K_0402_5%

    CFG5
    CFG6
    CFG7
    CFG8
    CFG9
    CFG10
    CFG11
    CFG12
    CFG13

    BL15
    BK14

    SMRCOMP
    SMRCOMP#

    SM_RCOMP
    SM_RCOMP#

    NC

    <>

    M_ODT0
    M_ODT1
    M_ODT2
    M_ODT3

    13
    13
    14
    14

    DDR_CKE0_DIMMA
    DDR_CKE1_DIMMA
    DDR_CKE2_DIMMB
    DDR_CKE3_DIMMB

    R1787
    2

    5
    5
    5
    5

    @ R1483
    2
    2
    R1484

    20,31,45 PM_PWROK
    20,31
    VGATE

    BH18
    BJ15
    BJ14
    BE16

    DPLL_REF_CLK
    DPLL_REF_CLK#
    DPLL_REF_SSCLK
    DPLL_REF_SSCLK#

    R1441
    CLKREQ#_B

    DDR_CS0_DIMMA#
    DDR_CS1_DIMMA#
    DDR_CS2_DIMMB#
    DDR_CS3_DIMMB#

    H_DSTBP#0
    H_DSTBP#1
    H_DSTBP#2
    H_DSTBP#3

    4
    4
    4

    10K_0402_5%

    9
    5
    5
    5
    5

    H_RS#0
    H_RS#1
    H_RS#2

    BG20
    BK16
    BG16
    BE13

    SM_ODT_0
    SM_ODT_1
    SM_ODT_2
    SM_ODT_3

    CLK

    PM_EXTTS#1

    Route H_SCOMP and H_SCOMP# with trace width, spacing and impedance (55 ohm) same as FSB data traces

    H_RCOMP

    0.01U_0402_25V7K

    R1440

    15 MCH_CLKSEL0
    15 MCH_CLKSEL1
    15 MCH_CLKSEL2

    H_DSTBN#0
    H_DSTBN#1
    H_DSTBN#2
    H_DSTBN#3

    4
    4
    4
    4
    4

    10K_0402_5%

    5
    5
    5
    5

    H_REQ#0
    H_REQ#1
    H_REQ#2
    H_REQ#3
    H_REQ#4

    DDR_CKE0_DIMMA
    DDR_CKE1_DIMMA
    DDR_CKE2_DIMMB
    DDR_CKE3_DIMMB

    SM_CS#_0
    SM_CS#_1
    SM_CS#_2
    SM_CS#_3

    DMI

    H_DINV#0
    H_DINV#1
    H_DINV#2
    H_DINV#3

    R1439
    PM_EXTTS#0

    4,19 H_THERMTRIP#

    0.1U_0402_16V4Z
    H_VREF

    0612 add

    +3VS

    CRESTLINE_1p0

    +VCCP

    1
    1

    H_ADS# 4
    H_ADSTB#0 4
    H_ADSTB#1 4
    H_BNR# 4
    H_BPRI# 4
    H_BR0#
    4
    H_DEFER# 4
    H_DBSY# 4
    CLK_MCH_BCLK 15
    CLK_MCH_BCLK# 15
    H_DPWR# 5
    H_DRDY# 4
    H_HIT#
    4
    H_HITM# 4
    H_LOCK# 4
    H_TRDY# 4

    layout note:

    +VCCP

    1K_0402_1%

    13 DDR_A_MA14
    14 DDR_B_MA14

    H_AVREF
    H_DVREF

    Layout Note:
    H_RCOMP / H_VREF / H_SWNG
    trace width and spacing is 10/20

    H_RS#0
    H_RS#1
    H_RS#2

    C1103

    E12
    D7
    D8

    2.2U_0603_6.3V4Z
    C1102

    H_REQ#0
    H_REQ#1
    H_REQ#2
    H_REQ#3
    H_REQ#4

    R1438

    BE29
    AY32
    BD39
    BG37

    13
    13
    14
    14

    M_CLK_DDR#0
    M_CLK_DDR#1
    M_CLK_DDR#2
    M_CLK_DDR#3

    22K_0402_5%

    H_VREF

    M14
    E13
    A11
    H13
    B12

    PM

    B9
    A9

    L7
    K2
    AC2
    AJ10

    H_DSTBP#0
    H_DSTBP#1
    H_DSTBP#2
    H_DSTBP#3

    M_CLK_DDR#0
    M_CLK_DDR#1
    M_CLK_DDR#2
    M_CLK_DDR#3

    M_CLK_DDR0
    M_CLK_DDR1
    M_CLK_DDR2
    M_CLK_DDR3

    R1786
    2

    H_RS#_0
    H_RS#_1
    H_RS#_2

    H_DSTBN#0
    H_DSTBN#1
    H_DSTBN#2
    H_DSTBN#3

    SMRCOMP_VOL

    RSVD20
    RSVD21
    RSVD22
    RSVD23
    RSVD24
    RSVD25
    RSVD26
    RSVD27
    RSVD28
    RSVD29
    RSVD30
    RSVD31
    RSVD32
    RSVD33
    RSVD34
    RSVD35
    RSVD36
    RSVD37
    RSVD38
    RSVD39
    RSVD40
    RSVD41
    RSVD42
    RSVD43
    RSVD44
    RSVD45

    AW30
    BA23
    AW25
    AW23

    SM_CKE_0
    SM_CKE_1
    SM_CKE_3
    SM_CKE_4

    R31
    3.01K_0402_1%
    NA lead free
    H10
    B51
    BJ20
    BK22
    BF19
    BH20
    BK18
    BJ18
    BF23
    BG23
    BC23
    BD24
    BJ29
    BE24
    BH39
    AW20
    BK20
    C48
    D47
    B44
    C44
    A35
    B37
    B36
    B34
    C34

    SM_CK#_0
    SM_CK#_1
    SM_CK#_3
    SM_CK#_4

    H_CPURST#
    H_CPUSLP#

    M7
    K3
    AD2
    AH11

    1K_0402_1%

    M_CLK_DDR0
    M_CLK_DDR1
    M_CLK_DDR2
    M_CLK_DDR3

    B6
    E5

    H_REQ#_0
    H_REQ#_1
    H_REQ#_2
    H_REQ#_3
    H_REQ#_4

    H_SCOMP
    H_SCOMP#

    H_DINV#0
    H_DINV#1
    H_DINV#2
    H_DINV#3

    SMRCOMP_VOH

    R1437

    AV29
    BB23
    BA25
    AV23

    H_RESET#
    H_CPUSLP#

    H_SWING
    H_RCOMP

    K5
    L2
    AD13
    AE13

    +1.8V

    SM_CK_0
    SM_CK_1
    SM_CK_3
    SM_CK_4

    W1
    W2

    H_DSTBP#_0
    H_DSTBP#_1
    H_DSTBP#_2
    H_DSTBP#_3

    H_ADS#
    H_ADSTB#0
    H_ADSTB#1
    H_BNR#
    H_BPRI#
    H_BR0#
    H_DEFER#
    H_DBSY#
    CLK_MCH_BCLK
    CLK_MCH_BCLK#
    H_DPWR#
    H_DRD Y#
    H_HIT#
    H_HITM#
    H_LOCK#
    H_TRDY#

    RSVD1
    RSVD2
    RSVD3
    RSVD4
    RSVD5
    RSVD6
    RSVD7
    RSVD8
    RSVD9
    RSVD10
    RSVD11
    RSVD12
    RSVD13
    RSVD14

    GRAPHICS VID

    B3
    C2

    H_SCOMP
    H_SCOMP#

    H_DSTBN#_0
    H_DSTBN#_1
    H_DSTBN#_2
    H_DSTBN#_3

    G12
    H17
    G20
    C8
    E8
    F12
    D6
    C10
    AM5
    AM7
    H8
    K7
    E4
    C6
    G10
    B7

    P36
    P37
    R35
    N35
    AR12
    AR13
    AM12
    AN13
    J12
    AR37
    AM36
    AL36
    AM37
    D20

    ME

    R1197
    54.9_0402_1%
    2
    1
    H_RESET#
    H_CPUSLP#

    H_SWNG
    H_RCOMP

    H_DINV#_0
    H_DINV#_1
    H_DINV#_2
    H_DINV#_3

    H_A#3
    H_A#4
    H_A#5
    H_A#6
    H_A#7
    H_A#8
    H_A#9
    H_A#10
    H_A#11
    H_A#12
    H_A#13
    H_A#14
    H_A#15
    H_A#16
    H_A#17
    H_A#18
    H_A#19
    H_A#20
    H_A#21
    H_A#22
    H_A#23
    H_A#24
    H_A#25
    H_A#26
    H_A#27
    H_A#28
    H_A#29
    H_A#30
    H_A#31
    H_A#32
    H_A#33
    H_A#34
    H_A#35

    CFG

    R1196
    54.9_0402_1%
    2
    1

    +VCCP

    H_ADS#
    H_ADSTB#_0
    H_ADSTB#_1
    H_BNR#
    H_BPRI#
    H_BREQ#
    H_DEFER#
    H_DBSY#
    HPLL_CLK
    HPLL_CLK#
    H_DPWR#
    H_DRDY#
    H_HIT#
    H_HITM#
    H_LOCK#
    H_TRDY#

    J13
    B11
    C11
    M11
    C15
    F16
    L13
    G17
    C14
    K16
    B13
    L16
    J17
    B14
    K19
    P15
    R17
    B16
    H20
    L19
    D17
    M17
    N16
    J19
    B18
    E19
    B17
    B15
    E17
    C18
    A19
    B19
    N19

    C1370
    0.1U_0402_16V4Z

    H_A#_3
    H_A#_4
    H_A#_5
    H_A#_6
    H_A#_7
    H_A#_8
    H_A#_9
    H_A#_10
    H_A#_11
    H_A#_12
    H_A#_13
    H_A#_14
    H_A#_15
    H_A#_16
    H_A#_17
    H_A#_18
    H_A#_19
    H_A#_20
    H_A#_21
    H_A#_22
    H_A#_23
    H_A#_24
    H_A#_25
    H_A#_26
    H_A#_27
    H_A#_28
    H_A#_29
    H_A#_30
    H_A#_31
    H_A#_32
    H_A#_33
    H_A#_34
    H_A#_35

    H_D#_0
    H_D#_1
    H_D#_2
    H_D#_3
    H_D#_4
    H_D#_5
    H_D#_6
    H_D#_7
    H_D#_8
    H_D#_9
    H_D#_10
    H_D#_11
    H_D#_12
    H_D#_13
    H_D#_14
    H_D#_15
    H_D#_16
    H_D#_17
    H_D#_18
    H_D#_19
    H_D#_20
    H_D#_21
    H_D#_22
    H_D#_23
    H_D#_24
    H_D#_25
    H_D#_26
    H_D#_27
    H_D#_28
    H_D#_29
    H_D#_30
    H_D#_31
    H_D#_32
    H_D#_33
    H_D#_34
    H_D#_35
    H_D#_36
    H_D#_37
    H_D#_38
    H_D#_39
    H_D#_40
    H_D#_41
    H_D#_42
    H_D#_43
    H_D#_44
    H_D#_45
    H_D#_46
    H_D#_47
    H_D#_48
    H_D#_49
    H_D#_50
    H_D#_51
    H_D#_52
    H_D#_53
    H_D#_54
    H_D#_55
    H_D#_56
    H_D#_57
    H_D#_58
    H_D#_59
    H_D#_60
    H_D#_61
    H_D#_62
    H_D#_63

    2.2U_0603_6.3V4Z
    C1104

    E2
    G2
    G7
    M6
    H7
    H3
    G4
    F3
    N8
    H2
    M10
    N12
    N9
    H5
    P13
    K9
    M2
    W10
    Y8
    V4
    M3
    J1
    N5
    N3
    W6
    W9
    N2
    Y7
    Y9
    P4
    W3
    N1
    AD12
    AE3
    AD9
    AC9
    AC7
    AC14
    AD11
    AC11
    AB2
    AD7
    AB1
    Y3
    AC6
    AE2
    AC5
    AG3
    AJ9
    AH8
    AJ14
    AE9
    AE11
    AH12
    AJ5
    AH5
    AJ6
    AE7
    AJ7
    AJ2
    AE5
    AJ3
    AH2
    AH13

    For Crestline: 20ohm


    For Calero: 80.6ohm

    RSVD

    H_D#0
    H_D#1
    H_D#2
    H_D#3
    H_D#4
    H_D#5
    H_D#6
    H_D#7
    H_D#8
    H_D#9
    H_D#10
    H_D#11
    H_D#12
    H_D#13
    H_D#14
    H_D#15
    H_D#16
    H_D#17
    H_D#18
    H_D#19
    H_D#20
    H_D#21
    H_D#22
    H_D#23
    H_D#24
    H_D#25
    H_D#26
    H_D#27
    H_D#28
    H_D#29
    H_D#30
    H_D#31
    H_D#32
    H_D#33
    H_D#34
    H_D#35
    H_D#36
    H_D#37
    H_D#38
    H_D#39
    H_D#40
    H_D#41
    H_D#42
    H_D#43
    H_D#44
    H_D#45
    H_D#46
    H_D#47
    H_D#48
    H_D#49
    H_D#50
    H_D#51
    H_D#52
    H_D#53
    H_D#54
    H_D#55
    H_D#56
    H_D#57
    H_D#58
    H_D#59
    H_D#60
    H_D#61
    H_D#62
    H_D#63

    U15B

    0.01U_0402_25V7K

    U15A

    H_D#[0..63]

    4
    5

    H_A#[3..35] 4

    HOST

    MISC

    Title

    Compal Electronics, Inc.


    CRESTLINE(1/6)-AGTL+/DMI/DDR2

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4

    Tuesday, March 27, 2007

    Sheet
    1

    of

    55

    14 DDR_B_D[0..63]

    DDR_A_BS0
    DDR_A_BS1
    DDR_A_BS2

    SA_CAS#

    BL17

    DDR_A_CAS#

    SA_DM_0
    SA_DM_1
    SA_DM_2
    SA_DM_3
    SA_DM_4
    SA_DM_5
    SA_DM_6
    SA_DM_7

    AT45
    BD44
    BD42
    AW38
    AW13
    BG8
    AY5
    AN6

    DDR_A_DM0
    DDR_A_DM1
    DDR_A_DM2
    DDR_A_DM3
    DDR_A_DM4
    DDR_A_DM5
    DDR_A_DM6
    DDR_A_DM7

    AT46
    BE48
    BB43
    BC37
    BB16
    BH6
    BB2
    AP3
    AT47
    BD47
    BC41
    BA37
    BA16
    BH7
    BC1
    AP2

    DDR_A_DQS0
    DDR_A_DQS1
    DDR_A_DQS2
    DDR_A_DQS3
    DDR_A_DQS4
    DDR_A_DQS5
    DDR_A_DQS6
    DDR_A_DQS7
    DDR_A_DQS#0
    DDR_A_DQS#1
    DDR_A_DQS#2
    DDR_A_DQS#3
    DDR_A_DQS#4
    DDR_A_DQS#5
    DDR_A_DQS#6
    DDR_A_DQS#7

    SA_MA_0
    SA_MA_1
    SA_MA_2
    SA_MA_3
    SA_MA_4
    SA_MA_5
    SA_MA_6
    SA_MA_7
    SA_MA_8
    SA_MA_9
    SA_MA_10
    SA_MA_11
    SA_MA_12
    SA_MA_13

    BJ19
    BD20
    BK27
    BH28
    BL24
    BK28
    BJ27
    BJ25
    BL28
    BA28
    BC19
    BE28
    BG30
    BJ16

    DDR_A_MA0
    DDR_A_MA1
    DDR_A_MA2
    DDR_A_MA3
    DDR_A_MA4
    DDR_A_MA5
    DDR_A_MA6
    DDR_A_MA7
    DDR_A_MA8
    DDR_A_MA9
    DDR_A_MA10
    DDR_A_MA11
    DDR_A_MA12
    DDR_A_MA13

    SA_RAS#
    SA_RCVEN#

    BE18
    AY20

    DDR_A_RAS#
    SA_RCVEN#

    SA_DQS_0
    SA_DQS_1
    SA_DQS_2
    SA_DQS_3
    SA_DQS_4
    SA_DQS_5
    SA_DQS_6
    SA_DQS_7
    SA_DQS#_0
    SA_DQS#_1
    SA_DQS#_2
    SA_DQS#_3
    SA_DQS#_4
    SA_DQS#_5
    SA_DQS#_6
    SA_DQS#_7

    SA_WE#

    BA19

    DDR_A_WE#

    DDR_B_D0
    DDR_B_D1
    DDR_B_D2
    DDR_B_D3
    DDR_B_D4
    DDR_B_D5
    DDR_B_D6
    DDR_B_D7
    DDR_B_D8
    DDR_B_D9
    DDR_B_D10
    DDR_B_D11
    DDR_B_D12
    DDR_B_D13
    DDR_B_D14
    DDR_B_D15
    DDR_B_D16
    DDR_B_D17
    DDR_B_D18
    DDR_B_D19
    DDR_B_D20
    DDR_B_D21
    DDR_B_D22
    DDR_B_D23
    DDR_B_D24
    DDR_B_D25
    DDR_B_D26
    DDR_B_D27
    DDR_B_D28
    DDR_B_D29
    DDR_B_D30
    DDR_B_D31
    DDR_B_D32
    DDR_B_D33
    DDR_B_D34
    DDR_B_D35
    DDR_B_D36
    DDR_B_D37
    DDR_B_D38
    DDR_B_D39
    DDR_B_D40
    DDR_B_D41
    DDR_B_D42
    DDR_B_D43
    DDR_B_D44
    DDR_B_D45
    DDR_B_D46
    DDR_B_D47
    DDR_B_D48
    DDR_B_D49
    DDR_B_D50
    DDR_B_D51
    DDR_B_D52
    DDR_B_D53
    DDR_B_D54
    DDR_B_D55
    DDR_B_D56
    DDR_B_D57
    DDR_B_D58
    DDR_B_D59
    DDR_B_D60
    DDR_B_D61
    DDR_B_D62
    DDR_B_D63

    DDR_A_BS0 13
    DDR_A_BS1 13
    DDR_A_BS2 13
    DDR_A_CAS# 13
    DDR_A_DM[0..7] 13

    DDR_A_DQS[0..7] 13

    DDR_A_DQS#[0..7] 13

    DDR_A_MA[0..13] 13

    DDR_A_RAS# 13
    T5
    DDR_A_WE# 13

    AP49
    AR51
    AW50
    AW51
    AN51
    AN50
    AV50
    AV49
    BA50
    BB50
    BA49
    BE50
    BA51
    AY49
    BF50
    BF49
    BJ50
    BJ44
    BJ43
    BL43
    BK47
    BK49
    BK43
    BK42
    BJ41
    BL41
    BJ37
    BJ36
    BK41
    BJ40
    BL35
    BK37
    BK13
    BE11
    BK11
    BC11
    BC13
    BE12
    BC12
    BG12
    BJ10
    BL9
    BK5
    BL5
    BK9
    BK10
    BJ8
    BJ6
    BF4
    BH5
    BG1
    BC2
    BK3
    BE4
    BD3
    BJ2
    BA3
    BB3
    AR1
    AT3
    AY2
    AY3
    AU2
    AT2

    CRESTLINE_1p0

    SB_DQ_0
    SB_DQ_1
    SB_DQ_2
    SB_DQ_3
    SB_DQ_4
    SB_DQ_5
    SB_DQ_6
    SB_DQ_7
    SB_DQ_8
    SB_DQ_9
    SB_DQ_10
    SB_DQ_11
    SB_DQ_12
    SB_DQ_13
    SB_DQ_14
    SB_DQ_15
    SB_DQ_16
    SB_DQ_17
    SB_DQ_18
    SB_DQ_19
    SB_DQ_20
    SB_DQ_21
    SB_DQ_22
    SB_DQ_23
    SB_DQ_24
    SB_DQ_25
    SB_DQ_26
    SB_DQ_27
    SB_DQ_28
    SB_DQ_29
    SB_DQ_30
    SB_DQ_31
    SB_DQ_32
    SB_DQ_33
    SB_DQ_34
    SB_DQ_35
    SB_DQ_36
    SB_DQ_37
    SB_DQ_38
    SB_DQ_39
    SB_DQ_40
    SB_DQ_41
    SB_DQ_42
    SB_DQ_43
    SB_DQ_44
    SB_DQ_45
    SB_DQ_46
    SB_DQ_47
    SB_DQ_48
    SB_DQ_49
    SB_DQ_50
    SB_DQ_51
    SB_DQ_52
    SB_DQ_53
    SB_DQ_54
    SB_DQ_55
    SB_DQ_56
    SB_DQ_57
    SB_DQ_58
    SB_DQ_59
    SB_DQ_60
    SB_DQ_61
    SB_DQ_62
    SB_DQ_63

    BB19
    BK19
    BF29

    MEMORY

    SA_BS_0
    SA_BS_1
    SA_BS_2

    U15E

    SYSTEM

    MEMORY

    SA_DQ_0
    SA_DQ_1
    SA_DQ_2
    SA_DQ_3
    SA_DQ_4
    SA_DQ_5
    SA_DQ_6
    SA_DQ_7
    SA_DQ_8
    SA_DQ_9
    SA_DQ_10
    SA_DQ_11
    SA_DQ_12
    SA_DQ_13
    SA_DQ_14
    SA_DQ_15
    SA_DQ_16
    SA_DQ_17
    SA_DQ_18
    SA_DQ_19
    SA_DQ_20
    SA_DQ_21
    SA_DQ_22
    SA_DQ_23
    SA_DQ_24
    SA_DQ_25
    SA_DQ_26
    SA_DQ_27
    SA_DQ_28
    SA_DQ_29
    SA_DQ_30
    SA_DQ_31
    SA_DQ_32
    SA_DQ_33
    SA_DQ_34
    SA_DQ_35
    SA_DQ_36
    SA_DQ_37
    SA_DQ_38
    SA_DQ_39
    SA_DQ_40
    SA_DQ_41
    SA_DQ_42
    SA_DQ_43
    SA_DQ_44
    SA_DQ_45
    SA_DQ_46
    SA_DQ_47
    SA_DQ_48
    SA_DQ_49
    SA_DQ_50
    SA_DQ_51
    SA_DQ_52
    SA_DQ_53
    SA_DQ_54
    SA_DQ_55
    SA_DQ_56
    SA_DQ_57
    SA_DQ_58
    SA_DQ_59
    SA_DQ_60
    SA_DQ_61
    SA_DQ_62
    SA_DQ_63

    SYSTEM

    AR43
    AW44
    BA45
    AY46
    AR41
    AR45
    AT42
    AW47
    BB45
    BF48
    BG47
    BJ45
    BB47
    BG50
    BH49
    BE45
    AW43
    BE44
    BG42
    BE40
    BF44
    BH45
    BG40
    BF40
    AR40
    AW40
    AT39
    AW36
    AW41
    AY41
    AV38
    AT38
    AV13
    AT13
    AW11
    AV11
    AU15
    AT11
    BA13
    BA11
    BE10
    BD10
    BD8
    AY9
    BG10
    AW9
    BD7
    BB9
    BB5
    AY7
    AT5
    AT7
    AY6
    BB7
    AR5
    AR8
    AR9
    AN3
    AM8
    AN10
    AT9
    AN9
    AM9
    AN11

    DDR

    DDR_A_D0
    DDR_A_D1
    DDR_A_D2
    DDR_A_D3
    DDR_A_D4
    DDR_A_D5
    DDR_A_D6
    DDR_A_D7
    DDR_A_D8
    DDR_A_D9
    DDR_A_D10
    DDR_A_D11
    DDR_A_D12
    DDR_A_D13
    DDR_A_D14
    DDR_A_D15
    DDR_A_D16
    DDR_A_D17
    DDR_A_D18
    DDR_A_D19
    DDR_A_D20
    DDR_A_D21
    DDR_A_D22
    DDR_A_D23
    DDR_A_D24
    DDR_A_D25
    DDR_A_D26
    DDR_A_D27
    DDR_A_D28
    DDR_A_D29
    DDR_A_D30
    DDR_A_D31
    DDR_A_D32
    DDR_A_D33
    DDR_A_D34
    DDR_A_D35
    DDR_A_D36
    DDR_A_D37
    DDR_A_D38
    DDR_A_D39
    DDR_A_D40
    DDR_A_D41
    DDR_A_D42
    DDR_A_D43
    DDR_A_D44
    DDR_A_D45
    DDR_A_D46
    DDR_A_D47
    DDR_A_D48
    DDR_A_D49
    DDR_A_D50
    DDR_A_D51
    DDR_A_D52
    DDR_A_D53
    DDR_A_D54
    DDR_A_D55
    DDR_A_D56
    DDR_A_D57
    DDR_A_D58
    DDR_A_D59
    DDR_A_D60
    DDR_A_D61
    DDR_A_D62
    DDR_A_D63

    U15D

    DDR

    13 DDR_A_D[0..63]

    SB_BS_0
    SB_BS_1
    SB_BS_2

    AY17
    BG18
    BG36

    DDR_B_BS0
    DDR_B_BS1
    DDR_B_BS2

    SB_CAS#

    BE17

    DDR_B_CAS#

    SB_DM_0
    SB_DM_1
    SB_DM_2
    SB_DM_3
    SB_DM_4
    SB_DM_5
    SB_DM_6
    SB_DM_7

    AR50
    BD49
    BK45
    BL39
    BH12
    BJ7
    BF3
    AW2

    DDR_B_DM0
    DDR_B_DM1
    DDR_B_DM2
    DDR_B_DM3
    DDR_B_DM4
    DDR_B_DM5
    DDR_B_DM6
    DDR_B_DM7

    AT50
    BD50
    BK46
    BK39
    BJ12
    BL7
    BE2
    AV2
    AU50
    BC50
    BL45
    BK38
    BK12
    BK7
    BF2
    AV3

    DDR_B_DQS0
    DDR_B_DQS1
    DDR_B_DQS2
    DDR_B_DQS3
    DDR_B_DQS4
    DDR_B_DQS5
    DDR_B_DQS6
    DDR_B_DQS7
    DDR_B_DQS#0
    DDR_B_DQS#1
    DDR_B_DQS#2
    DDR_B_DQS#3
    DDR_B_DQS#4
    DDR_B_DQS#5
    DDR_B_DQS#6
    DDR_B_DQS#7

    BC18
    BG28
    BG25
    AW17
    BF25
    BE25
    BA29
    BC28
    AY28
    BD37
    BG17
    BE37
    BA39
    BG13

    DDR_B_MA0
    DDR_B_MA1
    DDR_B_MA2
    DDR_B_MA3
    DDR_B_MA4
    DDR_B_MA5
    DDR_B_MA6
    DDR_B_MA7
    DDR_B_MA8
    DDR_B_MA9
    DDR_B_MA10
    DDR_B_MA11
    DDR_B_MA12
    DDR_B_MA13

    SB_DQS_0
    SB_DQS_1
    SB_DQS_2
    SB_DQS_3
    SB_DQS_4
    SB_DQS_5
    SB_DQS_6
    SB_DQS_7
    SB_DQS#_0
    SB_DQS#_1
    SB_DQS#_2
    SB_DQS#_3
    SB_DQS#_4
    SB_DQS#_5
    SB_DQS#_6
    SB_DQS#_7
    SB_MA_0
    SB_MA_1
    SB_MA_2
    SB_MA_3
    SB_MA_4
    SB_MA_5
    SB_MA_6
    SB_MA_7
    SB_MA_8
    SB_MA_9
    SB_MA_10
    SB_MA_11
    SB_MA_12
    SB_MA_13
    SB_RAS#
    SB_RCVEN#
    SB_WE#

    AV16
    AY18

    DDR_B_RAS#
    SB_RCVEN#

    BC17

    DDR_B_WE#

    DDR_B_BS0 14
    DDR_B_BS1 14
    DDR_B_BS2 14
    DDR_B_CAS# 14
    DDR_B_DM[0..7] 14

    DDR_B_DQS[0..7] 14

    DDR_B_DQS#[0..7] 14

    DDR_B_MA[0..13] 14

    DDR_B_RAS# 14
    T4
    DDR_B_WE# 14

    CRESTLINE_1p0

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    Compal Electronics, Inc.


    CRESTLINE((2/6)-DDR2 A/B CH

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4

    Tuesday, March 27, 2007

    Sheet
    1

    of

    55

    For Crestline:2.4kohm
    For Calero: 1.5Kohm
    0314 add
    J40
    H39
    E39
    E40
    C37
    D35
    K40

    TXCLK_LTXCLK_L+
    TXCLK_UTXCLK_U+

    TXCLK_LTXCLK_L+
    TXCLK_UTXCLK_U+

    17
    17
    17

    TXOUT_L0TXOUT_L1TXOUT_L2-

    TXOUT_L0TXOUT_L1TXOUT_L2-

    G51
    E51
    F49

    TXOUT_L0+
    TXOUT_L1+
    TXOUT_L2+

    G50
    E50
    F48

    TXOUT_U0TXOUT_U1TXOUT_U2-

    G44
    B47
    B45

    TXOUT_U0+
    TXOUT_U1+
    TXOUT_U2+

    E44
    A47
    A45

    LVDSB_DATA#_0
    LVDSB_DATA#_1
    LVDSB_DATA#_2
    LVDSB_DATA_0
    LVDSB_DATA_1
    LVDSB_DATA_2

    0314 add

    TVA_DAC
    TVB_DAC
    TVC_DAC

    F27
    J27
    L27

    TVA_RTN
    TVB_RTN
    TVC_RTN

    M35
    P33

    TV_DCONSEL_0
    TV_DCONSEL_1

    M_VSYNC

    1013 change value


    2.2K_0402_5%
    DDC2_CLK
    R92 1
    2
    DDC2_DATA
    R158 1
    2
    2.2K_0402_5%

    VSYNC
    1.15K_0402_1%

    0821

    H S YNC

    K33
    G35
    F33
    C32
    E33

    CRT_DDC_CLK
    CRT_DDC_DATA
    CRT_HSYNC
    CRT_TVO_IREF
    CRT_VSYNC

    PEG_COMPI
    PEG_COMPO

    N43
    M43

    PEG_RX#_0
    PEG_RX#_1
    PEG_RX#_2
    PEG_RX#_3
    PEG_RX#_4
    PEG_RX#_5
    PEG_RX#_6
    PEG_RX#_7
    PEG_RX#_8
    PEG_RX#_9
    PEG_RX#_10
    PEG_RX#_11
    PEG_RX#_12
    PEG_RX#_13
    PEG_RX#_14
    PEG_RX#_15

    J51
    L51
    N47
    T45
    T50
    U40
    Y44
    Y40
    AB51
    W49
    AD44
    AD40
    AG46
    AH49
    AG45
    AG41

    PEG_RX_0
    PEG_RX_1
    PEG_RX_2
    PEG_RX_3
    PEG_RX_4
    PEG_RX_5
    PEG_RX_6
    PEG_RX_7
    PEG_RX_8
    PEG_RX_9
    PEG_RX_10
    PEG_RX_11
    PEG_RX_12
    PEG_RX_13
    PEG_RX_14
    PEG_RX_15

    J50
    L50
    M47
    U44
    T49
    T41
    W45
    W41
    AB50
    Y48
    AC45
    AC41
    AH47
    AG49
    AH45
    AG42

    PEG_TX#_0
    PEG_TX#_1
    PEG_TX#_2
    PEG_TX#_3
    PEG_TX#_4
    PEG_TX#_5
    PEG_TX#_6
    PEG_TX#_7
    PEG_TX#_8
    PEG_TX#_9
    PEG_TX#_10
    PEG_TX#_11
    PEG_TX#_12
    PEG_TX#_13
    PEG_TX#_14
    PEG_TX#_15
    PEG_TX_0
    PEG_TX_1
    PEG_TX_2
    PEG_TX_3
    PEG_TX_4
    PEG_TX_5
    PEG_TX_6
    PEG_TX_7
    PEG_TX_8
    PEG_TX_9
    PEG_TX_10
    PEG_TX_11
    PEG_TX_12
    PEG_TX_13
    PEG_TX_14
    PEG_TX_15

    DDC1_CLK
    DDC1_DATA
    M _HSYNC R165 1
    2
    30.1_0402_1%
    M_VSYNC R166 1
    2
    30.1_0402_1%

    16 DDC1_CLK
    16 DDC1_DATA
    16 M_HSYNC

    CRT_BLUE
    CRT_BLUE#
    CRT_GREEN
    CRT_GREEN#
    CRT_RED
    CRT_RED#

    R1449

    PEGCOMP

    R1176
    24.9_0402_1%
    1
    2

    +VCCP

    Strap Pin Table


    010 = FSB 800MHz

    PEG_RXN1

    Others = Reserved

    PEG_RXN1 16

    PEG_RXP1

    CFG8 (Low power PCIE)

    PEG_RXP1 16

    CFG9

    2
    2
    2
    2

    0.1U_0402_16V4Z
    0.1U_0402_16V4Z
    0.1U_0402_16V4Z
    0.1U_0402_16V4Z

    SDVOB_R- 16
    SDVOB_G- 16
    SDVOB_B- 16
    SDVOB_CLK- 16

    CFG[15:14]

    0.1U_0402_16V4Z
    0.1U_0402_16V4Z
    0.1U_0402_16V4Z
    0.1U_0402_16V4Z

    SDVOB_R+ 16
    SDVOB_G+ 16
    SDVOB_B+ 16
    SDVOB_CLK+ 16

    M_CRMA

    L17 1
    2
    CHB1608U301_0603

    CRMA

    16,33

    M_BLUE

    C251

    2
    2
    C238

    C7
    5.6P_0402_50V8D

    C253

    2
    2
    C243

    @ C194

    C8
    5.6P_0402_50V8D

    0314 change design

    10P_0402_50V8J

    0 = Normal Operation
    (Lane number in Order)

    L28
    C_RED_L
    1
    2
    HLC0603CSCC39NJT_0603
    L35
    C_GRN_L
    1
    2
    HLC0603CSCC39NJT_0603
    L27
    C_BLU_L
    1
    2
    HLC0603CSCC39NJT_0603

    Place C losed to U15


    R ED
    GREEN
    BLUE

    1
    1
    2

    @ C233

    C193
    22P_0402_50V8J
    2

    10P_0402_50V8J
    @ C240

    1
    C237
    2

    C232

    @ C195

    22P_0402_50V8J

    RED

    33

    GREEN

    33

    BLUE

    33

    2 @ 4.02K_0402_1%

    CFG7

    R1152 1

    2 @ 4.02K_0402_1%

    CFG8

    R1451 1

    2 @ 4.02K_0402_1%

    CFG9

    R1153 1

    2 @ 4.02K_0402_1%

    CFG12

    R1155 1

    2 @ 4.02K_0402_1%

    CFG13

    R1156 1

    2 @ 4.02K_0402_1%

    CFG16

    R1157 1

    2 @ 4.02K_0402_1%

    CFG[17:3] have internal pull up


    +3VS

    CFG[19:18] have internal pull down


    7

    CFG19

    CFG20

    R1159

    2 @ 4.02K_0402_1%

    R1160

    2 @ 4.02K_0402_1%

    J37

    2
    C FG5

    10P_0402_50V8J
    @ C244
    @ C245

    22P_0402_50V8J

    1 = PCIE/SDVO are operating simu.


    R1151 1

    L31
    1
    2
    HLC0603CSCCR11JT_0603
    L34
    1
    2
    HLC0603CSCCR11JT_0603
    L26
    1
    2
    HLC0603CSCCR11JT_0603

    0 = Only PCIE or SDVO is operational.

    CFG5

    0809 Add MAX9511


    1013 Remove MAX9511

    M_RED

    10P_0402_50V8J

    1 = SDVO Device Present

    CFG20 (PCIE/SDVO concurrent)

    10P_0402_50V8J

    M_GREEN

    0 = Disabled

    0 = No SDVO Device Present

    CFG19 (DMI Lane Reversal)

    10P_0402_50V8J

    16,33

    5.6P_0402_50V8D

    LUMA

    1 = Reverse Lane

    CRT Termination/EMI Filter

    L37 1
    2
    CHB1608U301_0603

    Reserved

    SDVO_CTRLDATA
    2
    2
    2
    2

    = Reserved
    = XOR Mode Enabled
    = All Z Mode Enabled
    = Normal Operation (Default)

    1 = Enabled
    CFG[18:17]

    C1062 1
    C1063 1
    C1066 1
    C1067 1

    Reserved

    CFG16 (FSB Dynamic ODT)

    M45 PEG_TXP0
    T38 PEG_TXP1
    T46 PEG_TXP2
    N50 PEG_TXP3
    R51
    U43
    W42
    Y47
    Y39
    AC38
    AD47
    AC50
    AD43
    AG39
    AE50
    AH43

    M_LUMA

    1 = Normal Operation

    00
    01
    10
    11

    CFG[13:12] (XOR/ALLZ)
    C1058 1
    C1059 1
    C1060 1
    C1061 1

    1 = Low Power mode

    Reserved

    CFG[11:10]

    N45 PEG_TXN0
    U39 PEG_TXN1
    U47 PEG_TXN2
    N51 PEG_TXN3
    R50
    T42
    Y43
    W46
    W38
    AD39
    AC46
    AC49
    AC42
    AH39
    AE49
    AH44

    0 = Normal mode

    0 = Reverse Lane

    (PCIE Graphics Lane Reversal)

    16,33

    0 = Reserved
    1 = Mobile CPU

    COMP

    5.6P_0402_50V8D

    M_CRMA

    Reserved

    CFG6

    L38 1
    2
    CHB1608U301_0603

    5.6P_0402_50V8D

    M_LUMA

    1 = DMI x 4

    CFG7 (CPU Strap)

    M_COMP

    5.6P_0402_50V8D

    M_COMP

    Place clo se to U15

    0 = DMI x 2

    CFG5 (DMI select)

    For Crestline:1.3kohm
    For Calero: 255ohm

    TV-Out Termination/EMI Filter

    011 = FSB 667MHz

    CFG[2:0] FSB Freq select

    CRESTLINE_1p0

    1
    2

    R181

    H32
    G32
    K29
    J29
    F29
    E29

    VGA

    1013 change value

    R182

    75_0402_1%

    0821

    75_0402_1%

    R180

    75_0402_1%

    0314 change design

    M_BLUE
    M_GREEN
    M_RED

    M_BLUE
    M_GREEN
    M_RED

    +3VS

    E27
    G27
    K27

    R177

    2.2K_0402_5%
    1
    2

    R94

    +3VS

    LVDSA_DATA_0
    LVDSA_DATA_1
    LVDSA_DATA_2

    TV

    R176

    75_0402_1%

    R175

    75_0402_1%

    75_0402_1%

    0622 change value


    C

    16

    LVDSA_DATA#_0
    LVDSA_DATA#_1
    LVDSA_DATA#_2

    M_COMP
    M_LUMA
    M_CRMA

    M_COMP
    M_LUMA
    M_CRMA

    TXOUT_U0+
    TXOUT_U1+
    TXOUT_U2+

    17
    17
    17

    TXOUT_U0TXOUT_U1TXOUT_U2-

    17
    17
    17

    TXOUT_L0+
    TXOUT_L1+
    TXOUT_L2+

    LVDS_IBG
    LVDS_VBG
    LVDS_VREFH
    LVDS_VREFL
    LVDSA_CLK#
    LVDSA_CLK
    LVDSB_CLK#
    LVDSB_CLK

    LVDS

    17
    17
    17
    17

    L41
    L43
    N41
    N40
    D46
    C45
    D44
    E42

    L_BKLT_CTRL
    L_BKLT_EN
    L_CTRL_CLK
    L_CTRL_DATA
    L_DDC_CLK
    L_DDC_DATA
    L_VDD_EN

    GRAPHICS

    2 10K_0402_5%
    2 10K_0402_5%

    17
    17
    17

    PEGCOMP trace width


    and spacing is 20/25 mils.

    U15C

    PCI-EXPRESS

    BLON_PWM
    17 BLON_PWM
    ENABLT
    17
    ENABLT
    R95 1
    +3VS
    R160 1
    DDC2_CLK
    17 DDC2_CLK
    DDC2_DATA
    17 DDC2_DATA
    ENAVDD
    17
    ENAVDD
    2.4K_0402_1%
    2
    1
    R1447

    1
    A

    PAD-NO SHORT 2x2m

    0314 change design

    Note: CRT / TV-out should route to JP30 first then to the JP1 & JP2 on system side.
    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    Compal Electronics, Inc.


    CRESTLINE((3/6)-VGA/LVDS/TV

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4
    Sheet

    Tuesday, March 27, 2007


    1

    of

    55

    +3VS

    4.7U_0805_10V4Z

    2
    1U_0603_10V4Z

    A PEG

    DMI

    D TV/CRT

    AH50
    AH51

    2
    1
    MBK2012121YZF_0805

    +1.25VS

    10U_FLC-453232-100K_0.25A_10%
    C1134
    0.1U_0402_16V4Z

    04/10 stuff

    C838

    C837

    C836

    10U_0805_10V4Z

    +VCCP

    +1.25VM_MPLL
    R1466

    +1.25VM

    R1465

    2
    1
    0_0805_5%

    C1135

    0316 add

    +VCC_PEG

    20mils

    +1.25VM

    R1464

    0.1U_0402_16V4Z

    2
    2

    C1138

    C1137

    C1145

    220U_D2_4VM

    CRESTLINE_1p0

    0.1U_0402_16V4Z

    C1144
    0.022U_0402_16V7K

    A7
    F2
    AH1

    BLM18PG181SN1D_0603
    2
    1
    R1468

    0.47U_0603_10V7K
    C1143

    +3VS

    VCCD_LVDS_1
    VCCD_LVDS_2

    VTTLF1
    VTTLF2
    VTTLF3

    +VCC_PEG

    10U_0805_10V4Z

    VCCD_PEG_PLL

    J41
    H42

    +1.8V_LVDS

    LVDS

    VCCD_HPLL

    VCC_RXR_DMI_1
    VCC_RXR_DMI_2

    AD51
    W50
    W51
    V49
    V50

    0.47U_0603_10V7K
    C1142

    +3VS_TVDACC

    +1.25VS_PEGPLL

    U48

    VCCD_QDAC

    C40
    B40

    0.47U_0603_10V7K
    C1141

    1116 Change to BLM18PG181SN1D_0603

    +1.25VM_HPLL

    AN2

    VCC_PEG_1
    VCC_PEG_2
    VCC_PEG_3
    VCC_PEG_4
    VCC_PEG_5

    R1463
    10U_0805_10V4Z

    N28

    +1.5VS_QDAC

    +1.5VS
    R1460
    1
    2
    0_0805_5%

    +1.25VM_HPLL

    +3VS_HV

    VCC_HV_1
    VCC_HV_2

    +1.5VS_TVDAC

    C1276

    +1.5VS_TVDAC

    VCCD_CRT
    VCCD_TVDAC

    +1.25VS_DPLLA

    VCC_TX_LVDS

    0317 change value

    M32
    L29

    +1.8V_TXLVDS

    C1133

    +3VS_TVDACC

    A43

    C1227

    +3VS_TVDACB

    VCCA_TVA_DAC_1
    VCCA_TVA_DAC_2
    VCCA_TVB_DAC_1
    VCCA_TVB_DAC_2
    VCCA_TVC_DAC_1
    VCCA_TVC_DAC_2

    +1.8V_SM_CK

    220U_D2_4VM

    VCCA_SM_CK_1
    VCCA_SM_CK_2

    C25
    B25
    C27
    B27
    B28
    A28

    +3VS_TVDACA

    BK24
    BK23
    BJ24
    BJ23

    C1136

    BC29
    BB29

    VCC_SM_CK_1
    VCC_SM_CK_2
    VCC_SM_CK_3
    VCC_SM_CK_4

    +1.25VS
    L77
    BLM18PG121SN1D_0603
    2
    1

    0.1U_0402_16V4Z

    C1132

    0.1U_0402_16V4Z

    C1131

    1U_0603_10V4Z

    22U_0805_6.3VAM

    0316 add

    C1130

    C1226

    1U_0402_6.3V4Z

    2
    1
    0_0603_5%

    A SM

    VCCA_SM_7
    VCCA_SM_8
    VCCA_SM_9
    VCCA_SM_10
    VCCA_SM_11
    VCCA_SM_NCTF_1
    VCCA_SM_NCTF_2

    SM CK

    +1.25VM_A_SM_CK

    AT22
    AT21
    AT19
    AT18
    AT17
    AR17
    AR16

    C1129

    HV

    22U_0805_6.3VAM

    +1.25VS_DMI

    PEG

    A CK

    R1462

    C1128

    AJ50

    R1458
    1
    2
    0_0805_5%

    0.1U_0402_16V4Z

    150U_D_6.3VM

    C1127

    VCC_DMI

    +1.25VS_PEGPLL

    C1124

    +V1.25VS_AXF

    +1.8V

    C1125
    0.022U_0402_16V7K

    1
    C1126

    POWER

    B23
    B21
    A21

    VCC_AXF_1
    VCC_AXF_2
    VCC_AXF_3

    C1123

    1
    2
    0_0805_5%

    +1.25VM

    VCC_AXD_NCTF

    +1.8V_SM_CK

    +1.25VM

    10U_0805_10V4Z

    VCCA_SM_1
    VCCA_SM_2
    VCCA_SM_3
    VCCA_SM_4
    VCCA_SM_5

    2
    R1457
    0_0603_5%

    C1122

    +1.25VM_A_SM
    0317 change value

    R1461

    VCCA_PEG_PLL

    AW18
    AV19
    AU19
    AU18
    AU17

    AR29

    0.1U_0402_16V4Z

    U51

    10U_0805_10V4Z

    +1.25VS_PEGPLL 20 mils

    VSSA_PEG_BG

    R1671
    1
    2
    0_0805_5%

    AT23
    AU28
    AU24
    AT29
    AT25
    AT30

    C1120

    K49

    VCC_AXD_1
    VCC_AXD_2
    VCC_AXD_3
    VCC_AXD_4
    VCC_AXD_5
    VCC_AXD_6

    C1119

    C1121

    VCCA_PEG_BG

    +1.25VM_AXD

    1U_0603_10V4Z

    0.1U_0402_16V4Z

    K50

    VTTLF

    +3VS_PEG_BG
    R1459
    2
    1
    0_0603_5%

    +3VS

    AXD

    VSSA_LVDS

    AXF

    VCCA_LVDS

    B41

    C849

    VTT

    CRT
    PLL
    A LVDS

    A41

    C1116

    C1118

    0619 change value

    +1.25VS

    0.1U_0402_16V4Z

    1000P_0402_50V7K

    +1.8V_TXLVDS

    R1455
    0_0603_5%
    C1112

    VCCA_MPLL

    C1115

    VCCA_HPLL

    AM2

    C1111

    AL2

    +1.25VM_MPLL

    +1.25VS_DMI

    0316 add

    C1230

    +1.25VM_HPLL

    0619 change

    10U_0603_6.3V6M

    10U_0603_6.3V6M

    VCCA_DPLLB

    10U_FLC-453232-100K_0.25A_10%
    C1231

    VCCA_DPLLA

    H49

    22U_0805_6.3VAM

    B49

    +1.25VS_DPLLB

    +1.25VS

    0.1U_0402_16V4Z
    C1117

    +1.25VS_DPLLA

    C1110

    VSSA_DAC_BG

    2.2U_0805_16V4Z

    B32

    1
    C830

    4.7U_0805_10V4Z

    VCCA_DAC_BG

    330U_D2E_2.5VM_R7

    U13
    U12
    U11
    U9
    U8
    U7
    U5
    U3
    U2
    U1
    T13
    T11
    T10
    T9
    T7
    T6
    T5
    T3
    T2
    R3
    R2
    R1

    0.47U_0603_10V7K

    0.1U_0402_16V4Z

    1
    C1114

    C1113
    0.022U_0402_16V7K

    A30

    +3VS_DAC_BG

    +3VS
    BLM18PG181SN1D_0603
    2
    1
    R1456

    VCCA_CRT_DAC_1
    VCCA_CRT_DAC_2

    VTT_1
    VTT_2
    VTT_3
    VTT_4
    VTT_5
    VTT_6
    VTT_7
    VTT_8
    VTT_9
    VTT_10
    VTT_11
    VTT_12
    VTT_13
    VTT_14
    VTT_15
    VTT_16
    VTT_17
    VTT_18
    VTT_19
    VTT_20
    VTT_21
    VTT_22

    4.7U_0805_10V4Z

    +3VS_DAC_CRT

    VCCSYNC

    A33
    B33

    1U_0603_10V4Z

    U 15H

    J32

    +1.25VS

    +V1.25VS_AXF

    R1454

    10U_0805_10V4Z

    0621 Change R to BLM18PG1SN1D

    +1.25VS_DPLLB

    +3VS_DAC_CRT
    D

    +VCCP

    TV

    1
    C1107

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    C1375
    22U_0805_6.3V

    C1109

    C1108
    0.022U_0402_16V7K

    R1452
    2
    1
    0_0603_5%

    MBK1608102YZF 0603
    2
    1
    R1453

    VCC SYNC

    +3VS
    +3VS_DAC_BG

    2
    1
    MBK2012121YZF_0805

    +1.25VS

    C1139

    @ R1467
    2
    1
    0_0805_5%

    0.1U_0402_16V4Z

    C1140
    10U_0805_10V4Z

    04/10 no stuff

    +VCCP_D

    D12

    1107 Change to 100 ohm

    +VCCP

    R1469
    2
    1
    10_0402_5%

    R1470
    2
    1
    0_0402_5%

    +3VS_HV

    CH751H-40PT_SOD323-2
    +3VS
    +1.5VS_QDAC
    +3VS_TVDACA

    2
    1
    100_0603_1%

    1
    C1374

    C1147

    220U_D2_4VM

    0.1U_0402_16V4Z

    R1471
    C1146
    0.022U_0402_16V7K

    C1149

    0.1U_0402_16V4Z

    C1148
    0.022U_0402_16V7K

    +1.5VS

    +3VS
    BLM18PG181SN1D_0603
    2
    1
    R1472

    40 mils

    +1.8V_TXLVDS
    R1476

    1000P_0402_50V7K

    2
    1
    0_0603_5%
    1

    C1269

    +1.8V

    220U_D2_4VM_R15

    +
    C1285

    0119 Add C1374


    20070301 Install C1374

    +1.8V_LVDS
    A

    +3VS_TVDACB

    2
    1
    0_0603_5%
    1

    C1151
    1U_0603_10V4Z

    R1474
    C1150
    10U_0805_10V4Z

    C1153

    0.1U_0402_16V4Z

    C1152
    0.022U_0402_16V7K

    +3VS
    BLM18PG181SN1D_0603
    2
    1
    R1473

    +1.8V

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    Compal Electronics, Inc.


    CRESTLINE(4/6)-PWR

    Size Document Number


    C ustom LA-32 61P UMA
    D ate:

    Rev
    0.4

    Tuesday, March 27, 2007

    Sheet
    1

    10

    of

    55

    +VCCP
    VCCGFX

    0317 change value

    0_0402_5%
    0_0402_5%
    0_0402_5%
    0_0402_5%
    0_0402_5%
    0_0402_5%
    1
    2
    1
    2
    1
    2
    1
    2
    1
    2
    1
    2

    1013 install R111,R113,R122,R132


    1213 No-install R111,R113,R122,R132
    0129 No-install R111,R113,R122,R132
    20070227 Install R111,R113,R122,R132

    VCC AXM

    +1.05VM

    VCCGFX

    VCC AXM NCTF

    VCC_AXM_NCTF_1
    VCC_AXM_NCTF_2
    VCC_AXM_NCTF_3
    VCC_AXM_NCTF_4
    VCC_AXM_NCTF_5
    VCC_AXM_NCTF_6
    VCC_AXM_NCTF_7
    VCC_AXM_NCTF_8
    VCC_AXM_NCTF_9
    VCC_AXM_NCTF_10
    VCC_AXM_NCTF_11
    VCC_AXM_NCTF_12
    VCC_AXM_NCTF_13
    VCC_AXM_NCTF_14
    VCC_AXM_NCTF_15
    VCC_AXM_NCTF_16
    VCC_AXM_NCTF_17
    VCC_AXM_NCTF_18
    VCC_AXM_NCTF_19

    AT33
    AT31
    AK29
    AK24
    AK23
    AJ26
    AJ23

    0.1U_0402_16V4Z

    10U_0805_10V4Z
    1
    1

    C1175

    C1286 +

    C812

    1
    C811

    1U_0603_10V4Z

    330U_D2E_2.5VM_R9

    10U_0805_10V4Z

    CRESTLINE_1p0

    +3VL

    @ Q121
    RHU002N06_SOT323

    MCHGND5
    S

    2
    G

    2
    G

    100K_0402_5%
    1 1
    2

    @ R1703

    100K_0402_5%

    MCHGND2

    CRACK_GPIO28
    D

    @ Q119
    RHU002N06_SOT323

    @ Q123
    RHU002N06_SOT323

    2
    G
    3

    MCHGND4

    2
    G

    @ Q118
    RHU002N06_SOT323

    100K_0402_5%
    1
    2

    2
    1

    MCHGND6

    CRACK_GPIO28

    @ R1711

    C813 1U_0603_10V4Z

    AW45VCCSM_LF1
    BC39 VCCSM_LF2
    BE39 VCCSM_LF3
    BD17 VCCSM_LF4
    BD4 VCCSM_LF5
    AW8 VCCSM_LF6
    AT6 VCCSM_LF7
    1

    C814 1U_0603_10V4Z

    CRACK_GPIO28

    C1164 0.47U_0402_6.3V6K

    100K_0402_5%
    R1701
    @

    C1176

    0316 add

    +3VS
    100K_0402_5%

    0.22U_0402_10V4Z

    @ R1709

    C795 0.22U_0603_10V7K

    VCC_SM_LF1
    VCC_SM_LF2
    VCC_SM_LF3
    VCC_SM_LF4
    VCC_SM_LF5
    VCC_SM_LF6
    VCC_SM_LF7

    1 C1287

    C1318 0.22U_0603_10V7K

    VCC_AXG_1
    VCC_AXG_2
    VCC_AXG_3
    VCC_AXG_4
    VCC_AXG_5
    VCC_AXG_6
    VCC_AXG_7
    VCC_AXG_8
    VCC_AXG_9
    VCC_AXG_10
    VCC_AXG_11
    VCC_AXG_12
    VCC_AXG_13
    VCC_AXG_14
    VCC_AXG_15
    VCC_AXG_16
    VCC_AXG_17
    VCC_AXG_18
    VCC_AXG_19
    VCC_AXG_20
    VCC_AXG_21
    VCC_AXG_22
    VCC_AXG_23
    VCC_AXG_24
    VCC_AXG_25
    VCC_AXG_26
    VCC_AXG_27
    VCC_AXG_28
    VCC_AXG_29
    VCC_AXG_30
    VCC_AXG_31
    VCC_AXG_32
    VCC_AXG_33
    VCC_AXG_34

    4.7U_0603_6.3V6M

    0.1U_0402_16V4Z

    C1163 0.1U_0402_16V4Z

    R20
    T14
    W13
    W14
    Y12
    AA20
    AA23
    AA26
    AA28
    AB21
    AB24
    AB29
    AC20
    AC21
    AC23
    AC24
    AC26
    AC28
    AC29
    AD20
    AD23
    AD24
    AD28
    AF21
    AF26
    AA31
    AH20
    AH21
    AH23
    AH24
    AH26
    AD31
    AJ20
    AN14

    T17
    T18
    T19
    T21
    T22
    T23
    T25
    U15
    U16
    U17
    U19
    U20
    U21
    U23
    U26
    V16
    V17
    V19
    V20
    V21
    V23
    V24
    Y15
    Y16
    Y17
    Y19
    Y20
    Y21
    Y23
    Y24
    Y26
    Y28
    Y29
    AA16
    AA17
    AB16
    AB19
    AC16
    AC17
    AC19
    AD15
    AD16
    AD17
    AF16
    AF19
    AH15
    AH16
    AH17
    AH19
    AJ16
    AJ17
    AJ19
    AK16
    AK19
    AL16
    AL17
    AL19
    AL20
    AL21
    AL23
    AM15
    AM16
    AM19
    AM20
    AM21
    AM23
    AP15
    AP16
    AP17
    AP19
    AP20
    AP21
    AP23
    AP24
    AR20
    AR21
    AR23
    AR24
    AR26
    V26
    V28
    V29
    Y31

    C1162 0.1U_0402_16V4Z

    20070228 Change to +3VL

    +3VS

    C1156
    2

    0316 change value

    +3VS

    VCC_SM_1
    VCC_SM_2
    VCC_SM_3
    VCC_SM_4
    VCC_SM_5
    VCC_SM_6
    VCC_SM_7
    VCC_SM_8
    VCC_SM_9
    VCC_SM_10
    VCC_SM_11
    VCC_SM_12
    VCC_SM_13
    VCC_SM_14
    VCC_SM_15
    VCC_SM_16
    VCC_SM_17
    VCC_SM_18
    VCC_SM_19
    VCC_SM_20
    VCC_SM_21
    VCC_SM_22
    VCC_SM_23
    VCC_SM_24
    VCC_SM_25
    VCC_SM_26
    VCC_SM_27
    VCC_SM_28
    VCC_SM_29
    VCC_SM_30
    VCC_SM_31
    VCC_SM_32
    VCC_SM_33
    VCC_SM_34
    VCC_SM_35
    VCC_SM_36

    VCC SM

    AU32
    AU33
    AU35
    AV33
    AW33
    AW35
    AY35
    BA32
    BA33
    BA35
    BB33
    BC32
    BC33
    BC35
    BD32
    BD35
    BE32
    BE33
    BE35
    BF33
    BF34
    BG32
    BG33
    BG35
    BH32
    BH34
    BH35
    BJ32
    BJ33
    BJ34
    BK32
    BK33
    BK34
    BK35
    BL33
    AU30

    VCC GFX NCTF

    MCHGND1 R112
    MCHGND2 R132
    MCHGND3 R133
    MCHGND4 R122
    MCHGND5 R113
    MCHGND6 R111

    0314 add

    VCC_AXM_1
    VCC_AXM_2
    VCC_AXM_3
    VCC_AXM_4
    VCC_AXM_5
    VCC_AXM_6
    VCC_AXM_7

    VCC_13

    VCC GFX

    A3
    B2
    C1
    BL1
    BL51
    A51

    04/10 monitor NB crack


    1013 no install
    1213 install
    0129 install
    20070227 No install

    +3VS

    C794

    AL24
    AL26
    AL28
    AM26
    AM28
    AM29
    AM31
    AM32
    AM33
    AP29
    AP31
    AP32
    AP33
    AL29
    AL31
    AL32
    AR31
    AR32
    AR33

    1
    C808

    0.01U_0402_16V7K
    C810

    C1161
    0.1U_0402_16V4Z

    C1155

    C1160
    0.1U_0402_16V4Z

    C1159
    0.1U_0402_16V4Z

    C1158
    0.22U_0402_10V4Z

    C1157
    0.22U_0402_10V4Z

    10U_0805_10V4Z
    C1154

    10U_0805_10V4Z

    +1.8V

    POWER
    VSS_SCB1
    VSS_SCB2
    VSS_SCB3
    VSS_SCB4
    VSS_SCB5
    VSS_SCB6

    R30

    POWER
    330U_D2E_2.5VM_R9

    +1.05VM

    04/10 monitor NB crack

    R1475
    1
    2
    0_0603_5%

    22U_0805_6.3VAM
    C809

    T27
    T37
    U24
    U28
    V31
    V35
    AA19
    AB17
    AB35
    AD19
    AD37
    AF17
    AF35
    AK17
    AM17
    AM24
    AP26
    AP28
    AR15
    AR19
    AR28

    22U_0805_6.3VAM

    0317 change value

    VSS NCTF

    VSS_NCTF_1
    VSS_NCTF_2
    VSS_NCTF_3
    VSS_NCTF_4
    VSS_NCTF_5
    VSS_NCTF_6
    VSS_NCTF_7
    VSS_NCTF_8
    VSS_NCTF_9
    VSS_NCTF_10
    VSS_NCTF_11
    VSS_NCTF_12
    VSS_NCTF_13
    VSS_NCTF_14
    VSS_NCTF_15
    VSS_NCTF_16
    VSS_NCTF_17
    VSS_NCTF_18
    VSS_NCTF_19
    VSS_NCTF_20
    VSS_NCTF_21

    VSS SCB

    VCC_NCTF_1
    VCC_NCTF_2
    VCC_NCTF_3
    VCC_NCTF_4
    VCC_NCTF_5
    VCC_NCTF_6
    VCC_NCTF_7
    VCC_NCTF_8
    VCC_NCTF_9
    VCC_NCTF_10
    VCC_NCTF_11
    VCC_NCTF_12
    VCC_NCTF_13
    VCC_NCTF_14
    VCC_NCTF_15
    VCC_NCTF_16
    VCC_NCTF_17
    VCC_NCTF_18
    VCC_NCTF_19
    VCC_NCTF_20
    VCC_NCTF_21
    VCC_NCTF_22
    VCC_NCTF_23
    VCC_NCTF_24
    VCC_NCTF_25
    VCC_NCTF_26
    VCC_NCTF_27
    VCC_NCTF_28
    VCC_NCTF_29
    VCC_NCTF_30
    VCC_NCTF_31
    VCC_NCTF_32
    VCC_NCTF_33
    VCC_NCTF_34
    VCC_NCTF_35
    VCC_NCTF_36
    VCC_NCTF_37
    VCC_NCTF_38
    VCC_NCTF_39
    VCC_NCTF_40
    VCC_NCTF_41
    VCC_NCTF_42
    VCC_NCTF_43
    VCC_NCTF_44
    VCC_NCTF_45
    VCC_NCTF_46
    VCC_NCTF_47
    VCC_NCTF_48
    VCC_NCTF_49
    VCC_NCTF_50

    VCC NCTF

    C797

    0.1U_0402_16V4Z
    C798

    0.22U_0402_10V4Z
    C796

    0.22U_0402_10V4Z
    C803

    22U_0805_6.3VAM

    C806
    220U_D2_4VM_R15

    AB33
    AB36
    AB37
    AC33
    AC35
    AC36
    AD35
    AD36
    AF33
    AF36
    AH33
    AH35
    AH36
    AH37
    AJ33
    AJ35
    AK33
    AK35
    AK36
    AK37
    AD33
    AJ36
    AM35
    AL33
    AL35
    AA33
    AA35
    AA36
    AP35
    AP36
    AR35
    AR36
    Y32
    Y33
    Y35
    Y36
    Y37
    T30
    T34
    T35
    U29
    U31
    U32
    U33
    U35
    U36
    V32
    V33
    V36
    V37

    VCC SM LF

    U15F

    VCC_AXG_NCTF_1
    VCC_AXG_NCTF_2
    VCC_AXG_NCTF_3
    VCC_AXG_NCTF_4
    VCC_AXG_NCTF_5
    VCC_AXG_NCTF_6
    VCC_AXG_NCTF_7
    VCC_AXG_NCTF_8
    VCC_AXG_NCTF_9
    VCC_AXG_NCTF_10
    VCC_AXG_NCTF_11
    VCC_AXG_NCTF_12
    VCC_AXG_NCTF_13
    VCC_AXG_NCTF_14
    VCC_AXG_NCTF_15
    VCC_AXG_NCTF_16
    VCC_AXG_NCTF_17
    VCC_AXG_NCTF_18
    VCC_AXG_NCTF_19
    VCC_AXG_NCTF_20
    VCC_AXG_NCTF_21
    VCC_AXG_NCTF_22
    VCC_AXG_NCTF_23
    VCC_AXG_NCTF_24
    VCC_AXG_NCTF_25
    VCC_AXG_NCTF_26
    VCC_AXG_NCTF_27
    VCC_AXG_NCTF_28
    VCC_AXG_NCTF_29
    VCC_AXG_NCTF_30
    VCC_AXG_NCTF_31
    VCC_AXG_NCTF_32
    VCC_AXG_NCTF_33
    VCC_AXG_NCTF_34
    VCC_AXG_NCTF_35
    VCC_AXG_NCTF_36
    VCC_AXG_NCTF_37
    VCC_AXG_NCTF_38
    VCC_AXG_NCTF_39
    VCC_AXG_NCTF_40
    VCC_AXG_NCTF_41
    VCC_AXG_NCTF_42
    VCC_AXG_NCTF_43
    VCC_AXG_NCTF_44
    VCC_AXG_NCTF_45
    VCC_AXG_NCTF_46
    VCC_AXG_NCTF_47
    VCC_AXG_NCTF_48
    VCC_AXG_NCTF_49
    VCC_AXG_NCTF_50
    VCC_AXG_NCTF_51
    VCC_AXG_NCTF_52
    VCC_AXG_NCTF_53
    VCC_AXG_NCTF_54
    VCC_AXG_NCTF_55
    VCC_AXG_NCTF_56
    VCC_AXG_NCTF_57
    VCC_AXG_NCTF_58
    VCC_AXG_NCTF_59
    VCC_AXG_NCTF_60
    VCC_AXG_NCTF_61
    VCC_AXG_NCTF_62
    VCC_AXG_NCTF_63
    VCC_AXG_NCTF_64
    VCC_AXG_NCTF_65
    VCC_AXG_NCTF_66
    VCC_AXG_NCTF_67
    VCC_AXG_NCTF_68
    VCC_AXG_NCTF_69
    VCC_AXG_NCTF_70
    VCC_AXG_NCTF_71
    VCC_AXG_NCTF_72
    VCC_AXG_NCTF_73
    VCC_AXG_NCTF_74
    VCC_AXG_NCTF_75
    VCC_AXG_NCTF_76
    VCC_AXG_NCTF_77
    VCC_AXG_NCTF_78
    VCC_AXG_NCTF_79
    VCC_AXG_NCTF_80
    VCC_AXG_NCTF_81
    VCC_AXG_NCTF_82
    VCC_AXG_NCTF_83

    C1288

    +VCCP
    D

    VCC_1
    VCC_2
    VCC_3
    VCC_5
    VCC_4
    VCC_6
    VCC_7
    VCC_8
    VCC_9
    VCC_10
    VCC_11
    VCC_12

    VCC CORE

    U15G
    AT35
    AT34
    AH28
    AC32
    AC31
    AK32
    AJ31
    AJ28
    AH32
    AH31
    AH29
    AF32

    CRESTLINE_1p0
    R1702
    CRACK_GPIO28
    D

    CRACK_GPIO28 21,31

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    3

    Title

    Compal Electronics, Inc.


    CRESTLINE((5/6)-PWR/GND

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4

    Tuesday, March 27, 2007

    Sheet
    1

    11

    of

    55

    U15I
    A13
    A15
    A17
    A24
    AA21
    AA24
    AA29
    AB20
    AB23
    AB26
    AB28
    AB31
    AC10
    AC13
    AC3
    AC39
    AC43
    AC47
    AD1
    AD21
    AD26
    AD29
    AD3
    AD41
    AD45
    AD49
    AD5
    AD50
    AD8
    AE10
    AE14
    AE6
    AF20
    AF23
    AF24
    AF31
    AG2
    AG38
    AG43
    AG47
    AG50
    AH3
    AH40
    AH41
    AH7
    AH9
    AJ11
    AJ13
    AJ21
    AJ24
    AJ29
    AJ32
    AJ43
    AJ45
    AJ49
    AK20
    AK21
    AK26
    AK28
    AK31
    AK51
    AL1
    AM11
    AM13
    AM3
    AM4
    AM41
    AM45
    AN1
    AN38
    AN39
    AN43
    AN5
    AN7
    AP4
    AP48
    AP50
    AR11
    AR2
    AR39
    AR44
    AR47
    AR7
    AT10
    AT14
    AT41
    AT49
    AU1
    AU23
    AU29
    AU3
    AU36
    AU49
    AU51
    AV39
    AV48
    AW1
    AW12
    AW16

    VSS_1
    VSS_2
    VSS_3
    VSS_4
    VSS_5
    VSS_6
    VSS_7
    VSS_8
    VSS_9
    VSS_10
    VSS_11
    VSS_12
    VSS_13
    VSS_14
    VSS_15
    VSS_16
    VSS_17
    VSS_18
    VSS_19
    VSS_20
    VSS_21
    VSS_22
    VSS_23
    VSS_24
    VSS_25
    VSS_26
    VSS_27
    VSS_28
    VSS_29
    VSS_30
    VSS_31
    VSS_32
    VSS_33
    VSS_34
    VSS_35
    VSS_36
    VSS_37
    VSS_38
    VSS_39
    VSS_40
    VSS_41
    VSS_42
    VSS_43
    VSS_44
    VSS_45
    VSS_46
    VSS_47
    VSS_48
    VSS_49
    VSS_50
    VSS_51
    VSS_52
    VSS_53
    VSS_54
    VSS_55
    VSS_56
    VSS_57
    VSS_58
    VSS_59
    VSS_60
    VSS_61
    VSS_62
    VSS_63
    VSS_64
    VSS_65
    VSS_66
    VSS_67
    VSS_68
    VSS_69
    VSS_70
    VSS_71
    VSS_72
    VSS_73
    VSS_74
    VSS_75
    VSS_76
    VSS_77
    VSS_78
    VSS_79
    VSS_80
    VSS_81
    VSS_82
    VSS_83
    VSS_84
    VSS_85
    VSS_86
    VSS_87
    VSS_88
    VSS_89
    VSS_90
    VSS_91
    VSS_92
    VSS_93
    VSS_94
    VSS_95
    VSS_96
    VSS_97
    VSS_98
    VSS_99

    VSS

    VSS_100
    VSS_101
    VSS_102
    VSS_103
    VSS_104
    VSS_105
    VSS_106
    VSS_107
    VSS_108
    VSS_109
    VSS_110
    VSS_111
    VSS_112
    VSS_113
    VSS_114
    VSS_115
    VSS_116
    VSS_117
    VSS_118
    VSS_119
    VSS_120
    VSS_121
    VSS_122
    VSS_123
    VSS_124
    VSS_125
    VSS_126
    VSS_127
    VSS_128
    VSS_129
    VSS_130
    VSS_131
    VSS_132
    VSS_133
    VSS_134
    VSS_135
    VSS_136
    VSS_137
    VSS_138
    VSS_139
    VSS_140
    VSS_141
    VSS_142
    VSS_143
    VSS_144
    VSS_145
    VSS_146
    VSS_147
    VSS_148
    VSS_149
    VSS_150
    VSS_151
    VSS_152
    VSS_153
    VSS_154
    VSS_155
    VSS_156
    VSS_157
    VSS_158
    VSS_159
    VSS_160
    VSS_161
    VSS_162
    VSS_163
    VSS_164
    VSS_165
    VSS_166
    VSS_167
    VSS_168
    VSS_169
    VSS_170
    VSS_171
    VSS_172
    VSS_173
    VSS_174
    VSS_175
    VSS_176
    VSS_177
    VSS_178
    VSS_179
    VSS_180
    VSS_181
    VSS_182
    VSS_183
    VSS_184
    VSS_185
    VSS_186
    VSS_187
    VSS_188
    VSS_189
    VSS_190
    VSS_191
    VSS_192
    VSS_193
    VSS_194
    VSS_195
    VSS_196
    VSS_197
    VSS_198

    AW24
    AW29
    AW32
    AW5
    AW7
    AY10
    AY24
    AY37
    AY42
    AY43
    AY45
    AY47
    AY50
    B10
    B20
    B24
    B29
    B30
    B35
    B38
    B43
    B46
    B5
    B8
    BA1
    BA17
    BA18
    BA2
    BA24
    BB12
    BB25
    BB40
    BB44
    BB49
    BB8
    BC16
    BC24
    BC25
    BC36
    BC40
    BC51
    BD13
    BD2
    BD28
    BD45
    BD48
    BD5
    BE1
    BE19
    BE23
    BE30
    BE42
    BE51
    BE8
    BF12
    BF16
    BF36
    BG19
    BG2
    BG24
    BG29
    BG39
    BG48
    BG5
    BG51
    BH17
    BH30
    BH44
    BH46
    BH8
    BJ11
    BJ13
    BJ38
    BJ4
    BJ42
    BJ46
    BK15
    BK17
    BK25
    BK29
    BK36
    BK40
    BK44
    BK6
    BK8
    BL11
    BL13
    BL19
    BL22
    BL37
    BL47
    C12
    C16
    C19
    C28
    C29
    C33
    C36
    C41

    U15J
    C46
    C50
    C7
    D13
    D24
    D3
    D32
    D39
    D45
    D49
    E10
    E16
    E24
    E28
    E32
    E47
    F19
    F36
    F4
    F40
    F50
    G1
    G13
    G16
    G19
    G24
    G28
    G29
    G33
    G42
    G45
    G48
    G8
    H24
    H28
    H4
    H45
    J11
    J16
    J2
    J24
    J28
    J33
    J35
    J39

    VSS_199
    VSS_200
    VSS_201
    VSS_202
    VSS_203
    VSS_204
    VSS_205
    VSS_206
    VSS_207
    VSS_208
    VSS_209
    VSS_210
    VSS_211
    VSS_212
    VSS_213
    VSS_214
    VSS_215
    VSS_216
    VSS_217
    VSS_218
    VSS_219
    VSS_220
    VSS_221
    VSS_222
    VSS_223
    VSS_224
    VSS_225
    VSS_226
    VSS_227
    VSS_228
    VSS_229
    VSS_230
    VSS_231
    VSS_232
    VSS_233
    VSS_234
    VSS_235
    VSS_236
    VSS_237
    VSS_238
    VSS_239
    VSS_240
    VSS_241
    VSS_242
    VSS_243

    K12
    K47
    K8
    L1
    L17
    L20
    L24
    L28
    L3
    L33
    L49
    M28
    M42
    M46
    M49
    M5
    M50
    M9
    N11
    N14
    N17
    N29
    N32
    N36
    N39
    N44
    N49
    N7
    P19
    P2
    P23
    P3
    P50
    R49
    T39
    T43
    T47
    U41
    U45
    U50
    V2
    V3

    VSS_245
    VSS_246
    VSS_247
    VSS_248
    VSS_249
    VSS_250
    VSS_251
    VSS_252
    VSS_253
    VSS_254
    VSS_255
    VSS_256
    VSS_257
    VSS_258
    VSS_259
    VSS_260
    VSS_261
    VSS_262
    VSS_263
    VSS_264
    VSS_265
    VSS_266
    VSS_267
    VSS_268
    VSS_269
    VSS_270
    VSS_271
    VSS_272
    VSS_273
    VSS_274
    VSS_275
    VSS_276
    VSS_277
    VSS_278
    VSS_279
    VSS_280
    VSS_281
    VSS_282
    VSS_283
    VSS_284
    VSS_285
    VSS_286

    VSS_287
    VSS_288
    VSS_289
    VSS_290
    VSS_291
    VSS_292
    VSS_293
    VSS_294
    VSS_295
    VSS_296
    VSS_297
    VSS_298
    VSS_299
    VSS_300
    VSS_301
    VSS_302
    VSS_303
    VSS_304
    VSS_305

    W11
    W39
    W43
    W47
    W5
    W7
    Y13
    Y2
    Y41
    Y45
    Y49
    Y5
    Y50
    Y11
    P29
    T29
    T31
    T33
    R28

    VSS_306
    VSS_307
    VSS_308
    VSS_309
    VSS_310
    VSS_311
    VSS_312
    VSS_313

    AA32
    AB32
    AD32
    AF28
    AF29
    AT27
    AV25
    H50

    VSS

    CRESTLINE_1p0

    CRESTLINE_1p0
    A

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    Compal Electronics, Inc.


    CRESTLINE((6/6)-PWR/GND

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4

    Tuesday, March 27, 2007

    Sheet
    1

    12

    of

    55

    +1.8V

    +1.8V
    V_DDR_MCH_REF

    8 DDR_A_DQS#[0..7]

    DDR_A_D2
    DDR_A_D3

    DDR_A_D8
    DDR_A_D14

    Layout Note:
    Place near JP34

    DDR_A_DQS#1
    DDR_A_DQS1
    DDR_A_D9
    DDR_A_D15

    2
    4
    6
    8
    10
    12
    14
    16
    18
    20
    22
    24
    26
    28
    30
    32
    34
    36
    38
    40

    V_DDR_MCH_REF 7,14,42

    DDR_A_D6
    DDR_A_D0
    DDR_A_DM0
    DDR_A_D5
    DDR_A_D7

    C362

    DDR_A_DQS#0
    DDR_A_DQS0

    7,8 DDR_A_MA[0..14]

    VSS
    DQ4
    DQ5
    VSS
    DM0
    VSS
    DQ6
    DQ7
    VSS
    DQ12
    DQ13
    VSS
    DM1
    VSS
    CK0
    CK0#
    VSS
    DQ14
    DQ15
    VSS

    0.1U_0402_16V4Z

    DDR_A_D4
    DDR_A_D1

    8 DDR_A_DQS[0..7]

    VREF
    VSS
    DQ0
    DQ1
    VSS
    DQS0#
    DQS0
    VSS
    DQ2
    DQ3
    VSS
    DQ8
    DQ9
    VSS
    DQS1#
    DQS1
    VSS
    DQ10
    DQ11
    VSS

    C363

    8 DDR_A_DM[0..7]

    1
    3
    5
    7
    9
    11
    13
    15
    17
    19
    21
    23
    25
    27
    29
    31
    33
    35
    37
    39

    2.2U_0805_16V4Z

    JP34

    8 DDR_A_D[0..63]

    DDR_A_D13
    DDR_A_D12
    DDR_A_DM1
    M_CLK_DDR0
    M_CLK_DDR#0

    M_CLK_DDR0 7
    M_CLK_DDR#0 7

    DDR_A_D11
    DDR_A_D10

    +1.8V

    C246
    330U_D2_2.5VM_R15

    DDR_A_D18
    DDR_A_D19

    DDR_A_D29
    DDR_A_D24
    DDR_A_DM3
    DDR_A_D26
    DDR_A_D27

    DDR_CKE0_DIMMA

    7 DDR_CKE0_DIMMA
    8

    Layout Note:
    Place one cap close to every 2 pullup
    resistors terminated to +0.9VS

    DDR_A_BS#2

    DDR_A_BS2

    DDR_A_MA12
    DDR_A_MA9
    DDR_A_MA8
    DDR_A_MA5
    DDR_A_MA3
    DDR_A_MA1

    8
    8

    +0.9V

    DDR_A_MA10
    DDR_A_BS#0
    DDR_A_WE#

    DDR_A_BS0
    DDR_A_WE#

    DDR_A_CAS#
    DDR_CS1_DIMMA#

    8 DDR_A_CAS#
    7 DDR_CS1_DIMMA#

    M_ODT1

    M_ODT1

    DDR_A_D37
    DDR_A_D36

    DDR_A_DQS#4
    DDR_A_DQS4

    C227

    C234

    C241

    C252

    C268

    C274

    C281

    C279

    C272

    C257

    C250

    C239

    C229

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    DDR_A_D35
    DDR_A_D32
    DDR_A_D40
    DDR_A_D44

    DDR_A_DM5
    DDR_A_D41
    DDR_A_D46
    DDR_A_D49
    DDR_A_D48
    +0.9V

    DDR_A_MA1
    DDR_A_MA3

    RP29 56_0404_4P2R_5% RP26 56_0404_4P2R_5%


    1
    4
    4
    1 DDR_A_MA7
    2
    3
    3
    2 DDR_A_MA6

    4
    3

    Layout Note:
    Place t hes e resistor
    closely JP34,all
    trace length Max=1.5"

    RP22 56_0404_4P2R_5%
    4
    1 DDR_A_BS#2
    3
    2 DDR_CKE0_DIMMA

    DDR_A_DQS#6
    DDR_A_DQS6
    DDR_A_D54
    DDR_A_D50
    DDR_A_D61
    DDR_A_D60
    DDR_A_DM7

    RP32 56_0404_4P2R_5% RP25 56_0404_4P2R_5%


    DDR_A_RAS#
    1
    4
    4
    1 DDR_A_MA9
    DDR_CS0_DIMMA# 2
    3
    3
    2 DDR_A_MA12
    RP31 56_0404_4P2R_5% RP28 56_0404_4P2R_5%
    1
    4
    4
    1 DDR_A_MA4
    2
    3
    3
    2 DDR_A_MA2

    DDR_A_CAS#
    DDR_A_WE#

    RP33 56_0404_4P2R_5% RP30 56_0404_4P2R_5%


    1
    4
    4
    1 DDR_A_MA0
    2
    3
    3
    2 DDR_A_BS#1

    +3VM

    RP35 56_0404_4P2R_5% RP34 56_0404_4P2R_5%


    DDR_CS1_DIMMA# 2
    3
    4
    1 M_ODT0
    M_ODT1
    1
    4
    3
    2 DDR_A_MA13

    DDR_A_MA11

    56_0404_4P2R_5% RP24 56_0404_4P2R_5%


    4
    1 DDR_CKE1_DIMMA
    2
    3
    2 DDR_A_MA14

    C308

    R1742 56_0402_5%

    42
    44
    46
    48
    50
    52
    54
    56
    58
    60
    62
    64
    66
    68
    70
    72
    74
    76
    78
    80
    82
    84
    86
    88
    90
    92
    94
    96
    98
    100
    102
    104
    106
    108
    110
    112
    114
    116
    118
    120
    122
    124
    126
    128
    130
    132
    134
    136
    138
    140
    142
    144
    146
    148
    150
    152
    154
    156
    158
    160
    162
    164
    166
    168
    170
    172
    174
    176
    178
    180
    182
    184
    186
    188
    190
    192
    194
    196
    198
    200
    204

    conn@ FOX_ASOA426-M4R-TR

    SO-DIMM A
    REVERSE

    DDR_A_D20
    DDR_A_D21

    DDR_A_D23
    DDR_A_D22
    DDR_A_D28
    DDR_A_D25
    DDR_A_DQS#3
    DDR_A_DQS3
    DDR_A_D31
    DDR_A_D30
    DDR_CKE1_DIMMA
    DDR_A_MA14

    DDR_CKE1_DIMMA 7

    0612 add

    DDR_A_MA11
    DDR_A_MA7
    DDR_A_MA6
    DDR_A_MA4
    DDR_A_MA2
    DDR_A_MA0
    DDR_A_BS#1
    DDR_A_RAS#
    DDR_CS0_DIMMA#
    M_ODT0
    DDR_A_MA13

    DDR_A_BS1 8
    DDR_A_RAS# 8
    DDR_CS0_DIMMA# 7
    M_ODT0

    DDR_A_D39
    DDR_A_D38
    DDR_A_DM4
    DDR_A_D34
    DDR_A_D33
    DDR_A_D45
    DDR_A_D43
    B

    DDR_A_DQS#5
    DDR_A_DQS5
    DDR_A_D47
    DDR_A_D42
    DDR_A_D52
    DDR_A_D53
    M_CLK_DDR1
    M_CLK_DDR#1

    M_CLK_DDR1 7
    M_CLK_DDR#1 7

    DDR_A_DM6
    DDR_A_D51
    DDR_A_D55
    DDR_A_D57
    DDR_A_D56
    DDR_A_DQS#7
    DDR_A_DQS7
    DDR_A_D62
    DDR_A_D63

    Top side
    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    4

    PM_EXTTS#0 7

    DDR_A_DM2

    Compal Secret Data


    2006/02/13

    Issued Date

    C311

    Security Classification

    0612 add

    ICH_SMBDATA
    ICH_SMBCLK

    14,15,20 ICH_SMBDATA
    14,15,20 ICH_SMBCLK

    2.2U_0603_6.3V4Z

    DDR_A_BS#0
    DDR_A_MA10

    DDR_A_D59
    DDR_A_D58

    0.1U_0402_16V4Z

    DDR_A_MA5
    DDR_A_MA8

    RP27
    1
    2

    VSS
    DQ20
    DQ21
    VSS
    NC
    DM2
    VSS
    DQ22
    DQ23
    VSS
    DQ28
    DQ29
    VSS
    DQS3#
    DQS3
    VSS
    DQ30
    DQ31
    VSS
    NC/CKE1
    VDD
    NC/A15
    NC/A14
    VDD
    A11
    A7
    A6
    VDD
    A4
    A2
    A0
    VDD
    BA1
    RAS#
    S0#
    VDD
    ODT0
    NC/A13
    VDD
    NC
    VSS
    DQ36
    DQ37
    VSS
    DM4
    VSS
    DQ38
    DQ39
    VSS
    DQ44
    DQ45
    VSS
    DQS5#
    DQS5
    VSS
    DQ46
    DQ47
    VSS
    DQ52
    DQ53
    VSS
    CK1
    CK1#
    VSS
    DM6
    VSS
    DQ54
    DQ55
    VSS
    DQ60
    DQ61
    VSS
    DQS7#
    DQS7
    VSS
    DQ62
    DQ63
    VSS
    SAO
    SA1
    GND

    R453
    10K_0402_5%
    2
    1

    DDR_A_DQS#2
    DDR_A_DQS2

    VSS
    DQ16
    DQ17
    VSS
    DQS2#
    DQS2
    VSS
    DQ18
    DQ19
    VSS
    DQ24
    DQ25
    VSS
    DM3
    NC
    VSS
    DQ26
    DQ27
    VSS
    CKE0
    VDD
    NC
    BA2
    VDD
    A12
    A9
    A8
    VDD
    A5
    A3
    A1
    VDD
    A10/AP
    BA0
    WE#
    VDD
    CAS#
    NC/S1#
    VDD
    NC/ODT1
    VSS
    DQ32
    DQ33
    VSS
    DQS4#
    DQS4
    VSS
    DQ34
    DQ35
    VSS
    DQ40
    DQ41
    VSS
    DM5
    VSS
    DQ42
    DQ43
    VSS
    DQ48
    DQ49
    VSS
    NC,TEST
    VSS
    DQS6#
    DQS6
    VSS
    DQ50
    DQ51
    VSS
    DQ56
    DQ57
    VSS
    DM7
    VSS
    DQ58
    DQ59
    VSS
    SDA
    SCL
    VDDSPD
    GND

    R455
    10K_0402_5%
    2
    1

    C235

    C280

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    C242

    0.1U_0402_16V4Z

    C255

    C465

    0.1U_0402_16V4Z

    C491

    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    C473

    2.2U_0805_16V4Z

    C498

    2.2U_0805_16V4Z

    C458

    2.2U_0805_16V4Z

    41
    43
    45
    47
    49
    51
    53
    55
    57
    59
    61
    63
    65
    67
    69
    71
    73
    75
    77
    79
    81
    83
    85
    87
    89
    91
    93
    95
    97
    99
    101
    103
    105
    107
    109
    111
    113
    115
    117
    119
    121
    123
    125
    127
    129
    131
    133
    135
    137
    139
    141
    143
    145
    147
    149
    151
    153
    155
    157
    159
    161
    163
    165
    167
    169
    171
    173
    175
    177
    179
    181
    183
    185
    187
    189
    191
    193
    195
    197
    199
    203

    DDR_A_D16
    DDR_A_D17

    0317 add
    1

    Title

    Compal Electronics, Inc.


    DDRII-SODIMM SLOT1

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4

    Tuesday, March 27, 2007

    Sheet
    1

    13

    of

    55

    +1.8V

    8 DDR_B_DQS#[0..7]

    +1.8V

    8 DDR_B_D[0..63]

    V_DDR_MCH_REF

    8 DDR_B_DM[0..7]

    DDR_B_D10
    DDR_B_D11

    +1.8V

    DDR_B_D17
    DDR_B_D20

    C161

    C188

    0.1U_0402_16V4Z

    C219

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    C166

    0.1U_0402_16V4Z

    C164

    C159

    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    C247

    2.2U_0805_16V4Z

    C265

    C236

    2.2U_0805_16V4Z

    2.2U_0805_16V4Z

    DDR_B_DQS#2
    DDR_B_DQS2

    DDR_B_D18
    DDR_B_D19
    DDR_B_D28
    DDR_B_D25
    DDR_B_DM3
    DDR_B_D30
    DDR_B_D31

    DDR_CKE2_DIMMB

    7 DDR_CKE2_DIMMB

    Layout Note:
    Place one cap close to every 2 pullup
    resistors terminated to +0.9VS

    DDR_B_BS#2

    DDR_B_BS2

    DDR_B_MA12
    DDR_B_MA9
    DDR_B_MA8
    DDR_B_MA5
    DDR_B_MA3
    DDR_B_MA1

    +0.9V

    DDR_B_MA10
    DDR_B_BS#0
    DDR_B_WE#

    DDR_B_BS0
    DDR_B_WE#

    DDR_B_CAS#
    DDR_CS3_DIMMB#

    8 DDR_B_CAS#
    7 DDR_CS3_DIMMB#
    1

    M_ODT3

    M_ODT3

    DDR_B_D32
    DDR_B_D33

    2
    C177

    C163

    C218

    C173

    C199

    C210

    C183

    C220

    C213

    C197

    C186

    C179

    C176

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    8
    8

    DDR_B_DQS#4
    DDR_B_DQS4
    DDR_B_D34
    DDR_B_D35

    DDR_B_D40
    DDR_B_D41
    DDR_B_DM5
    DDR_B_D42
    DDR_B_D43

    DDR_B_BS#0
    DDR_B_MA10

    RP17 56_0404_4P2R_5% RP11 56_0404_4P2R_5%


    DDR_B_MA14
    1
    4
    4
    1
    DDR_B_MA11
    2
    3
    3
    2

    DDR_B_MA0
    DDR_B_BS#1

    RP16 56_0404_4P2R_5% RP12 56_0404_4P2R_5%


    DDR_B_MA5
    1
    4
    4
    1
    DDR_B_MA8
    2
    3
    3
    2

    4
    3

    4
    3

    RP10 56_0404_4P2R_5%
    DDR_B_MA9
    1
    DDR_B_MA12
    2

    DDR_B_D51
    DDR_B_D50
    DDR_B_D56
    DDR_B_D61
    DDR_B_DM7
    DDR_B_D59
    DDR_B_D58

    RP18 56_0404_4P2R_5% RP13 56_0404_4P2R_5%


    DDR_B_RAS#
    DDR_B_MA7
    1
    4
    4
    1
    DDR_CS2_DIMMB# 2
    DDR_B_MA6
    3
    3
    2

    56_0404_4P2R_5% RP9
    DDR_B_BS#2
    4
    1
    DDR_CKE3_DIMMB 1
    DDR_CKE2_DIMMB
    2
    3
    2
    R1743
    56_0402_5%
    56_0404_4P2R_5%

    C301
    C312

    2006/02/13

    Issued Date

    M_CLK_DDR3
    M_CLK_DDR#3

    DDR_B_D21
    DDR_B_D16

    DDR_B_D22
    DDR_B_D23
    DDR_B_D26
    DDR_B_D24
    DDR_B_DQS#3
    DDR_B_DQS3
    DDR_B_D29
    DDR_B_D27
    C

    DDR_CKE3_DIMMB

    DDR_CKE3_DIMMB 7

    DDR_B_MA14

    0612 add

    DDR_B_MA11
    DDR_B_MA7
    DDR_B_MA6
    DDR_B_MA4
    DDR_B_MA2
    DDR_B_MA0
    DDR_B_BS#1
    DDR_B_RAS#
    DDR_CS2_DIMMB#

    DDR_B_BS1 8
    DDR_B_RAS# 8
    DDR_CS2_DIMMB# 7

    M_ODT2
    DDR_B_MA13

    M_ODT2

    DDR_B_D36
    DDR_B_D37
    DDR_B_DM4
    DDR_B_D39
    DDR_B_D38
    DDR_B_D44
    DDR_B_D45

    DDR_B_DQS#5
    DDR_B_DQS5
    DDR_B_D46
    DDR_B_D47
    DDR_B_D52
    DDR_B_D53
    M_CLK_DDR2
    M_CLK_DDR#2

    M_CLK_DDR2 7
    M_CLK_DDR#2 7

    DDR_B_DM6
    DDR_B_D54
    DDR_B_D55
    DDR_B_D60
    DDR_B_D57
    DDR_B_DQS#7
    DDR_B_DQS7
    DDR_B_D62
    DDR_B_D63

    SO-DIMM B
    STANDARD

    R257
    1

    +3VM

    10K_0402_5%

    Bottom side

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    4

    PM_EXTTS#1 7

    DDR_B_DM2

    FOX_ASOA426-M4R-TR
    conn@

    M_CLK_DDR3 7
    M_CLK_DDR#3 7

    DDR_B_D14
    DDR_B_D15

    Compal Secret Data

    Security Classification

    0612 add

    42
    44
    46
    48
    50
    52
    54
    56
    58
    60
    62
    64
    66
    68
    70
    72
    74
    76
    78
    80
    82
    84
    86
    88
    90
    92
    94
    96
    98
    100
    102
    104
    106
    108
    110
    112
    114
    116
    118
    120
    122
    124
    126
    128
    130
    132
    134
    136
    138
    140
    142
    144
    146
    148
    150
    152
    154
    156
    158
    160
    162
    164
    166
    168
    170
    172
    174
    176
    178
    180
    182
    184
    186
    188
    190
    192
    194
    196
    198
    200
    204

    VSS
    DQ20
    DQ21
    VSS
    NC
    DM2
    VSS
    DQ22
    DQ23
    VSS
    DQ28
    DQ29
    VSS
    DQS3#
    DQS3
    VSS
    DQ30
    DQ31
    VSS
    NC/CKE1
    VDD
    NC/A15
    NC/A14
    VDD
    A11
    A7
    A6
    VDD
    A4
    A2
    A0
    VDD
    BA1
    RAS#
    S0#
    VDD
    ODT0
    NC/A13
    VDD
    NC
    VSS
    DQ36
    DQ37
    VSS
    DM4
    VSS
    DQ38
    DQ39
    VSS
    DQ44
    DQ45
    VSS
    DQS5#
    DQS5
    VSS
    DQ46
    DQ47
    VSS
    DQ52
    DQ53
    VSS
    CK1
    CK1#
    VSS
    DM6
    VSS
    DQ54
    DQ55
    VSS
    DQ60
    DQ61
    VSS
    DQS7#
    DQS7
    VSS
    DQ62
    DQ63
    VSS
    SAO
    SA1
    GND

    DDR_B_DM1

    R254

    0310 add

    VSS
    DQ16
    DQ17
    VSS
    DQS2#
    DQS2
    VSS
    DQ18
    DQ19
    VSS
    DQ24
    DQ25
    VSS
    DM3
    NC
    VSS
    DQ26
    DQ27
    VSS
    CKE0
    VDD
    NC
    BA2
    VDD
    A12
    A9
    A8
    VDD
    A5
    A3
    A1
    VDD
    A10/AP
    BA0
    WE#
    VDD
    CAS#
    NC/S1#
    VDD
    NC/ODT1
    VSS
    DQ32
    DQ33
    VSS
    DQS4#
    DQS4
    VSS
    DQ34
    DQ35
    VSS
    DQ40
    DQ41
    VSS
    DM5
    VSS
    DQ42
    DQ43
    VSS
    DQ48
    DQ49
    VSS
    NC,TEST
    VSS
    DQS6#
    DQS6
    VSS
    DQ50
    DQ51
    VSS
    DQ56
    DQ57
    VSS
    DM7
    VSS
    DQ58
    DQ59
    VSS
    SDA
    SCL
    VDDSPD
    GND

    10K_0402_5%

    RP19 56_0404_4P2R_5% RP15 56_0404_4P2R_5%


    DDR_B_MA4
    1
    4
    4
    1
    DDR_B_MA2
    2
    3
    3
    2
    RP23
    56_0404_4P2R_5% RP21 56_0404_4P2R_5%
    DDR_CS3_DIMMB# 2
    M_ODT2
    3
    4
    1
    M_ODT3
    DDR_B_MA13
    1
    4
    3
    2

    ICH_SMBDATA
    ICH_SMBCLK

    13,15,20 ICH_SMBDATA
    13,15,20 ICH_SMBCLK
    +3VM

    DDR_B_CAS#
    DDR_B_WE#
    A

    DDR_B_DQS#6
    DDR_B_DQS6

    0.1U_0402_16V4Z

    RP14
    1
    2

    Layout Note:
    Place t hes e resistor
    closely JP10,all
    trace length Max=1.5"

    2.2U_0603_6.3V4Z

    +0.9V

    DDR_B_MA1
    DDR_B_MA3

    DDR_B_D48
    DDR_B_D49

    41
    43
    45
    47
    49
    51
    53
    55
    57
    59
    61
    63
    65
    67
    69
    71
    73
    75
    77
    79
    81
    83
    85
    87
    89
    91
    93
    95
    97
    99
    101
    103
    105
    107
    109
    111
    113
    115
    117
    119
    121
    123
    125
    127
    129
    131
    133
    135
    137
    139
    141
    143
    145
    147
    149
    151
    153
    155
    157
    159
    161
    163
    165
    167
    169
    171
    173
    175
    177
    179
    181
    183
    185
    187
    189
    191
    193
    195
    197
    199
    203

    DDR_B_D12
    DDR_B_D13

    DDR_B_DQS#1
    DDR_B_DQS1

    DDR_B_D6
    DDR_B_D7

    DDR_B_D8
    DDR_B_D9

    DDR_B_DM0

    C90

    DDR_B_D2
    DDR_B_D3

    Layout Note:
    Place near JP10

    DDR_B_D5
    DDR_B_D4

    C89

    DDR_B_DQS#0
    DDR_B_DQS0
    D

    2
    4
    6
    8
    10
    12
    14
    16
    18
    20
    22
    24
    26
    28
    30
    32
    34
    36
    38
    40

    VSS
    DQ4
    DQ5
    VSS
    DM0
    VSS
    DQ6
    DQ7
    VSS
    DQ12
    DQ13
    VSS
    DM1
    VSS
    CK0
    CK0#
    VSS
    DQ14
    DQ15
    VSS

    0.1U_0402_16V4Z

    DDR_B_D0
    DDR_B_D1

    7,8 DDR_B_MA[0..14]

    VREF
    VSS
    DQ0
    DQ1
    VSS
    DQS0#
    DQS0
    VSS
    DQ2
    DQ3
    VSS
    DQ8
    DQ9
    VSS
    DQS1#
    DQS1
    VSS
    DQ10
    DQ11
    VSS

    2.2U_0805_16V4Z

    1
    3
    5
    7
    9
    11
    13
    15
    17
    19
    21
    23
    25
    27
    29
    31
    33
    35
    37
    39

    8 DDR_B_DQS[0..7]

    V_DDR_MCH_REF 7,13,42

    JP10

    Title

    Compal Electronics, Inc.


    DDRII-SODIMM SLOT2

    Size

    Document Number

    R ev
    0.4

    LA-3261P UMA
    Date:

    Tuesday, March 27, 2007

    Sheet
    1

    14

    of

    55

    FSLC

    FSLB

    FSLA

    CLKSEL2

    CLKSEL1

    CLKSEL0

    CPU
    MHz

    SRC
    MHz

    200

    100

    33.3

    166

    100

    33.3

    +3VM

    1
    R1066

    2
    0_1206_5% 1

    03/02 change
    2

    C1165
    10U_0805_10V4Z

    C1166
    0.1U_0402_16V4Z

    CPU Driven

    Stuff

    *(Default)

    0.1U_0402_16V4Z

    C1168
    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    R1074

    R1135

    Stuff

    R1068
    1

    R1098

    No Stuff
    Stuff

    800MHz

    No Stuff

    R1086

    R1139

    R1135
    R1128

    R1083

    R1107

    R1113

    R1098

    R1135

    R1139

    R1083

    R1086

    R1098

    R1074

    R1107

    R1113

    @
    1

    R1113

    R1128

    0_1206_5%
    2

    R1139

    R1074

    R1139

    C1172

    R1135

    0.1U_0402_16V4Z
    1

    2
    10U_0805_10V4Z

    CPU_BSEL0

    +3VM_CK505

    R1128

    R1074
    2

    39
    55

    +VCCP

    MCH_CLKSEL0 7

    @ 1K_0402_5%

    36
    49

    20 CLKSATAREQ#

    +VCCP

    CLKREQ#_B

    7
    R1098

    @ 1K_0402_5%

    1
    2
    R1107
    0_0402_5%

    CPU_BSEL1

    MCH_CLKSEL1 7

    25,30 CLK_DEBUG_PORT
    29 CLK_PCI_SIO
    30 CLK_PCI_TCG
    31 CLK_PCI_EC
    25 CLK_PCI_PCM

    2 R1692

    1
    R1693
    22_0402_5% 2
    12_0402_5% 2
    12_0402_5% 1
    12_0402_5% 1
    12_0402_5% 1

    2
    475_0402_1%
    1 R1097
    1 R1114
    2 R1140
    2 R1110
    2 R1141

    22_0402_5% 1

    18 CLK_PCI_ICH

    R1105
    1K_0402_5%

    475_0402_1%1

    NC

    VDDSRC
    VDDCPU

    1
    PCI_CLK1 3
    PCI2_TME 4
    PCI_CLK3 5
    27_SEL

    ITP_EN

    CLK_XTAL_IN

    60

    CLK_XTAL_OUT

    59

    @ R1113
    0_0402_5%

    0.1U_0402_16V4Z
    1
    C1355
    C1354

    2
    0.1U_0402_16V4Z

    64
    63

    PCI_STOP#
    CPU_STOP#

    38
    37

    VDD96_IO
    VDDPLL3_IO
    VDDSRC_IO
    CPU0
    CPU0#

    VDDSRC_IO
    VDDCPU_IO

    54
    53

    R_CPU_BCLK
    R_CPU_BCLK#

    51
    50

    R_MCH_BCLK
    R_MCH_BCLK#

    R1075
    1
    1
    R1081

    47
    46

    R_CPU_XDP R1033 1
    R_CPU_XDP#
    1
    R1143

    SRC10#
    SRC10

    35
    34

    R_PCIE_3GPLL#
    R_PCIE_3GPLL

    PCI0/CR#_A
    PCI1/CR#_B
    PCI2/TME

    20 CLK_48M_ICH

    33_0402_1%
    2

    R1128

    R1111
    1
    1
    R1115

    PCI3
    SRC11/CR#_H
    SRC11#/CR#_G

    PCI4/27_Select

    33
    32

    PCIF5/ITP_EN
    SRC9
    SRC9#

    30
    31

    X1
    X2

    R1695
    CLKREQ#_H
    R_CLKREQ#_G

    2
    2
    R1694

    R1093
    R_CLK_PCIE_MCard 1
    R_CLK_PCIE_MCard# 1
    R1095
    R14
    1
    1

    44
    43

    1
    2
    R1135
    0_0402_5%

    CPU_BSEL2

    1
    1

    MCH_CLKSEL2 7

    R1131
    1K_0402_5%

    10

    20 CLK_14M_ICH
    29 CLK_14M_SIO
    31 CLK_14M_KBC

    2
    2
    2

    R1087
    R1088
    R1089

    FSB

    57

    FSC

    62

    +1.25VM_CK505

    @ R1139

    For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#

    0_0402_5%

    For 27_SEL, 0 = Enable DOT96 & SRC1,

    FSA

    For PCI2_EN, 0 = Overclocking of CPU and SRC Allowed

    CLK_XTAL_OUT

    1 = Overclocking of CPU and SRC NOT allowed


    +3VS

    +3VS

    R1690
    10K_0402_5%
    @
    1
    R1691
    10K_0402_5%

    0_0402_5%
    0_0402_5%

    C376

    C378

    C379

    C380

    2
    2

    0_0402_5%
    0_0402_5%

    CLK_CPU_BCLK 4
    CLK_CPU_BCLK# 4
    C

    2
    2

    0_0402_5%
    0_0402_5%

    2
    2

    0_0402_5%
    0_0402_5%

    CLK_MCH_BCLK 7
    CLK_MCH_BCLK# 7
    CLK_CPU_XDP 4
    CLK_CPU_XDP# 4

    CLK_PCIE_DOCK# 33
    CLK_PCIE_DOCK 33

    2
    +3VS
    R149 10K_0402_5%
    475_0402_1%
    CPPE# 33
    475_0402_1%
    CLKREQ#_G 25
    R150 10K_0402_5%
    1
    2
    +3VS

    1
    1

    0_0402_5%
    0_0402_5%

    2
    2

    10K_0402_5%
    2
    +3VS
    2
    475_0402_1%

    27
    28

    R_MCH_3GPLL
    R_MCH_3GPLL#

    R1144
    1
    1
    R1145

    2
    2

    0_0402_5%
    0_0402_5%

    24
    25

    R _PCIE_ICH
    R_PCIE_ICH#

    R1684
    1
    1
    R1685

    2
    2

    0_0402_5%
    0_0402_5%

    21
    22

    R_PCIE_SATA
    R_PCIE_SATA#

    R1257
    1
    1
    R1259

    2
    2

    0_0402_5%
    0_0402_5%

    SRC1/SE1/27MHz_NonSS
    SRC1#/SE2/27MHz_SS

    17
    18

    SSCDREFCLK
    R1686
    SSCDREFCLK#
    R1687

    1
    1

    2
    2

    0_0402_5%
    0_0402_5%

    SRC0/DOT96
    SRC0/DOT96#

    13
    14

    R_MCH_DREFCLK
    R_MCH_DREFCLK#

    R1688
    1
    1
    R1689

    2
    2

    0_0402_5%
    0_0402_5%

    CK_PWRGD/PD#

    56

    SRC6
    SRC6#

    SRC4
    SRC4#

    R5
    R13

    REF0/FSLC/TEST_SEL

    VDDSRC_IO

    SRC3/CR#_C
    SRC3#/CR#_D

    GNDSRC

    SRC2/SATA
    SRC2#/SATA#

    1
    1

    2 0_0402_5%
    2 0_0402_5%

    CLK_PCIE_MCARD 25
    CLK_PCIE_MCARD# 25

    CLKREQ#_E 25

    0612 add for Robson

    CLK_PCIE_Rob 25
    CLK_PCIE_Rob# 25

    0612 add for Robson

    CLK_MCH_3GPLL 7
    CLK_MCH_3GPLL# 7

    CLK_PCIE_ICH 20
    CLK_PCIE_ICH# 20

    CLK_PCIE_SATA 19
    CLK_PCIE_SATA# 19

    GNDPCI
    GND48

    MCH_SSCDREFCLK 7
    MCH_SSCDREFCLK# 7

    GND
    GND
    GNDCPU

    CLK_MCH_DREFCLK 7
    CLK_MCH_DREFCLK# 7

    GNDSRC
    GNDSRC

    CK_PWRGD 20

    GNDREF

    ICS9LPRS355_TSSOP64
    * Internal Pull-Up Resistor
    ** Internal Pull-Down Resistor
    R1246
    10K_0402_5%
    @

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

    Routing the trace at least 10mil


    5

    PCI2_TME

    2
    R1247
    10K_0402_5%
    @

    C375

    Title

    Compal Electronics, Inc.


    Clock generator

    C505
    18P_0402_50V8J

    29
    58

    27_SEL

    R1108
    10K_0402_5%

    1
    1

    ITP_EN

    C509
    18P_0402_50V8J

    23

    2
    2

    R_CLK_Rob
    R_CLK_Rob#

    FSLB/TEST MODE

    R1245
    10K_0402_5%

    Y6

    15

    52

    2
    14.31818MHZ_16P

    11

    19
    +3VS

    CLK_XTAL_IN

    45

    42

    1= Enable SRC0 & 27MHz

    0529 change power plane

    USB_48MHZ/FSLA

    @ 1K_0402_5%
    33_0402_1% 1
    33_0402_1% 1
    33_0402_1% 1

    41
    40

    FSC

    R1130
    10K_0402_5%
    2
    1

    C374

    R1077

    H_STP_PCI# 20
    H_STP_CPU# 20
    R1070
    1
    1
    R1072

    SRC8/ITP
    SRC8#/ITP#

    SRC7/CR#_F
    SRC7#/CR#_E

    +VCCP

    C373

    ICH_SMBCLK 13,14,20
    ICH_SMBDATA 13,14,20

    R17
    B

    C372

    CLK_48M_ICH
    5P_0402_50V8C
    CLK_14M_ICH
    4.7P_0402_50V8C
    CLK_PCI_ICH
    4.7P_0402_50V8C
    CLK_14M_KBC
    4.7P_0402_50V8C
    CLK_14M_SIO
    4.7P_0402_50V8C
    CLK_PCI_EC
    4.7P_0402_50V8C
    CLK_PCI_TCG
    4.7P_0402_50V8C
    CLK_PCI_PCM
    4.7P_0402_50V8C
    CLK_PCI_SIO
    4.7P_0402_50V8C
    CLK_DEBUG_PORT
    5P_0402_50V8C

    48

    SCLK
    SDATA

    CPU1_F
    CPU1#_F

    2 R1117

    2
    0.1U_0402_16V4Z

    VDD_PCI
    VDD48
    VDDPLL3
    VDDREF

    0216 Delete CLRP4,CLRP5

    C1174
    2

    0.1U_0402_16V4Z

    10U_0805_10V4Z
    1
    1
    C1353

    20070301 Add CAP for WWAN issue

    1111 Add CLRP4,CLRP5 for 667/800 FSB select


    SHORT CLRP5, NO SHORT CLRP4 -- FSB 800
    SHORT CLRP4, NO SHORT CLRP5 -- FSB 667

    R1086

    FSB

    12
    20
    26

    R1079
    1K_0402_5%
    1

    0_0402_5%
    R1083

    C357

    U7
    2
    9
    16
    61

    +1.25VM_CK505

    0.1U_0402_16V4Z

    C353
    C1171

    03/02 change

    56_0402_5%
    R1078
    2.2K_0402_5%
    FSA 2
    1

    C1170

    +1.25VM_CK505

    R1083

    R1086

    Place close to U7

    C1173

    667MHz

    C1169

    +1.25VM

    R1107

    No Stuff

    C1167

    FSB Frequency Selet:


    D

    +3VM_CK505

    PCI
    MHz

    Size

    Document Number

    R ev
    0.4

    LA-3261P UMA
    Date:

    Tuesday, March 27, 2007

    Sheet
    1

    15

    of

    55

    +5VS

    1
    D_HSYNC 33

    1
    3

    Place close to docking connector

    2.2K_0402_5%
    Q46

    C352
    33

    @ 5P_0402_50V8C

    D_DDCDATA

    D_DDCDATA

    DDC1_DATA 9
    2
    G

    D_VSYNC 33

    2
    G

    D20
    @ DAN217_SC59

    D19
    DAN217_SC59

    R183

    2.2K_0402_5%

    @ 5P_0402_50V8C

    R162

    D_VSYNC

    U54
    SN74AHCT1G125GW_SOT353-5
    1
    C351

    +CRTVDD

    +3VS

    D_HSYNC

    R546
    2
    0_0603_5%

    Place close to JP2

    16
    17

    SUYIN_070912FR015S207CR
    conn@
    +CRTVDD +CRTVDD

    R2
    1
    2
    2.2K_0402_5%

    C318
    18P_0402_50V8J

    18P_0402_50V8J

    0315 add

    R545
    1
    2
    0_0603_5%

    VSYNC_G_A1

    RHU002N06_SOT323
    D_DDCCLK

    D_DDCCLK

    DDC1_CLK 9

    33

    R54 51K_0402_5%
    1
    2

    R53 51K_0402_5%
    1
    2

    BLUE_R

    5
    1

    P
    OE#

    5
    1
    M_VSYNC

    P
    OE#

    U33
    SN74AHCT1G125GW_SOT353-5
    H SYNC_G_A
    4
    Y

    M_HSYNC

    2
    0.1U_0402_16V4Z

    GREEN_R

    C316

    18P_0402_50V8J
    C317

    2
    0.1U_0402_16V4Z

    RED_R

    1
    2
    BK1608LL560-T 0603
    R543
    1
    2
    BK1608LL560-T 0603
    R544
    1
    2
    BK1608LL560-T 0603

    C310
    12P_0402_50V8C

    C370

    C314
    12P_0402_50V8C

    C313
    12P_0402_50V8C

    JP2
    6
    11
    1
    7
    12
    2
    8
    13
    3
    9
    14
    4
    10
    15
    5

    R542

    150_0402_1%
    @ R173
    +5VS

    0.1U_0402_16V4Z
    150_0402_1%

    R171
    2

    150_0402_1%

    0315 add

    C359

    C315

    @
    R174

    BLUE_R
    GREEN_R
    RED_R

    CH491D_SC59

    L_RED

    +5VS

    W=40mils

    R4
    1
    2
    2.2K_0402_5%

    1.1A_6VDC_FUSE

    33

    L_BLUE
    L_GREEN

    33
    33

    +CRTVDD

    D18

    1013 Add CRT circuit

    +RCRT_VCC
    F1

    CRT Connector

    D4
    DAN217_SC59

    Q52
    RHU002N06_SOT323

    Place close to docking connector


    layout note: D_HSYNC & D_VSYNC should be routed to docking connector then to VGA connector

    02/28 change -->solve DVI issue

    R1369
    CHB1608U301_0603
    2
    1 DVI_DVDD_2.5V
    +2.5VS
    C178

    DVI_AVDD_2.5V

    C143

    C150

    C174

    C141

    TV_COMP

    DVI_AVDD_3V

    U11
    0.1U_0402_16V4Z

    conn@

    5.6P_0402_50V8D
    C354

    SUYIN_33007SR-07T1-C

    DVI_AVDD_2.5V

    DVI_DVDD_2.5V

    9
    9

    SDVOB_INT+
    SDVOB_INT0.1U_0402_16V4Z

    C1043
    C1042

    PEG_RXP1
    PEG_RXN1

    Cl ose to JP1

    la yo u t n ote: TV-out signals should be routed to JP30 then to JP1

    9
    9

    SDVOB_R+
    SDVOB_R-

    9
    9

    SDVOB_G+
    SDVOB_G-

    9
    9

    SDVOB_B+
    SDVOB_B-

    9
    9

    32
    33
    37
    38

    SDVOB_R+
    SDVOB_R-

    40
    41

    SDVOB_G+
    SDVOB_G-

    43
    44
    46
    47

    SDVOB_CLK+
    SDVOB_CLK-

    AS
    3
    PLT_RST# 2
    DVI_VSWING 25

    7,18,22,30 PLT_RST#

    R114

    AS
    RESET#
    VSWING
    ATPG
    SCEN

    R498

    SC_PROM
    SD_PROM
    SPD
    SPC

    5
    4

    2
    2
    2
    2
    2
    2
    2
    2

    0_0603_5%
    0_0603_5%
    0_0603_5%
    0_0603_5%
    0_0603_5%
    0_0603_5%
    0_0603_5%
    0_0603_5%

    DVI_CLK- 33
    DVI_CLK+ 33
    DVI_TX0- 33
    DVI_TX0+ 33
    DVI_TX1- 33
    DVI_TX1+ 33
    DVI_TX2- 33
    DVI_TX2+ 33

    DVI_DETECT 33

    10K_0402_5%1
    10K_0402_5%1

    DVI_CLK
    DVI_DAT

    R17202
    2
    R1721

    33
    33

    +5VS

    0620 change

    SDVO_SDAT
    SDVO_SCLK

    SDVO_SDAT 7
    SDVO_SCLK 7
    C1371
    56P_0402_50V

    +2.5VS

    1226 Add C for DVI I2C

    CH7307C_LQFP48

    1
    B

    1
    1
    1
    1
    1
    1
    1
    1

    DVI_DETECT

    0830 Change to 3.9K ohm

    Compal Secret Data


    2006/02/13

    R1673
    R1674
    R1675
    R1676
    R1677
    R1678
    R1679
    R1680

    11
    10
    9
    8

    2006/07/26

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    A

    29

    R_DVI_CLKR_DVI_CLK+
    R_DVI_TX0R_DVI_TX0+
    R_DVI_TX1R_DVI_TX1+
    R_DVI_TX2R_DVI_TX2+

    SDVO_SDAT
    SDVO_SCLK

    10K_0402_5%

    Security Classification
    Issued Date

    SC_DDC
    SD_DDC

    13
    14
    16
    17
    19
    20
    22
    23

    10K_0402_5%

    DVI Transnitter

    HPDET

    SDVOB_CLK+
    SDVOB_CLK-

    1.3K_0402_1%

    TLC#
    TLC
    TDC0#
    TDC0
    TDC1#
    TDC1
    TDC2#
    TDC2

    SDVOB_B+
    SDVOB_B-

    27
    26

    R103

    SDVOB_INT+
    SDVOB_INT-

    TV_CRMA

    C369
    10U_0805_10V4Z

    2
    2
    2
    C333 C355

    TV_LUMA

    C368

    NC
    NC

    DVDD
    DVDD
    AVDD_PLL
    TVDD
    TVDD
    AVDD
    AVDD
    AVDD

    C358

    W=20 mils

    DGND
    DGND
    AGND
    AGND
    AGND
    TGND
    TGND
    AGND_PLL

    150_0402_1%

    150_0402_1%
    2

    0315 add

    @ R185
    150_0402_1%

    KC FBM-L11-201209-221LMA30T_0805
    R1368
    2
    +3VS

    DVI_AVDD_3V 1

    0.1U_0402_16V4Z
    0.1U_0402_16V4Z
    0.1U_0402_16V4Z

    7
    30
    31
    39
    45
    18
    24
    6

    @ R187

    @ R184

    AS

    1
    2
    3
    4
    5
    6
    7

    PAD

    JP1

    49

    R549

    0.1U_0402_16V4Z 0.1U_0402_16V4Z
    0.1U_0402_16V4Z 0.1U_0402_16V4Z
    0.1U_0402_16V4Z

    R497
    10K_0402_5%
    2

    R548

    COMP

    0_0603_5%
    1
    2
    0_0603_5%
    1
    2
    0_0603_5%
    1
    2

    5.6P_0402_50V8D

    9,33

    5.6P_0402_50V8D

    CRMA

    9,33

    R547

    LUMA

    9,33

    +2.5VS

    R1367
    1
    2
    +2.5VS
    KC FBM-L11-201209-221LMA30T_0805
    1
    C371
    C140
    22U_0805_6.3VAM
    2

    34
    35

    DAN217_SC59 DAN217_SC59 DAN217_SC59 +3VS


    @ D3
    @ D5
    @ D1

    12
    28
    1
    15
    21
    36
    42
    48

    Place close to JP1

    TV-Out Connector

    Title

    R144 1
    R142 1

    2 5.6K_0402_5%
    2 5.6K_0402_5%

    1113 Change to 5.6K ohm

    Compal Electronics, Inc.


    CRT & TVout Connector

    Size

    Document Number

    R ev
    0.4

    LA-3261P U MA
    Date:

    Tuesday, March 27, 2007

    Sheet
    E

    16

    of

    55

    B+_LCD

    1
    KC FBM-L11-201209-221LMA30T_1210

    B+

    2
    G

    RHU002N06_SOT323

    47K_0402_5%

    C29

    LCDVDD

    Q6
    DTC124EK_SC59

    +5VS_INV
    ALS_EN 20

    0.1U_0402_16V7K

    TXOUT_U2+ 9
    TXOUT_U2- 9

    C31
    4.7U_0805_10V4Z

    C20
    @ 4.7U_0805_10V4Z

    0216 Change C28 to 0.1uF


    3

    R502
    100K_0402_1%

    TXCLK_U+ 9
    TXCLK_U- 9

    0.1U_0402_16V4Z

    ENAVDD

    DDC2_CLK 9
    DDC2_DATA 9

    1M_0402_5%
    C28
    1
    2

    R474

    Q5

    0314 add

    TXOUT_U1+ 9
    TXOUT_U1- 9
    TXOUT_U0+ 9
    TXOUT_U0- 9

    Q53
    DTA114YKA_SC59

    TXOUT_L0- 9
    TXOUT_L0+ 9

    +3V_U43

    TXCLK_L- 9
    TXCLK_L+ 9
    9

    1
    2

    ENABLT

    U43A
    SN74LVC08APW_TSSOP14

    O
    B

    ACES_88316-4000

    10K

    @ 0_0402_5%
    1
    2

    LID_SW#

    20,32 LID_SW#

    Q36
    BSS138_SOT23

    2
    G

    R360

    7
    conn@

    +5VS_INV

    R1729

    +3VS

    +5VS

    0_0402_5%
    2

    TXOUT_L2- 9
    TXOUT_L2+ 9

    R1728 1

    47K

    +3VALW

    TXOUT_L1- 9
    TXOUT_L1+ 9

    14

    BLON_PWM

    R102

    100K_0402_5%
    0314 change

    R501
    100K_0402_1%

    BKLT_PWM

    1
    D

    +3VS

    R12

    2
    G

    100_0402_1%

    R19

    0628 change size


    L62

    2
    68P_0402_50V8J
    2
    10U_1206_25V6M
    C1376

    1 2

    40
    39
    38
    37
    36
    35
    34
    33
    32
    31
    30
    29
    28
    27
    26
    25
    24
    23
    22
    21
    20
    19
    18
    17
    16
    15
    14
    13
    12
    11
    10
    9
    8
    7
    6
    5
    4
    3
    2
    1

    +3VALW
    Q8
    AO3413_SOT23

    40
    39
    38
    37
    36
    35
    34
    33
    32
    31
    30
    29
    28
    27
    26
    25
    24
    23
    22
    21
    20
    19
    18
    17
    16
    15
    14
    13
    12
    11
    10
    9
    8
    7
    6
    5
    4
    3
    2
    1

    LCDVDD

    LCDVDD

    41
    42
    43
    44
    45
    46

    1
    C587
    1

    LCD POWER CIRCUIT

    10U_1206_25V6M

    41
    42
    43
    44
    45
    46

    20070209 Add 10uF for wavy issue


    C586
    1

    JP35

    LVDS CONN

    0_0402_5%

    BKLT_PWM

    Support 3V inverter

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/07/26

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    Compal Electronics, Inc.


    LCD CONN.

    Size

    Document Number

    R ev
    0.4

    LA-3261P U MA
    Date:

    Tuesday, March 27, 2007

    Sheet
    1

    17

    of

    55

    +3VS

    1
    R1514
    1
    R1515
    1
    R1516
    1
    R1517
    1
    R1518
    1
    R1519
    1
    R1520
    1
    R1521
    1
    R1585
    1
    R1748

    2
    8.2K_0402_5%
    2
    8.2K_0402_5%
    2
    8.2K_0402_5%
    2
    8.2K_0402_5%
    2
    8.2K_0402_5%
    2
    8.2K_0402_5%
    2
    8.2K_0402_5%
    2
    8.2K_0402_5%
    2
    10K_0402_5%
    2
    10K_0402_5%

    PCI_DEVSEL#

    1
    R1522
    1
    R1523
    1
    R1524
    1
    R1525
    1
    R1526
    1
    R10
    2
    R189
    1
    R1530
    1
    R1531
    1
    R1532
    1
    R1533

    2
    8.2K_0402_5%
    2
    8.2K_0402_5%
    2
    8.2K_0402_5%
    2
    8.2K_0402_5%
    2
    8.2K_0402_5%
    2
    8.2K_0402_5%
    1
    8.2K_0402_5%
    2
    8.2K_0402_5%
    2
    8.2K_0402_5%
    2
    8.2K_0402_5%
    2
    8.2K_0402_5%

    PCI_PIRQA#

    PCI_STOP#
    PC I_TRDY#

    25 PCI_AD[0..31]

    U26B

    PCI_FRAME#
    PCI_PLOCK#
    PCI_IR DY#
    PCI_SERR#
    PCI_PERR#
    MBAY_DET#
    MDC_DIS

    +3VS

    PCI_PIRQB#
    PCI_PIRQC#
    PCI_PIRQD#
    PCI_PIRQE#
    PCI_PIRQG#

    PCI_AD0
    PCI_AD1
    PCI_AD2
    PCI_AD3
    PCI_AD4
    PCI_AD5
    PCI_AD6
    PCI_AD7
    PCI_AD8
    PCI_AD9
    PCI_AD10
    PCI_AD11
    PCI_AD12
    PCI_AD13
    PCI_AD14
    PCI_AD15
    PCI_AD16
    PCI_AD17
    PCI_AD18
    PCI_AD19
    PCI_AD20
    PCI_AD21
    PCI_AD22
    PCI_AD23
    PCI_AD24
    PCI_AD25
    PCI_AD26
    PCI_AD27
    PCI_AD28
    PCI_AD29
    PCI_AD30
    PCI_AD31

    D20
    E19
    D19
    A20
    D17
    A21
    A19
    C19
    A18
    B16
    A12
    E16
    A14
    G16
    A15
    B6
    C11
    A9
    D11
    B12
    C12
    D10
    C7
    F13
    E11
    E13
    E12
    D8
    A6
    E8
    D6
    A3

    AD0
    AD1
    AD2
    AD3
    AD4
    AD5
    AD6
    AD7
    AD8
    AD9
    AD10
    AD11
    AD12
    AD13
    AD14
    AD15
    AD16
    AD17
    AD18
    AD19
    AD20
    AD21
    AD22
    AD23
    AD24
    AD25
    AD26
    AD27
    AD28
    AD29
    AD30
    AD31

    PCI_PIRQA#
    PCI_PIRQB#
    PCI_PIRQC#
    PCI_PIRQD#

    F9
    B5
    C5
    A10

    PIRQA#
    PIRQB#
    PIRQC#
    PIRQD#

    PIRQH#
    PCI_REQ0#
    PCI_REQ1#
    PCI_REQ2#

    25
    25

    PCI_PIRQC#
    PCI_PIRQD#

    PCI

    A4
    D7
    E18
    C18
    B19
    F18
    A11
    C10

    PCI_REQ0#
    PCI_GNT0#
    PCI_REQ1#

    C/BE0#
    C/BE1#
    C/BE2#
    C/BE3#

    C17
    E15
    F16
    E17

    PCI_CBE#0
    PCI_CBE#1
    PCI_CBE#2
    PCI_CBE#3

    IRDY#
    PAR
    PCIRST#
    DEVSEL#
    PERR#
    PLOCK#
    SERR#
    STOP#
    TRDY#
    FRAME#

    C8
    D9
    G6
    D16
    A7
    B7
    F10
    C16
    C9
    A17

    PCI_IR DY#
    PCI_PAR
    PCI_PCIRST#
    PCI_DEVSEL#
    PCI_PERR#
    PCI_PLOCK#
    PCI_SERR#
    PCI_STOP#
    PC I_TRDY#
    PCI_FRAME#

    PLTRST#
    PCICLK
    PME#

    AG24
    B10
    G7

    REQ0#
    GNT0#
    REQ1#/GPIO50
    GNT1#/GPIO51
    REQ2#/GPIO52
    GNT2#/GPIO53
    REQ3#/GPIO54
    GNT3#/GPIO55

    Interrupt I/F
    PIRQE#/GPIO2
    PIRQF#/GPIO3
    PIRQG#/GPIO4
    PIRQH#/GPIO5

    ICH8M REV 1.0

    MDC_DIS
    PCI_REQ2# 25
    PCI_GNT2# 25

    PCI_REQ2#
    PCI_GNT2#
    PCI_REQ3#
    PCI_GNT3#

    PCI_PLTRST#
    CLK_PCI_ICH
    PCI_PME#
    R1527
    1
    8.2K_0402_5%

    PCI_PIRQE#
    F8
    MBAY_DET#
    G11
    F12
    PIRQH#
    B3
    2
    1
    0_0402_5%
    R188

    PCI_CBE#0
    PCI_CBE#1
    PCI_CBE#2
    PCI_CBE#3

    25
    25
    25
    25

    PCI_IRDY# 25
    PCI_PAR 25
    PCI_DEVSEL# 25
    PCI_PERR# 25
    PCI_SERR# 25,31
    PCI_STOP# 25
    PCI_TRDY# 25
    PCI_FRAME# 25
    PCI_PLTRST# 25
    CLK_PCI_ICH 15
    PCI_PME#
    2

    +3VALW

    PCI_PIRQE# 25
    MBAY_DET# 22
    PCI_PIRQG# 25
    ACCEL_INT 25
    0301 change

    0601 change

    PCI_REQ3#

    PCI_GNT3#

    R1534
    @
    1K_0402_5%

    Boot BIOS Strap

    +3VALW

    PCI
    2

    R1051
    0_0402_5%
    1

    LPC

    @ 8.2P_0402_50V

    2 2

    R192
    100K_0402_5%

    B
    A

    U59
    Y

    PLT_RST#

    PLT_RST# 7,16,22,30

    @ TC7SH08FU_SSOP5

    R1057
    0_0402_5%
    1

    R191
    100K_0402_5%

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    PCI_RST# 22,25

    @ TC7SH08FU_SSOP5

    C1177

    PCI_RST#

    J35
    PAD-NO SHORT 2x2m

    @ 10_0402_5%
    A

    2
    R1536
    @
    1K_0402_5%

    R1535
    1K_0402_5%

    R1537

    CLK_PCI_ICH

    PCI_PLTRST#

    SPI_CS1#_R
    1

    SPI_CS1#_R

    Place closely pin B10

    20

    +3VALW

    PCI_GNT0#

    U56
    Y

    A16 swap override Strap


    Low= A16 swap override Enble
    PCI_GNT3# High= Default *

    SPI

    PCI_PCIRST#

    Boot BIOS Location

    SPI_CS#1

    PCI_GNT0#

    Title

    Compal Electronics, Inc.


    ICH8(1/4)-PCI/INT

    Size

    Document Number

    R ev
    0.4

    LA-3261P UMA
    Date:

    Tuesday, March 27, 2007

    Sheet
    1

    18

    of

    55

    +3VS
    R1538
    GATEA20

    10K_0402_5%
    R1539
    KB_RST#
    D

    10K_0402_5%

    +RTCVCC

    R1540
    1

    330K_0402_1%
    2 LAN100_SLP

    R1542
    1

    1M_0402_5%
    2 SM_INTRUDER#

    R1543
    1

    330K_0402_1%
    2 ICH_INTVRMEN

    +VCCP
    R1541

    23

    0821 Change C528 and C516 to 15PF


    ICH_RTCX2

    10M_0402_5%
    1

    C516
    15P_0402_50V8J

    23
    23
    23

    LAN_RXD0
    LAN_RXD1
    LAN_RXD2

    23
    23
    23

    LAN_TXD0
    LAN_TXD1
    LAN_TXD2

    R1549 1

    2
    CLRP2

    R1551
    R1550
    R1553
    R1554
    R1555
    R1556

    32 HDA_BITCLK_MDC
    26 HDA_BITCLK_CODEC
    26 HDA_SYNC_CODEC
    32 HDA_SYNC_MDC
    26 HDA_RST#_CODEC
    26,32 HDA_RST#_MDC
    26 HDA_SDIN0
    32 HDA_SDIN1

    32.768KHZ_12.5P_MC-146
    R1560
    10K_0402_5%
    IDE_LED#
    2
    1

    +3VS

    1
    SHORT PADS

    2 24.9_0402_1%

    33_0402_5%
    33_0402_5%
    33_0402_5%
    33_0402_5%
    33_0402_5%
    33_0402_5%

    1
    1
    1
    1
    1
    1

    2
    2
    2
    2
    2
    2

    R1558 33_0402_5% 1
    R1559 33_0402_5% 1

    32 HDA_SDOUT_MDC
    26 HDA_SDOUT_CODEC

    2
    2

    2
    1

    Q141
    RHU002N06_SOT323

    22 SATA_RXN0_C
    22 SATA_RXP0_C
    22
    SATA_TXN0
    22
    SATA_TXP0

    SATA_TXN0
    SATA_TXP0

    LAN_TXD0
    LAN_TXD1
    LAN_TXD2

    D21
    E20
    C20

    GLAN_COMP
    HDA_BITCLK
    HDA_SYNC
    HDARST#
    HDA_SDIN0
    HDA_SDIN1
    HDA_SDOUT

    AG3
    AG4
    AJ4
    AJ3
    AF2
    AF1
    AE4
    AE3

    1220 Update GPIO33 circuit


    @ 10P_0402_25V8K

    15 CLK_PCIE_SATA#
    15 CLK_PCIE_SATA

    CLK_PCIE_SATA#
    CLK_PCIE_SATA
    R1564
    1

    H_DPRSTP_R#

    AD24

    H_FERR#

    NMI
    SMI#

    AD23
    AG28

    H_NMI
    H_SMI#

    AA24

    H_STPCLK#

    AE27

    THRMTRIP_ICH#

    DCS1#
    DCS3#
    DIOR#
    DIOW#
    DDACK#
    IDEIRQ
    IORDY
    DDREQ

    56_0402_5%

    PAD

    H_DPRSTP#
    1
    0_0402_5%

    H_DPRSTP# 5,7,43

    H_PWRGOOD 5
    H_IGNNE# 4

    within 2" from R1557

    H_INIT# 4
    H_INTR 4
    KB_RST# 31

    +VCCP
    C

    H_NMI 4
    H_SMI# 4

    R1552
    56_0402_5%

    H_STPCLK# 4
    1

    R1557

    AA23

    24_0402_1%

    H_THERMTRIP# 4,7

    PD_D[0..15] 22

    V1
    U2
    V3
    T1
    V4
    T5
    AB2
    T6
    T3
    R2
    T4
    V6
    V5
    U1
    V2
    U6

    PD_D0
    PD_D1
    PD_D2
    PD_D3
    PD_D4
    PD_D5
    PD_D6
    PD_D7
    PD_D8
    PD_D9
    PD_D10
    PD_D11
    PD_D12
    PD_D13
    PD_D14
    PD_D15

    AA4
    AA1
    AB3

    PD_A0
    PD_A1
    PD_A2

    Y6
    Y5

    PD_CS1#
    PD_CS3#

    W4
    W3
    Y2
    Y3
    Y1
    W5

    placed within 2" from ICH8M

    +3VS

    PD_A0
    PD_A1
    PD_A2

    22
    22
    22

    PD_IORDY# R1562 1
    PD_IRQ R1563 1

    2 4.7K_0402_5%
    2 8.2K_0402_5%
    B

    PD_CS1# 22
    PD_CS3# 22

    PD_IOR#
    PD_IOW#
    PD_DACK#
    PD_IRQ
    PD_IORDY#
    PD_DREQ#

    PD_IOR# 22
    PD_IOW# 22
    PD_DACK# 22
    PD_IRQ 22
    PD_IORDY# 22
    PD_DREQ# 22

    BATT1

    ICH8M REV 1.0

    Within 500 mils

    56_0402_5%
    R1546
    @
    1

    H_DPSLP# 5
    H_FERR# 4

    H_INIT#
    H_INTR
    KB_RST#

    DA0
    DA1
    DA2

    56_0402_5%
    R1544
    @
    1

    GATEA20 31
    H_A20M# 4
    2
    R1548

    AE24
    AC20
    AH14

    SATA0RXN
    SATA0RXP
    SATA0TXN
    SATA0TXP

    SATARBIAS#
    SATARBIAS

    AF26
    AE26

    INIT#
    INTR
    RCIN#

    SATALED#

    CR2032 RTC BATTERY

    +RTCVCC

    JP42
    ACES_85205-0200

    +3VL

    BATT1.1

    SATA_LED# 1
    D15

    IDE_LED#
    2
    CH751H-40_SC76

    MB2_LED#1
    D16

    2
    CH751H-40_SC76

    D14
    R981 W=20mils
    2
    R976
    1
    2
    1
    W=20mils
    3
    1
    2
    W=20mils
    0_0402_5%
    DAN202U_SC70
    1K_0402_5%
    2

    IDE_LED# 25

    H_DPSLP#

    LPC_DRQ#0 29
    T39

    GATEA20
    H_A20M#

    H_IGNNE#

    DD0
    DD1
    DD2
    DD3
    DD4
    DD5
    DD6
    DD7
    DD8
    DD9
    DD10
    DD11
    DD12
    DD13
    DD14
    DD15

    SATA_CLKN
    SATA_CLKP

    LPC_DRQ0#

    AF13
    AG26

    H_PWRGOOD

    HDA_DOCK_EN#/GPIO33
    HDA_DOCK_RST#/GPIO34

    SATA2RXN
    SATA2RXP
    SATA2TXN
    SATA2TXP

    G9
    E6

    LPC_FRAME# 29,30,31

    AF27

    TP8

    SATA1RXN
    SATA1RXP
    SATA1TXN
    SATA1TXP

    LPC_FRAME#

    AG29

    STPCLK#

    HDA_SDOUT

    C4

    IGNNE#

    THRMTRIP#
    HDA_SDIN0
    HDA_SDIN1
    HDA_SDIN2
    HDA_SDIN3

    GLAN_DOCK#/GPIO13
    GLAN_COMPI
    GLAN_COMPO

    FERR#

    CPUPWRGD/GPIO49

    R88
    10K_0402_5%

    2
    MB2_LED#

    LAN_TXD0
    LAN_TXD1
    LAN_TXD2

    24.9_0402_1%

    +3VS

    R90
    10K_0402_5%

    22

    AB7
    AC6
    AG1
    AG2

    DPRSTP#
    DPSLP#

    LAN_RXD0
    LAN_RXD1
    LAN_RXD2

    HDA_RST#

    AF10

    A20GATE
    A20M#

    LAN_RSTSYNC

    HDA_BIT_CLK
    HDA_SYNC

    AJ17
    AH17
    AH15
    AD13

    LDRQ0#
    LDRQ1#/GPIO23

    GLAN_CLK

    AJ16
    AJ15

    AF6
    AF5
    AH5
    AH6

    3900P_0402_50V7K
    SATA_TXN0_C
    C1179 1
    2
    SATA_TXP0_C
    C1180 1
    2

    INTVRMEN
    LAN100_SLP

    AE14

    AE10
    AG14

    0823

    +5VS

    D25
    C25

    AE13

    3900P_0402_50V7K

    C1181

    C21
    B21
    C22

    SATA_LED#

    2
    G

    LAN_RXD0
    LAN_RXD1
    LAN_RXD2

    PAD T38

    1K_0402_5%

    +3VS

    R1561
    10_0402_5% 25,31 GREEN_BATLED#
    @

    D22

    2
    R1801

    HDA_BITCLK

    LAN_RSTSYNC

    AH21

    +1.5VS

    Y4

    B24

    24 ENERGY_DET

    GLAN_CLK

    H_DPRSTP#

    C665
    1U_0603_10V4Z

    1
    2

    C528
    15P_0402_50V8J

    GLAN_CLK

    23 LAN_RSTSYNC

    ICH_RTCX1
    R1733
    1

    ICH_INTVRMEN AF25
    LAN100_SLP
    AD21

    FWH4/LFRAME#

    LPC_AD0
    LPC_AD1
    LPC_AD2
    LPC_AD3

    CLRP1
    SHORT PADS

    INTRUDER#

    E5
    F5
    G8
    F6

    C1178
    1U_0603_10V4Z

    RTCRST#

    RTC
    LPC

    AF23

    SM_INTRUDER# AD22

    SM_INTRUDER#

    LAN / GLAN
    CPU

    20K_0402_5%

    IHDA

    +RTCVCC

    FWH0/LAD0
    FWH1/LAD1
    FWH2/LAD2
    FWH3/LAD3

    IDE

    ICH_RTCRST#

    R1545

    RTCX1
    RTCX2

    SATA

    AG25
    AF24

    LPC_AD[0..3] 29,30,31

    U26A
    ICH_RTCX1
    ICH_RTCX2

    H_FERR#

    W=20mils

    conn@

    XOR CHAIN ENTRANCE STRAP:RSVD


    +3VS
    2
    @

    R1567
    1K_0402_5%
    1

    HDA_SDOUT_CODEC

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    Compal Electronics, Inc.


    ICH8(2/4)_LAN,HD,IDE,LPC

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4

    Tuesday, March 27, 2007

    Sheet
    1

    19

    of

    55

    +3VALW

    1
    AD9

    ICH_RSVD

    AJ21

    TP3

    2 SB_SPKR
    @ 10K_0402_5%

    1
    R1723

    +3VS

    WLAN
    25
    25
    25
    25

    PCIE_RXN2
    PCIE_RXP2
    PCIE_TXN2
    PCIE_TXP2

    PCIE_RXN2 M27
    PCIE_RXP2 M26
    1 C710 PCIE_C_TXN2 L29
    1 C711 PCIE_C_TXP2 L28

    0.1U_0402_16V4Z 2
    0.1U_0402_16V4Z 2

    Q25
    RHU002N06_SOT323

    2
    0_0402_5%
    D

    100K_0402_5%
    1
    2 DPRSLPVR
    R1604

    +5VALW

    Q130@
    RHU002N06_SOT323

    1 ICH_RSVD
    R1568
    1K_0402_5%

    PM_SLP_M#

    0601 add for SM bus


    RP55
    5
    6
    7
    8

    R1609
    10K_0402_5%
    USB_OC#5 1
    2
    R1810
    10K_0402_5%
    WXMIT_OFF# 1
    2

    23

    GLAN_RXN
    GLAN_RXP
    GLAN_TXN
    GLAN_TXP

    30
    30
    30
    18

    SPI_CLK
    SPI_CS0#
    SPI_CS1#
    SPI_CS1#_R

    GLAN 23

    30
    30

    0.1U_0402_16V4Z
    0.1U_0402_16V4Z

    0.1U_0402_16V4Z
    0.1U_0402_16V4Z
    15_0402_5%
    15_0402_5%
    15_0402_5%
    0_0402_5%
    0_0402_5%

    SPI_SI
    SPI_SO

    28

    BT_OFF

    1
    R11
    1
    R3
    1
    R6

    2
    2

    PCIE_RXN5
    PCIE_RXP5
    1C1361 PCIE_C_TXN5
    1C1362 PCIE_C_TXP5

    F27
    F26
    E29
    E28

    25

    WXMIT_OFF#

    2
    2

    1
    1
    1

    1 C1186
    1 C1187

    GLAN_RXN
    GLAN_RXP
    GLAN_TXN_C
    GLAN_TXP_C

    D27
    D26
    C29
    C28

    2 R1605
    2 R1606
    2 R1607

    SPI_CLK_R
    SPI_CS0#_R
    SPI_CS1#_R

    C23
    B23
    E22

    1
    R16
    1
    R9

    USB_OC#0
    USB_OC#1
    USB_OC#2
    WXMIT_OFF#
    USB_OC#4
    USB_OC#5
    USB_OC#6
    USB_OC#7
    USB_OC#8
    USB_OC#9

    0320 change
    2 IDE_RESET#
    8.2K_0402_5%
    2 NPCI_RST#
    8.2K_0402_5%
    2 MB_PWR
    8.2K_0402_5%

    0110 Resolve +3vs leakage issue

    +3VALW

    2 ALS_EN#
    8.2K_0402_5%
    2 PM_BMBUSY#
    8.2K_0402_5%

    20070326 Add R1810

    D23
    F21
    AJ19
    AG16
    AG15
    AE15
    AF15
    AG17
    AD12
    AJ18
    AD14
    AH18

    CL_DATA0
    CL_DATA1

    F22
    AF19

    CL_DATA0

    CL_VREF0
    CL_VREF1

    D24
    AH23

    CL_VREF0_ICH
    CL_VREF1_ICH

    CL_RST#
    MEM_LED/GPIO24
    ME_EC_ALERT/GPIO10
    EC_ME_ALERT/GPIO14
    WOL_EN/GPIO9

    R1007

    CL_DATA0 7
    CL_DATA1 25

    CL_RST# 7

    AJ27
    AJ24
    AF22
    AG19

    XMIT_OFF
    CB_IN#
    R1738 1
    0_0402_5%

    XMIT_OFF 25
    2

    C1184

    PREP#

    0529 add for SB GPI


    4

    10K_0402_5%

    PREP# 1

    CH751H-40_SC76

    ISO_PREP#

    2
    5
    P

    +3VALW

    NA lead free

    0.1U_0402_16V4Z

    AMT ADP_PRES 31
    LAN_WOL_EN 34

    R1592
    453_0402_1%

    1
    R1596

    C1185

    2
    1
    R1797 10K_0402_5%
    GPIO11
    RHU002N06_SOT323
    Q140

    23,24,33 LED_LINK_LAN#

    PERN1
    PERP1
    PETN1
    PETP1

    V27
    V26
    U29
    U28

    DMI_RXN0
    DMI_RXP0
    DMI_TXN0
    DMI_TXP0

    PERN2
    PERP2
    PETN2
    PETP2

    Y27
    Y26
    W29
    W28

    DMI_RXN1
    DMI_RXP1
    DMI_TXN1
    DMI_TXP1

    PERN3
    PERP3
    PETN3
    PETP3

    AB26
    AB25
    AA29
    AA28

    DMI_RXN2
    DMI_RXP2
    DMI_TXN2
    DMI_TXP2

    PERN4
    PERP4
    PETN4
    PETP4

    AD27
    AD26
    AC29
    AC28

    DMI_RXN3
    DMI_RXP3
    DMI_TXN3
    DMI_TXP3

    DMI_CLKN
    DMI_CLKP

    T26
    T25

    CLK_PCIE_ICH#
    CLK_PCIE_ICH

    PERN5
    PERP5
    PETN5
    PETP5

    DMI_ZCOMP
    DMI_IRCOMP

    Y23
    Y24

    PERN6/GLAN_RXN
    PERP6/GLAN_RXP
    PETN6/GLAN_TXN
    PETP6/GLAN_TXP
    SPI_CLK
    SPI_CS0#
    SPI_CS1#
    SPI_MOSI
    SPI_MISO
    OC0#
    OC1#/GPIO40
    OC2#/GPIO41
    OC3#/GPIO42
    OC4#/GPIO43
    OC5#/GPIO29
    OC6#/GPIO30
    OC7#/GPIO31
    OC8#
    OC9#

    USB

    DMI0RXN
    DMI0RXP
    DMI0TXN
    DMI0TXP
    DMI1RXN
    DMI1RXP
    DMI1TXN
    DMI1TXP
    DMI2RXN
    DMI2RXP
    DMI2TXN
    DMI2TXP
    DMI3RXN
    DMI3RXP
    DMI3TXN
    DMI3TXP

    DMI_RXN0 7
    DMI_RXP0 7
    DMI_TXN0 7
    DMI_TXP0 7

    2
    +3VALW
    3.24K_0402_1%

    R1598
    453_0402_1%
    NA lead free

    0320 add

    DMI_RXN1 7
    DMI_RXP1 7
    DMI_TXN1 7
    DMI_TXP1 7

    31

    R161 1

    GPIO29

    1
    R1599

    DMI_IRCOMP
    USB20_N0
    USB20_P0
    USB20_N1
    USB20_P1

    USBRBIAS#
    USBRBIAS

    F2
    F3

    USBRBIAS

    +3VALW

    R433
    330_0402_5%

    CLK_PCIE_ICH# 15
    CLK_PCIE_ICH 15
    R1016 24.9_0402_1%
    1
    2
    USB20_N0
    USB20_P0
    USB20_N1
    USB20_P1

    Within 500 mils


    28
    28
    30
    30

    ALS_EN
    D

    ALS_EN# 2
    G

    +1.5VS

    ALS_EN

    17

    Q45
    RHU002N06_SOT323

    Right side
    Fingerprint

    0731 Elimanate glitch


    +3VS

    0809 Elimanate glitch

    25,31,34,35,43,44 PWR_GD

    USB20_N4
    USB20_P4
    USB20_N5
    USB20_P5
    USB20_N6
    USB20_P6
    USB20_N7
    USB20_P7
    USB20_N8
    USB20_P8
    USB20_N9
    USB20_P9

    USB20_N4
    USB20_P4
    USB20_N5
    USB20_P5
    USB20_N6
    USB20_P6
    USB20_N7
    USB20_P7
    USB20_N8
    USB20_P8
    USB20_N9
    USB20_P9
    1
    R1019

    28
    28
    28
    28
    28
    28
    33
    33
    25
    25
    33
    33

    Left side
    10K_0402_5%
    R1767

    Left side
    Bluetooth

    10K_0402_5%
    @ R434

    Dock1
    WWAN
    Dock2

    43

    CLK_EN#

    2
    G

    Q20
    RHU002N06_SOT323

    1
    2 CK_PWRGD
    R147 @ 0_0402_5%
    1
    R146

    2 VRMPWRGD
    0_0402_5%
    A

    22.6_0402_1%

    @ R1757
    100K_0402_5%

    @ C1365
    0.22U_0402_10V4Z

    Compal Secret Data


    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    3

    2
    10K_0402_5%

    +3VS

    DMI_RXN3 7
    DMI_RXP3 7
    DMI_TXN3 7
    DMI_TXP3 7

    G3
    G2
    H5
    H4
    H2
    H1
    J3
    J2
    K5
    K4
    K2
    K1
    L3
    L2
    M5
    M4
    M2
    M1
    N3
    N2

    2006/02/13

    Issued Date

    0_0402_5%
    2 CB_IN#

    DMI_RXN2 7
    DMI_RXP2 7
    DMI_TXN2 7
    DMI_TXP2 7

    USBP0N
    USBP0P
    USBP1N
    USBP1P
    USBP2N
    USBP2P
    USBP3N
    USBP3P
    USBP4N
    USBP4P
    USBP5N
    USBP5P
    USBP6N
    USBP6P
    USBP7N
    USBP7P
    USBP8N
    USBP8P
    USBP9N
    USBP9P

    Security Classification

    CABLE_DETECT 24

    PAD-SHORT 2x2m

    Within 500 mils


    R1008

    D57

    R1588 3.24K_0402_1%
    1
    2
    +3VM

    CL_CLK0 7
    CL_CLK1 25

    AJ23

    IN2

    F23
    AE18

    +3VM_LAN

    PM_SLP_M# 31,34,42,46

    U83
    SN74AHC1G08DCKR_SC70

    IN1

    CL_CLK0
    CL_CLK1

    CL_CLK0

    J36

    +3VS

    10K_0402_5%

    SATA
    GPIO

    PM_SLP_M#

    +3VALW

    E3

    ICH8M REV 1.0

    24,26,33

    SPI_SI_R
    SPI_SO_R

    1 R1640
    1 R1641

    2
    2

    R352 1
    2
    0_0402_5%

    +3VS

    RP56
    USB_OC#7 4
    5
    USB_OC#8 3
    6
    USB_OC#9 2
    7
    USB_OC#0 1
    8
    10K_1206_8P4R_5%
    R1608
    10K_0402_5%
    XMIT_OFF 1
    2

    H27
    H26
    G29
    G28

    23
    23

    PCIE_RXN5
    PCIE_RXP5
    PCIE_TXN5
    PCIE_TXP5

    +3VALW

    10K_1206_8P4R_5%

    2
    2

    PCIE_RXN4
    PCIE_RXP4
    1 C708 PCIE_C_TXN4
    1 C709 PCIE_C_TXP4

    4
    3
    2
    1

    0.1U_0402_16V4Z
    0.1U_0402_16V4Z

    USB_OC#6
    USB_OC#1
    USB_OC#2
    USB_OC#4

    Dock

    33
    33
    33
    33

    2
    @

    PCIE_RXN4
    PCIE_RXP4
    PCIE_TXN4
    PCIE_TXP4

    ICH_SMB_CLK 25

    1
    R1756

    25
    25
    25

    E1

    AJ25

    SLP_M#

    1
    2

    Robson
    25

    ICH_SMB_DATA 25

    13,14,15 ICH_SMBCLK
    +3VM

    K27
    K26
    J29
    J28

    13,14,15 ICH_SMBDATA

    CLPWROK

    AG27

    change GPIO pin assignment


    auto boot and leakage issue

    2.2K_0402_5% R206

    0629 connect to +3VM

    RSMRST#
    CK_PWRGD

    High -->No boot

    0316 change design

    AH20

    0612 Change GPIO pin assignment

    P27
    P26
    N29
    N28

    RHU002N06_SOT323

    2.2K_0402_5%
    R204
    Q24
    RHU002N06_SOT323

    LAN_RST#

    ICH_LOW_BAT#
    R15
    2
    1
    LOW_BAT# 31
    CH751H-40PT_SOD323-2 D22
    100K_0402_5%
    ON/OFFBTN#
    100K_0402_5%
    ON/OFFBTN# 32
    R1722
    1
    2
    03/01
    +3VL
    R1630
    1
    2
    20070228
    LAN_RST# 35
    0_0402_5%
    EC_RMRST# 1
    PM_RSMRST#
    R1586
    2
    100_0402_5%
    CK_PWRGD_R
    1
    2 CK_PWRGD
    CK_PWRGD 15
    R148
    0_0402_5%
    M_PWROK
    M_PWROK 7,35
    23,26,27,31,33,34,41,42,43,44 SLP_S3#

    U26D

    +5VS
    +3VM

    C2

    low-->default

    Q29

    SMB

    MCH_SYNC#

    1 ICH_SMB_CLK

    Clocks

    SPKR

    ICH_SMB_DATA

    ICH_SM_CLK

    4,25 ICH_SM_CLK

    TACH1/GPIO1
    TACH2/GPIO6
    TACH3/GPIO7
    GPIO8
    GPIO12
    TACH0/GPIO17
    GPIO18
    GPIO20
    SCLOCK/GPIO22
    QRT_STATE0/GPIO27
    QRT_STATE1/GPIO28
    SATACLKREQ#/GPIO35
    SLOAD/GPIO38
    SDATAOUT0/GPIO39
    SDATAOUT1/GPIO48

    AE21

    Q114
    RHU002N06_SOT323

    4,25 ICH_SM_DA

    TP7

    ICH8M REV 1.0

    2.2K_0402_5%
    R205
    Q26
    RHU002N06_SOT323
    3

    AJ22

    M CH_ICH_SYNC# AJ13

    7 MCH_ICH_SYNC#
    ICH_RSVD

    ICH_SM_DA

    VRMPWRGD

    BATLOW#
    PWRBTN#

    HDD_HALTLED2
    G

    PM_PWROK 7,31,45
    1
    2 R1583
    10K_0402_5%
    DPRSLPVR 7,43

    +3VS

    2.2K_0402_5% R207

    AJ20

    SB_SPKR

    SB_SPKR

    DPRSLPVR

    26

    PM_PWROK

    AJ14

    2 S4_STATE#
    10K_0402_5%

    1
    R1631

    AE23

    HDD_HALTLED# 25

    0105 For LED issue

    S4_STATE# 28

    DOCK_ID

    PWROK
    DPRSLPVR/GPIO16

    23,26,27,31,33,34,41,42,43,44
    34,42
    34,42

    0821

    33

    WAKE#
    SERIRQ
    THRM#

    AJ8
    RUNSCI_EC#
    AJ9
    ISO_PREP#
    AH9
    AE16
    LAN_PHYPC_R AC19
    1
    ALS_EN#
    @ R349
    AG8
    GPIO18 AH12
    1
    GPIO20 AE11
    R1781
    0901
    GPIO22 AG10
    1
    2
    R1632
    AH25
    PAD T48
    Cap_RST#_SB AD16
    8.2K_0402_5%
    32 Cap_RST#_SB
    CLKSATAREQ# AG13
    15 CLKSATAREQ#
    GPIO38 AF9
    2
    1
    GPIO39 AJ11
    R1591 @ 0_0402_5%
    IDE_RESET# AD10
    22 IDE_RESET#

    +3VS

    change value

    2 XDP_DBRESET#
    1K_0402_5%

    1
    R1589

    ICH_PCIE_WAKE# AE17
    SIRQ
    AF12
    THERM_SCI#
    AC13

    4,44
    OCP#
    31 RUNSCI_EC#
    33
    ISO_PREP#
    17,32 LID_SW#
    2
    0_0402_5%
    2 SPI_CS1#
    0_0402_5%

    23 LAN_PHYPC

    2 LAN_PHYPC
    10K_0402_5% 0622

    1
    R1603

    CLKRUN#/GPIO32

    SLP_S3#
    SLP_S4#
    SLP_S5#

    ICH _RI#
    2
    10K_0402_5%

    STP_PCI#/GPIO15
    STP_CPU#/GPIO25

    @ 4.7P_0402_50V8C

    T14 PAD

    1
    R1597

    S4_STATE#

    C1183

    2 ICH_PCIE_WAKE#
    1K_0402_5%

    AH27

    @ 4.7P_0402_50V8C

    1
    R1584

    S4_STATE#/GPIO26

    C1182

    0612 Change GPIO pin assignment


    0825 Change GPIO pin assignment

    SLP_S3#
    SLP_S4#
    SLP_S5#

    SMBALERT#/GPIO11

    AE20
    AG18

    1
    2 VRMPWRGD
    @ R145
    0_0402_5%
    SST_CTL
    PAD T15

    VGATE

    AG23
    AF21
    AD18

    SUSCLK

    @ 10_0402_5%

    1 ICH_LOW_BAT#
    8.2K_0402_5%

    7,31

    AG22

    AH11

    25,29,30,31 PM_CLKRUN#

    ICH_SUSCLK

    SLP_S3#
    SLP_S4#
    SLP_S5#

    CLK_14M_ICH 15
    CLK_48M_ICH 15

    D3

    BMBUSY#/GPIO0

    R1575

    @ 10_0402_5%

    H_STP_PCI#
    R_STP_CPU#

    1
    0_0402_5%

    CLK_14M_ICH

    R1574

    1
    2
    R179

    25 ICH_PCIE_WAKE#
    25,29,30,31 SIRQ
    4
    THERM_SCI#

    LID_SW#
    2
    10K_0402_5%

    R1594

    H_STP_PCI#
    H_STP_CPU#

    0718 INSTALL R179

    1
    R1593

    15
    15

    SUS_STAT#/LPCPD#
    SYS_RESET#

    PM_BMBUSY# AG12
    GPIO11

    2 LINKALERT#
    @ 10K_0402_5%

    1
    R1587

    XDP_DBRESET#

    7 PM_BMBUSY#

    NPCI_RST# 29,31

    GPIO37
    CLK_14M_ICH
    CLK_48M_ICH

    AG9
    G5

    +3VALW

    MB_PWR 22

    HDD_HALTLED

    R1590

    30 LPC_PD#
    4 XDP_DBRESET#

    10K_0402_5%
    @ R1581

    F4
    AD15

    CLK14
    CLK48

    AJ12
    AJ10
    AF11
    AG11

    OCP#
    2
    10K_0402_5%

    10K_0402_5%
    @ R1580

    RI#

    PCI-Express
    Direct Media Interface

    2 GPIO20
    8.2K_0402_5%

    AF17

    SPI

    1
    R1617

    ICH _RI#

    SATA0GP/GPIO21
    SATA1GP/GPIO19
    SATA2GP/GPIO36
    SATA3GP/GPIO37

    SYS
    GPIO

    R1602

    CL_RST#1

    SMBCLK
    SMBDATA
    LINKALERT#
    SMLINK0
    SMLINK1

    Power MGT

    2 GPIO22
    8.2K_0402_5%

    U26C
    ICH_SMB_CLK
    AJ26
    ICH_SMB_DATA AD19
    LINKALERT#
    AG21
    ME_EC_CLK1
    AC17
    ME_EC_DATA1
    AE19

    +3VM
    2

    2 GPIO18
    8.2K_0402_5%

    25

    Place closely pin AG9

    CLK_48M_ICH

    1101 For auto boot issue

    2.2K_0402_5%

    31 ME_EC_CLK1
    31 ME_EC_DATA1

    1
    R1601

    0320 add

    2.2K_0402_5%

    R1573

    PM_RSMRST# 31

    R1571

    MISC
    GPIO
    Controller Link

    2 GPIO37
    8.2K_0402_5%

    10K_0402_5%
    1

    2 CLKSATAREQ#
    10K_0402_5%

    R1595

    +3VALW

    R1572

    1
    R1600
    D

    10K_0402_5%

    2 THERM_SCI#
    8.2K_0402_5%

    @ 1
    R1582

    R1570

    1
    R1579

    2 GPIO39
    10K_0402_5%

    R1578

    Place closely pin G5

    0316 change design


    +3VALW

    R1569 10K_0402_5%
    1
    2
    PM_RSMRST#

    2 PM_CLKRUN#
    8.2K_0402_5%

    R1576

    2 SIRQ
    10K_0402_5%

    0.1U_0402_16V4Z

    +3VS

    Title

    Compal Electronics, Inc.


    ICH8(3/4)_PM,USB,GPIO

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4

    Tuesday, March 27, 2007

    Sheet
    1

    20

    of

    55

    U26E

    1U_0603_10V4Z

    VCC1_5_A[06]
    VCC1_5_A[07]
    VCC1_5_A[08]
    VCC1_5_A[09]
    VCC1_5_A[10]

    AC10
    AC9

    VCC1_5_A[11]
    VCC1_5_A[12]
    VCC1_5_A[13]
    VCC1_5_A[14]

    G12
    G17
    H7

    VCC1_5_A[15]
    VCC1_5_A[16]
    VCC1_5_A[17]

    VCCSUS1_5[1]

    0.1U_0402_16V4Z

    F1
    L6
    L7
    M6
    M7

    2
    +1.5VS

    0316 change design

    VCC1_5_A[25]

    F17
    G18

    VCCLAN1_05[1]
    VCCLAN1_05[2]

    R1365
    1
    C1224
    10U_0805_10V4Z

    A24
    4.7U_0805_10V4Z
    2
    A26
    1 +1.5VS
    A27
    1
    CHB1608U301_0603
    B26
    C1225
    B27
    2
    C1228
    B28
    2
    0316 change design
    B25
    +3VS

    VCCGLANPLL

    R1371

    VCCGLAN1_5[1]
    VCCGLAN1_5[2]
    VCCGLAN1_5[3]
    VCCGLAN1_5[4]
    VCCGLAN1_5[5]
    VCCGLAN3_3

    GLAN POWER

    +1.5VS

    VCCLAN3_3[1]
    VCCLAN3_3[2]

    CHB1608U301_0603
    2

    1
    2

    W23

    F19
    G20

    2.2U_0603_6.3V4Z

    C1223
    0.1U_0402_16V4Z

    VCC_LAN1_05_INT_ICH_1
    VCC_LAN1_05_INT_ICH_2

    T30
    T31

    VCC1_5_A[20]
    VCC1_5_A[21]
    VCC1_5_A[22]
    VCC1_5_A[23]
    VCC1_5_A[24]

    A8
    B15
    B18
    B4
    B9
    C15
    D13
    D5
    E10
    E7
    F11

    +3VS

    J6
    AF20

    T28
    T29
    AC16 VCCSUS1_5_ICH_1
    T17
    VCCSUS1_5_ICH_2
    J7
    T18
    C3 0.1U_0402_16V4Z

    VCCSUS3_3[07]
    VCCSUS3_3[08]
    VCCSUS3_3[09]
    VCCSUS3_3[10]
    VCCSUS3_3[11]
    VCCSUS3_3[12]
    VCCSUS3_3[13]
    VCCSUS3_3[14]
    VCCSUS3_3[15]
    VCCSUS3_3[16]
    VCCSUS3_3[17]
    VCCSUS3_3[18]
    VCCSUS3_3[19]

    P6
    P7
    C1
    N7
    P1
    P2
    P3
    P4
    P5
    R1
    R3
    R5
    R6

    VCCCL1_5

    A22
    F20
    G21

    +3VALW

    C1214
    2

    C1215
    2
    +3VALW

    04/10 monitor SB crack

    +3VALW

    1013 no install
    1

    1213 Install
    C1222

    20070227 No install
    2

    4.7U_0603_6.3V6M
    ICH8M REV 1.0
    +3VS

    @ R1716
    T19

    CRACK_GPIO28

    100K_0402_5%

    1U_0603_10V4Z 1
    +3VM
    2

    ICH GND3

    @ Q124
    RHU002N06_SOT323

    ICH GND4

    2
    G
    S

    CRACK_GPIO28
    @ R1717
    D

    ICH GND2

    2
    G

    @ Q125
    RHU002N06_SOT323

    +3VS

    1213 no install
    20070227 Install

    20070228 Change to +3VL

    CRACK_GPIO28
    @ R1718

    @ R1719
    100K_0402_5%
    D
    ICH GND1

    2
    G

    @ Q126
    RHU002N06_SOT323

    2
    G

    @ Q127
    RHU002N06_SOT323

    @ R1715

    CRACK_GPIO28 11,31

    ICH8M REV 1.0

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    +3VL

    +3VS

    ICH GND1 1
    A1
    2
    R138
    0_0402_5%
    A2
    A28
    A29 ICH GND2 1
    2
    R152
    0_0402_5%
    AH1
    AH29
    AJ1 ICH GND3
    1
    2
    R153
    0_0402_5%
    AJ2
    AJ28
    AJ29 ICH GND4
    1
    2
    R137
    0_0402_5%
    B1
    B29

    VSS_NCTF[01]
    VSS_NCTF[02]
    VSS_NCTF[03]
    VSS_NCTF[04]
    VSS_NCTF[05]
    VSS_NCTF[06]
    VSS_NCTF[07]
    VSS_NCTF[08]
    VSS_NCTF[09]
    VSS_NCTF[10]
    VSS_NCTF[11]
    VSS_NCTF[12]

    +3VS

    G22 VCCCL1_05_ICH

    VCCCL3_3[1]
    VCCCL3_3[2]

    +3VS
    1

    0.1U_0402_16V4Z
    1

    AD11

    AC18
    AC21
    AC22
    AG20
    AH28

    0.1U_0402_16V4Z

    AC12

    VCCSUS3_3[02]
    VCCSUS3_3[03]
    VCCSUS3_3[04]
    VCCSUS3_3[05]
    VCCSUS3_3[06]

    VCCCL1_05

    C1218

    C1220

    VCCUSBPLL

    USB CORE

    0.1U_0402_16V4Z

    +3VM

    VCC1_5_A[18]
    VCC1_5_A[19]

    C1207

    C1217

    +1.5VS
    1

    VCCSUS1_5[2]
    VCCSUS3_3[01]

    D1
    C1219

    VCCSUSHDA
    VCCSUS1_05[1]
    VCCSUS1_05[2]

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z

    AA5
    AA6

    AC7
    AD7
    +1.5VS

    VCCHDA

    100K_0402_5%
    1 1
    2

    C1216

    AC1
    AC2
    AC3
    AC4
    AC5

    ATX

    +1.5VS
    B

    VCC3_3[14]
    VCC3_3[15]
    VCC3_3[16]
    VCC3_3[17]
    VCC3_3[18]
    VCC3_3[19]
    VCC3_3[20]
    VCC3_3[21]
    VCC3_3[22]
    VCC3_3[23]
    VCC3_3[24]

    C1213
    1U_0603_10V4Z

    VCC1_5_A[01]
    VCC1_5_A[02]
    VCC1_5_A[03]
    VCC1_5_A[04]
    VCC1_5_A[05]

    K7
    L1
    L13
    L15
    L26
    L27
    L4
    L5
    M12
    M13
    M14
    M15
    M16
    M17
    M23
    M28
    M29
    M3
    N1
    N11
    N12
    N13
    N14
    N15
    N16
    N17
    N18
    N26
    N27
    N4
    N5
    N6
    P12
    P13
    P14
    P15
    P16
    P17
    P23
    P28
    P29
    R11
    R12
    R13
    R14
    R15
    R16
    R17
    R18
    R28
    R4
    T12
    T13
    T14
    T15
    T16
    T17
    T2
    U12
    U13
    U14
    U15
    U16
    U17
    U23
    U26
    U27
    U3
    U5
    V13
    V15
    V28
    V29
    W2
    W26
    W27
    Y28
    Y29
    Y4
    AB4
    AB23
    AB5
    AB6
    AD5
    U4
    W24

    VSS[099]
    VSS[100]
    VSS[101]
    VSS[102]
    VSS[103]
    VSS[104]
    VSS[105]
    VSS[106]
    VSS[107]
    VSS[108]
    VSS[109]
    VSS[110]
    VSS[111]
    VSS[112]
    VSS[113]
    VSS[114]
    VSS[115]
    VSS[116]
    VSS[117]
    VSS[118]
    VSS[119]
    VSS[120]
    VSS[121]
    VSS[122]
    VSS[123]
    VSS[124]
    VSS[125]
    VSS[126]
    VSS[127]
    VSS[128]
    VSS[129]
    VSS[130]
    VSS[131]
    VSS[132]
    VSS[133]
    VSS[134]
    VSS[135]
    VSS[136]
    VSS[137]
    VSS[138]
    VSS[139]
    VSS[140]
    VSS[141]
    VSS[142]
    VSS[143]
    VSS[144]
    VSS[145]
    VSS[146]
    VSS[147]
    VSS[148]
    VSS[149]
    VSS[150]
    VSS[151]
    VSS[152]
    VSS[153]
    VSS[154]
    VSS[155]
    VSS[156]
    VSS[157]
    VSS[158]
    VSS[159]
    VSS[160]
    VSS[161]
    VSS[162]
    VSS[163]
    VSS[164]
    VSS[165]
    VSS[166]
    VSS[167]
    VSS[168]
    VSS[169]
    VSS[170]
    VSS[171]
    VSS[172]
    VSS[173]
    VSS[174]
    VSS[175]
    VSS[176]
    VSS[177]
    VSS[178]
    VSS[179]
    VSS[180]
    VSS[181]
    VSS[182]
    VSS[183]
    VSS[184]

    10U_0805_10V4Z

    C1212

    C1211

    1U_0603_10V4Z

    VCCSATAPLL

    AE7
    AF7
    AG7
    AH7
    AJ7

    +1.5VS

    C1210

    ARX

    0316 change design

    AA3
    U7
    V7
    W1
    W6
    W7
    Y7

    C1209

    CHB1608U301_0603

    AJ6

    VCC3_3[07]
    VCC3_3[08]
    VCC3_3[09]
    VCC3_3[10]
    VCC3_3[11]
    VCC3_3[12]
    VCC3_3[13]

    +3VS

    C1208
    0.1U_0402_16V4Z

    AC8
    AD8
    AE8
    AF8

    0.1U_0402_16V4Z
    0.1U_0402_16V4Z

    +1.5VS

    VCC3_3[03]
    VCC3_3[04]
    VCC3_3[05]
    VCC3_3[06]

    (DMI)

    C1205

    VSS[001]
    VSS[002]
    VSS[003]
    VSS[004]
    VSS[005]
    VSS[006]
    VSS[007]
    VSS[008]
    VSS[009]
    VSS[010]
    VSS[011]
    VSS[012]
    VSS[013]
    VSS[014]
    VSS[015]
    VSS[016]
    VSS[017]
    VSS[018]
    VSS[019]
    VSS[020]
    VSS[021]
    VSS[022]
    VSS[023]
    VSS[024]
    VSS[025]
    VSS[026]
    VSS[027]
    VSS[028]
    VSS[029]
    VSS[030]
    VSS[031]
    VSS[032]
    VSS[033]
    VSS[034]
    VSS[035]
    VSS[036]
    VSS[037]
    VSS[038]
    VSS[039]
    VSS[040]
    VSS[041]
    VSS[042]
    VSS[043]
    VSS[044]
    VSS[045]
    VSS[046]
    VSS[047]
    VSS[048]
    VSS[049]
    VSS[050]
    VSS[051]
    VSS[052]
    VSS[053]
    VSS[054]
    VSS[055]
    VSS[056]
    VSS[057]
    VSS[058]
    VSS[059]
    VSS[060]
    VSS[061]
    VSS[062]
    VSS[063]
    VSS[064]
    VSS[065]
    VSS[066]
    VSS[067]
    VSS[068]
    VSS[069]
    VSS[070]
    VSS[071]
    VSS[072]
    VSS[073]
    VSS[074]
    VSS[075]
    VSS[076]
    VSS[077]
    VSS[078]
    VSS[079]
    VSS[080]
    VSS[081]
    VSS[082]
    VSS[083]
    VSS[084]
    VSS[085]
    VSS[086]
    VSS[087]
    VSS[088]
    VSS[089]
    VSS[090]
    VSS[091]
    VSS[092]
    VSS[093]
    VSS[094]
    VSS[095]
    VSS[096]
    VSS[097]
    VSS[098]

    R1366

    0.1U_0402_16V4Z +3VS
    (SATA)
    1
    +3VS

    AD2

    0.1U_0402_16V4Z

    0.1U_0402_16V4Z +3VS
    1

    AF29

    1
    2

    C1200

    VCC3_3[02]

    +VCCP

    C1204

    20 mils
    1

    VCC3_3[01]

    0317 change value

    0.1U_0402_16V4Z
    C1203

    ICH_V5REF_SUS

    AC23
    AC24

    C1202

    CH751H-40_SC76

    V_CPU_IO[1]
    V_CPU_IO[2]

    +1.25VS

    0.1U_0402_16V4Z

    D56

    VCC_DMI[1]
    VCC_DMI[2]

    AE28
    AE29

    0316 change design

    4.7U_0603_6.3V6M

    R1611
    10_0402_5%

    R29

    C1201

    VCCA3GP

    +5VALW +3VALW

    VCCDMIPLL

    +1.5VS

    10U_0805_10V4Z

    0.1U_0402_16V4Z

    C1190

    22U_0805_6.3VAM

    C1198

    C1199

    100K_0402_5%

    ICH_V5REF_RUN

    CHB1608U301_0603

    R1370
    0.01U_0402_16V7K

    20 mils

    0.1U_0402_16V4Z

    100K_0402_5%
    1
    2

    2
    2.2U_0603_6.3V4Z

    VCC1_5_B[01]
    VCC1_5_B[02]
    VCC1_5_B[03]
    VCC1_5_B[04]
    VCC1_5_B[05]
    VCC1_5_B[06]
    VCC1_5_B[07]
    VCC1_5_B[08]
    VCC1_5_B[09]
    VCC1_5_B[10]
    VCC1_5_B[11]
    VCC1_5_B[12]
    VCC1_5_B[13]
    VCC1_5_B[14]
    VCC1_5_B[15]
    VCC1_5_B[16]
    VCC1_5_B[17]
    VCC1_5_B[18]
    VCC1_5_B[19]
    VCC1_5_B[20]
    VCC1_5_B[21]
    VCC1_5_B[22]
    VCC1_5_B[23]
    VCC1_5_B[24]
    VCC1_5_B[25]
    VCC1_5_B[26]
    VCC1_5_B[27]
    VCC1_5_B[28]
    VCC1_5_B[29]
    VCC1_5_B[30]
    VCC1_5_B[31]
    VCC1_5_B[32]
    VCC1_5_B[33]
    VCC1_5_B[34]
    VCC1_5_B[35]
    VCC1_5_B[36]
    VCC1_5_B[37]
    VCC1_5_B[38]
    VCC1_5_B[39]
    VCC1_5_B[40]
    VCC1_5_B[41]
    VCC1_5_B[42]
    VCC1_5_B[43]
    VCC1_5_B[44]
    VCC1_5_B[45]
    VCC1_5_B[46]

    10U_0805_10V4Z

    AA25
    AA26
    AA27
    AB27
    AB28
    AB29
    D28
    D29
    E25
    E26
    E27
    F24
    F25
    G24
    H23
    H24
    J23
    J24
    K24
    K25
    L23
    L24
    L25
    M24
    M25
    N23
    N24
    N25
    P24
    P25
    R24
    R25
    R26
    R27
    T23
    T24
    T27
    T28
    T29
    U24
    U25
    V23
    V24
    V25
    W25
    Y25

    C1193

    C1197

    CH751H-40_SC76
    1

    100_0402_5%

    C1196

    D55

    C1195

    C1192

    R1610

    220U_D2_4VM
    C1194

    +3VS
    2

    +5VS

    +
    2

    V5REF_SUS

    A13
    B13
    C13
    C14
    D14
    E14
    F14
    G14
    L11
    L12
    L14
    L16
    L17
    L18
    M11
    M18
    P11
    P18
    T11
    T18
    U11
    U18
    V11
    V12
    V14
    V16
    V17
    V18

    C1206

    CHB1608U301_0603

    V5REF[1]
    V5REF[2]

    G4

    VCC1_05[01]
    VCC1_05[02]
    VCC1_05[03]
    VCC1_05[04]
    VCC1_05[05]
    VCC1_05[06]
    VCC1_05[07]
    VCC1_05[08]
    VCC1_05[09]
    VCC1_05[10]
    VCC1_05[11]
    VCC1_05[12]
    VCC1_05[13]
    VCC1_05[14]
    VCC1_05[15]
    VCC1_05[16]
    VCC1_05[17]
    VCC1_05[18]
    VCC1_05[19]
    VCC1_05[20]
    VCC1_05[21]
    VCC1_05[22]
    VCC1_05[23]
    VCC1_05[24]
    VCC1_05[25]
    VCC1_05[26]
    VCC1_05[27]
    VCC1_05[28]

    C1229

    40 mils

    ICH_V5REF_SUS
    10U_0805_10V4Z

    CORE

    +1.5VS

    VCCRTC

    A16
    T7

    VCCP_CORE

    R1372

    0.1U_0402_16V4Z

    U26F
    AD25

    ICH_V5REF_RUN

    A23
    A5
    AA2
    AA7
    A25
    AB1
    AB24
    AC11
    AC14
    AC25
    AC26
    AC27
    AD17
    AD20
    AD28
    AD29
    AD3
    AD4
    AD6
    AE1
    AE12
    AE2
    AE22
    AD1
    AE25
    AE5
    AE6
    AE9
    AF14
    AF16
    AF18
    AF3
    AF4
    AG5
    AG6
    AH10
    AH13
    AH16
    AH19
    AH2
    AF28
    AH22
    AH24
    AH26
    AH3
    AH4
    AH8
    AJ5
    B11
    B14
    B17
    B2
    B20
    B22
    B8
    C24
    C26
    C27
    C6
    D12
    D15
    D18
    D2
    D4
    E21
    E24
    E4
    E9
    F15
    E23
    F28
    F29
    F7
    G1
    E2
    G10
    G13
    G19
    G23
    G25
    G26
    G27
    H25
    H28
    H29
    H3
    H6
    J1
    J25
    J26
    J27
    J4
    J5
    K23
    K28
    K29
    K3
    K6

    +VCCP

    IDE

    PCI

    20 mils

    VCCPSUS

    VCCPUSB

    C1189
    0.1U_0402_16V4Z

    C1188
    0.1U_0402_16V4Z

    +RTCVCC

    Title

    Compal Electronics, Inc.


    ICH8(4/4)_POWER&GND

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4

    Tuesday, March 27, 2007

    Sheet
    1

    21

    of

    55

    Multi Bay II connector

    +3V_U43
    1

    3.3V
    3.3V
    3.3V
    GND
    GND
    GND
    5V
    5V
    5V
    GND
    Rsv
    GND
    12V
    12V
    12V

    P1
    P2
    P3
    P4
    P5
    P6
    P7
    P8
    P9
    P10
    P11
    P12
    P13
    P14
    P15

    SATA_TXP0 19
    SATA_TXN0 19
    SATA_RXN0
    SATA_RXP0

    3900P_0402_50V7K
    3900P_0402_50V7K

    PLT_RST_B# 2
    R1036

    2 C474
    2 C475

    1
    1

    SATA_RXN0_C 19
    SATA_RXP0_C 19
    18,25 PCI_RST#

    1
    0_0402_5%

    10

    O
    B

    2
    R1037

    conn@ JP5

    C641 0.1U_0402_16V4Z

    R301
    2

    1
    2
    3
    4
    5
    6
    7
    8
    9
    10
    11
    12
    13
    14
    15
    16
    17
    18
    19
    20
    21
    22
    23
    24
    25
    26
    27
    28
    29
    30
    31
    32
    33
    34
    35
    36
    37
    38
    39
    40
    41
    42
    43
    44
    45
    46
    47
    48
    49
    50
    51
    52
    53
    54

    1 ODD_RST#
    33_0402_5%

    U43C
    SN74LVC08APW_TSSOP14

    1
    @ 0_0402_5%

    close SATA connector

    1U_0402_10V4Z
    10U_0805_10V4Z

    0.1U_0402_16V4Z

    +5VS
    1

    1
    C1235

    C1232

    C1234

    C1236

    C1233

    boss
    boss

    0.1U_0402_16V4Z

    24
    23

    GND
    GND

    14
    9

    S1
    S2
    S3
    S4
    S5
    S6
    S7

    GND
    RX+
    RXGND
    TXTX+
    GND
    D

    26
    25

    IDE_RESET#

    conn@

    20
    JP45

    1000P_0402_50V7K

    OCTEK_SAT-22DD1G

    04/10 change footprint


    +3VS
    1

    RR72
    4.7K_0402_5%

    18

    MBAY_DET#
    1

    MBAY_DET#
    C628
    0.1U_0402_16V4Z

    55
    56
    57
    58

    GND
    GND
    GND
    GND

    1
    2
    3
    4
    5
    6
    7
    8
    9
    10
    11
    12
    13
    14
    15
    16
    17
    18
    19
    20
    21
    22
    23
    24
    25
    26
    27
    28
    29
    30
    31
    32
    33
    34
    35
    36
    37
    38
    39
    40
    41
    42
    43
    44
    45
    46
    47
    48
    49
    50
    51
    52
    53
    54

    ODD_RST#
    PD_D8
    PD_D7
    PD_D9
    PD_D6
    PD_D10
    PD_D5
    PD_D11
    PD_D4
    PD_D12
    PD_D3
    PD_D13
    PD_D2
    PD_D14
    PD_D1
    PD_D15
    PD_D0
    PD_DREQ

    PD_D[0..15] 19

    PD_DREQ# 19

    PD_IOR#
    PD_IOW#

    PD_IOR# 19
    PD_IOW# 19

    PD_IORDY
    PD_DACK#
    PD_IRQ

    PD_IORDY# 19
    PD_DACK# 19
    PD_IRQ
    19

    PD_A1
    PD_A0
    PD_A2
    PD_CS#1
    PD_CS#3
    MB2_LED#

    PD_A1

    19

    PD_A0
    PD_A2
    PD_CS1#
    PD_CS3#
    MB2_LED#

    19
    19
    19
    19
    19

    +5VS_MB
    MBAY_DET#

    R1032
    0_0402_5%
    2

    JAE_WM2M054JKB
    +5VS

    0619 change

    +5VS

    1
    2
    3

    1
    R83
    470K_0402_5%

    C640

    10U_0805_10V4Z

    MB_PWR

    Q38
    RHU002N06_SOT323

    8
    7
    6
    5

    2
    C624
    10U_0805_10V4Z

    1
    C625
    2

    0.1U_0402_16V4Z

    2
    220K_0402_5% 1C633
    R93
    0.1U_0402_16V4Z
    2

    2
    G
    3

    20

    Kensington Conn

    +5VS_MB

    Q92
    AO4407_SO8

    1109 Remove kensington circuit

    Place close to JP29


    +5VS_MB

    +5VS_MB

    R98

    1
    C626

    1
    C627

    0.1U_0402_16V4Z
    2

    0.1U_0402_16V4Z
    2

    1 2

    100_0402_5%

    2
    G
    Q39
    RHU002N06_SOT323

    +3V_U43

    ZZZ3

    14

    ZZZ2

    O
    B

    U43D
    SN74LVC08APW_TSSOP14

    11

    PLT_RST_B#

    2006/02/13

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    PCB-MB

    PLT_RST_B# 25,29,30

    Compal Secret Data

    Security Classification
    Issued Date

    Audio-wire

    13

    12

    7,16,18,30 PLT_RST#
    A

    Title

    Compal Electronics, Inc.


    HDD & CDROM

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev
    0.4

    Tuesday, March 27, 2007

    Sheet
    1

    22

    of

    55

    1128 Install Q102,R1730, no install R1612,Q104,Q105.


    @ R1612
    1

    +3VM

    0_1206_5%
    2

    40 mils
    S

    1
    1

    1
    R1614
    2

    100K_0402_5%

    2
    2
    2
    2
    4.7U_0603_6.3V6M C1245 C1246 C1247
    C1244

    3
    1

    R1730
    0_0402_5%

    0.1U_0402_16V4Z

    4.7U_0603_6.3V6M
    XTAL1
    XTAL2

    near U74

    LAN_TXD0
    LAN_TXD1
    LAN_TXD2

    19
    19
    19

    LAN_RXD0
    LAN_RXD1
    LAN_RXD2

    JRSTSYNC

    D1
    F3
    F1

    JTXD0
    JTXD1
    JTXD2

    LAN_RXD0
    LAN_RXD1
    LAN_RXD2

    D3
    D2
    C1

    JRXD0
    JRXD1
    JRXD2

    GLAN_TXP
    GLAN_TXN

    LAN_KBIAS_P
    LAN_KBIAS_N

    LED_LINK_LAN#
    LED_ACT_LAN#

    20,24,33 LED_LINK_LAN#
    24,33 LED_ACT_LAN#

    C1251

    C1252

    G7
    H7
    A4
    B4
    A5

    H5
    H6

    GLAN_RXP-NC
    GLAN_RXN-NC
    KBIAS_P-RBIAS100
    KBIAS_N-RBIAS10
    LED0-LINK_UP_N
    LED1-ACT_LED_N
    LED2-SPEED_LED_N

    1
    VSSA[17]-NC
    VSSA[16]-NC
    VSSA[15]-VSSA2
    VSSA[14]-VSS
    VSSA[13]-NC
    VSSA[12]-VSS
    VSSA[11]-VSS
    VSSA[10]-VSS
    VSSA[09]-VSS
    VSSA[08]-VSS
    VSSA[07]-VSS
    VSSA[06]-VSS
    VSSA[05]-VSS
    VSSA[04]-VSS
    VSSA[03]-VSSR
    VSSA[02]-NC
    VSSA[01]-VSS
    VSS[04]-VSS
    VSS[03]-VSSP
    VSS[02]-VSS
    VSS[01]-NC

    J9
    J8
    J5
    J3
    J1
    G9
    G8
    G6
    F6
    E9
    D6
    C9
    C8
    C7
    C6
    A9
    A8
    F4
    E1
    C4
    A1

    VDD1P0[03]-VCCA
    VDD1P0[02]-VCCT
    VDD1P0[01]-VCCR

    F7
    E8
    D7

    470P_0402_50V7K
    C1253

    0.1U_0402_16V4Z 470P_0402_50V7K

    0620 fix to IVRD


    +3VM_LAN

    4.7U_0603_6.3V6M1

    C1255
    C1258

    +V1.0_LAN_M
    R1618
    2

    +V1.0M_LAN

    2
    C1254

    +1.8VM

    Q106
    BCP69_SOT223
    4
    2

    0.1U_0402_16V4Z

    LAN_CTRL_18

    2
    C1256

    C1257
    10U_0805_10V4Z

    20
    20
    R1616

    GLAN_TXP-NC
    GLAN_TXN-NC

    GLCI

    C490
    0.1U_0402_16V4Z
    GLAN_RXP_CH2
    1
    2
    GLAN_RXN_C J2
    1
    2
    C1319
    0.1U_0402_16V4Z
    GLAN_TXP
    J4
    GLAN_TXN
    H4

    GLAN_RXP
    GLAN_RXN

    C1250

    +V1.0_LAN_M

    19
    19
    19

    LCI

    E3
    LAN_TXD0
    LAN_TXD1
    LAN_TXD2

    19 LAN_RSTSYNC

    XTAL2-X2
    XTAL1-X1

    R1615 33_0402_5%
    U74
    GLANCLK E2
    1
    2
    JKCLK-JCLK

    GLAN_CLK

    20 mils

    0.1U_0402_16V4Z

    C1249

    1.4K_0402_1%

    470P_0402_50V7K
    C1248

    470P_0402_50V7K

    10N_0603_50V7K

    @Q105
    RHU002N06_SOT323

    20
    20

    2
    G

    20,26,27,31,33,34,41,42,43,44 SLP_S3#

    19

    @ Q104
    RHU002N06_SOT323

    +1.8VM

    2
    G

    31,38,39,40,44 ADP_PRES

    20 mils

    0.1U_0402_16V4Z

    Q103
    BSS138_SOT23

    2
    G

    LAN_PHYPC

    1
    SI2301BDS_SOT23
    Q102

    C1243

    20

    +3VM_LAN
    4.7U_0603_6.3V6M
    C1242

    R1613
    1M_0402_5%

    1000P_0402_50V7K 3

    0.1U_0402_16V4Z

    0905

    0_0603_5%

    24
    24

    LAN_MDI2P
    LAN_MDI2N

    24
    24

    LAN_MDI3P
    LAN_MDI3N

    1
    @ R1622

    LAN_KBIAS_P
    2
    649_0402_1%

    1
    @ R1623

    LAN_KBIAS_N
    2
    619_0402_1%

    LAN_MDI1P
    LAN_MDI1N

    D9
    D8

    LAN_MDI2P
    LAN_MDI2N

    F9
    F8

    LAN_MDI3P
    LAN_MDI3N

    H8
    H9

    1
    R1621

    IEEE_TEST_P
    2IEEE_TEST_N
    @ 0_0402_5%

    closed to E6 pin
    R1625
    2

    1.4K_0603_1%
    1

    A7
    B7
    J6
    J7
    E7
    E6
    B5

    1
    R1627

    A6
    C5
    2
    B6
    100_0402_5%

    MDI_PLUS[0]-TDP
    MDI_MINUS[0]-TDN

    VCCF1P0-VCC

    MDI_PLUS[1]-RDP
    MDI_MINUS[1]-RDN
    MDI_PLUS[2]-NC
    MDI_MINUS[2]-NC

    VCCFC1P0-VCC

    H3

    VCC3P3[02]-VCCP
    VCC3P3[01]-VCC

    F2
    B3

    IEEE_TEST_P-NC
    IEEE_TEST_N-NC
    RSVD_J6-NC
    RSVD_J7-NC

    VCC1P8[04]-NC
    VCC1P8[03]-NC
    VCC1P8[02]-NC
    VCC1P8[01]-NC

    G5
    F5
    D5
    C2

    +1.8VM_LAN 1

    VCC1P0-VCCA2

    G4

    +V1.0_LAN_M

    VCC[02]
    VCC[01]

    E4
    D4

    JTAG

    RBIAS_P-NC
    RBIAS_N-NC
    RSVD_B5-NC
    RSVD_A6-ADV10/LAN_DIS_N
    RSVD_C5-NC
    TEST_EN

    T68 PAD
    T70 PAD

    C1263

    25MHZ_20P_1BG25000CK1A
    27P_0402_50V8J

    C1264

    2
    R1804
    30_0402_5%

    0.1U_0402_16V4Z
    2

    4.7U_0603_6.3V6M
    1
    C1356

    C1357
    C1360

    V1P_OUT

    CTRL_10-NC
    CTRL_18-NC

    C3
    B2

    LAN_CTRL_10
    LAN_CTRL_18

    THERM_D_P-NC
    THERM_D_N-NC

    A2
    A3

    LAN_THERM_D_P
    LAN_THERM_D_N 1
    @ R1628

    +V1.0M_LAN

    BCP69_SOT223

    +1.8VM
    0_0402_5%
    V1P_OUT
    2
    1U_0402_6.3V4Z
    1
    +V1.0_LAN_M

    4
    2

    LAN_CTRL_10

    0905

    0.1U_0402_16V4Z
    C1358

    2
    0_0603_5%

    R1629

    200_0402_5%
    2

    +3VM_LAN

    1
    2
    @ R1634 200_0402_5%

    +3VM_LAN
    XTAL2_R 1

    Q128

    +3VM_LAN

    0_0603_5%

    PAD T69
    PAD T71

    XTAL1

    1
    C1364
    2

    0620 add for POWER ripple, close to chip

    2
    R1734

    B1

    V1P0_OUT-NC

    @
    1

    R1619
    0_0603_5%
    1
    2
    +3VM_LAN
    +3.3V_LAN
    C1363 1U_0402_6.3V4Z
    2
    1
    R1620

    MDI_PLUS[3]-NC
    MDI_MINUS[3]-NC

    RU82566DM B0 Q870 BGA 81P

    Y9

    E5

    10N_0603_50V7K
    1

    LAN_MDI1P
    LAN_MDI1N

    B8
    B9

    JTAG_TCK-ISOL_TCK
    JTAG_TDI-ISOL_TI
    JTAG_TDO-TOUT
    JTAG_TMS-ISOL_EXEC

    24
    24

    LAN_MDI0P
    LAN_MDI0N

    C1359
    10U_0805_10V4Z

    LAN_MDI0P
    LAN_MDI0N

    MDI

    24
    24

    G1
    H1
    G3
    G2

    XTAL2

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    0104 Intel request

    2006/07/26

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

    27P_0402_50V8J

    Title

    Compal Electronics, Inc.


    Intel 82566 Nineveh

    Size

    Document Number

    R ev
    0.4

    LA-3261P UMA
    Date:

    Tuesday, March 27, 2007

    Sheet
    1

    23

    of

    55

    TD4-

    MDO0-

    MX4-

    13

    TRM_CT

    11
    10

    TCT4

    MX4+

    14

    MDO0+

    15

    MCT0

    16

    MDO1-

    17

    MDO1+

    MCT4

    TD3-

    MX3-

    +3VM
    2 R269
    1
    75_0402_1%
    100K_0402_5%

    200K_0402_5%

    1.5K_0402_5%

    02/27 change

    2 R270
    1
    75_0402_1%

    LAN_MDI0P 2
    LAN_MDI1P 2
    C1267

    LAN_MDI3N 3

    LAN_MDI3P 2
    2
    1
    C329
    0.1U_0402_16V4Z

    TRM_CT

    20

    MDO2+

    TCT2

    MCT2

    21

    MCT2

    TD1-

    MX1-

    22

    MDO3-

    TD1+

    MX1+

    TCT1

    MCT1

    R69 1

    2
    10K_0402_5%

    ED_ACT
    ED_VREF

    R1638

    0.01U_0402_16V7K

    C1268
    100K_0402_5%

    2 R271
    1
    75_0402_1%

    10P_0402_50V8J

    MX2+

    TD21+

    R55 1
    2
    10K_0402_5%

    U75

    IN+

    O
    IN-

    4 1

    R1639
    1.87K_0402_1%

    2
    R51

    ENERGY_DET 19
    0_0402_5%

    LMV331IDCKRG4_SC70-5~D

    1:1

    TRM_CT

    1:1

    LAN_MDI2P 5
    2
    1
    C328
    0.1U_0402_16V4Z

    1000P_1808_3KV7K

    C1265
    0.1U_0402_16V4Z

    MDO2-

    MCT1

    19

    18

    MX2-

    MCT3

    TD2-

    0.01U_0402_16V7K

    TCT3

    C1266

    LAN_MDI2N 6

    C344
    1
    2

    R1637

    TRM_CT

    MX3+

    @ R1636
    R1635

    2
    1
    C327
    0.1U_0402_16V4Z

    TD3+

    1:1

    LAN_MDI1P 8

    LAN_MDI1N 9

    TD4+

    1:1

    LAN_MDI0P

    0612 CHANGE

    LAN ENERGY DET

    +1.8VM

    2
    1
    C330
    0.1U_0402_16V4Z

    RJ-45 CONN.

    T66
    LAN_MDI0N 12

    CAP closed to LAN_MDIO bus

    23

    MDO3+

    24

    MCT3

    1113 Change R1639 to 1.4K based on Intel WW44

    C320
    1
    2

    2 R272
    1
    75_0402_1%

    24HST1041A-3_24P

    1116 Intel recommend

    1000P_1808_3KV7K

    0809 add for EMI request

    0.1U_0402_16V4Z 1

    2 C56

    0.1U_0402_16V4Z 1

    2 C54

    0.1U_0402_16V4Z 1

    2 C50

    0.1U_0402_16V4Z 1

    2 C49

    R50 1
    R63 1
    R45 1
    R48 1
    R42 1
    R44 1
    R40 1
    R41 1

    2
    2
    2
    2
    2
    2
    2
    2

    49.9_0402_1%
    49.9_0402_1%
    49.9_0402_1%
    49.9_0402_1%
    49.9_0402_1%
    49.9_0402_1%
    49.9_0402_1%
    49.9_0402_1%

    LAN_MDI0N
    LAN_MDI0P
    LAN_MDI1N
    LAN_MDI1P
    LAN_MDI2N
    LAN_MDI2P
    LAN_MDI3N
    LAN_MDI3P

    23
    23
    23
    23
    23
    23
    23
    23

    @ D72
    MDO3-

    MDO2+

    MDO2-

    MDO3+

    Layout Notice : Place


    t er min ation as close as
    Intel 82566 as possible
    APL5301-18BC-TRL_SOT23-5

    Note: MDO[3..0]+/- signals should route to JP4 first then to JP30.


    @ D73
    JP4
    R266 2

    +3VM_LAN_LED

    LED_ACT_LAN#

    23,33 LED_ACT_LAN#

    33

    MDO3-

    33

    MDO3+

    33

    MDO1-

    33

    MDO2-

    33

    MDO2+

    33

    MDO1+

    33

    MDO0-

    33

    MDO0+

    14
    8

    MDO3+

    MDO1-

    MDO2-

    MDO2+

    MDO1+

    MDO0-

    1 300_0402_5%
    LED_LINK_LAN#

    20,23,33 LED_LINK_LAN#

    13

    MDO3-

    MDO0+

    R265 2

    +3VM_LAN_LED

    1 300_0402_5%

    1
    11
    12

    Yellow LED+

    MDO1-

    Yellow LEDSHLD1
    PR4DETECT PIN1

    MDO0-

    16
    9

    CABLE_DETECT 20

    PR4+
    PR2-

    PR3PR3+

    MDO1+

    4 MDO0+

    C579
    0.1U_0402_16V4Z
    APL5301-18BC-TRL_SOT23-5

    PR2+
    PR1DETCET PIN2
    PR1+
    SHLD1

    10
    15

    Green LED+
    Green LEDFOX_JM36113-P1122-7F
    conn@

    LED_ACT_LAN#
    2

    LED_LINK_LAN#
    2

    @ C1368
    300p_0402_25V

    20 mils

    @ C1369
    300p_0402_25V

    +3VM_LAN

    +3VM_LAN_LED
    D

    1115 EMI REQUEST

    Q60
    AO3413_SOT23

    R525

    1
    20,26,33

    100K_0402_5%

    2
    G

    PREP#

    Q61
    RHU002N06_SOT323

    Compal Secret Data

    Security Classification
    Issued Date

    2006/02/13

    2006/07/26

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    Compal Electronics, Inc.


    Magnetic & RJ45/RJ11

    Size

    Document Number

    R ev
    0.4

    LA-3261P U MA
    Date:

    Tuesday, March 27, 2007

    Sheet
    1

    24

    of

    55

    20
    20

    CLK_PCI_PCM
    PCI_AD31
    PCI_AD29
    PCI_AD27
    PCI_AD25
    PCI_CBE#3
    PCI_AD23
    PCI_AD21
    PCI_AD19
    PCI_AD17
    PCI_CBE#2
    PCI_IR DY#
    PM_CLKRUN#
    PCI_SERR#
    PCI_PERR#
    PCI_CBE#1
    PCI_AD14
    PCI_AD12
    PCI_AD10
    PCI_AD8
    PCI_AD7
    PCI_AD5
    PCI_AD3
    PCI_AD1

    15 CLK_PCI_PCM

    18

    PCI_CBE#3

    18
    PCI_CBE#2
    18
    PCI_IRDY#
    20,29,30,31 PM_CLKRUN#
    18,31 PCI_SERR#
    18
    PCI_PERR#
    18
    PCI_CBE#1

    HDD_HALTLED#

    20 HDD_HALTLED#
    +3VL
    30,32
    19,31
    31
    31,32,33
    19

    WL_BLUE_LED#
    GREEN_BATLED#
    AMBER_BATLED#
    LED_STB#
    IDE_LED#

    WL_BLUE_LED#
    GREEN_BATLED#
    AMBER_BATLED#
    LED_STB#
    IDE_LED#

    +1.5VS
    +3VS
    +5VS

    101

    GND

    GND

    102

    XTPB0XTPB0+

    XTPB0XTPB0+

    PCI_PIRQG#
    PCI_PIRQD#
    PCI_REQ2#
    PCI_PLTRST#
    CLKREQ#_E
    PCI_PIRQE#
    PCI_PIRQC#
    PCI_RST#
    PCI_GNT2#
    SIRQ
    PWR_GD
    PCI_AD30
    PCI_AD28
    PCI_AD26
    PCI_AD24
    PCM_SPK
    PCI_AD22
    PCI_AD20
    PCI_PAR
    PCI_AD18
    PCI_AD16
    PCI_FRAME#
    PC I_TRDY#
    PCI_STOP#
    PCI_DEVSEL#
    PCI_AD15

    28
    28

    +3VS_WLAN

    0.1U_0402_16V4Z
    C293

    PCI_PIRQG# 18
    PCI_PIRQD# 18
    PCI_REQ2# 18
    PCI_PLTRST# 18
    CLKREQ#_E 15
    PCI_PIRQE# 18
    PCI_PIRQC# 18
    PCI_RST# 18,22
    PCI_GNT2# 18
    SIRQ
    20,29,30,31
    PWR_GD 20,31,34,35,43,44

    C538

    C542

    C294

    15 CLK_PCIE_MCARD#
    15 CLK_PCIE_MCARD

    0906 Remove debug resistors


    20
    20

    PCIE_RXN2
    PCIE_RXP2

    20
    20

    PCIE_TXN2
    PCIE_TXP2

    20
    20
    20

    IRRX
    29
    IRTXOUT 29
    IRMODE 29
    28
    28
    28

    R1348
    PCIE_RXN2
    1
    PCIE_RXP2
    1
    R1349

    0_0402_5%
    PCIE_C_RXN2
    2
    PCIE_C_RXP2
    2
    0_0402_5%

    PCIE_TXN2
    PCIE_TXP2
    R197
    R195
    R194

    CL_CLK1
    CL_DATA1
    CL_RST#1

    0622 change to support AMT

    +3VS

    +3VS_WLAN
    1 0_0402_5%
    1 0_0402_5%
    1 0_0402_5%

    2
    2
    2

    0627 PIN37,43 connected to GND


    PIN39,41 connected to +3VS

    +3VS_WWAN

    1
    R1071
    1
    R1073

    2
    20_0603_5%
    0_0603_5%

    53

    2
    4
    6
    8
    10
    12
    14
    16
    18
    20
    22
    24
    26
    28
    30
    32
    34
    36
    38
    40
    42
    44
    46
    48
    50
    52

    GND1GND2

    C540

    C544

    R1363

    0_0402_5%
    2
    2
    0_0402_5%

    1
    1

    @ R1364

    PLT_RST_B# 22,29,30
    +3VALW
    +3VM

    ICH_SMB_CLK 20
    ICH_SMB_DATA 20

    0612 change power plane


    WW_LED#_R
    1
    WL_LED#
    WP_LED#_R
    1

    2 WW_LED#

    WW_LED# 30
    WL_LED# 30
    WP_LED# 30

    2 WP_LED#

    0627 Add 0 ohm on PIN 42,46

    @ R1754
    0_0402_5%
    @ R1755
    0_0402_5%
    2

    +3VALW

    R517
    @ 100K_0402_5%

    XMIT_OFF#
    D

    2
    G
    Q58
    @ RHU002N06_SOT323
    1

    2
    0_0402_5%

    +3VS_ACL

    R1355

    2
    @ 0_0805_5%

    R1356

    +3VS_ACL_IO
    +3VS_ACL

    1
    2
    0_0603_5%

    1
    D64
    CH751H-40_SC76

    C994
    @ 0.01U_0402_16V7K

    0313 change design


    +3VS

    U72
    1
    2
    +3VALW
    0_0402_5%
    2
    +3VS_WWAN
    0_0402_5%

    2
    3

    USB20_N8 20
    USB20_P8 20

    C995

    C996
    10U_0805_10V4Z

    U64
    0.1U_0402_16V4Z

    CH1 CH4
    Vn

    Vp

    CH2 CH3

    6
    18

    ACCEL_INT

    INT/RDY

    GND

    SDD

    RES

    16
    R1361

    2
    +3VS

    15

    0_0402_5%
    3

    4,20 ICH_SM_DA

    SDA/SDI/SPC

    GND

    VDD_IO

    VDD

    14

    @ D13
    JP50
    JP?

    WW_LED# 30

    4
    5
    6
    7

    UIM_VPP
    UIM_DATA

    GND
    VPP
    I/O
    DET

    VCC
    RST
    CLK

    1
    2
    3

    @ R1780

    GND
    GND

    10K_0402_5%

    13

    +3VS_ACL
    R1362

    1
    2
    DAN217_SC59

    4,20 ICH_SM_CLK
    +3VS_ACL

    10K_0402_5%
    2
    1
    R1359

    SCL/SPC

    RES

    12

    CS

    VDD

    NC

    RES

    11

    0619 Follow ST Demo circuit

    R1357
    C960

    +3VS_ACL

    0_0402_5%
    6
    7

    0619 Follow ST Demo circuit

    10

    +3VS_ACL_IO

    0_0402_5%
    8

    R1391
    0_0402_5%

    M_WXMIT_OFF#
    2
    CH751H-40_SC76

    8
    9

    +3VS_ACL_IO

    UIM_PWR
    UIM_RST
    UIM_CLK
    C554
    4.7U_0805_10V4Z

    D66
    1

    +3VS

    ACCELEROMETER

    0.1U_0402_16V4Z

    0821 Change +3VS to +3VS_WWAN

    WXMIT_OFF#

    XMIT_OFF#

    MOLEX 67910-0002 52P

    XMIT_OFF

    MOLEX 67910-0002 52P


    conn@

    20

    0906 Remove debug resistors

    R1422

    S DIO(BR) NUP4301MR6T1 TSOP-6

    0811 Pins 37 and 43 connect to GND and remove +1.5VS

    54

    +1.5VS_WLAN

    +3VS_WWAN

    54

    GND1GND2

    +3VS_WLAN

    4.7U_0805_10V4Z

    M_WXMIT_OFF#

    WW_LED#

    53

    CH751H-40_SC76

    UIM_PWR
    UIM_DATA
    UIM_CLK
    UIM_RST
    UIM_VPP

    1
    @R1382
    1
    R1383

    2
    4
    6
    8
    10
    12
    14
    16
    18
    20
    22
    24
    26
    28
    30
    32
    34
    36
    38
    40
    42
    44
    46
    48
    50
    52

    CK

    GND

    0.1U_0402_16V4Z

    1
    3
    5
    7
    9
    11
    13
    15
    17
    19
    21
    23
    25
    27
    29
    31
    33
    35
    37
    39
    41
    43
    45
    47
    49
    51

    2
    4
    6
    8
    10
    12
    14
    16
    18
    20
    22
    24
    26
    28
    30
    32
    34
    36
    38
    40
    42
    44
    46
    48
    50
    52

    C295

    TAITW_PMPAT6-06GLBS7N14N0
    UIM_PWR

    LIS3LV02DL-TR _LGA16

    Must be placed in the center of the system.


    1

    1
    3
    5
    7
    9
    11
    13
    15
    17
    19
    21
    23
    25
    27
    29
    31
    33
    35
    37
    39
    41
    43
    45
    47
    49
    51

    +3VS_WWAN
    R1779
    1
    2
    0_1206_5%

    2
    4
    6
    8
    10
    12
    14
    16
    18
    20
    22
    24
    26
    28
    30
    32
    34
    36
    38
    40
    42
    44
    46
    48
    50
    52

    0811 HP request

    0.1U_0402_16V4Z

    C959

    +3VS
    JP46

    1
    3
    5
    7
    9
    11
    13
    15
    17
    19
    21
    23
    25
    27
    29
    31
    33
    35
    37
    39
    41
    43
    45
    47
    49
    51

    D74

    0731 Install R1383 and no install R1382, do not support wake on WWAN card

    +1.5VS_WLAN

    0821 Install R1364

    conn@

    1
    3
    5
    7
    9
    11
    13
    15
    17
    19
    21
    23
    25
    27
    29
    31
    33
    35
    37
    39
    41
    43
    45
    47
    49
    51

    @ 10K_0402_5%

    0.01U_0402_16V7K

    +1.5VS

    R1785
    1
    2
    0_1206_5%

    PCI_AD[0..31] 18
    20

    +3VALW

    R516

    0811 Isolate SLOT power from SYSTEM power.

    1
    2
    0_1206_5%

    0906 Remove debug resistors

    ACES_88394-1A71

    Mini-Express Card--WWAN

    0.1U_0402_16V4Z

    SC_DATA 28

    PC I_AD[0..31]

    +3VS_WLAN

    0811 No install R1418,R1358,R1359,R1360

    +SC_PWR

    SC_DATA

    C954

    0.1U_0402_16V4Z

    0821 Change +3VS to +3VS_WLAN

    SC_CLK
    SC_RST

    JP44

    PCI_CBE#0 18

    SC_CD#

    C533

    ICH_PCIE_WAKE#
    CH_DATA
    CH_CLK
    1
    2 CLKREQD#_MC
    R1336
    0_0402_5%
    CLK_PCIE_MCARD#
    CLK_PCIE_MCARD

    15,30 CLK_DEBUG_PORT

    SC_CLK
    SC_RST

    20 ICH_PCIE_WAKE#
    28
    CH_DATA
    28
    CH_CLK
    15 CLKREQ#_G

    PCI_FRAME# 18
    PCI_TRDY# 18
    PCI_STOP# 18
    PCI_DEVSEL# 18

    SC_CD#

    +3VS
    R1778

    PCI_PAR 18

    IRRX
    IRTXOUT
    IRMODE

    +3VALW

    4.7U_0805_10V4Z

    4.7U_0805_10V4Z

    PCM_SPK 26

    PCI_AD13
    PCI_AD11
    PCI_AD9
    PCI_CBE#0
    PCI_AD6
    PCI_AD4
    PCI_AD2
    PCI_AD0

    0.01U_0402_16V7K

    PCIE_RXN4
    PCIE_RXP4

    2
    4
    6
    8
    10
    12
    14
    16
    18
    20
    22
    24
    26
    28
    30
    32
    34
    36
    38
    40
    42
    44
    46
    48
    50
    52
    54
    56
    58
    60
    62
    64
    66
    68
    70
    72
    74
    76
    78
    80
    82
    84
    86
    88
    90
    92
    94
    96
    98
    100

    20
    20
    1

    2
    4
    6
    8
    10
    12
    14
    16
    18
    20
    22
    24
    26
    28
    30
    32
    34
    36
    38
    40
    42
    44
    46
    48
    50
    52
    54
    56
    58
    60
    62
    64
    66
    68
    70
    72
    74
    76
    78
    80
    82
    84
    86
    88
    90
    92
    94
    96
    98
    100

    CLK_PCIE_Rob#
    CLK_PCIE_Rob
    R37
    0_0402_5%
    PCIE_RXN4 2
    NF_RXN
    1
    PCIE_RXP4 2
    NF_RXP
    1
    R36
    0_0402_5%
    PCIE_TXN4
    PCIE_TXN4
    PCIE_TXP4
    PCIE_TXP4

    15 CLK_PCIE_Rob#
    15 CLK_PCIE_Rob

    1
    3
    5
    7
    9
    11
    13
    15
    17
    19
    21
    23
    25
    27
    29
    31
    33
    35
    37
    39
    41
    43
    45
    47
    49
    51
    53
    55
    57
    59
    61
    63
    65
    67
    69
    71
    73
    75
    77
    79
    81
    83
    85
    87
    89
    91
    93
    95
    97
    99

    1
    3
    5
    7
    9
    11
    13
    15
    17
    19
    21
    23
    25
    27
    29
    31
    33
    35
    37
    39
    41
    43
    45
    47
    49
    51
    53
    55
    57
    59
    61
    63
    65
    67
    69
    71
    73
    75
    77
    79
    81
    83
    85
    87
    89
    91
    93
    95
    97
    99

    0811 Isolate SLOT power from SYSTEM power.


    +1.5VS_WLAN

    XTPA0XTPA0+

    XTPA0XTPA0+

    Mini-Express Card---WLAN

    0620 Update ROBSON SCHEMATIC


    0824 add 1394 signals
    0830 Change 1394 signals

    JP13
    28
    28

    0824 Add +1.5VS_WLAN

    B/B connector with PCI / LED / FIR / SC interface

    0811 Reserve for SIM card does not meet rise time and a pull-up resistor is needed.
    0116 Connected R1780.1 to UIM_PWR

    Compal Secret Data

    Security Classification
    2005/05/26

    Issued Date

    0821 Delete SW1,C986,R521,D65,R200

    2006/07/26

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    A

    Title

    Compal Electronics, Inc.


    Mini-Card/Mini-PCI/Accelerometer

    Size

    Document Number

    R ev
    0.4

    LA-3261P U MA
    Date:

    Tuesday, March 27, 2007

    Sheet
    E

    25

    of

    55

    V_CODEC

    VDDA_CODEC

    20,23,27,31,33,34,41,42,43,44 SLP_S3#

    +5VAMP

    R329

    U18

    + C548

    C377

    22U_B_10V

    C552
    1U_0603_10V4Z

    3
    C551
    100P_0402_50V8J

    VDDA_CODEC

    49.9K_0402_1% 1

    OUT
    EN
    GND

    C553

    + C309

    ADJ

    MIC5205BM5_SOT23-5

    1
    2
    R258
    0_0805_5%

    0.01U_0402_16V7K

    R456

    IN

    MONO_IN
    2
    0.1U_0402_16V4Z

    0.1U_0402_16V4Z 150K_0402_1%

    Q35
    RHU002N06_SOT323

    1
    C430

    R457

    22U_B_10V

    C307
    0.1U_0402_16V4Z
    1

    0.01U_0402_16V7K
    1

    143K_0402_1%
    2

    10K_0402_5%

    2
    G

    PCM_SPK

    R330
    3

    25

    1
    R341
    1

    10K_0402_5%
    C390
    1
    2

    Place R258 between DGND & AGND & close to U14

    R350

    1
    C148

    2
    C402

    1
    U14

    0.1U_0402_16V4Z

    GNDA

    10U_0805_10V4Z

    14
    T24

    PAD
    15

    27

    33

    DLINE_IN_L

    33

    DLINE_IN_R

    R370
    R375
    R369
    R374

    INT_MIC

    INT_MIC

    2
    1
    2
    1

    1
    2
    1
    2

    T21
    2 1U_0603_10V4Z

    C425 1

    PAD
    16

    C426 1

    2 1U_0603_10V4Z

    6.04K_0402_5% DLINE_IN_R_L C423 1


    2K_0402_5%
    6.04K_0402_5% DLINE_IN_R_R C422 1
    2K_0402_5%

    2 1U_0603_10V4Z

    DLINE_IN_RC_L

    23

    2 1U_0603_10V4Z

    D LINE_IN_RC_R

    24

    17

    18
    T23

    PAD

    T25

    PAD

    20

    0115 R370, R369 - change from 4.7k to 6.04k


    R374, R375 - change from 4.7k to 2.00k

    19

    27

    MIC1

    27

    MIC2

    MIC1
    MIC2

    1
    C204
    1
    C205
    1

    VDDA_CODEC

    R231
    1
    R169

    VDDA_CODEC

    T26
    PAD
    MIC1_C
    2
    1U_0603_10V4Z
    MIC2_C
    2
    1U_0603_10V4Z
    SENSE_A
    SENSE_B
    2
    2.2K_0402_1%
    2
    @ 0_0402_5%

    21
    22
    13
    34

    19 HDA_RST#_CODEC

    11

    19 HDA_SYNC_CODEC

    10

    19 HDA_SDOUT_CODEC

    AUX_L

    LINE_OUT_L

    AUX_R

    LINE_OUT_R

    MIC3

    EAPD

    L53 1
    2
    FBM-L10-160808-301-T_0603

    R969
    2.67K_0402_1%

    47
    48

    T22

    PAD

    4
    7

    2
    20K_0402_1%

    SENSE_A_B 27

    2
    G

    2
    R1766

    2
    G
    2
    G
    S

    10K_0402_5%

    1
    C156

    1
    2
    0_0805_5%

    C175

    C393
    10U_0805_10V4Z

    0.1U_0402_16V4Z

    HP_LOUT_L

    LINE_IN_L

    HP_LOUT_R

    LINE_IN_R
    BIT_CLK
    CD_L
    SDATA_IN

    35

    LINE_OUTL

    36

    LINE_OUTR

    LINE_OUTL 27
    LINE_OUTR 27
    T20

    37

    PAD
    39

    L_HP

    41

    R_HP
    2
    R1038

    L_HP

    27

    R_HP

    1
    @ 33_0402_5%

    27
    1

    @ 10P_0402_25V8K

    C1064

    HDA_BITCLK_CODEC 19
    HDA_SDIN0_CODEC

    CD_R

    R373 1
    33_0402_5%

    HDA_SDIN0 19

    @
    @

    PORT_A_SNS 27

    CD_GND
    MIC1
    MIC2

    GPIO_0
    GPIO_1
    GPIO_2
    GPIO_3

    R168
    R167
    R136
    R32

    43
    44
    2
    3

    1
    1
    1
    1

    2
    2
    2
    2

    4.7K_0402_5%
    4.7K_0402_5%
    10K_0402_5%
    4.7K_0402_5%

    PREP#

    PORT

    PLACE TO

    MONO_OUT

    PORT A

    HP OUT, DOCK HP LO

    PORT B

    M/B MIC

    PORT C

    DOCK LI

    C416

    PORT D

    M/B SPK

    0.1U_0402_16V4Z

    PORT E

    PORT F

    Internal MIC

    20,24,33

    SENSEA
    SENSEB
    VREF

    27

    MIC_BIAS_B
    MIC_BIAS_C
    MIC_BIAS_F
    MIC_BIAS_D
    PCBEEP

    28
    29
    30
    32
    12

    RESET#
    SYNC
    SDATA_OUT

    EAPD
    SPDIFO
    DVSS1
    DVSS2

    N/C
    N/C
    N/C
    NC
    NC
    AVSS1
    AVSS2

    AUD_REF
    T27
    T13
    T12
    T11
    MONO_IN
    T7
    T8
    T10
    T6
    T9

    31
    33
    40
    45
    46

    1
    PAD
    PAD
    PAD
    PAD

    C424
    1U_0603_10V4Z

    PAD
    PAD
    PAD
    PAD
    PAD

    26
    42

    LINE_IN_SENSE

    LINE_IN_SENSE 33

    C978
    0.1U_0402_16V4Z

    Issued Date

    2005/05/26

    2006/07/26

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

    100K_0402_5%

    Compal Electronics, Inc.

    Compal Secret Data

    Security Classification

    R988
    2

    Q97
    C977
    @ 1U_0402_6.3V4Z
    2N7002_SOT23

    R1765
    0_0402_5%

    R974
    @ 0_0402_5%

    SENSE_A_C
    2
    10K_0402_1%

    1
    R1764
    10K_0402_5%

    AD1981HDJSTZ-REEL_LQFP48

    VDDA_CODEC

    SENSE_B

    1
    R972
    1
    R973

    R980
    @ 0_0402_5%

    SENSE_A_A 27

    C1367
    0.47U_0402_6.3V4Z
    2
    @

    2
    39.2K_0402_1%

    SENSE_A

    1
    R970

    MONO_OUT

    MIC4

    0620 change
    27,31

    1
    C417

    0.1U_0402_16V4Z

    C147

    DVDD2

    C395

    0.1U_0402_16V4Z +3VS_CODEC

    0.1U_0402_16V4Z 0.1U_0402_16V4Z
    1

    DVDD1

    1
    0.1U_0402_16V4Z

    R159

    38

    2
    C431

    25

    1
    0.1U_0402_16V4Z

    RHU002N06_SOT323
    @ Q139
    1
    HP_L_JACK 27

    R1399

    0_0603_5%
    2

    AVDD2

    2
    C427

    3 3

    +3VS

    AVDD1

    1
    0.1U_0402_16V4Z

    RHU002N06_SOT323
    @ Q138
    1

    L_C_HP

    HP_R_JACK 27

    Q136@
    RHU002N06_SOT323

    2
    C409

    VDDA_CODEC

    27

    0_1206_5%
    V_CODEC

    Q135
    @

    1K_0402_5%
    @ R1763

    0316 change

    19,32 HDA_RST#_MDC

    R1400

    D RHU002N06_SOT323
    Q137@

    3 3

    1
    2
    300K_0402_5%
    @ R1762
    1
    2 2
    10K_0402_5% G

    RHU002N06_SOT323

    Place close to U14

    GND

    R_C_HP

    @ R1761
    +5VS

    27

    4.7U_0603_6.3V6M
    2

    +3VS

    R1760

    0.1U_0402_16V4Z 150K_0402_1%
    1

    Q68
    RHU002N06_SOT323

    @
    1

    @ C1366

    2
    G

    SB_SPKR

    10K_0402_5%
    R1759
    0_0402_5%
    2
    1
    S

    20

    10K_0402_5%
    @
    R1758

    0809 Add anti-pop circuit

    R359

    10K_0402_5%
    C396
    1
    2

    Title

    AC97 CODEC AD1981B


    Size

    Document Number

    R ev
    0.4

    LA-3261P U MA
    Date:

    Tuesday, March 27, 2007


    G

    Sheet

    26
    H

    of

    55

    AMP. FOR INTERNAL SPEAKER


    +5VALW

    AMP. FOR INTERNAL MICROPHONE


    Place close to U14 audio CODEC

    +5VAMP
    R443

    C230
    1
    2

    D62

    C659
    10U_0805_10V4Z

    680P_0402_50V7K
    R190
    1
    2

    2
    1

    Q28
    @ RHU002N06_SOT323

    R196
    3K_0402_5%

    19

    1
    2 LINE_C_R_OUTL
    15K_0402_5% 10 dB
    L_SPK+

    OUTL-

    17

    L_SPK-

    NC1
    NC2
    NC3
    NC4

    3
    10
    13
    16

    OUTL+

    SHDN

    C471
    1

    68P_0402_50V8J
    2

    0.01U_0402_16V7K

    2
    1
    P
    26

    MIC2

    100K_0402_5%
    2

    R251

    100K_0402_5%

    DOCK_HPS#
    D
    Q44

    C527

    R255
    2
    G

    1
    1

    S
    0.1U_0603_16V4Z

    2
    2

    33

    2.2U_0603_6.3V4Z

    MIC2
    MIC_SENSE
    R_HP
    L_HP

    47K_0402_5%

    C492

    4.7U_0805_10V4Z 1

    R429

    2
    R1424

    1
    0_0402_5%

    JJ_MIC_REF

    2
    R1423

    1
    @ 0_0402_5%

    J_MIC_REF

    EXT_MICB

    C526

    C275
    1
    2

    L61

    EXT_MICB_1 1
    2
    HLC0603CSCCR10JT_0603
    0.22U_0603_10V7K

    J_L_HP 1
    C581

    JP24

    2 L_C_HP
    150U_D_6.3VM

    L_C_HP

    R445

    26

    2
    4

    Vn

    Vp

    100P_0402_50V8J
    2

    100P_0402_50V8J
    1
    1
    C514
    C507
    2

    1
    2
    3
    4
    1

    2
    2
    100P_0402_50V8J
    A

    1K_0402_1%

    conn@

    1
    2
    3
    4

    1
    2
    3
    4
    5
    6

    1
    2
    3
    4
    5
    6

    J_MIC1

    Place close to U14

    J_VDDA_CODEC

    2
    470_0402_5%

    C487

    conn@ JP28
    1
    2
    3
    4
    5
    6

    Place close to JP15

    100P_0402_50V8J

    ACES_87213-0600
    B

    1
    2
    3
    4
    5
    6

    J_DLINE_OUT_L
    J_DLINE_OUT_R
    J_VDDA_CODEC

    C441
    0.1U_0402_16V4Z

    JP15
    J_MIC_SENSE
    R424
    3.9K_0402_1%
    1
    2

    R418

    470P_0402_50V7K

    J_R_HP
    J_L_HP

    0.1U_0402_16V4Z

    MIC_SENSE
    C984
    0.1U_0402_16V4Z

    10U_0805_10V4Z
    J_MIC_REF

    J_MIC2

    EXT_MICB
    EXT_MICA

    R421
    3.9K_0402_1%
    1

    C486

    2005/05/26

    Issued Date

    Deciphered Date

    L46
    CHB1608B121_0603
    1
    2
    L47
    CHB1608B121_0603
    C508
    470P_0402_50V7K

    3
    6
    2
    1
    1

    C522
    470P_0402_50V7K

    SUYIN_010030FR006G101ZL_6P
    conn@

    10U_0805_10V4Z

    2006/07/26

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    C

    8
    7

    Compal Secret Data

    Security Classification

    5
    4

    J_MIC2
    J_MIC_SENSE

    C470

    1
    2
    G

    SUYIN_010030FR006G101ZL_6P
    conn@

    Place close to JP24

    ACES_87213-0600

    C518 E&T_3801-04

    C575
    68P_0402_50V8J

    TLV2462_SO8
    O

    conn@ JP27

    JP21

    1
    C506

    Q50
    RHU002N06_SOT323

    1
    C564

    EXT_MICB_2

    +3VS

    @ S DIO(BR) NUP4301MR6T1 TSOP-6


    L_SPK+
    L_SPKR_SPK+
    R_SPK-

    U46B

    R979
    47K_0402_5%

    SENSE_A_B

    1
    2
    R425
    470_0402_5%

    CH2 CH3

    C563

    10K_0402_5%

    CH1 CH4

    26

    3
    6
    2
    1

    L_CRL_HP

    470P_0402_50V7K
    2

    R446

    1K_0402_1%
    U73

    8
    7

    L51
    L_CR_HP 1
    CHB1608B121_0603

    VDDA_CODEC

    02/27 change
    5

    26
    1

    R_C_HP

    100K_0402_5%

    R210

    Place close to JP24

    2 R_C_HP
    150U_D_6.3VM

    J_R_HP 1
    C577

    R253
    1
    2
    60.4_0805_1%

    J_VDDA_CODEC

    HP_L_JACK

    JJ_MIC_REF

    @ 1U_0603_10V4Z

    J_DLINE_OUT_R
    J_DLINE_OUT_L

    26

    J_MIC1

    100P_0402_50V8J
    R414
    1
    2

    ACES_87213-1200

    CHB1608B121_0603
    R_CR_HP 1
    R_CRL_HP
    2
    L52

    2
    60.4_0805_1%

    HP_R_JACK

    TLV2462_SO8
    O

    68P_0402_50V8J

    47K_0402_5%

    R261

    26

    C489
    1
    2

    RHU002N06_SOT323

    1116 Change R261 and R253 to 56.2 ohm


    20070227 Change R261 and R253 to 60.4 ohm

    R427

    DLINE_OUT_L

    C536 100K_0402_5%

    R_HP
    L_HP

    MIC1

    33 DLINE_OUT_L
    33 DLINE_OUT_R
    VDDA_CODEC

    26
    26

    VDDA_CODEC
    R423

    EXT_MICA_2

    C248
    100P_0402_50V8J

    MIC1

    1
    2
    G

    conn@
    JP9
    1 1
    2
    2
    3 3
    4 4
    5
    5
    6 6
    7 7
    8 8
    9 9
    10 10
    11 11
    12 12

    26

    MIC_REF

    U46A

    U27B
    TLV2462_SO8

    100K_0402_5%

    1 C57210K_0402_5%

    26

    R211
    1

    J_VDDA_CODEC

    VDDA_CODEC

    SENSE_A_A

    J_VDDA_CODEC

    47K_0402_5%

    L58
    EXT_MICA_1 1
    2
    HLC0603CSCCR10JT_0603
    0.22U_0603_10V7K

    R428

    4.7U_0805_10V4Z 1

    4.7U_0805_10V4Z

    C276
    1
    2

    Q48
    RHU002N06_SOT323
    2
    G

    1 2

    C493
    PORT_A_SNS

    2
    R978
    100_0402_5%

    5
    R995
    100K_0402_5%

    EXT_MICA

    INT_MIC

    100P_0402_50V8J
    R413
    1
    2

    47K_0402_5%

    INT_MIC

    VDDA_CODEC

    VDDA_CODEC

    JJ_MIC_REF

    R426

    U27A
    TLV2462_SO8

    C488
    1
    2

    MIC_REF

    Place close to U14 audio CODEC

    AMP. FOR EXTERNAL MICROPHONE

    1 C982

    Q49
    RHU002N06_SOT323

    4.7U_0805_10V4Z

    Place close to JP15

    VDDA_CODEC

    26

    1 C226

    2
    G

    A_SD

    Q32
    RHU002N06_SOT323

    26

    MAX9710ETP_QFN20

    6
    11
    15
    20
    21

    14

    MUTE

    L57
    HLC0603CSCCR11JT_0603
    C231
    R388
    INT_MIC_4
    2
    1
    2 INT_MIC_3
    1
    2 1
    2
    3K_0402_5%
    1
    0.22U_0603_10V7K
    C571
    10K_0402_5%

    R193
    2 INT_MIC_1

    R_SPK-

    2
    2

    10 dB

    1
    1

    1
    2
    15K_0402_5%
    R_SPK+

    31

    OUTR-

    PGND1
    PGND2
    PGND3
    PGND4
    PGND5

    2 10K_0402_5%

    1
    @ 0_0402_5%
    2
    G

    EAPD

    2
    R1421

    VDDA_CODEC

    LINE_C_R_OUTR

    R1406
    R1407
    2
    1
    0_0402_5%

    R430 1

    MUTE_LED#

    OUTR+
    INL

    10K_0402_5%

    20,23,26,31,33,34,41,42,43,44 SLP_S3#

    @ 1200P_0402_50V7K

    2 1U_0603_10V4Z

    R1405
    LINE_C_R_OUTL

    10 dB

    26,31

    C1044

    BIAS

    R1411

    0.1U_0402_16V4Z

    0620 change

    INR

    10K_0402_5%

    LINE_C_OUTL 1

    C502
    1
    2

    LINE_OUTL

    C585
    1
    2

    100K_0402_5%

    0.1U_0402_16V4Z

    26

    LINE_C_R_OUTR

    INT_MIC_2

    ACES_85205-0200

    Keep 10 mil width

    VDDA_CODEC

    PACDN042_SOT23~D

    R1410
    LINE_C_OUTR 1

    C503
    1
    2

    LINE_OUTR

    26

    MIC_REF

    1
    2

    U39

    VDD
    PVDD1
    PVDD2

    10 dB

    conn@
    JP36

    0.1U_0402_16V4Z

    12
    8
    18

    2
    2
    1U_0603_10V4Z

    3
    C539

    C662 +
    @
    150U_D_6.3VM
    2

    1
    C660

    0_1206_5%

    C446
    100P_0402_50V8J

    10U_0805_10V4Z

    C249
    100P_0402_50V8J

    C1098

    Title

    Compal Electronics, Inc.


    AMP & Audio Jack

    Size

    Document Number

    R ev
    0.4

    LA-3261P U MA
    Date:

    Tuesday, March 27, 2007

    Sheet
    E

    27

    of

    55

    Left side
    Left side

    USB CONNECTOR 1

    USB CONNECTOR 0
    USB_VCCA

    +5VALW

    USB_VCCA
    U57

    S4_STATE

    0_0603_5%
    USB20_N4 1
    USB20_P4 1
    0_0603_5%
    1
    2
    0_0805_5%
    R1790

    USB20_N4
    USB20_P4

    R604
    2 USB20_N4_R
    2 USB20_P4_R
    R605

    1
    2
    3
    4
    5
    6
    7
    8

    10K_0402_5%

    0_0603_5%
    USB20_N5_R
    1
    USB20_P5_R
    1
    0_0603_5%

    1
    2
    3
    4
    5
    6
    7
    8

    1
    2
    3
    4
    GND
    GND
    GND
    GND

    +5VALW

    R163

    0621 change

    conn@ JP25
    R606
    2 USB20_N5
    2 USB20_P5
    R607

    USB20_N5 20
    USB20_P5 20

    USB20_P5
    USB20_N5

    SUYIN_020173MR004S558ZL
    SUYIN_020173MR004S558ZL

    USB20_P4
    USB20_N4
    1

    conn@

    1
    2
    3
    4
    GND
    GND
    GND
    GND

    1101 update EMI request

    R1792
    1
    2
    0_0805_5%

    D51
    PJDLC05_SOT23~D

    D52
    PJDLC05_SOT23~D

    1
    2
    0_0805_5%
    R1791

    JP23
    20
    20

    S4_STATE

    G548A2P1U

    30

    W=100mils

    8
    7
    6
    5

    C519
    1000P_0402_50V7K

    4.7U_0805_10V4Z

    OUT
    OUT
    OUT
    OC#

    C515
    0.1U_0402_16V4Z

    C550

    GND
    IN
    IN
    EN#

    C567
    150U_D_6.3VM

    1
    2
    3
    4

    0904 EMI request

    Right side USB CONNECTOR 0

    1394 connector

    +5VALW
    USB_VCCC
    U65

    TPS2061IDGN_MSOP8~N
    4.7U_0805_10V4Z

    1
    1

    +
    2

    JP26

    C521
    1000P_0402_50V7K

    W=60mils

    8
    7
    6
    5

    OUT
    OUT
    OUT
    OC#

    C517
    0.1U_0402_16V4Z

    C558

    GND
    IN
    IN
    EN#

    C569
    150U_D_6.3VM

    1
    2
    3
    4

    20
    20

    USB20_N0
    USB20_P0

    0_0603_5%
    1
    1
    0_0603_5%

    R617
    2 USB20_N0_R
    2 USB20_P0_R
    R614

    1
    2
    3
    4
    5
    6
    7
    8

    conn@

    1
    2
    3
    4
    GND
    GND
    GND
    GND

    25
    25
    25
    25

    SUYIN_020173MR004S558ZL

    XTPB0XTPB0+
    XTPA0XTPA0+

    XTPB0XTPB0+
    XTPA0XTPA0+

    0_0402_5%
    0_0402_5%
    0_0402_5%
    0_0402_5%

    +5VALW
    1

    R164

    +5VALW

    R_XTPB0- 1
    R_XTPB0+ 2
    R_XTPA0- 3
    R_XTPA0+ 4
    5
    6
    7
    8

    2 R1696
    2 R1697
    2
    2 R1698
    R1699

    1
    1
    1
    1

    USB20_P0
    USB20_N0

    10K_0402_5%

    conn@
    JP19
    XTPB0XTPB0+
    XTPA0XTPA0+
    GND
    GND
    GND
    GND

    R1
    D

    D61
    PJDLC05_SOT23~D
    1

    1
    20

    2
    S4_STATE#
    G
    Q132
    RHU002N06_SOT323

    S4_STATE

    AMP_440168-2
    10K_0402_5%

    0621 change

    conn@ JP22
    1
    2
    3
    4
    5
    6
    7
    8

    +SC_PWR

    2
    2

    @ R458 1
    @ R459 1

    2
    2

    ACES_87212-0800

    R586
    1K_0402_5%
    1K_0402_5%

    0612 no install

    USB20_P6
    USB20_N6

    1 0_0402_5%
    1 0_0402_5%

    USB20_P6 20
    USB20_N6 20

    BT_LED 30
    CH_DATA 25
    CH_CLK 25
    2

    SMART Card connector

    +3VAUX_BT

    R562
    USB20_P6_R
    USB20_N6_R

    D53
    @ PACDN042_SOT23~D

    SC_CD#

    SC_CLK 25
    SC_RST 25
    +SC_PWR
    SC_CD# 25

    C367

    1
    SC_CLK
    SC_RST

    BT Connector

    0.1U_0402_16V4Z

    +3VALW

    +3VAUX_BT
    Q51

    SC_DATA

    SC_DATA 25

    SI2301BDS_SOT23
    D

    conn@
    11 11
    12 12
    13 13
    14 14
    15 15
    16 16
    17 17
    18 18
    19 19
    20 20

    1
    2
    3
    4
    5
    6
    7
    8
    9
    10

    C306

    R518

    1U_0603_10V4Z

    100K_0402_5%

    C546

    ACES_85203-1002

    JP3
    1
    2
    3
    4
    5
    6
    7
    8
    9
    10

    1
    C549
    4.7U_0805_10V4Z
    0.1U_0402_16V4Z
    2
    2
    1

    C545

    0.01U_0402_16V7K
    A

    20

    BT_OFF

    C556

    R454
    1
    2
    47K_0402_5%

    2
    0.1U_0402_16V4Z

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    2006/07/26

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    Compal Electronics, Inc.


    USB & BT Connector

    Size

    Document Number

    R ev
    0.4

    LA-3261P U MA
    Date:

    Tuesday, March 27, 2007

    Sheet
    1

    28

    of

    55

    +3VS
    RP3
    DCD#1
    R I#1
    CTS#1
    DSR#1

    1
    2
    3
    4

    8
    7
    6
    5

    +5VS

    IRRX

    4.7K_1206_8P4R_5%
    1
    2
    R76
    1K_0402_5%

    D36

    CH751H-40_SC76

    +5VS_PRN
    RXD1
    U8

    20,31 NPCI_RST#
    22,25,30 PLT_RST_B#
    +3VS

    10K_1206_8P4R_5%
    R120
    SIO_IRQ
    1
    2
    R121
    10K_0402_5%
    SIO_DPIO45
    1
    2
    10K_0402_5%

    2 0_0402_5%
    2 @ 0_0402_5%
    2 10K_0402_5%

    1
    1
    1

    +3VS

    1
    R67

    19,30,31 LPC_FRAME#
    19
    LPC_DRQ#0

    20,25,30,31 PM_CLKRUN#
    15 CLK_PCI_SIO
    20,25,30,31 SIRQ
    2
    10K_0402_5%
    15 CLK_14M_SIO

    C ARD_ID#

    10K_0402_5%
    33

    SER_SHD

    19
    20
    21
    6

    CLK_14M_SIO

    R68
    1

    EXPCRD_RST#

    EXPCRD_RST#
    33 EXPCRD_RST#

    10K_0402_5%
    R77
    PID0

    PCI_RESET#
    LPCPD#
    CLKRUN#
    PCI_CLK
    SER_IRQ
    IO_PME#
    CLK14

    23
    24
    25
    27
    28
    29
    30
    31
    32
    33
    34
    35
    36
    40

    62
    63
    64
    1
    2
    3
    4
    5

    RXD1
    TXD1
    DSR#1
    RTS#1
    CTS#1
    DTR#1
    R I#1
    DCD#1

    IRRX2
    IRTX2
    IRMODE/IRRX3

    37
    38
    39

    IRRX

    41
    42
    44
    46
    47
    48
    49
    50
    51
    53
    55
    56
    57
    58
    59
    60
    61

    LPTINIT#
    LPTSLCTIN#
    LPD0
    LPD1
    LPD2
    LPD3
    LPD4
    LPD5
    LPD6
    LPD7
    LPTSLCT
    LPTPE
    LPTBUSY
    LPTACK#
    LPTERR#
    LPTAFD#
    LPTSTB#

    FIR

    VSS
    VSS
    VSS
    VSS

    INIT#
    SLCTIN#
    PD0
    PD1
    PD2
    PD3
    PD4
    PD5
    PD6
    PD7
    SLCT
    PE
    BUSY
    ACK#
    ERROR#
    ALF#
    STROBE#

    CLOCK

    GPIO40
    GPIO41
    GPIO42
    GPIO43
    GPIO44
    GPIO45
    GPIO46
    GPIO47
    GPIO10
    GPIO11/SYSOPT
    GPIO12/IO_SMI#
    GPIO13/IRQIN1
    GPIO14/IRQIN2
    GPIO23

    8
    22
    43
    52

    +3VS
    1

    LFRAME#
    LDRQ#

    17
    18

    PM_CLKRUN#
    CLK_PCI_SIO
    SIRQ
    SIO_PME#

    SIO_GPIO40
    PID0
    PID1
    SIO_GPIO43
    SIO_GPIO44
    SIO_DPIO45
    C ARD_ID#
    SER_SHD
    SIO_GPIO10
    SIO_GPIO11
    SIO_GPIO12
    SIO_IRQ

    R119
    2

    15
    16

    SIO_RST#
    SIO_PD#

    +3VS
    1

    LPC_FRAME#
    LPC_DRQ#0

    R64
    1

    RXD1
    TXD1
    DSR1#
    RTS1#
    CTS1#
    DTR1#
    RI1#
    DCD1#

    LAD0
    LAD1
    LAD2
    LAD3

    SERIAL I/F

    R108
    R109
    R99

    10
    12
    13
    14

    LPC I/F

    SIO_GPIO12
    SIO_GPIO10
    SIO_GPIO44
    SIO_GPIO43

    1
    2
    3
    4

    LPC_AD0
    LPC_AD1
    LPC_AD2
    LPC_AD3

    PARALLEL I/F

    RP6
    8
    7
    6
    5

    LPC_AD0
    LPC_AD1
    LPC_AD2
    LPC_AD3

    GPIO

    19,30,31
    19,30,31
    19,30,31
    19,30,31

    VTR
    VCC
    VCC
    VCC
    VCC

    POWER

    10K_0402_5%

    7
    11
    26
    45
    54

    33

    RP51
    1K_0402_5%

    TXD1
    DSR#1
    RTS#1
    CTS#1
    DTR#1
    RI#1
    DCD#1

    33
    33
    33
    33
    33
    33
    33

    IRRX
    IRTXOUT
    IRMODE

    25
    25
    25

    LPD3
    LPD2
    LPD1
    LPD0

    RP52

    C84

    C88

    C76

    1
    2
    3
    4

    8
    7
    6
    5

    4.7K_1206_8P4R_5%

    LPTINIT# 33
    LPTSLCTIN# 33
    LPD0
    33
    LPD1
    33
    LPD2
    33
    LPD3
    33
    LPD4
    33
    LPD5
    33
    LPD6
    33
    LPD7
    33
    LPTSLCT 33
    LPTPE
    33
    LPTBUSY 33
    LPTACK# 33
    LPTERR# 33
    LPTAFD# 33
    LPTSTB# 33

    8
    7
    6
    5

    4.7K_1206_8P4R_5%
    LPD7
    LPD6
    LPD5
    LPD4

    RP53
    LPTACK#
    LPTBUSY
    LPTPE
    LPTSLCT

    1
    2
    3
    4

    8
    7
    6
    5

    4.7K_1206_8P4R_5%
    RP54
    1
    2
    3
    4

    LPTSTB#
    LPTAFD#
    LPTERR#

    8
    7
    6
    5

    4.7K_1206_8P4R_5%
    R480
    LPTSLCTIN#

    LPTINIT#

    4.7K_0402_5%
    R481
    1
    2

    +3VS

    1
    2
    3
    4

    4.7K_0402_5%
    C57

    LPC47N217_STQFP64

    PID1

    Base I/O Address


    0 = 02Eh
    * 1 = 04Eh

    R79
    3

    2
    3

    10K_0402_5%

    0.1U_0402_16V4Z 0.1U_0402_16V4Z
    0.1U_0402_16V4Z
    4.7U_0805_10V4Z

    R80
    1

    SIO_GPIO11

    10K_0402_5%
    R100
    SIO_GPIO40

    CLK_PCI_SIO

    CLK_14M_SIO

    10K_0402_5%

    R81
    @ 10_0402_5%
    2

    R96
    @ 10_0402_5%

    1
    C94
    @18P_0402_50V8J

    C70
    @10P_0402_25V8K

    Compal Secret Data

    Security Classification
    2005/05/26

    Issued Date

    2006/07/26

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    A

    Title

    Compal Electronics, Inc.


    SUPER I/O LPC47N217

    Size

    Document Number

    R ev
    0.4

    LA-3261P U MA
    Date:

    Tuesday, March 27, 2007

    Sheet
    E

    29

    of

    55

    0117 For SPI ROM debug

    BIOS ROM

    +3VM

    R1811

    Debug port

    0_0402_5%
    20mils

    U66

    C989
    0.1U_0402_16V4Z

    20

    SPI_CS0#
    47_0402_5%
    1
    47_0402_5%
    1

    SPI_CS0#
    SPI_CLK
    SPI_SI

    VCC

    VSS

    HOLD

    2 R1290 SPI_CLK_0 6

    2 R1294 SPI_SI_0

    LPC_AD0
    LPC_AD1
    LPC_AD2
    LPC_AD3
    B+
    31 STB_LED#
    31 CAPS_LED#
    31 NUM_LED#
    31,35 VCC1_PWRGD
    SPI_CLK_L

    SPI_SO_L01

    SPI_SO

    2
    15_0402_5%

    SPI_SO

    20

    S IC FL 32K AT26DF321-SU SOP 8P 2.7V

    SPI0 (32M*1)

    2 SPI_HOLD#_0
    3.3K_0402_5%

    20mils R1288
    1

    +3VM

    20mils
    2 SPI_HOLD#_0
    3.3K_0402_5%
    @ R1292
    0821

    +3VM
    20mils

    @ C993
    0.1U_0402_16V4Z

    @ U67
    8 VCC

    SPI_WP#

    SPI_HOLD#_0

    SPI_CS1#

    +3VM
    20

    SPI_CS1#

    @ 47_0402_5%
    SPI_CLK_L
    1
    @ 47_0402_5%
    SPI_SI_L
    1

    SPI_WP#

    2 R1296 SPI_CLK_1 6
    2 R1295 SPI_SI_1

    @ R1724
    0_0402_5%

    VSS

    2
    R1795

    SPI_CLK_L

    SPI_SI

    SPI_SI

    20

    SPI_CLK

    20

    R170
    CLRP3
    R201
    R202

    0_0402_5%

    SPI_CLK

    1
    2
    1
    1

    SPI_CS0#
    SPI_SI_L
    SPI_SO_L

    0_0402_5%

    2
    1
    2
    2

    0_0402_5%
    SHORT PADS
    0_0402_5%
    0_0402_5%

    SPICLK
    SPICS0#
    SPISI
    SPISO
    SPI_HOLD#_0
    SPI_CS1#

    Ground
    LPC_PCI_CLK
    Ground
    LPC_FRAME#
    +V3S
    LPC_RESET#
    +V3S
    LPC_AD0
    LPC_AD1
    LPC_AD2
    LPC_AD3
    VCC_3VA
    PWR_LED#
    CAPS_LED#
    NUM_LED#
    VCC1_PWRGD
    SPI_CLK
    SPI_CS#
    SPI_SI
    SPI_SO
    SPI_HOLD#
    Reserved
    Reserved
    Reserved

    ACES_87216-2404_24P
    conn@

    0907 Add 0 ohm for SPI

    HOLD

    0629 Change Pin3 to Pin23, change Pin24 to GND

    S
    C

    @ R1297
    SPI_SO_L11
    2
    15_0402_5%
    SST25LF080A_SO8-200mil

    R1287
    3.3K_0402_5%

    SPI_SI_L

    1
    20mils

    R1794
    R1793
    0_0402_5%

    SPI_SO_L

    +3VM

    @ R118 0_0402_5%
    1
    2
    @ R123 0_0402_5%
    1
    2

    19,29,31
    19,29,31
    19,29,31
    19,29,31

    R1291

    1
    2
    3
    4
    5
    6
    7
    8
    9
    10
    11
    12
    13
    14
    15
    16
    17
    18
    19
    20
    21
    22
    23
    24

    15,25 CLK_DEBUG_PORT
    19,29,31 LPC_FRAME#
    +3VS
    7,16,18,22 PLT_RST#

    SPI_WP#
    SPI_HOLD#_0

    JP52

    SPI1 (16M*1)

    0821 SPI1 no install

    0906 SPI1 install


    1116 SPI1 no install
    +3VS

    47K

    TPM1.2

    Q75
    DTA114YKA_SC59

    10K
    +3VS+3VALW

    BT_LED

    1
    4

    OUT

    NC

    WP_LED# 25

    Y8
    TPM_XTALO
    C1056 1
    10M_0402_5%

    R505
    100K_0402_5%

    Q89 @
    DTA114YKA_SC59
    WL_LED

    32.768KHZ_12.5P_1TJS125BJ2A251
    IN
    NC 2

    18P_0402_50V8J
    C1057 1
    2

    2
    1

    10K

    R1381

    SLB9635TT_TSSOP28

    28

    47K

    WL_BLUE_LED# 25,32
    D

    2
    G

    TPM_32K_CLK 31

    TPM_XTALI

    1
    3
    12

    Q79
    RHU002N06_SOT323

    +3VS

    2
    @ 0_0402_5%

    R1378
    @ 4.7K_0402_5%

    T42
    PAD

    NC
    NC
    NC

    0_0402_5%

    2
    6

    0_0402_5%

    TPM_XTALO
    TPM_XTALI 1
    R101
    PAD
    T41

    14
    13

    LPC_PD# 20
    1

    GPIO2
    GPIO

    4
    11
    18
    25

    R1409

    WL_LED# 25

    Q78
    RHU002N06_SOT323

    2
    G

    3
    2

    LCLK
    LFRAME#
    LRESET#
    SERIRQ
    CLKRUN#
    PP

    R1379 2

    XTALO
    XTALI
    TPM
    SLB 9635 TT 1.1

    LPC_PD#

    28
    9
    8

    21
    22
    16
    27
    15
    7

    LPCPD#
    TESTB1/BADD
    TEST1

    CLK_PCI_TCG
    15 CLK_PCI_TCG
    LPC_FRAME#
    19,29,31 LPC_FRAME#
    PLT_RST_B#
    22,25,29 PLT_RST_B#
    SIRQ
    20,25,29,31 SIRQ
    PM_CLKRUN#
    20,25,29,31 PM_CLKRUN#
    1
    2
    +3VS
    R1380
    @ 4.7K_0402_5%

    LAD0
    LAD1
    LAD2
    LAD3

    2
    Q88
    DTA114YKA_SC59

    4.7K_0402_5%

    26
    23
    20
    17

    10K

    LPC_AD0
    LPC_AD1
    LPC_AD2
    LPC_AD3

    LPC_AD0
    LPC_AD1
    LPC_AD2
    LPC_AD3

    0.1U_0402_16V4Z

    R1377

    GND
    GND
    GND
    GND

    19,29,31
    19,29,31
    19,29,31
    19,29,31

    BLUE

    47K

    VDD
    VDD
    VDD

    U69

    Base I/O Address


    +3VS
    0 = 02Eh
    * 1 = 04Eh

    0.1U_0402_16V4Z
    2

    2
    0.1U_0402_16V4Z

    WW_LED# 25

    +3VS
    C1052

    VSB

    C1053

    24
    19
    10

    0.1U_0402_16V4Z
    1
    1
    C1054
    C1055

    Mini-PCIE Card LED

    R504
    100K_0402_5%

    18P_0402_50V8J

    +3VALW

    Q142

    SI2301BDS_SOT23

    20070209 Add for FPR

    1
    1

    S4_STATE

    28

    0_0402_5%
    2
    1 USB20_N1_R
    2
    1USB20_P1_R
    0_0402_5%

    R1334
    R1335

    20 USB20_N1
    20 USB20_P1

    D54
    @ PACDN042_SOT23~D

    Finger printer

    C206
    0.1U_0402_16V4Z

    JP38
    1
    2
    3
    4

    1
    2
    3
    4

    ACES_85205-0400
    conn@

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date

    +3VS

    @ R1808
    1
    2
    0_0603_5%

    Deciphered Date

    2006/07/26

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    Compal Electronics, Inc.


    TCG/BIOS ROM/PS2/LED/SW

    Size

    Document Number

    R ev
    0.4

    LA-3261P U MA
    Date:

    Tuesday, March 27, 2007

    Sheet
    1

    30

    of

    55

    +3VL

    CRACK_BGA
    0_0402_5%
    1
    2
    CRACK_GPIO28 11,21
    0_0402_5%
    2
    1 PWR_GD
    +3VL
    @
    R1642
    R1646
    R1726
    2
    1
    1013 no install R1726
    +3VS
    1070@ 0_0402_5%
    1213 Install R1726
    1
    T32 T33
    0.1U_0402_16V4Z
    C75 PAD
    PAD
    0621 Add PM_SLP_M#
    1070@
    2
    PM_SLP_M#
    PM_SLP_M# 20,34,42,46
    GPIO29
    20
    1
    2
    EAPD
    26,27
    R38 0_0402_5%
    GPIO30
    R141 1
    2 0_0402_5%
    AMT ADP_PRES 20
    1
    PCI_SERR# 18,25
    +3VL
    1070@
    10U_0805_10V4Z
    C1289
    2

    C34
    4.7U_0805_10V4Z

    +3VL
    D

    PWR1

    29
    28
    27
    26
    25
    24
    23
    22

    KSI0
    KSI1
    KSI2
    KSI3
    KSI4
    KSI5
    KSI6
    KSI7

    TP_CLK
    TP_DATA
    KBD_CLK
    KBD_DATA
    PS2_CLK
    PS2_DATA

    35
    36
    38
    40
    41
    42

    32

    KSI[0..7]

    R578
    TP_CLK

    10K_0402_5%
    R580
    2 TP_DATA

    10K_0402_5%
    RP60
    8
    7
    6
    5

    KBD_CLK
    KBD_DATA
    PS2_CLK
    PS2_DATA

    32
    32
    33
    33
    33
    33

    10K_1206_8P4R_5%

    +3VS

    TP_CLK
    TP_DATA
    KBD_CLK
    KBD_DATA
    PS2_CLK
    PS2_DATA

    20,25,29,30 PM_CLKRUN#
    20,25,29,30 SIRQ
    15 CLK_PCI_EC
    20 RUNSCI_EC#
    R1289

    19,29,30
    19,29,30
    19,29,30
    19,29,30

    2 RUNSCI_EC#

    10K_0402_5%

    LPC_AD3
    LPC_AD2
    LPC_AD1
    LPC_AD0

    19,29,30 LPC_FRAME#
    20,29 NPCI_RST#
    44
    ADP_PS1

    PM_CLKRUN#
    SIRQ
    CLK_PCI_EC
    RUNSCI_EC#

    55
    57
    54
    76

    LPC_AD3
    LPC_AD2
    LPC_AD1
    LPC_AD0

    51
    50
    48
    46

    LPC_FRAME#
    PLT_RST#

    52
    53
    45

    C R Y1

    R75
    2
    1
    120K_0402_5%

    1
    IN

    1
    @ R1784

    NC

    C349
    NC

    18P_0402_50V8J
    C350

    @ 10P_0402_50V8J

    Y2
    1

    2
    0_0402_5%

    0821

    @C661

    2 18P_0402_50V8J

    PGM

    0821 Install R29 100K ohm

    BATCON 39
    THM_MAIN# 37
    R581 1
    2
    10K_0402_5%

    +3VL

    T37
    EC_GPIO27 2

    Cap_DAT 32
    Cap_CLK 32
    ME_EC_DATA1 20
    ME_EC_CLK1 20

    R282

    D6 CH751H-40_SC76
    2
    GATEA20 19

    PAD

    C92

    CLK_14M_KBC1

    NUM_LED# 30
    SLP_S3# 20,23,26,27,33,34,41,42,43,44

    2 1

    10_0402_5% 10P_0402_25V8K
    @
    @

    Pin1 250 -- TEST Pin ( NC !! )


    Pin57 250 -- MODE

    ADP_PRES 23,38,39,40,44

    R25
    AB1A_DATA
    AB1A_CLK

    EA Strap#/GPIO26/KSO17
    CLOCKI
    32KHZ_OUT/GPIO22
    RESET_OUT#/GPIO06
    PWRGD
    VCC1_PWRGD
    24MHZ_OUT/GPIO19/WINDMON
    TEST PIN

    111
    112

    AB1A_DATA
    AB1A_CLK

    109
    110

    AB1B_DATA
    AB1B_CLK

    73

    Cap_INT

    108
    59
    75
    60
    78
    77
    61

    EA#
    CLK_14M_KBC
    32K_CLK
    PM_POK
    PWR_GD
    VCC1_PWRGD

    69

    FWP#

    AB1A_DATA 37
    AB1A_CLK 37

    AB1B_DATA 37
    AB1B_CLK 37
    Cap_INT

    32

    CLK_14M_KBC 15

    Pin50 250 -- 24MHz_Out


    TEST
    1
    Pin52 250 -- XOSEL
    R977

    PM_POK 43
    PWR_GD 20,25,34,35,43,44
    VCC1_PWRGD 30,35
    ADP_PS0 44
    +3VL

    2
    300_0402_5%

    JP31
    Pin91 250 -- nDMS_LED

    DMS_LED#/GPIO10
    BAT_LED#
    PWR_LED#/8051TX
    FDD_LED#/8051RX

    116
    113
    115
    114

    ADP_ID
    44
    AMBER_BATLED# 25
    STB_LED# 30
    CAPS_LED# 30

    AMBER_BATLED#
    STB_LED#
    CAPS_LED#

    +3VL

    R58
    R59
    R60

    VCC1_PWRGD
    2 100K_0402_5% NUM_LED#
    2 100K_0402_5% STB_LED#
    2 100K_0402_5% CAPS_LED#

    1
    1
    1

    Remove from daughter board


    KBC1070_VTQFP128

    PM_POK

    10K_0402_5%

    @ R127
    0_0402_5%
    2

    AB1B_DATA
    1

    Cap_DAT

    AB1B_CLK1

    Cap_CLK

    1
    2
    3
    4
    5
    6

    @ ACES_85201-0602

    For KBC debugging used.

    1 2

    ADP_EN

    FWP#

    2
    1
    @ 1K_0402_5%

    TEST

    2
    1
    @ 1K_0402_5%

    EA#

    44

    TPM_32K_CLK 30

    R78

    1
    1K_0402_5%
    4

    Y1

    GND

    VCC

    A2

    Y2

    R1796
    D68A @
    BAV99DW-7_SOT363

    1114 Eliminate glitch

    LED_STB# 25,32,33

    +3VL

    @ 4.7K_0402_5%

    20,25,34,35,43,44 PWR_GD

    43 PGOOD_PU19

    O
    B

    U43B
    SN74LVC08APW_TSSOP14

    @ 2.2K_0402_5%

    2006/02/13

    2006/07/26

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    3

    2
    R1800
    0_0402_5%

    PM_PWROK 7,20,45
    VGATE

    Compal Secret Data

    Security Classification
    Issued Date

    0811 For OTS 214499

    +3V_U43

    1031 Modify circuit


    R1751

    A1

    NC7WZ07P6X_NL_SC70-6

    PM_RSMRST# 20

    @ MMBT3906_SOT23
    2

    1K_0402_5%

    +3VL

    R27

    0_0402_5%
    0_0402_5%
    0_0402_5%
    0_0402_5%

    2
    2
    2
    2

    +3VALW
    1

    @ BAV99DW-7_SOT363

    R28

    2 @ 0_0402_5%

    NUM_LED#
    SLP_S3#

    4.7K_0402_5%
    2
    2
    +3VL
    4.7K_0402_5%

    R20 1
    R18 1

    1
    1
    1
    1

    +3VL
    THM_MAIN# 1 R600
    2
    210K_0402_1%
    ADP_PS1
    1
    2
    R538
    @ 100K_0402_5%
    EC_GPIO27 1 R33
    2
    100K_0402_5%

    D10 CH751H-40_SC76

    Q131

    R65

    NO SHORT PADS

    103
    105
    4
    74

    @ ACES_85201-0602

    0619 change

    PGM 1

    R97

    GPIO20/PS2CLK
    GPIO21/PS2DAT
    GPIO24/KSO16
    GPIO27

    KB_RST# 19

    THM_MBAY# 37
    ON/OFFBTN_KBC# 32
    LOW_BAT# 20
    KSO14
    32
    KSO15
    32

    0_0402_5%
    2

    D68B

    0_0402_5%

    AB2A_DATA R156
    AB2A_CLK R155
    AB2B_DATA R140
    AB2B_CLK R154
    BATCON
    THM_MAIN#
    A20M

    CH751H-40_SC76

    R62 250@

    R1749

    R29
    1

    J3

    88
    89
    90
    91
    92
    101
    102

    PGM Strap/GPIO25

    RSMRST circuit

    100K_0402_5%

    RSMRST_EC
    CRACK_BGA
    EC_GPIO9

    A_SD
    27
    FAN_PWM 4
    CHGCTRL 38,39

    1
    2
    3
    4
    5
    6

    EC_GPIO9
    CRACK_BGA

    D7

    U82

    RSMRST_EC
    FWP#

    R91

    85
    86
    87

    BATSELB_A# 39

    THM_MBAY#
    ON/OFFBTN_KBC#
    LOW_BAT#
    KSO14
    KSO15

    JP43
    VCC1_PWRGD

    10K_0402_5%

    STB_LED#

    @ 1K_0402_5%

    0.1U_0402_16V4Z

    32K_CLK

    GPIO07/PWM3
    GPIO08/RXD
    GPIO09/TXD

    KBC_PWR_ON 40
    GREEN_BATLED# 19,25

    2
    0_0402_5%
    @ R157

    R52

    C58
    1

    107
    79
    80
    81
    83

    @ C1317
    0.1U_0402_16V4Z

    1
    2
    1107 Install R1784
    1128 Install R1783
    0110 R1784 connected to +3VL
    20070226 Add R1809 to GND

    32.768KHZ_12.5P_1TJS125BJ2A251

    AGND FILTER

    GPIO01
    GPIO02
    GPIO03
    GPIO04/KSO14
    GPIO05/KSO15

    R1809
    0_0402_5%
    2

    +3VL

    1U_0603_10V4Z

    C80

    OUT

    @ 10_0402_5%
    2

    VCC0

    0_0402_5%
    2

    BATSELB_A#
    KBRST#
    A_SD
    FAN_PWM
    CHGCTRL

    AB1B_DATA
    AB1B_CLK

    XTAL1
    XTAL2

    68

    +RTCVCC
    @ R1783
    1
    +3VL

    OUT7/SMI#
    OUT8/KBRST
    OUT9/PWM2
    OUT10/PWM0
    OUT11/PWM1

    123
    122
    121
    120
    118

    GPIO11/AB2A_DATA
    GPIO12/AB2A_CLK
    GPIO13/AB2B_DATA
    GPIO14/AB2B_CLK
    GPIO15/FAN_TACH1
    GPIO16/FAN_TACH2
    GPIO17/A20M

    Access Bus Interface

    LFRAME#
    LRESET#
    LPCPD#/GPIO23

    NC
    NC
    NC
    NC
    NC
    NC
    NC
    NC
    NC
    NC

    R86

    LPC
    Bus

    1
    2
    3
    30
    31
    32
    33
    34
    43
    44

    R74
    @ 2M_0402_5%

    LAD[3]
    LAD[2]
    LAD[1]
    LAD[0]

    Power Mgmt/SIRQ

    CLK_PCI_EC

    CLKRUN#
    SER_IRQ
    PCI_CLK
    EC_SCI#

    70
    71

    C R Y2

    IMCLK
    IMDAT
    KCLK
    KDAT
    EMCLK
    EMDAT

    KBC_PWR_ON
    GREEN_BATLED#

    14

    1
    2
    3
    4

    BIOS debug port


    Place under KB area

    124
    125

    OUT0
    OUT1/IRQ8#

    VSS
    VSS
    VSS
    VSS
    VSS
    VSS
    VSS

    Pin3 250 : KSO12/OUT8/KBRST


    +5VS

    11
    37
    47
    56
    104
    82
    117

    10K_1206_8P4R_5%

    8
    7
    6
    5

    4.7K_1206_8P4R_5%

    KSI0
    KSI1
    KSI2
    KSI3
    KSI4
    KSI5
    KSI6
    KSI7

    KSI7
    KSI6
    KSI5
    KSI4

    AGND

    8
    7
    6
    5

    1
    2
    3
    4

    R575

    KSO0
    KSO1
    KSO2
    KSO3
    KSO4
    KSO5
    KSO6
    KSO7
    KSO8
    KSO9
    KSO10
    KSO11
    KSO12/GPIO00/KBRST
    KSO13/GPIO18

    SMSC_1070_TQFP-128P

    21
    20
    19
    18
    17
    16
    13
    12
    10
    9
    8
    7
    6
    5

    RP59

    Keyboard/Mouse Interface

    KSO0
    KSO1
    KSO2
    KSO3
    KSO4
    KSO5
    KSO6
    KSO7
    KSO8
    KSO9
    KSO10
    KSO11
    KSO12
    KSO13

    10K_1206_8P4R_5%

    1
    2
    3
    4

    VCC1
    VCC1
    VCC1
    VCC1
    VCC1

    KSO[0..13]

    KSO[0..13]

    39
    58
    84
    106
    14

    U47
    32

    72

    KSI0
    KSI3
    KSI2
    KSI1

    NC
    NC
    NC
    NC
    NC
    NC

    8
    7
    6
    5

    94
    95
    96
    97
    127
    128

    RP58
    1
    2
    3
    4

    RP1
    AB1A_CLK
    AB1A_DATA
    AB1B_CLK
    AB1B_DATA

    93
    98
    99
    100
    126

    GPIO28
    GPIO29
    GPIO30
    GPIO31
    GPIO32

    C36
    0.1U_0402_16V4Z

    CAP

    C51
    0.1U_0402_16V4Z

    General Purpose I/O Interface

    1
    C52
    0.1U_0402_16V4Z

    VCC2

    C37
    0.1U_0402_16V4Z

    15

    0.1U_0402_16V4Z

    49

    C39

    Miscellaneous

    VCC1

    2
    1
    0_0603_5% R1478
    1021@

    +3VS

    NC
    NC
    NC
    NC
    NC
    NC

    +3VL

    PWR1

    62
    63
    64
    65
    66
    67

    1070@
    2
    1
    0_0603_5% R1477

    119

    1213 Install R1646,C75

    Title

    7,20

    Compal Electronics, Inc.


    LPC47N1021

    Size

    Document Number

    R ev
    0.4

    LA-3261P UMA
    Date:

    Tuesday, March 27, 2007

    Sheet
    1

    31

    of

    55

    SWITCH BOARD.

    0622 change

    @ R21
    0_0402_5%
    Cap_RST#
    1
    2

    220P_0402_50V4Z
    2
    220P_0402_50V4Z
    2

    INT_KBD CONN.

    C749
    LED_STB#

    1
    C750

    ON /OFF#

    Cap_RST#_SB 20

    31

    KSO[0..15]

    31

    KSI[0..7]

    KSO[0..15]
    KSI[0..7]
    JP6
    30
    29
    28
    27
    26
    25
    24
    23
    22
    21
    20
    19
    18
    17
    16
    15
    14
    13
    12
    11
    10
    9
    8
    7
    6
    5
    4
    3
    2
    1

    Cap_INT
    1

    @ JP20
    9 9
    10 10
    11
    11
    12
    12
    13
    13
    14
    14
    15 15
    16 16

    +3VS

    JP18
    1
    3
    5
    7
    9

    Cap_RST#
    31

    Cap_DAT

    2
    4
    6
    8
    10

    Cap_CLK 31
    Cap_INT 31
    WL_BLUE_LED# 25,30

    ACES_85203-1002
    conn@

    +3VALW
    1
    2
    3
    4
    5
    6
    7
    8

    LID_SW#

    1
    2
    3
    4
    5
    6
    7
    8

    KSO15
    KSO10
    KSO11
    KSO14
    KSO13
    KSO12
    KSO3
    KSO6
    KSO8
    KSO7
    KSO4
    KSO2
    KSI0
    KSO1
    KSO5
    KSI3
    KSI2
    KSO0
    KSI5
    KSI4
    KSO9
    KSI6
    KSI7
    KSI1

    LID_SW# 17,20

    LED_STB#
    ON /OFF#

    LED_STB# 25,31,33
    ON /OFF#

    LID_SW#

    Aces_85203-08421-11
    D76
    PJDLC05_SOT23~D

    +3VL

    C1
    10P_0402_50V8K
    @

    R30
    10K_0402_5%

    0901 Change Cap_RST#_SB to SB GPIO28


    0809 Connect Pin1 to +3VL, Pin2 to +3VS

    0104 Change JP20 to FFC connector

    0829 Change to WL_BLUE_LED#

    WL,Vol up,Vol down,Mute,Present button

    On/off ,information button

    30
    29
    28
    27
    26
    25
    24
    23
    22
    21
    20
    19
    18
    17
    16
    15
    14
    13
    12
    11
    10
    9
    8
    7
    6
    5
    4
    3
    2
    1

    A30
    A29
    A28
    A27
    A26
    A25
    A24
    A23
    A22
    A21
    A20
    A19
    A18
    A17
    A16
    A15
    A14
    A13
    A12
    A11
    A10
    A9
    A8
    A7
    A6
    A5
    A4
    A3
    A2
    A1

    60
    59
    58
    57
    56
    55
    54
    53
    52
    51
    50
    49
    48
    47
    46
    45
    44
    43
    42
    41
    40
    39
    38
    37
    36
    35
    34
    33
    32
    31

    KSO15
    KSO10
    KSO11
    KSO14
    KSO13
    KSO12
    KSO3
    KSO6
    KSO8
    KSO7
    KSO4
    KSO2
    KSI0
    KSO1
    KSO5
    KSI3
    KSI2
    KSO0
    KSI5
    KSI4
    KSO9
    KSI6
    KSI7
    KSI1

    +3VS
    conn@
    FOX_GB1SV301-160K-7F
    0.1U_0402_16V4Z 1

    MDC 1.5 Conn.

    1103 Connect pin2 to +3VS

    CP1
    KSO9
    KSI6
    KSI7
    KSI1

    C5
    2

    +3VS

    JP32
    HDA_SDOUT_MDC

    19 HDA_SDOUT_MDC

    R1313 HDA_SYNC_MDC
    2
    1HDA_SDIN1_MDC
    33_0402_5%

    19 HDA_SYNC_MDC
    19 HDA_SDIN1

    1
    3
    5
    7
    9
    11

    GND1
    RES0
    IAC_SDATA_OUT
    RES1
    GND2
    3.3V
    IAC_SYNC
    GND3
    IAC_SDATA_IN
    GND4
    IAC_RESET#
    IAC_BITCLK

    2
    4
    6
    8
    10
    12

    CP6

    4
    3
    2
    1

    KSO2
    KSO4
    KSO7
    KSO8

    5
    6
    7
    8

    100P_1206_8P4C_50V8

    HDA_BITCLK_MDC

    HDA_BITCLK_MDC 19

    CP5

    4
    3
    2
    1

    KSO6
    KSO3
    KSO12
    KSO13

    5
    6
    7
    8

    13
    14
    15
    16
    17
    18
    19
    20

    R1753

    13
    14
    15
    16
    17
    18
    19
    20

    100P_1206_8P4C_50V8
    1

    0_0402_5%

    Connector for MDC Rev1.5

    0620 RESERVE FOR MDC

    4
    3
    2
    1

    conn@

    CP2

    4
    3
    2
    1

    KSO14
    KSO11
    KSO10
    KSO15

    5
    6
    7
    8

    100P_1206_8P4C_50V8

    Power button

    TrackPoint CONN.

    +3VL

    5
    6
    7
    8

    100P_1206_8P4C_50V8

    CP7
    KSI3
    KSO5
    KSO1
    KSI0

    TYCO_1-179396-2~D

    5
    6
    7
    8

    100P_1206_8P4C_50V8

    CP3
    KSI2
    KSO0
    KSI5
    KSI4

    HDA_RST#_MDC_R

    19,26 HDA_RST#_MDC

    4
    3
    2
    1

    4
    3
    2
    1

    5
    6
    7
    8

    100P_1206_8P4C_50V8

    T/P BOARD.
    +5VS

    1U_0603_10V4Z

    ON/OFFBTN#

    SP_DATA

    0.1U_0402_16V4Z

    SP_CLK

    conn@

    R8
    1
    2
    100K_0402_5%

    1
    2
    Q70
    RHU002N06_SOT323 D42
    CH751H-40_SOD323

    C321

    TP_DATA
    TP_CLK

    @ PACDN042_SOT23~D

    TP_DATA
    TP_CLK

    +5VS

    1
    2
    3
    4
    5
    6
    7
    8

    C319
    0.1U_0402_16V4Z

    ACES_87212-0800

    D67

    TP_DATA
    TP_CLK

    2
    G

    +5VS

    ACES_87153-0801L

    ON/OFFBTN_KBC# 31

    JP17
    31
    31

    100K_0402_5%
    1
    C11

    14
    G

    SP_CLK

    conn@
    D58
    PJDLC05_SOT23~D

    ON/OFFBTN# 20

    1U_0603_10V4Z

    13
    1

    ON/OFFBTN_KBC#

    +3VALW
    3

    C23

    ON/OFF#

    2
    33

    100K_0402_5%
    U5F
    SN74LVC14APWLE_TSSOP14
    R26
    2
    O 12 1

    2
    4
    6
    8

    1
    1

    SP_DATA

    R22

    ON /OFF#

    1
    3
    5
    7

    R536

    100K_0402_5%

    +5VS

    JP14

    Compal Secret Data

    Security Classification
    Issued Date

    2006/02/13

    Deciphered Date

    2006/07/26

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

    Title

    Compal Electronics, Inc.


    MDC/KBD/ON_OFF/LID

    Size

    Document Number

    R ev
    0.4

    LA-3261P UMA
    Date:

    Tuesday, March 27, 2007

    Sheet

    32

    of

    55

    +5VALW

    DOCK CONN. 184PIN

    20070226 Change RJ11 connector

    R529
    100K_0402_5%

    2
    1000P_0402_50V7K
    2

    34
    DVI_TX2DVI_TX1DVI_CLKDVI_TX0-

    1000P_0402_50V7K

    R1479
    R1480
    R1481
    R1482

    1
    1
    1
    1

    2
    2
    2
    2

    SLP_S5

    DVI_TX2+
    DVI_TX1+
    DVI_CLK+
    DVI_TX0+

    100_0402_1%
    100_0402_1%
    100_0402_1%
    100_0402_1%

    Q65

    2
    G

    SWAP

    ON/OFF#

    24
    24

    MDO2+
    MDO2-

    24
    24

    MDO0+
    MDO0-

    ON /OFF#

    1
    2
    3
    4
    5
    6
    7
    8
    9
    10
    11
    12
    13
    14
    15
    16
    17
    18
    19
    20
    21
    22
    23
    24
    25
    26
    27
    28
    29
    30
    31
    32
    33
    34
    35
    36
    37
    38
    39
    40
    41
    42
    43
    44
    45

    MDO2+
    MDO2MDO0+
    MDO0LED_ACT_LAN#_DOCK
    LED_LINK_LAN#_DOCK

    16
    16
    16
    16
    16

    0314 change

    1013 change

    9
    9
    9

    D_VSYNC
    D_HSYNC
    D_DDCDATA
    D_DDCCLK
    DVI_DETECT

    R1404
    R1428
    R1429

    RED
    GREEN
    BLUE

    2 0_0603_5%
    2 0_0603_5%
    2 0_0603_5%

    1
    1
    1

    9,16
    9,16
    9,16

    DDC-DATA
    DDC_CLK
    DVI_DETECT
    DOCK_RED
    DOCK_GRN
    DOCK_BLU

    COMP
    CRMA
    LUMA

    26 LINE_IN_SENSE
    44 ACOCP_EN#

    29
    29
    29
    29
    29
    29
    29
    29

    DCD#1
    R I#1
    DTR#1
    CTS#1
    RTS#1
    DSR#1
    TXD1
    RXD1

    DCD#1
    RI#1
    DTR#1
    CTS#1
    RTS#1
    DSR#1
    TXD1
    RXD1

    29
    29
    29

    LPTSTB#
    LPTAFD#
    LPTERR#

    LPTSTB#
    LPTAFD#
    LPTERR#

    conn@

    conn@

    G1

    P1

    1
    2
    3
    4
    5
    6
    7
    8
    9
    10
    11
    12
    13
    14
    15
    16
    17
    18
    19
    20
    21
    22
    23
    24
    25
    26
    27
    28
    29
    30
    31
    32
    33
    34
    35
    36
    37
    38
    39
    40
    41
    42
    43
    44
    45

    83
    84
    85
    86
    87
    88
    89
    90
    91
    92
    93
    94
    95
    96
    97
    98
    99
    100
    101
    102
    103
    104
    105
    106
    107
    108
    109
    110
    111
    112
    113
    114
    115
    116
    117
    118
    119
    120
    121
    122
    123
    124
    125
    126
    127

    173

    83
    84
    85
    86
    87
    88
    89
    90
    91
    92
    93
    94
    95
    96
    97
    98
    99
    100
    101
    102
    103
    104
    105
    106
    107
    108
    109
    110
    111
    112
    113
    114
    115
    116
    117
    118
    119
    120
    121
    122
    123
    124
    125
    126
    127

    29
    29
    29
    29
    29
    29
    29
    29
    29
    29
    29
    29
    29
    29

    DOCKVIN

    DETECT
    MDO3+
    MDO3-

    MDO3+
    MDO3-

    24
    24

    MDO1+
    MDO1-

    MDO1+
    MDO1-

    24
    24

    PWR_LED
    1
    R515
    DVI_CLK
    DVI_DAT

    SLP_S5#_5R
    1K_0402_5%

    DVI_CLK
    DVI_DAT

    DVI_TX2-

    LPTACK#
    LPTBUSY
    LPTPE
    LPTSLCT
    LPD7
    LPD6
    LPD5
    LPD4
    LPD3
    LPD2
    LPD1
    LPD0
    LPTSLCTIN#
    LPTINIT#

    LPTACK#
    LPTBUSY
    LPTPE
    LPTSLCT
    LPD7
    LPD6
    LPD5
    LPD4
    LPD3
    LPD2
    LPD1
    LPD0
    LPTSLCTIN#
    LPTINIT#

    16
    16

    DVI_TX2- 16

    DVI_TX2+

    DVI_TX2+ 16

    DVI_TX1-

    DVI_TX1- 16
    20

    DVI_TX1+

    USB20_N7

    DVI_TX1+ 16

    DVI_CLK-

    20

    USB20_P7

    20

    USB20_N9

    DVI_CLK+ 16

    20

    USB20_P9

    DVI_TX0- 16

    29
    SER_SHD
    29 EXPCRD_RST#

    DVI_CLK- 16

    DVI_CLK+
    DVI_TX0DVI_TX0+

    SER_SHD
    EXPCRD_RST#
    DETECT

    DVI_TX0+ 16

    DOCK_ADP_SIGNAL
    D OCK_ID

    176
    169
    175
    179
    181
    177

    DOCK_ID 20
    +3VS
    R1387
    D OCK_ID

    46
    47
    48
    49
    50
    51
    52
    53
    54
    55
    56
    57
    58
    59
    60
    61
    62
    63
    64
    65
    66
    67
    68
    69
    70
    71
    72
    73
    74
    75
    76
    77
    78
    79
    80
    81
    82

    46
    47
    48
    49
    50
    51
    52
    53
    54
    55
    56
    57
    58
    59
    60
    61
    62
    63
    64
    65
    66
    67
    68
    69
    70
    71
    72
    73
    74
    75
    76
    77
    78
    79
    80
    81
    82
    GND
    GND
    GND
    GND
    GND
    GND

    128
    129
    130
    131
    132
    133
    134
    135
    136
    137
    138
    139
    140
    141
    142
    143
    144
    145
    146
    147
    148
    149
    150
    151
    152
    153
    154
    155
    156
    157
    158
    159
    160
    161
    162
    163
    164

    128
    129
    130
    131
    132
    133
    134
    135
    136
    137
    138
    139
    140
    141
    142
    143
    144
    145
    146
    147
    148
    149
    150
    151
    152
    153
    154
    155
    156
    157
    158
    159
    160
    161
    162
    163
    164

    GND
    GND
    GND
    GND
    GND
    GND

    178
    180
    182
    174
    171
    170

    KBD_DATA
    KBD_CLK
    CPPE#
    PS2_DATA
    PS2_CLK
    DOCK_HPS#

    DLINE_IN_L 26
    DLINE_IN_R 26

    DLINE_OUT_L
    DLINE_OUT_R

    DLINE_OUT_L 27
    DLINE_OUT_R 27

    PCIE_TXP5

    PCIE_TXP5 20

    PCIE_TXN5
    PCIE_RXP5_DOCK
    PCIE_RXN5_DOCK

    PCIE_TXN5 20

    165

    CLK_PCIE_DOCK

    P2

    PCIE_RXP5 20
    PCIE_RXN5 20

    CLK_PCIE_DOCK 15

    CLK_PCIE_DOCK#

    CLK_PCIE_DOCK# 15

    PREP#
    VA_ON#

    PREP#
    1

    R66
    1K_0402_5%
    +5VS

    20,24,26

    C59
    0.1U_0402_16V4Z

    C678

    167

    ADP_SIGNAL

    2
    @ 22U_1206_10V4Z

    DOCK_MOD_RING

    R1401
    DOCK_ADP_SIGNAL 1

    G2

    1 R1346 2 PCIE_RXP5
    0_0402_5%
    1 R1347 2 PCIE_RXN5
    0_0402_5%

    @ 10K_0402_5%

    166

    RING

    TIP

    168

    DOCK_MOD_TIP

    JAE_SP03-14588-PCL03

    JAE_SP03-14588-PCL03
    1K_0402_1%

    D59
    @ PACDN042_SOT23~D
    3

    Closed to JP30

    1013 Add CRT circuit


    +3VS

    +3VS
    +3VS

    C360
    2

    C366

    1
    1

    0.1U_0402_16V4Z
    U52
    5 VCC
    9
    16

    BLUE
    L_BLUE

    20

    ISO_PREP#

    L_BLUE

    1
    2

    ISO_PREP#

    4
    3

    A
    B

    C365

    0.1U_0402_16V4Z
    U51
    5 VCC
    9
    16

    GREEN
    L_GREEN

    OE

    L_GREEN

    1
    2

    ISO_PREP#

    OE

    GND

    GND

    FSA66P5X_SC70-5

    A
    B

    U50

    9
    16

    RED
    L_RED

    L_RED

    1
    2

    ISO_PREP#

    OE

    GND

    +3VALW
    LED_ACT_LAN#_DOCK
    C1372

    0108 EMI request

    100P_0402_50V8J

    R526

    1
    10K_0402_5%

    LED_ACT_LAN# 23,24
    R1806

    2
    25,31,32 LED_STB#
    C1373
    G
    @
    100P_0402_50V8J
    Q59
    2
    1
    RHU002N06_SOT323

    S
    LED_LINK_LAN#
    A

    PWR_LED

    1
    2LED_LINK_LAN#_DOCK
    0_0402_5%

    Q63
    RHU002N06_SOT323

    2
    G

    LED_ACT_LAN#

    @
    2

    LED_LINK_LAN#_DOCK_R
    1

    A
    B

    FSA66P5X_SC70-5

    LED_LINK_LAN# 20,23,24

    20,23,26,27,31,34,41,42,43,44 SLP_S3#
    B

    Compal Secret Data

    Security Classification
    2006/02/13

    Issued Date
    3

    R1805
    1
    2
    0_0402_5%

    Q62
    RHU002N06_SOT323

    2
    G

    R527
    2
    1
    10K_0402_5%

    LED_ACT_LAN#_DOCK_R
    D

    VCC

    +3VM_LAN

    1
    0.1U_0402_16V4Z

    FSA66P5X_SC70-5

    KBD_DATA 31
    KBD_CLK 31
    CPPE#
    15
    PS2_DATA 31
    PS2_CLK 31
    DOCK_HPS# 27

    DLINE_IN_L
    D LINE_IN_R

    32

    E-T_3800-02_2P
    RHU002N06_SOT323

    JP30B
    JP30A
    172

    conn@

    2
    1

    L_BLUE

    Closed to dock JP30

    C748
    1

    VIN

    DOCK_MOD_RING
    DOCK_MOD_TIP

    L_GREEN

    JP29
    SLP_S5#_5R

    L10
    KC FBM-L18-453215-900LMA90T_1812
    2
    1
    DOCKVIN
    1
    1
    C72
    C73

    @ 1000P_0402_50V4Z
    2
    @ 1000P_0402_50V4Z
    2
    @ 1000P_0402_50V4Z
    2

    1
    C747

    C746
    L_RED

    2006/07/26

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    C

    Title

    Compal Electronics, Inc.


    Docking CONN.

    Size

    Document Number

    R ev
    0.4

    LA-3261P U MA
    Date:

    Tuesday, March 27, 2007

    Sheet
    E

    33

    of

    55

    +3VALW to +3VM Transfer

    +1.25VM to +1.25VS Transfer

    +3VALW

    R1643
    100K_0402_5%

    10U_0805_10V4Z
    0317 add

    1
    1

    C1271

    C254
    330U_D2_2.5VM_R15

    C1272

    R1647
    100K_0402_5%

    C1274

    C1275
    10U_0805_10V4Z

    PM_SLP_M
    1

    1
    R1807
    100K_0402_5%
    2

    0119 Add R1807 and no stuff

    Q110

    1
    10U_0805_10V4Z

    1
    2
    3
    4

    C132

    BSS138_SOT23

    @ R630
    100K_0402_5%

    0216 Install R1807 and non install R630

    SI4800DY_SO8
    2 10U_0805_10V4Z

    0.01U_0402_25V7Z

    C127

    S
    S
    S
    G

    2
    G

    20 LAN_WOL_EN

    U13

    330K_0402_5%

    2
    1

    BSS138_SOT23

    B+
    D
    D
    D
    D

    C121

    +3VS

    8
    7
    6
    5

    470_0402_5%
    1

    +3VALW

    0.1U_0402_16V4Z
    R470

    Q108
    BSS138_SOT23

    Q116
    3

    +3VALW to +3VS Transfer

    2
    G

    +3VALW

    2
    G

    20,31,42,46 PM_SLP_M#

    LAN_WOL_EN#
    D

    0.1U_0402_16V4Z

    2
    2

    RU NON

    1
    2
    3
    4

    S
    S
    S
    G

    SI4800DY_SO8
    2 10U_0805_10V4Z

    R139

    D
    D
    D
    D

    SI4800DY_SO8

    1
    2
    3
    4

    S
    S
    S
    G

    C1270

    D
    D
    D
    D

    C1273
    1
    10U_0805_10V4Z

    +3VALW
    U77

    8
    7
    6
    5

    +1.25VS

    8
    7
    6
    5

    +3VM
    U78

    B+
    +1.25VM

    C128

    +1.05VM

    +1.25VM

    +3VM

    C120
    0.01U_0402_25V7Z

    R631

    R632

    R633

    +5VALW

    1 2

    LAN_WOL_EN#

    2
    G
    Q113
    RHU002N06_SOT323

    0718 Change net from PM_SLP_M# to LAN_WOL_EN#


    +3VL

    +5VALW
    1

    +3VL
    C77
    10U_0805_10V4Z

    R125

    R135
    R129

    RU NON

    100K_0402_5%
    2

    SLP_S3

    20,23,26,27,31,33,41,42,43,44 SLP_S3#

    SLP_S3# 2
    G
    Q19
    RHU002N06_SOT323

    SLP_S4

    SLP_S4

    D
    20,42

    33

    SLP_S5

    SLP_S5

    0.1U_0402_16V4Z

    100K_0402_5%
    100K_0402_5%

    2
    G

    SLP_S4#

    20,42

    Q23
    RHU002N06_SOT323

    SLP_S5#

    SLP_S5#

    2
    G

    Q22
    RHU002N06_SOT323

    C71

    SI4800DY_SO8
    2 10U_0805_10V4Z

    1
    2
    3
    4

    S
    S
    S
    G

    D
    D
    D
    D

    C86

    2
    G
    Q112
    RHU002N06_SOT323

    +5VS
    U9

    8
    7
    6
    5

    2
    G
    Q111
    RHU002N06_SOT323

    470_0402_5%
    D

    LAN_WOL_EN#

    LAN_WOL_EN#

    +5VALW to +5VS Transfer

    470_0402_5%
    1 2

    1 2

    470_0402_5%

    Discharge circuit-2 for V-M

    470_0402_5%

    SLP_S3 2
    G
    Q18

    0.1U_0402_16V4Z
    R469

    RHU002N06_SOT323

    SHORT PADS

    1 2

    RU NON
    J34

    Discharge circuit-1
    +3VS

    0.1U_0402_16V4Z

    RHU002N06_SOT323

    SLP_S3 2
    G

    Q47
    S

    2
    R116
    470_0402_5%

    1 2

    1 2

    1 2

    470_0402_5%
    D

    SLP_S3 2
    G

    Q21

    SLP_S3 2
    G

    SLP_S4 1
    R107

    2
    0_0402_5%

    SLP_S5 1
    2
    @ R110 0_0402_5%

    2
    0_0402_5%

    Q17

    2
    S

    R130

    470_0402_5%

    +VCCP

    SLP_S3 2
    G

    R151

    2
    G

    Q16
    3

    PWR_GD 20,25,31,35,43,44

    470_0402_5%

    +VCC_CORE

    470_0402_5%

    SLP_S5 1
    @ R1312

    R134

    Q27

    0313 change

    +5VS

    470_0402_5%

    R186

    2
    G
    3

    C91

    2
    0_0402_5%

    R1310

    +2.5VS

    +1.5VS

    1
    1 2

    0313 change

    SLP_S4 1
    R1311

    +1.8V
    +0.9V

    Q90
    4

    RHU002N06_SOT323

    RHU002N06_SOT323
    RHU002N06_SOT323

    RHU002N06_SOT323

    RHU002N06_SOT323

    C184
    +VCCP

    +1.5VS

    Compal Secret Data

    Security Classification
    0.1U_0402_16V4Z

    2006/02/13

    Issued Date

    2006/07/26

    Deciphered Date

    Title

    Compal Electronics, Inc.


    DC/DC Circuits

    C93
    +1.5VS

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

    +1.8V

    0.1U_0402_16V4Z
    A

    Size

    Document Number

    R ev
    0.4

    LA-3261P UMA
    Date:

    Tuesday, March 27, 2007

    Sheet
    E

    34

    of

    55

    PWR_OK circuit

    +3VS

    PWR_GD 20,25,31,34,43,44

    SHORT PADS

    100K_0402_5%

    R128
    49.9K_0402_1%
    2

    C32

    1 2

    Q134

    1219 Add Schmitt Trigger to eliminate glitch and pull down resistor

    Q133
    RHU002N06_SOT323

    1M_0402_5%
    2

    R39
    56.2K_0402_1%
    R178

    M_PWROK 7,20

    H1
    HOLEA

    H2
    HOLEA

    H3
    HOLEA

    CF10
    1

    CF11
    1

    H4
    HOLEA

    H5
    HOLEA

    CF12
    1

    H6
    HOLEA

    H11
    HOLEB

    H12
    HOLEB

    CF13
    1

    H7
    H8
    HOLEAHOLEA

    H13
    HOLEB

    CF14

    H9
    HOLEA

    1
    H10
    HOLEB

    H14
    HOLEB

    10K_0402_5%

    1
    1.24VREF

    CF9
    1

    4
    1

    CF8
    1

    LM393M_SO8

    1.24VREF_393

    R1746

    FM4
    1

    CF7
    R49
    10K_0402_5%

    FM3
    1

    FM2

    U80B
    O

    FM1
    1

    2
    20K_0402_5%

    R198

    1
    2
    76.8K_0402_1%

    +5VALW

    R1745
    10K_0402_5%
    1
    2

    C2

    100K_0402_5%

    1000P_0402_50V7K

    0.1U_0402_16V4Z

    +3VALW

    R199
    1

    +3VM

    VCC1_PWRGD 30,31

    MMBT3904_SOT23

    CH751H-40_SC76

    M_PROK

    2
    G

    D70

    46

    0_0402_5%
    R1802

    DDR_PGOOD
    1

    1.8PGOOD

    0_0402_5%
    2
    1

    DDR_PGOOD 1

    1 R1803

    SN74LVC14APWLE_TSSOP14

    R117

    42

    U5C

    SN74LVC14APWLE_TSSOP14

    R1752
    10K_0402_5%

    2
    B

    1000P_0402_50V7K

    +3VALW

    R284
    2
    1
    3.3K_0402_5%

    C26

    0113 Change LMV331 to LM393, Delete R124 and C27

    +0.9V

    U5D
    O

    I
    G

    9
    10K_0402_5%
    R1747

    CH751H-40_SC76

    LM393M_SO8

    20070227 Move R1803

    +3VL

    1.24VREF_393

    +3VL
    R24

    14

    DDR_PGOOD 1

    D69

    O
    4

    2
    1
    150K_0402_1%
    R289
    2 1
    2

    +3VS

    J38

    R115

    U80A

    20K_0402_5%
    2
    1

    +5VS

    R285

    R288
    1
    232K_0402_1%

    +3VL

    10K_0402_5%

    2
    1
    10K_0402_5%

    VCCP_POK

    C33
    1000P_0402_50V7K

    +3VL

    1113 Tie R1732.2 to 3VM instead of 3VM_LAN

    1
    H32
    HOLED

    H33
    HOLED

    H34
    H35
    HOLED HOLED

    H36
    HOLED

    H37
    HOLED

    C990

    R1350
    1
    2
    100K_0402_1%

    U5A

    SN74LVC14APWLE_TSSOP14

    H27
    H28
    HOLED HOLED
    C992

    0.1U_0402_16V4Z
    2

    14

    1
    3
    1

    O
    G

    14

    R1732
    2
    1
    120K_0402_5%

    D60
    2

    H24
    H25
    HOLED HOLED

    CH751H-40_SOD323

    0.1U_0402_16V

    +3VM

    0.1U_0402_16V4Z

    H22
    H23
    HOLED HOLED

    +3VL

    Need be tune to
    10msec time delay

    C991

    H21
    HOLED

    H19
    H20
    HOLED HOLED

    H18
    HOLED

    LAN_RST circuit

    H15
    H16
    H17
    HOLEC HOLEC HOLEC

    41

    KBC PWR_OK circuit


    R47

    +5VALW

    14

    +1.25VS

    1M_0402_5%
    R126
    2
    1

    D71 CH751H-40_SC76
    2

    LAN_RST# 20

    SN74LVC14APWLE_TSSOP14
    U5B

    Compal Secret Data

    Security Classification
    Issued Date

    2005/05/26

    Deciphered Date

    2006/07/26

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

    Title

    Compal Electronics, Inc.


    POK CKT

    Size

    Document Number

    R ev
    0.4

    LA-3261P U MA
    Date:

    Tuesday, March 27, 2007

    Sheet

    35

    of

    55

    +B+
    AC
    Adapter
    in

    ISL6269
    DC/DC
    (1.25V)

    VIN
    VS

    +1.25VM

    G965
    LDO
    (2.5V)

    +3VS

    Page46

    Page37

    Page41
    +5VALWP

    +1.25VM

    SWITCH

    ACOK

    APL5912
    LDO
    (1.05V)

    MAINPWON

    +3VALWP

    ENBL2 ENBL1

    +1.05VM

    +2.5VS 1A

    Page46

    4A

    +5VS

    B+

    VIN

    ISL6263
    DC/DC
    (VCC_GFX)

    B+
    +5VALWP

    VMB

    PWR_GD

    B+

    MAX8734A
    DC/DC
    (3V/5V)
    4A

    Page40

    VCC

    SHDN#

    VCC_GFX

    Page45

    ISL6260 &ISL6208
    DC/DC
    (CPU_CORE)

    VS
    +3VLP 0.1A

    Page43

    BQ24703
    Charger

    MAX8743
    DC/DC
    (1.05V/1.5V)

    B+

    Page38

    +1.5VSP 4.2A
    CPU_CORE
    ( 44A)

    SLP_S3#

    ENBL1/ENBL2

    Page41

    +1.05V_VCCP 6.4A

    +5VALWP

    BATSELB_A

    Battery
    Selector
    Circuit

    BATSELB_A#

    VCC

    Battery B
    8 Cell

    Battery A
    6 Cell

    Page39

    B+
    VMB
    SWITCH

    SWITCH

    SWITCH

    Battery
    Connector
    Page37
    A

    VMB_A

    VMB_B

    Battery
    Connector
    Page37
    B

    SLP_S5#

    TPS51116
    DC/DC
    (+1.8VP/+0.9VSP)
    S3/S5

    +1.8VP 7A

    +0.9VP 2A

    Page42

    BATT
    Title

    BATT_A

    POWER BLOCK DIAGRAM


    BATT_B

    Size
    Date:

    Document Number
    Tuesday, March 27, 2007

    Rev
    36

    Sheet
    1

    of

    55

    ADP_SIGNAL

    PCN1

    GND2
    GND1

    PWR2

    A DPIN

    FOX_JPD113E-LB103-7F

    AB/I_A

    PC2
    1000P_0402_50V7K

    GND3

    4
    3

    PR1
    15K_0402_5%

    PWR1

    PC4
    1000P_0402_50V7K
    2
    1

    GND4

    PC3
    100P_0402_50V8J
    2
    1

    VIN
    PL1
    SMB3025500YA_2P

    GND5

    SINGAL

    GND6

    PC1
    100P_0402_50V8J

    38
    VMB_A

    BATT_A

    PL2

    PCN2

    GND

    EC_SMD_A
    EC_SMC_A

    PR2

    1
    1M_0402_1%

    2
    3
    4
    5

    PC5
    1000P_0402_50V7K

    SMD
    SMC
    RES
    TS

    BATT+

    FBM-L18-453215-900LMA90T_1812
    1
    2

    PC6
    0.01U_0402_50V4Z
    +3VL

    TYCO_C-1746706_6P

    PR3
    1K_0402_5%

    PR10
    210K_0402_1%

    AB1A_DATA 31

    EC_SMC_A1

    AB1A_CLK 31

    EC_SMD_A1

    PC145
    220P_0402_25V8K

    THM_MAIN# 31

    PC144
    220P_0402_25V8K

    PC143
    220P_0402_25V8K

    PR4
    PR5
    100_0402_5% 100_0402_5%

    VMB_B

    GND

    EC_SMD_B
    EC_SMC_B
    AB /I_B
    TS_B

    PC8
    1000P_0402_50V7K

    PC9
    0.01U_0402_50V4Z

    SUYIN_20163S-06G1-K

    PR7 1
    2
    1K_0402_5%
    1
    2
    +3VL
    PR9
    PR11
    210K_0402_1%
    1K_0402_5%

    BATT_B

    2
    3
    4
    5

    SMD
    SMC
    B/I
    TS

    PL3
    FBM-L18-453215-900LMA90T_1812
    1
    2

    BATT+

    PCN3

    PR14
    100_0402_5%

    PR15

    THM_MBAY# 31

    100_0402_5%
    EC_SMD_B1

    AB1B_DATA 31

    EC_SMC_B1

    AB1B_CLK 31

    Compal Secret Data

    Security Classification
    Issued Date

    2005/03/10

    Deciphered Date

    2006/03/10

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    A

    Title

    Compal Electronics, Inc.


    BATTERY CONN

    Size Document Number


    C ustom LA-3261P UMA
    D ate:

    R ev
    Sheet

    Tuesday, March 27, 2007


    D

    37

    of

    55

    VIN

    P2

    BATT
    PQ2
    AO4407_SO8

    P4

    3
    2
    1

    1
    2

    PC17
    1U_0805_25V4Z

    1
    2

    1
    PR32
    3K_0402_1%
    2
    1

    PC22

    PR31
    3K_0402_1%

    PD8
    EC31QS04

    PC20
    10U_1206_25V6M

    10UH_PCMB104T-100MS_6A_20%

    PC19
    4.7U_1206_25V6K

    LX_CHG

    CC=3A for 2.4AHr


    CC=3.57A for 2.55AHr

    Icharger=3A
    CELLSEL# =0,Vcharger= 12.6V
    CELLSEL# =1,Vcharger= 16.8V

    BATT

    PR35
    150_0402_1%

    PR44
    5.62K_0603_0.1%
    +3VL
    1

    1 2

    BATT

    1 2

    150P_0402_50V8J
    PC24
    2
    1

    CV=12.6V(6 CELLS LI-ION)


    16.8V(8 CELL LI-ION)

    5
    6
    7
    8

    6
    1
    17
    23
    14

    BATT
    PR28
    0.015_1206_1%
    1
    2

    PL5

    PGND

    BATSET
    BATDEP
    GND
    NC4
    NC3

    PQ7
    FDS4435_SO8

    0.1U_0402_16V7K

    PR380
    100K_0603_0.1%

    +3VL
    PR384
    100K_0402_5%

    CELLSEL#

    PU5
    REF

    ANODE

    1.24VREF

    CATHODE

    NC

    NC

    PQ11
    RHU002N06_SOT323

    2
    G
    S

    2
    G

    2
    G

    I_A#

    2
    1

    330K_0402_5% 44

    PR383
    200K_0402_1% S

    PR360
    2.8K_0603_0.1%

    2
    G

    PQ8 RHU002N06_SOT323
    2
    G

    AB/I_A

    2
    1
    3
    PQ110
    RHU002N06_SOT323

    RHU002N06_SOT323
    PQ111 3

    2
    1

    37
    PR48
    10K_0402_1%

    39

    CFET_B

    39,44

    CELLSEL#

    Compal Secret Data

    Security Classification
    Issued Date

    2005/03/10

    Deciphered Date

    2006/03/10

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

    APL1431LBBC_SOT23-5
    A

    PR386

    RHU002N06_SOT323

    PQ10
    ACDET 2
    G

    2
    AC_CHG

    33K_0402_1%

    1
    VL
    2

    39

    PR49
    100_0402_5%

    LM393M_SO8

    ALARM

    2
    100K_0402_5%

    PC28
    100P_0402_50V8J

    AC_CHG

    PR54
    1

    Airline detector
    High 17.521V
    Low 16.871V

    1
    PC27
    @0.1U_0402_16V7K

    BQ24703VREF
    7
    PR51
    @47K_0402_1%

    O
    -

    PU3B

    PR47

    2
    1M_0402_5%

    PR385
    330K_0402_5%

    PR381
    7.68K_0603_0.1%

    PR382
    25.5K_0402_1%
    2

    PR43
    4.7K_0402_5%

    RHU002N06_SOT323
    PQ112 3

    +3VL

    PR42
    196K_0402_1%
    2

    LM393M_SO8

    PC29
    22P_0402_50V8J
    2
    1

    1
    2

    18
    20

    D H_CHG

    1
    2

    5
    10K_0603_0.1%

    COMP
    NC1
    NC2

    VS
    VHSP

    ACDRV#

    PC26
    4.7U_0805_6.3V6K

    5
    G

    ENABLE
    ACSEL
    ALARM
    SRSET
    ACSET
    ACPRES
    IBAT
    VREF

    25
    22
    21
    16
    15
    12
    24

    SE_CHG+

    PU4
    SN74LVC1G17DBVR_SOT23-5
    4
    ADP_PRES 23,31,39,40,44
    O
    NC 1

    PR46
    PR45
    130K_0402_1%

    PR50

    PC21
    4.7U_0805_6.3V6K

    1
    2
    1

    O
    -

    ACDRV#
    VCC
    PWM#
    SRP
    SRN
    BATP
    BATDRV#

    SE_CHG-

    1
    2

    2
    1
    PR37
    10K_0402_1%

    ACN
    ACP
    ACDET

    BQ24703_QFN28

    PC25
    0.1U_0402_10V6K

    PU3A

    PR39
    2.15K_0402_1%
    1
    2

    100K_0603_1%

    PR36
    2
    1
    PR40
    2

    VL

    +3VL

    7
    10
    11

    330K_0402_5%

    12.4K_0603_1%

    AC detector
    High 11.689V
    Low
    9.879V

    +3VL

    PR33
    PR30
    80.6K_0402_1%
    100K_0402_1%
    2
    1

    +3VL
    2

    PC23

    PR34
    1

    1U_0603_10V6K
    2
    1

    P2

    5
    28
    19
    2
    3
    27
    13
    4

    2 PR27
    1
    +3VL
    100K_0402_5%
    BQ24703VREF

    PR29
    137K_0402_1%

    2
    1

    PC18
    1
    2
    ACDET

    PU2
    8
    9
    26

    2
    191K_0402_1%
    1U_0603_10V6K

    CHGCTRL

    PC15
    4.7U_1206_25V6K

    PD5
    RLZ16B_LL34

    2 PR25
    1
    1K_0402_1%
    ALARM

    PR26

    1SS355_SOD323
    31,39

    AC_CHG

    PR23
    0_0402_5%
    2
    1

    29

    2
    SRSET
    ADP_EN# 44

    44

    PC14
    10U_1206_25V6M

    1
    2

    PC16
    1U_0603_10V6K
    1
    2
    PR24
    1K_0402_1%

    PR397
    @0_0402_5%

    PD7
    2

    CHG_B+

    44

    PR22
    100_0402_1%

    PR396
    0_0402_5%
    ADP_PRES 1
    2
    PR21
    150K_0402_5%

    PR17
    0_0402_5%
    1
    2

    23,31,39,40,44
    ACN

    2
    G

    8
    7
    6
    5

    PL4
    FBM-L11-322513-151LMAT_1210
    1
    2

    ADP_PRES

    PQ131
    @RHU002N06_SOT323

    PQ93
    RHU002N06_SOT323

    P2

    PR20
    0.015_2512_1%
    1
    2

    1
    1 2
    1
    PR399
    @150K_0402_5%

    PR19
    1
    2
    0_0402_5%

    B+
    PR398
    @200K_0402_5%

    ACDRV#

    2
    G

    BATCAL#

    1
    2
    3

    PR16
    200K_0402_5%

    44

    8
    7
    6
    5

    PR343

    220K_0402_5%

    8
    7
    6
    5

    PQ4
    AO4407_SO8
    1
    2
    3

    0.1U_0603_16V7K
    2
    1

    47K

    47K

    PC13
    47P_0402_50V8J
    1
    2
    2

    PR18
    1

    PC12
    1

    PQ5
    DTA144EUA_SC70
    1

    1
    2
    3

    47K_0402_5%
    2

    PQ3
    AO4407_SO8

    Title

    Compal Electronics, Inc.


    Charger

    Size Document Number


    Custom LA-3261P UMA
    Date:

    R ev

    Tuesday, March 27, 2007


    D

    Sheet

    38

    of

    55

    +3VL

    D RHU002N06_SOT323

    LATCH

    BATT

    1
    2
    PR60
    22K_0402_5%

    D
    PQ16
    RHU002N06_SOT323

    2
    G

    ADP_PRES 23,31,38,40,44

    PQ28
    2
    G

    2
    10K_0402_5%

    BATCON

    31

    1
    BATT_IN
    4
    1

    2
    1

    2
    1

    PR67
    470K_0402_5%

    BATT_B

    PR72
    470K_0402_5%

    2
    1

    PR73
    4.7K_0402_5%

    SX34-40_SMA
    2
    RHU002N06_SOT323
    BATT_IN 2
    G

    2
    G

    RHU002N06_SOT323

    S
    4

    SN74LVC1G17DBVR_SOT23-5

    Compal Secret Data

    Security Classification
    Issued Date

    2005/03/10

    Deciphered Date

    2006/03/10

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    A

    1
    2
    3

    PQ30

    PU13
    O
    NC

    BATT_A

    PD15

    CFET_B

    5
    1
    2

    RB715F_SOT323

    2
    PR77
    100K_0402_5%

    CFET_B

    8
    7
    6
    5

    RHU002N06_SOT323

    PQ31
    CFET_A

    8
    7
    6
    5

    PQ29
    RHU002N06_SOT323
    2
    G

    CFET_B

    PQ22
    AO4407_SO8
    PQ25
    AO4407_SO8

    2
    1SS355_SOD323

    3
    1

    PR66
    470K_0402_5%

    3
    2
    1

    PR75

    38,44

    PD16

    CFET_B#

    +3VL

    PD17

    5
    6
    7
    8

    SN74AHC1G08DCKR_SC70

    PQ26
    PMBT2222_SOT23

    2
    4

    O
    IN2

    ADP_PRES

    1
    2
    3

    1
    5
    IN1

    PQ94
    RHU002N06_SOT323

    PR74
    10K_0402_5%
    1

    C
    2
    B

    PR68
    470K_0402_5%

    BATSELB_A#

    5
    6
    7
    8

    3
    2
    1
    PQ21
    AO4407_SO8
    PQ24
    AO4407_SO8

    PR69
    220K_0402_5%
    1
    2

    PQ27

    RHU002N06_SOT323

    PR64
    4.7K_0402_5%

    SX34-40_SMA

    BATT

    AC_CHG

    RHU002N06_SOT323

    PU12

    1
    PR63
    10K_0402_5%
    2
    PQ20
    2
    G

    1
    2
    PR71
    10K_0402_1%
    1

    5
    P
    A

    NC

    PU11
    SN74LVC1G14DCKR_SC70-5
    4
    Y

    G
    3

    PD14
    1SS355_SOD323

    SN74AHC1G08DCKR_SC70
    PQ23
    BATT_IN 2
    G

    RHU002N06_SOT323

    38

    PD13

    +3VL

    2
    G
    PR344
    470K_0402_5%

    2
    1K_0402_5%

    PQ19
    RHU002N06_SOT323
    2
    G

    +3VL

    3
    1

    PR342

    O
    IN2

    10K_0402_5%
    PC34
    220P_0402_50V7K

    3
    PR70
    470K_0402_5%

    0.047U_0402_16V7K

    PC35
    1
    2

    IN1

    PD12
    1

    5
    BATSELB_A

    SN74LVC1G14DCKR_SC70-5

    PR62
    470K_0402_5%

    1SS355_SOD323
    PR65

    PU10

    5
    P
    A
    G

    NC

    BATSELB_A#

    PU9

    PQ17
    RHU002N06_SOT323
    BATT_IN 2
    G

    PR61
    470K_0402_5%
    +3VL

    PQ18
    PMBT2222_SOT23

    +3VL

    2
    4

    SN74LVC1G14DCKR_SC70-5

    31 BATSELB_A#

    PU8
    Y

    CFET_A

    PD11
    RLZ6.2C_LL34

    2
    B

    1000P_0402_50V7K

    PR58
    1.5M_0402_5%

    +3VL

    PC180

    BATT_IN
    PD10
    1SS355_SOD323

    S
    5

    PQ15
    RHU002N06_SOT323
    BATSELB_A#
    1
    2
    2
    G
    1000P_0402_50V7K
    PC33

    CHGCTRL

    2
    0_0402_5%

    +3VL

    NC

    1
    2
    PR59
    22K_0402_5%

    PQ14
    2
    G

    3 1

    PR56

    PQ13
    RHU002N06_SOT323
    3

    1
    2
    100_0402_5%

    RB715F_SOT323

    74LVC1G02_04_SOT353

    1000P_0402_50V7K

    PR55

    2
    G

    INA

    1
    3

    PQ12
    RHU002N06_SOT323

    BATSELB_A

    PD9

    BATT_B
    4

    INA

    74LVC1G02_04_SOT353

    PU6

    INB

    PC32
    1

    1
    4

    0.1U_0603_50V4Z

    PC30
    1
    INB

    PC31

    PU7

    ALARM

    2
    PR57
    47K_0402_5%

    38

    +3VL

    BATT_A

    @0.1U_0402_10V6K

    +3VL

    Title

    Compal Electronics, Inc.


    Battery selector

    Size Document Number


    Custom LA-3261P UMA
    Date:

    R ev

    Tuesday, March 27, 2007


    D

    Sheet

    39

    of

    55

    +3.3V/+5V

    B+

    BST5B

    BST3B

    PR97
    499K_0402_1%

    5
    6
    7
    8
    D
    D
    D
    D
    G
    S
    S
    S
    4
    3
    2
    1
    5
    6
    7
    8
    D
    D
    D
    D
    G
    S
    S
    S
    4
    3
    2
    1

    1
    2

    +3VALWP

    +3VLP

    +
    2

    +3VL

    PJP1
    2

    PC49
    150U_B2_6.3VM

    2
    100K_0402_5%
    PR242

    PR94
    @3.57K_0402_1%

    2 1
    1

    PGOOD

    PR96
    0_0402_5%

    PRO#

    +3VALWP

    10

    LDO3
    25

    GND
    23

    PL8
    4.7UH_SIQB745-4R7_4A_30%

    7
    2

    1
    2

    DL3

    D H3

    PR98
    100K_0402_5%

    PAD-OPEN 2x2m

    PC52
    0.1U_0603_50V4Z
    PQ36
    RHU002N06_SOT323

    28
    26
    24
    27
    22

    PR95
    0_0402_5%

    +3VLP

    +3VL

    BST3A

    11

    1
    2 1
    2
    PR87
    PR84
    499K_0402_1% 200K_0402_1%

    1
    1

    VL

    PQ127
    AO4468_SO8
    PR82
    0_0402_5%

    1
    2

    MAINPWON

    PC50
    0.22U_0603_10V7K

    PC48
    0.1U_0603_50V4Z

    REF

    PC51
    4.7U_0805_10V4Z
    2
    1

    PR90
    47K_0402_5%
    2
    1

    2VREF_1999 1
    2
    PR89
    0_0402_5%
    1
    2
    12
    0_0402_5%
    2VREF_19998
    PR91
    PR93
    1
    2
    @0_0402_5%

    1
    2 1
    2
    PR86
    PR83
    200K_0402_1% 200K_0402_1%

    1
    2
    ILIM3

    PC44
    1U_0805_16V7K

    17
    VCC

    LX5
    PU14
    DL5
    ILIM5
    OUT5 MAX8734EEI_QSOP28
    FB5
    BST3
    N.C.
    DH3
    DL3
    SHDN#
    LX3
    ON5
    OUT3
    ON3
    FB3
    SKIP#
    PGOOD

    6
    4
    3

    PR92
    0_0402_5%

    B++

    2
    1

    PR88
    @10.2K_0402_1%

    PC47
    150U_B2_6.3VM

    PC197
    @22U_1206_6.3V6M

    DL5

    LX3

    1
    PC46
    2
    1
    0.1U_0603_50V4Z
    13

    DH5

    15
    19
    21
    9
    1

    V+

    +5VALWP

    BST5

    16

    PQ35
    AO4468_SO8

    PC40
    0.1U_0603_50V4Z

    2VREF_1999

    14

    TON

    BST5A

    LD05

    PL7
    4.7UH_SIQB745-4R7_4A_30%
    2

    18

    PC45
    4.7U_0805_10V4Z
    2
    1

    1
    2
    3
    4

    LX_5V

    20

    VL
    44

    PR80
    47_0402_5%

    PQ126
    AO4468_SO8

    S
    S
    S
    G

    D
    D
    D
    D

    8
    7
    6
    5

    B++

    1
    2

    1
    2
    PR79
    0_0402_5%

    D H5
    LX5

    PC42
    4.7U_1206_25V6K

    3
    8
    7
    6
    5
    D
    D
    D
    D

    B++

    VL

    1
    2
    3
    4

    PD18
    CHP202U_SC70
    PQ34
    AO4468_SO8

    S
    S
    S
    G

    PC39
    10U_1206_25V6M

    PC38
    2200P_0402_50V7K
    2
    1

    B++

    PL6
    FBM-L11-322513-151LMAT_1210

    PC37
    0.1U_0603_50V4Z
    1
    2
    PC41
    2200P_0402_50V7K

    PC36
    0.1U_0603_50V4Z
    1
    2

    2
    G
    1

    RHU002N06_SOT323
    PQ37
    2
    G

    KBC_PWR_ON 31

    RHU002N06_SOT323
    PQ77
    2
    G

    ADP_PRES 23,31,38,39,44

    S
    4

    Compal Secret Data

    Security Classification
    2005/03/01

    Issued Date

    2006/03/01

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    A

    Title

    3.3V / 5V
    Size
    B
    Date:

    Document Number

    R ev
    0.1

    LA-3261P UMA
    Tuesday, March 27, 2007

    Sheet
    E

    40

    of

    55

    PL9
    FBM-L11-322513-151LMAT_1210
    2
    1

    PR99
    0_0402_5%

    15
    14
    12

    FB1

    OUT2
    FB2
    ON2

    PD30

    +
    2

    1
    2

    1
    PR108
    0_0402_5%

    13
    3

    ILIM2
    ILIM1

    DL_1.5V

    VCCP_POK 35

    PR113
    20K_0402_1%
    2
    1

    PD31
    2

    2VREF

    +3VALW
    1

    PC70
    @0.001U_0402_50V7M

    PR117
    100K_0402_1%

    1SS355_SOD323

    PR118
    100K_0402_1%

    PR120
    0_0402_5%

    PR114
    20K_0402_1%

    PR116

    PC69
    0.22U_0603_10V7K

    1
    @0_0402_5%

    VCC_MAX8743

    1
    1

    PR123
    0_0402_5%

    LX_1.5V

    REF

    SKIP

    2
    PC71
    @0.001U_0402_50V7M

    MAX8743EEI_QSOP28

    20,23,26,27,31,33,34,42,43,44 SLP_S3#

    10

    1SS355_SOD323

    DH_1.5V_1

    7
    5

    PGOOD
    TON
    ON1
    GND

    11

    OVP

    23

    PR107
    100K_0402_1%

    DH_1.5V_2

    PC66
    220U_B2_2.5VM

    CS1
    OUT1

    PR104
    0_0402_5%
    2

    PR105
    5.1K_0402_1%

    28
    1

    BST2
    DH2
    LX2
    DL2
    CS2

    19
    18
    17
    20
    16

    +1.5VSP

    PL11
    3.3UH_SIQB74-3R3RF_4.8A_30%
    1
    2

    SI4914_SO8

    PR111
    10K_0402_1%

    LX1
    DL1

    PC61

    DH1

    27
    24

    21

    VDD

    PC62
    0.1U_0603_50V4Z
    1

    8
    7
    6
    5

    LX_1.05V
    DL_1.05V

    26

    BST1

    1
    2

    PR106
    5.1K_0402_1%

    25

    D2
    G2
    D2
    D1/S2/K
    G1
    D1/S2/K
    S1/A D1/S2/K

    PU15

    PR103
    2.2_0402_5%
    1
    2 DH_1.05V_1

    +
    2

    PR102
    0_0402_5%
    1
    2
    9

    3.3UH_MPL73-3R3_6A_20%
    PL10

    VCC_MAX8743

    22

    PR101
    0_0402_5%

    UVP

    PQ39
    1
    2
    3
    4

    BST_1.05V_1

    VCC

    4
    V+ 1U_0805_16V7K
    2
    1

    PC60
    0.1U_0603_50V4Z
    2
    1

    DH_1.05V_2
    PC59
    0.1U_0603_50V4Z

    BST_1.5V_1

    PC63
    220U_B2_2.5VM

    BST_1.05V_2

    BST_1.5V_2

    1
    2
    3
    4

    +1.05V_VCCP

    2
    2

    CHP202U_SC70

    PC55
    4.7U_0805_10V4Z

    1
    8
    7
    6
    5

    PR100
    20_0603_5%

    PC58
    4.7U_1206_25V6K

    1
    2
    3
    4

    1U_0805_25V4Z
    PC56
    PD19

    PC57
    2200P_0402_50V7K

    S/A
    S/A
    S/A
    G

    D/K
    D/K
    D/K
    D/K

    PQ40
    AO4712_SO8

    B+

    +5VALW
    2

    PC53
    2200P_0402_50V7K
    2
    1

    8
    7
    6
    5
    D
    D
    D
    D

    PQ38
    AO4468_SO8

    S
    S
    S
    G

    PC54
    10U_1206_25V6M

    MAX8743_B+

    1
    PR121
    0_0402_5%

    SLP_S3# 20,23,26,27,31,33,34,42,43,44

    PJP11
    PAD-OPEN 2x2m

    1.5VSP/ +1.05V_VCCP/+2.5V
    2

    +2.5VSP

    6
    PR243

    ADJ

    GND

    GND

    GND

    GND

    PR244
    13K_0603_1%

    4
    7

    VO

    EN

    VIN

    PU26
    2

    PC134
    10U_1206_6.3V6M

    PC135
    10U_1206_6.3V6M

    G965-18P1U_SO8

    +0.9VP

    +3VALWP
    +VCCP

    (6A,240mils ,Via NO.= 12)

    +0.9V

    +1.25VM

    (3A,40mils ,Via NO.= 6)


    4

    +2.5VS

    (1A,40mils ,Via NO.= 2)

    PAD-OPEN 2x2m
    VCCGFX

    (8A,240mils ,Via NO.= 16)

    Issued Date

    PJP15
    1

    +1.05VM

    (1A,40mils ,Via NO.= 2)

    2005/03/10

    Deciphered Date

    2006/03/10

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

    PAD-OPEN 2x2m
    A

    Compal Secret Data

    Security Classification

    PAD-OPEN 4x4m

    (3A,120mils ,Via NO.= 6)

    PJP9
    +2.5VSP

    +1.05VMP

    +3VALW

    PR245
    12K_0402_1%

    PAD-OPEN 4x4m

    PJP14
    1

    (2A,80mils ,Via NO.= 4)

    PAD-OPEN 3x3m

    VCCGFXP

    (4.5A,180mils ,Via NO.= 9)

    10K_0402_5%
    1
    2

    PAD-OPEN 4x4m
    PJP13
    +1.25VMP

    20,23,26,27,31,33,34,42,43,44 SLP_S3#

    +5VALW

    PAD-OPEN 4x4m
    PJP5

    PJP8
    4

    PJP6
    PAD-OPEN 4x4m
    1
    2

    (4A,160mils ,Via NO.=8)

    PAD-OPEN 3x3m

    +1.05V_VCCP

    +5VALWP

    +1.5VS

    PC181
    @0.1U_0603_16V7K

    PJP3

    PJP2
    +1.5VSP

    Title

    Compal Electronics, Inc.


    2.5VALW/1.5VS/1.05VCCP

    Size Document Number


    Custom LA-3261P UMA
    Date:

    R ev

    Tuesday, March 27, 2007


    D

    Sheet

    41

    of

    55

    DDR_B+

    PL12
    FBM-L11-322513-151LMAT_1210
    2
    1

    VBST

    VTT

    DRVH

    22

    VTTGND

    LL

    20

    DRVL

    19

    PGND

    18

    CS

    16

    V5FILT

    14

    PGOOD

    13

    S5

    11

    G
    S
    S
    S
    4
    3
    2
    1

    PC73
    10U_1206_25V6M

    +1.8V

    2.2UH_IHLP-2525CZ-01_8A_+-20%
    1

    DL_1.8V

    2
    C

    PL13

    1
    +

    PQ46
    AO4712_SO8

    PC78
    220U_D2_4VY

    1
    14.3K_0603_0.1%
    PR128
    2

    PC82
    4.7U_0805_10V4Z

    2
    V5IN

    Thermal pad

    S3

    +5VALWP

    PR131
    2

    10

    @0_0402_5%

    SLP_S5# 20,34

    PR132

    1 0_0402_5%

    SLP_S4# 20,34

    PR133

    15

    17

    VDDQSET

    CS_GND

    9
    B

    VDDQSNS

    PR130
    3_0402_5%
    2
    1

    PC80
    22P_0402_50V8J

    TPS51116RGE_QFN24

    COMP

    4
    3
    2
    1

    VTTREF

    PR129
    20K_0603_1%

    MODE

    GND

    PC83
    0.001U_0402_50V7M

    25

    +5VALW

    0.033U_0402_16V7K

    PR127
    0_0402_5%
    2

    VTTSNS

    G
    S
    S
    S

    PC79
    22U_1206_6.3V6M

    PC81

    7,13,14 V_DDR_MCH_REF

    B+

    DH_1.8V_2
    LX_1.8V

    21

    PC72
    2200P_0402_50V7K
    2
    1

    5
    6
    7
    8
    D
    D
    D
    D
    VLDOIN

    PC74
    0.1U_0603_50V4Z
    BST_1.8V_2 1
    2

    5
    6
    7
    8

    24

    NC

    NC
    23

    PR125
    0_0402_5%
    BST_1.8V_1
    1
    2
    PR126
    0_0402_5%
    DH_1.8V_1
    1
    2

    PU17

    D
    D
    D
    D

    PC76
    10U_0805_10V4Z

    +0.9VP

    PQ45
    AO4468_SO8

    PC75
    10U_0805_10V4Z

    12

    1
    2

    PR124
    0_1206_5%

    +1.8V

    @0_0402_5%

    SLP_S3# 20,23,26,27,31,33,34,41,43,44

    PR134
    1 @0_0402_5%

    SLP_S4# 20,34

    PR387

    PM_SLP_M# 20,31,34,46

    2005/03/10

    Deciphered Date

    10K_0603_0.1%
    PR135

    2
    PR317
    0_0402_5%

    1.8PGOOD 35
    A

    2006/03/10

    Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    +3VALW

    PC85
    @0.001U_0402_50V7M

    2
    PR294
    100K_0402_5%

    Compal Secret Data

    Security Classification
    Issued Date

    1 0_0402_5%
    1

    1
    2
    A

    PC84
    @0.001U_0402_50V7M

    Compal Electronics, Inc.


    1.8V/0.9VS

    Size
    B
    Date:

    Document Number

    Rev

    LA-3261P UMA
    Tuesday, March 27, 2007

    Sheet
    1

    42

    of

    55

    +CPU_B+

    PR148
    2_0402_5%
    2
    1

    PC124
    2

    1000P_0402_50V7K
    PR188
    2
    1
    6.98K_0402_1%

    PC103
    10U_1206_25V6M

    PC102
    4.7U_1206_25V6K
    2
    1

    3
    2
    1

    4.7_1206_5%

    1
    PR347

    PC182
    680P_0603_50V7K

    2 2

    IRF7832Z_SO8
    PQ53
    8
    S
    D
    7
    S
    D
    6
    S
    D
    5
    G
    D
    1
    2
    3
    4

    8
    7
    6
    5

    1
    8

    PR179,PR180 are for test need when M/B is without CPU


    R1269,R1270 are same funtion with PR179,PR180
    Layout Note: Use27.4 Ohm(PR318,PR319) routing for Vssense and
    Vccsense

    @0_0402_5%

    VSUM

    VO

    PC112
    4.7U_1206_25V6K
    2
    1

    PC111
    2200P_0402_50V7K
    2
    1

    PC110
    0.01U_0402_50V4Z
    2
    1

    5
    1DH_CPU2_M

    PC113
    10U_1206_25V6M
    E

    +5VS
    D L_CPU2

    25

    2
    2

    + VCC_CORE

    PR167
    10_0402_1%

    PR170
    10K_0402_1%
    1
    2

    <BOM Structure>
    PC117
    0.22U_0603_16V7K
    2
    1

    PR173
    5.11K_0402_1%

    2 PR175 1
    @0_0402_5%

    4.7_1206_5%

    PR349

    .36UH_MPC1040LR36_ 24A_20%

    1
    2 2
    PC183
    680P_0603_50V7K

    LX_CPU2
    IRF7832Z_SO8
    PQ57
    8
    S
    D
    7
    S
    D
    6
    S
    D
    5
    G
    D

    D H _ CPU2

    1
    2
    3
    4

    PWM3

    40

    2
    1
    0_0402_5%

    VSEN

    3
    2
    1

    LGATE

    PR177

    VSUM

    VO

    RTN
    ISEN3

    21

    VDIFF
    FB
    OCSET

    PR181
    2
    1
    11.5K_0402_1%

    COMP

    VSUM

    17

    VSUM

    VW

    PC125
    1

    D
    D
    D
    D
    1
    2
    3
    4

    1
    2
    2 PR187 1
    51K_0603_1%
    PC121
    0.022U_0402_16V7K

    220P_0402_25V8K

    2 PR154 1

    PL17

    24

    VR_ON

    DROOP

    2 PR184 1
    1.2K_0402_1%

    PR183
    2
    1
    0_0402_5%

    FCCM

    CLK_EN#

    14

    PR182
    PC120
    180_0603_1% 1800P_0402_50V7K
    2
    1
    1
    2

    CS_GND

    PGD_IN

    VO

    PR190
    6.34K_0603_1%
    2
    1

    PR191
    1K_0402_1%
    2
    1

    PC127
    1

    PWM PHASE
    GND

    PSI#

    10

    PR153
    5.11K_0402_1%

    PR185
    1.96K_0402_1%

    PC119
    1

    DPRSLPVR

    11

    5 VSSSENSE
    PR319
    @27.4_0402_1%
    2
    1

    PR151
    10K_0402_1%
    1
    2

    PR189
    @1K_0402_1%

    13

    BOOT

    FCCM UGATE

    41

    12

    VCC

    DPRSTP#

    10KB_0603_5%_ERTJ1VR103J

    1000P_0402_50V7K

    35

    1000P_0402_50V7K
    C

    + VCC_CORE
    PR150
    10_0402_1%

    <BOM Structure>
    PC107
    0.22U_0603_16V7K
    2
    1

    PC116
    0.22U_0603_10V7K PR348
    0_0402_5%
    1
    2

    ISL6208CRZ-T_QFN8

    PR180
    @10_0402_1%
    2
    1

    PR328
    1
    2
    @100_0402_5% 2 PR178 1
    0_0402_5%
    PR318
    @27.4_0402_1%
    2
    1
    PC118
    2
    1

    ISEN2

    ISEN2

    22

    1
    PR179
    @10_0402_1%

    38

    PC122
    @1000P_0402_50V7K

    PWM2

    PW M2

    26

    0.1U_0402_16V7K

    499_0402_1%

    VID0
    VID1
    VID2
    VID3
    VID4
    VID5
    VID6

    PQ54
    SI7840DP_SO8

    P U20
    5

    PH 3

    5 VCCSENSE
    + VCC_CORE

    36

    2 PR174 1
    0_0402_5%

    20,25,31,34,35,44 PWR_GD

    ISEN1

    2 PR172 1
    0_0402_5%

    20 CLK_EN#
    20,23,26,27,31,33,34,41,42,44 SLP_S3#

    PGOOD
    ISEN1

    PC123
    0.22U_0603_10V7K
    1
    2

    PM_POK

    39

    SOFT

    PC126
    2
    1

    H_PSI#

    31

    23

    NTC

    DFB

    27

    PR157
    2_0402_5%
    2
    1

    IRF7832Z_SO8
    PQ56
    1
    8
    S
    D
    2
    7
    S
    D
    3
    6
    S
    D
    4
    5
    G
    D

    37
    2 PR171 1

    7,20 DPRSLPVR
    D

    18

    PWM1

    PW M1
    2

    28
    29
    30
    31
    32
    33
    34

    2 PR169 1
    0_0402_5%

    5,7,19 H_DPRSTP#

    VIN

    RBIAS

    ISL6260CRZ-T_QFN40

    P U19
    PR1611
    2
    0_0402_5%
    2 PR163 1
    0_0402_5%
    2 PR165 1
    0_0402_5%
    2 PR168 1
    0_0402_5%

    2 PR162 1
    0_0402_5%
    2 PR164 1
    0_0402_5%
    2 PR166 1
    0_0402_5%

    +CPU_B+

    BST_C PU2_1

    2
    1
    PC115
    2
    1 470KB_0402_5%_ERTJ0EV474J

    N TC

    VR_TT#

    15

    C PU_VID0
    C PU_VID1
    C PU_VID2
    C PU_VID3
    C PU_VID4
    C PU_VID5
    C PU_VID6

    IRF7832Z_SO8
    PQ52

    2
    1
    3

    PH 2

    3V3

    20

    19
    VSS

    VDD

    0.015U_0402_16V7K
    5
    5
    5
    5
    5
    5
    5

    +5VS

    VO

    2 PR160 1
    4.22K_0603_1%

    PGOOD_PU19 31

    16

    LX_CPU1

    PL16

    D L_CPU1

    PC114
    1U_0603_10V6K

    PR1591
    2
    147K_0402_1%

    .36UH_MPC1040LR36_ 24A_20%

    PR155
    1.91K_0603_1%

    PR186
    4.53K_0402_1%
    2
    1

    4 H_PROCHOT#

    D H _ CPU1

    BST_C PU2_2

    PR158
    0_0402_5%
    2
    1

    LGATE

    +3VS

    PR370
    68_0402_5%

    0.01U_0402_16V7K

    GND

    ISL6208CRZ-T_QFN8

    N TC

    PWM PHASE

    PC108
    PR152
    1U_0603_10V6K
    10_0603_5%
    2
    1
    1
    2

    +VCCP

    PC109
    2
    1

    BOOT

    FCCM UGATE

    +5VS

    VCC

    S
    S
    S
    G

    P U18
    5

    B+

    PR346
    0_0402_5%

    PC105
    0.22U_0603_10V7K
    1
    2

    BST_C PU1_1

    PC104
    1U_0603_10V6K
    2
    1

    0.01U_0402_25V7K
    PC106
    2
    1

    BST_C PU1_2

    +5VS

    PR149
    10_0603_5%

    1DH_CPU1_M

    +CPU_B+

    PQ50
    SI7840DP_SO8

    PC101
    2200P_0402_50V7K
    2
    1

    PC100
    0.01U_0402_50V4Z
    2
    1

    PL15
    FBM-L18-453215-900LMA90T_1812
    1
    2
    PC148
    47U_25V_M

    330P_0402_50V7K

    Compal Secret Data

    Security Classification
    2005/03/10

    Issued Date

    Deciphered Date

    2006/03/10

    Title

    CPU_CORE

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

    Size
    C
    Date:

    Compal Electronics, Inc.

    Document Number

    R ev

    LA-3261P UMA
    Tuesday, March 27, 2007

    Sheet

    43
    1

    of

    55

    4
    8
    +

    P D24

    PR252
    220K_0402_5%

    2
    1
    PR227
    10K_0402_5%

    PU24B

    7
    ADP_PS1

    O
    4

    1 2
    PR234
    3.48K_0402_1%

    +3VS

    31

    LM393M_SO8
    A

    PQ64
    RHU002N06_SOT323

    2
    1
    PR239
    220K_0402_5%

    ADP_EN

    PQ63
    MMBT3904_SOT323

    LM393M_SO8

    2
    B

    PR232
    21K_0603_1%
    1
    2

    31

    1
    2
    PR228
    21K_0603_1%

    ADP_PS0

    PR226 +5VS
    1M_0402_5%
    1
    2

    PR225
    @100K_0402_5%

    PR233
    100K_0402_5%
    1
    2
    31

    PR222
    71.5K_0402_1%

    SRSET

    PU24A

    PR218
    10K_0402_5%

    +5VS
    PR219
    1M_0402_5%
    1
    2

    PR220
    10K_0402_5%
    1
    2

    470K_0402_5%
    +3VS

    1
    38

    38

    PQ95
    RHU002N06_SOT323

    2
    1

    ADP_EN# 38

    23,31,38,39,40

    1
    A CN

    PC133
    0.1U_0603_16V7K

    +3VL

    38

    PR237
    47K_0402_5%

    1
    2

    2
    1SS355_SOD323

    2005.8.20

    31

    2
    G

    2
    G

    PD23

    RHU002N06_SOT323

    1SS355_SOD323

    PR216

    PR230
    47K_0402_5%
    PR231
    220K_0402_5%

    LM393M_SO8

    1SS355_SOD323

    2
    1
    PQ71
    2
    G

    +3VS

    PU25B

    PC146
    1U_0603_10V6K

    4
    -

    8
    P

    1
    3

    2
    G
    PQ65
    @RHU002N06_SOT323
    PR241
    10K_0402_1%

    1
    1
    2
    PR240
    0_0402_5%
    2
    1

    2
    1

    2
    1

    +3VS

    PD26

    ACOCP_EN#

    ADP_SIGNAL

    33

    LM393M_SO8

    PR238
    20,23,26,27,31,33,34,41,42,43 SLP_S3#
    1M_0402_5%
    V IN
    1
    2

    PR258
    29.4K_0402_1%

    PD27
    1SS355_SOD323
    PR255

    BATCAL#

    V IN
    PR235
    10K_0402_1%

    2 2

    PQ60
    RHU002N06_SOT323

    PR221
    10K_0402_5%

    ADP_ID
    PR229
    1M_0402_5%
    1
    2

    1 2
    S

    2
    G

    PR253
    210K_0402_1%

    4,20

    OCP#

    PU25A

    O
    -

    PD28
    1SS355_SOD323

    PR254
    150K_0402_5%

    2
    0_0402_5%

    +3VL

    PC147
    3900P_0402_50V7K

    V IN

    PR236
    10K_0402_1%

    1
    47K

    PR211

    40

    ADP_PRES

    3.9K_0402_5%
    PR214

    LX_5V

    38,39

    1SS355_SOD323

    PQ70
    DTA144EUA_SC70

    V IN

    PR265
    47K_0402_5%

    PC128
    1U_0805_16V7K

    2
    2
    PR203
    604K_0603_1%

    PD25

    PR224
    22.6K_0402_1%

    4
    PC131
    2
    1

    80.6K_0402_1%

    2
    1

    PR223
    137K_0402_1%

    3
    V IN

    2
    G

    I_A#

    PQ62

    CFET_B
    38PQ74
    2
    G
    RHU002N06_SOT323

    PQ113
    RHU002N06_SOT323

    1
    3

    PR208
    10_0402_5%

    LM393M_SO8

    1K_0402_5%
    D

    NDS0610_NL_SOT23-3

    ADP_SIGNAL

    10K_0402_5%

    PR261
    1M_0402_1%

    PQ61
    MMBT3904_SOT323 C
    2
    23,31,38,39,40 ADP_PRES
    23,31,38,39,40
    ADP_PRES
    B
    2
    E
    G
    PR217
    47.5K_0402_1%
    PQ92
    RHU002N06_SOT323
    1
    2

    PR257

    PU21A

    0.027U_0402_16V7K

    PR205
    2

    1
    PR260
    39.2K_0402_1%

    PR212
    0_0402_5%

    2
    0_0402_5%

    1
    2
    PR215
    470K_0402_5%

    2
    APL1431LBBC_SOT23-5

    LM393M_SO8

    PD22
    @CH751H-40_SOD323
    1
    2
    PW R_GD 20,25,31,34,35,43

    2
    G
    S

    PR207
    3.9K_0402_5%

    RHU002N06_SOT323
    PQ73
    1

    NC

    ANODE

    1 2

    1
    2

    7.87K_0402_1%

    PR206

    NC

    PR201

    3
    PR210

    0.1U_0402_16V7K

    PC132
    2
    1

    CATHODE

    422_0603_1%

    1
    2

    PU23

    PC130
    1U_0805_50V4Z

    PC129
    0.22U_0603_16V7K

    REF

    LM358A_SO8

    B+

    8
    0

    PR199
    10K_0402_1%

    2
    PR200
    100K_0603_0.5%

    2
    6.81K_0402_1%
    2
    1

    PR202
    2K_0402_5%
    3
    2
    1
    PQ58
    MMBT3906_SOT23
    2
    1

    10K_0402_5%

    PU21B

    PR197

    100K_0402_5%

    PU22B

    PD21
    CH751H-40_SOD323

    PR193
    PR192
    133K_0402_1%

    PR256

    1
    2
    PR195
    2

    LM358A_SO8

    PR194
    330K_0402_5%
    2
    1

    P4

    0_0402_5%

    8
    P

    2
    PR196
    0_0402_5%

    0
    G

    PU22A

    +5VS
    PR259
    1M_0402_1%

    PQ72
    +5VS
    NDS0610_NL_SOT23-3

    PD20
    CH751H-40_SOD323
    1
    2
    1

    2
    G

    +5VS
    +3VS

    PR251
    220K_0402_5%
    1

    47K

    Compal Secret Data

    Security Classification
    2005/03/10

    Issued Date

    Deciphered Date

    2006/03/10

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    3

    Title

    Compal Electronics, Inc.


    ADP_OCP

    Size Document Number


    C ustom LA-3261P UMA
    D ate:

    Tuesday, March 27, 2007

    R ev
    Sheet
    1

    44

    of

    55

    +3VS

    PC168
    2.2U_0603_6.3V6K

    15

    20

    VSUM

    13

    VO

    12

    I2UA

    28

    RBIAS
    SOFT

    OCSET
    VW
    COMP

    FB

    180P_0402_50V8J

    1 PR307

    VSUM1
    VCC_PRM

    2 PC160
    0.033U_0402_16V7K
    2
    PC179
    0.022U_0402_16V7K
    B

    2
    1 PR313 2
    1K_0402_1%
    1.91K_0402_1%
    1
    2 PC175
    330P_0402_50V7K
    PR286
    1
    2
    0_0402_5%

    PC176
    1000P_0402_50V7K

    PC172
    0.1U_0402_16V7K

    VCCGFX

    PR288

    560P_0402_50V7K

    1
    1

    Issued Date

    2
    0_0402_5%
    Parellel from VCCGFX and GND underneath

    GMCH at Interface Power pin

    PC178
    1000P_0402_50V7K

    Compal Secret Data


    2005/03/10

    Deciphered Date

    2006/03/10

    Title

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    4

    1
    1

    RTN

    Security Classification

    1
    2

    VSEN

    PC164
    1000P_0402_50V7K

    PD29

    1 PR309 2
    4.53K_0402_1%

    4.99K_0402_1%

    @SX34_SMA

    10

    PC177
    2

    PR311
    0_0402_5%

    3.57K_0402_1% 10KB_0603_5%_ERTJ1VR103J

    11

    +
    PR279
    7.68K_0805_1%
    PH4
    PR281
    1
    2 1

    DFB

    2.21K_0402_1%

    DROOP

    PR314

    PR316

    DL_GFX

    2
    PL19

    20K_0402_1%

    PC152
    10U_1206_25V6M

    PC151
    2200P_0402_50V7K
    2
    1
    1
    2

    PVCC

    PQ79
    AO4712_SO8

    1 PR312

    ISL6263_QFN32

    PR315
    374_0402_1%

    D
    D
    D
    D

    5
    6
    7
    8

    PGND

    G
    S
    S
    S

    21

    4
    3
    2
    1

    LGATE

    VSS

    19

    5
    6
    7
    8
    22

    1
    PR306
    PC169
    150K_0402_1%
    1 0.01U_0402_25V7K
    PR308
    VCC_PRM
    1
    2
    12.4K_0603_1%
    1
    2 PC170
    1000P_0402_50V7K
    1
    2
    PR310
    6.98K_0402_1%

    PC174
    2
    1

    SPIR
    FDE
    VR_ON

    0_0402_5%

    PHASE

    VCCGFXP
    1.5UH_IHLP-2525CZ-01_9A_+-20%_15mohm

    PC156
    0.22U_0603_10V7K
    LX_GFX

    18

    2
    1
    PR325 100K_0402_1%

    30
    32
    2VGAVR_ON29

    PC173
    68P_0402_50V8J

    UGATE

    DH_GFX

    2 10K_0402_5%
    1 PR305

    D4
    D3
    D2
    D1
    D0

    PR272
    2.2_0402_5%
    BST_GFX 1
    2

    G
    S
    S
    S

    1_0402_5%

    17

    4
    3
    2
    1

    PR321

    14

    DFGT_VR_EN

    27
    26
    25
    24
    23

    VIN
    BOOT

    0_0402_5%
    0_0402_5%
    0_0402_5%
    0_0402_5%
    0_0402_5%

    PQ78
    AO4468_SO8

    EP

    +5VS

    +3VS PR303 1

    @0_0402_5%
    1 PR320 2

    10K_0402_5%
    1 PR304 2

    2
    2
    2
    2
    2

    PC153
    4.7U_1206_25V6K

    33

    +3VS

    DFGT_VID_3
    DFGT_VID_2
    DFGT_VID_1
    DFGT_VID_0

    1
    1
    1
    1
    1

    VCC
    PGOOD

    VDIFF

    7
    7
    7
    7

    PR298
    PR299
    PR300
    PR301
    PR302

    16
    31

    B+

    PU30

    7,20,31 PM_PWROK

    PC167
    1U_0603_10V6K

    PR324
    @0_0402_5%
    1
    2

    PR297
    1.91K_0402_1%

    D
    D
    D
    D

    +3VS

    PR295
    10_0402_5%

    PC166
    0.01U_0402_25V7K
    2
    1

    PR296
    10_0402_5%

    @RHU002N06_SOT323

    PL18
    FBM-L11-322513-151LMAT_1210
    2
    1

    PC157
    330U_D2E_2.5VM_R9

    GFX_B+
    +5VS
    1

    DFGT_VR_EN

    GFX_B+
    VGAVR_ON

    PQ80
    2
    G

    PR327
    1
    2
    0_0402_5%

    PR326
    30K_0402_1%

    Compal Electronics, Inc.


    VCCGFX

    Size
    B
    Date:

    Document Number

    Rev

    LA-3261P UMA
    Tuesday, March 27, 2007

    Sheet
    1

    45

    of

    55

    B+_6269
    D

    B+

    PL20
    FBM-L11-322513-151LMAT_1210
    2
    1

    PC89
    4.7U_1206_25V6K

    PR136
    2
    0_0402_5%

    1
    BOOT

    PR137
    10K_0402_5%

    BOOT1

    2 PC90
    0.1U_0402_16V7K

    +5VALW

    1
    +6269_VCC

    VIN

    13

    UG
    PQ47

    14

    15

    PR138
    0_0402_5%

    BOOT

    GND

    UG

    PGOOD

    PU28
    17

    PHASE

    16

    +6269_VCC

    PVCC

    1 PR139 2
    2.2_0603_5%

    12

    1
    2
    3
    4

    +6269_VCC

    2 PC91

    8
    7
    6
    5

    D2
    G2
    D2
    D1/S2/K
    G1
    D1/S2/K
    S1/A D1/S2/K

    +1.25VMP

    2.2U_0603_6.3V6K
    SI4914_SO8

    FCCM

    LG

    11

    PGND

    10

    LG

    PL14
    LX6269

    PC92
    2.2U_0603_6.3V6K

    FB

    1
    +
    C

    ISL6269ACRZ-T_QFN16

    1
    2

    PR142
    150K_0402_1%

    2
    1
    2

    PC95
    10P_0402_50V8J
    2
    1

    0_0402_5%

    PR141
    1
    2
    7.5K_0402_1%

    VO

    ISEN
    TEST

    EN

    PR143
    57.6K_0402_1%
    2
    1

    COMP

    20,31,34,42 PM_SLP_M#

    3.3UH_MPL73-3R3_6A_20%

    PR249

    PC142
    220U_B2_2.5VM

    VCC

    PC96
    0.01U_0402_16V7K

    PC97
    1000P_0402_50V7K
    PR144
    1

    12K_0402_1%
    +5VALW

    +3VALW

    POK

    VIN

    EN

    FB

    PC138
    10U_1206_6.3V6M

    +1.05VMP

    4
    2

    PC141
    22U_1206_6.3V6M

    PC140
    27P_0402_50V8J

    PR247
    47K_0402_1%

    APL5912-KAC-TRL_SO8

    VOUT

    2
    PR292
    0_0402_5%

    GND

    VOUT

    20,31,34,42 PM_SLP_M#

    6
    VIN

    2
    PR323
    0_0402_5%

    35 M_PROK

    VCNTL

    PR293
    @10K_0402_1%
    PU27

    +1.25VM

    PC139
    1U_0603_10V6K

    PR147
    11K_0402_1%
    B

    PR248
    150K_0402_1%
    A

    Compal Secret Data

    Security Classification
    Issued Date

    2005/03/10

    2006/03/10

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    Compal Electronics, Inc.


    +1.25VMP/+1.05VMP

    Size Document Number


    Custom LA-3261P U MA
    Date:

    R ev

    Tuesday, March 27, 2007

    Sheet
    1

    46

    of

    55

    Version Change List ( P. I. R. List ) for Power Circuit (1)


    Item
    It em Page#
    D

    T itle

    D ate

    Request
    Reque st
    O wner

    Page42

    1.8V/0.9V

    3/9/2006

    HP RL

    Page45

    VCCGFX

    3/9/2006

    Compal

    Page43

    CPU_CORE

    3/10/2006

    HP RL

    Page46

    1.25VM/1.05VM 3/9/2006

    HP RL

    Page46

    1.25VM/1.05VM 4/10/2006

    Compal

    Page45

    VCCGFX

    Page45

    VCCGFX

    4/10/2006
    4/24/2006

    Compal
    Compal

    Issue
    Is sue Description

    Solution
    So lution Description

    R ev.

    No install PR131 and install PR132


    Change SLP_S5# at PR134.1 to SLP_S4#
    No install PR133 and install PR134
    Add a 0 ohm resistor PR317 (no stuff) on M_PWROK

    Power Sequence

    MAX8776 VID table can't meet Intel VID SPEC

    M_PWROK
    Correct 1.25VM voltage setting
    Power Sequence
    In S3 state, DFGT_VR_EN will no be actively driven,
    it is better to have a pull down resistor on DFGT_VR_EN.

    DB

    Change VCCGFX IC solution from MAX8776 to ISL6263

    DB

    Add 27.4 ohm pull-down (no stuff) on


    VCCSENSE & VSSSENSE near VR

    DB

    Add a 0 ohm resistor PR323 (install) on M_PWROK


    change PR293 pin1 to +3VL

    DB

    Change PR144 to 12K and PR147 to 11K.

    DB1-A

    Add a 0ohm PR324 (no stuff) on PM_PWROK

    DB1-A

    Add a 30Kohm PR325

    DB1-A

    Page42

    1.8V/0.9V

    5/15/2006

    HP MJ

    Power Sequence

    Change 1.5S to 1.8V in page 42 at pin 23 (VLDOIN)

    DB1-B

    Page46

    1.25VM/1.05VM 5/15/2006

    HP MJ

    Power Good

    Add PU34

    DB2

    10

    Page38

    Charge

    5/15/2006

    compal

    For reducing charge temperture.

    DB2

    11

    Page43

    CPU_CORE

    6/5/2006

    HP MJ

    Power Sequence

    Change PL5 from 8.2uh MPL73-8R2 to 10UH_PCMB104T-100


    Change PR28 from 0.015_2512 to 0.015_1206
    investigate that SLP_S3# connect VR_ON
    and PM_POK connect PGD_IN

    12

    Page41

    VCCP&1.5VS

    6/5/2006

    compal

    Swap +1.05V_VCCP and +1.5VS location


    for improving power plane.

    Change PR107 from 100k to 10K,PR111 from 10K to 100K.

    DB2

    6/22/2006

    HP MJ

    Chimay support for new battery cell chemistries

    P38 : remove PR52, PR38, PR41,PR53, PQ9


    P39 :remove PR262, PR263, PR264, PR76, PQ75, PQ76, PQ32

    DB2

    13

    Page37,38,44

    DB2

    P37: Add PQ81~PQ91 PR329~PR341,PD32~PD36


    P38 :Add PD37
    P44 :Add PQ92,PD38,PD39
    B

    14

    Page41

    2.5VALW/1.5VS 8/17/2006
    /1.05VCCP

    HP MJ

    For sequence fine tune

    Add PC181 but not be installed

    SI

    15

    Page43

    CPU_CORE

    8/17/2006

    HP RL

    Add 68ohm pull up to +VCCP at PU19.4


    per Intel DG1.0 sec. 4.4.1.3 Figure 50

    Add PR345 as 68ohm between +VCCP and PU19.4

    SI

    16

    Page44

    ADP_OCP

    11/08/2006

    HP RL

    Identify 65W adapter as full adapter

    Change PR223 from 180K to 182K,


    PR258 from 29.4K to 22.6K

    SI2

    17

    Page43

    CPU_CORE

    11/08/2006

    compal

    For EMI concern, add snabber

    Add PR349 and PR347 as 4.7ohm,


    Add PC183 and PC182 as 680pF
    Change boost resistor (PR148 and PR157)from 0 to 2 ohm

    SI2

    18

    Page38

    Charge

    11/08/2006

    compal

    Base on "Energy STAR" spec, reduce S5 and S3


    power consumption (AC mode)

    Uninstall PQ11

    SI2

    19

    Page42

    1.8V/0.9V

    11/13/2006

    HP

    Add PM_SLP_M# sequence

    Add PR387

    SI2

    Compal Secret Data

    Security Classification
    Issued Date

    2005/03/01

    2006/03/01

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    PWR PIR Sheet (1)


    Size Document Number
    Custom
    Date:

    R ev

    Tuesday, March 27, 2007

    Sheet
    1

    47

    of

    55

    Version Change List ( P. I. R. List ) for Power Circuit (2)


    Item
    It em Page#
    D

    T itle

    D ate

    Request
    Reque st
    O wner

    20

    Page43

    CPU_CORE

    2/28/2007

    Compal

    21

    Page44

    ADP_OCP

    2/28/2007

    HP

    22

    Page38

    Charger

    3/1/2007

    Compal

    Issue
    Is sue Description

    Solution
    So lution Description

    R ev.

    No install PC122
    Change PR185 from 3K to 1.96K
    Change PR190 from 6.19K to 6.34K

    Fine tune CPU CORE solution

    MV

    System identity

    Change PR223 from 182K to 137K


    Change PR258 from 22.6K to 29.4K

    MV

    Reserve circuit for testing Energy STAR

    Reserve PR397, PR398, PR399 and PQ131


    Add PR396 as 0 ohm.

    MV

    Compal Secret Data

    Security Classification
    Issued Date

    2005/03/01

    2006/03/01

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    PWR PIR Sheet (1)


    Size Document Number
    Custom
    Date:

    R ev

    Tuesday, March 27, 2007

    Sheet
    1

    48

    of

    55

    For DB1-B

    I tem

    <2006.03.29>

    Fixed Iss ue

    <2006.04.10>

    SATA footprint is wrong

    Rea son for change

    PA GE

    Mod ify List

    M. B. V er.

    Reserve resisters on Debug ports

    30

    Add R170, R201, R202 and CLRP3 jopen

    0.2

    SATA connector's PCB footprint is wrong

    22

    change to OCTEK_SAT-22DD1G_22P

    0.2

    R243 no install and R1589 install (XDP_DBRESET#)

    0.2

    follow Intel suggestion for XDP_DBRESET#

    4, 20

    Change component' s footprint for supply and layout easy

    +VCC_PEG should be 1.05V instead of 1.25V

    for Creatline

    07

    R1443 change from 0603 size to 0402

    10

    R1465 install and R1467 no install

    0.2

    0.2

    Add Q118, Q119, Q120, Q121, Q122, Q123, R1700, R1701, R1702
    4

    Monitor NB cracked pins

    11

    Monitor SB cracked pins

    21

    For SPI BIOS flash issue

    23

    0.2

    R1703, R1704, R1705, R1706, R1707, R1708, R1709, R1710, R1711


    Add Q124, Q125, Q126, Q127, R1716, R1712, R1713, R1717

    0.2

    R1718, R1714, R1719, R1715


    Delete Q102, R178 and Q115

    SPI BIOS can not flash.

    0.2

    Q102 pin1 short to pin3-->+3VM connect to +3VM_LAN


    PLT_RST# connect to PM_LAN_EN

    <2006.04.21>

    For LAN link status

    18

    change PCI_PIRQG to LED_LINK_LAN# and add R1727 0 ohm

    For LAN active status

    23

    Add LED_ACT_LAN# this net

    For ADP_PRES

    20

    add D68 and disconnect LED_LINK_LAN#

    0.2

    0.2

    new design

    0.2

    For LAN net name

    <2006.04.24>

    change net name from LAN_RST to LAN_RSTSYNC


    19

    change net name from LANLINK_STATUS#

    For Compal Fan design

    change Fan connector

    For NIC RST

    20

    change net name from PM_LAN_EN to LAN_RST#

    35

    Add a Resister R1722( 0 ohm), R1732, R1731(no install)

    to LED_LINK_LAN#

    0.2

    pin 1 and pin4

    0.2

    0.2

    change net name from PGD_IN to LAN_RST#

    Install C991, C990, C992, D60, R1350


    Adjust C990 and R1350 value to 0.1uF and 100K ohm.

    For DB1-C
    <2006.05.15>

    System can not power on

    For RTC CLK

    LAN can not work

    For LAN function

    0.3

    19

    add R1733

    23

    modify LAN relative schematics

    For PWR OK

    35

    0.3

    Change R124 pin2's voltage from 0.9v to 1.24VREF

    0.3

    Change R1732 pin2's voltage from 3VM to 3VM_LAN

    Compal Secret Data

    Security Classification
    2005/03/01

    Issued Date

    2005/04/06

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    HW PIR
    Size Document Number
    Custom
    Date:

    R ev
    0.4

    LA-3261P UMA

    Tuesday, March 27, 2007

    Sheet
    1

    49

    of

    55

    For DB2

    I tem

    <2006.05.29>

    Fixed Iss ue

    Rea son for change

    Add new feature (Kill switch)

    modify CRACK_GPIO28 circuits

    PA GE

    Mod ify List

    M. B. V er.

    22

    Add R1736, jp53, R1737 and Q129

    0.4

    11

    delete R1700, R1707, R1705-->NB

    21

    delete R1712, R1713, R1714-->SB

    0.4

    Change pull up for CK505 strapping

    15

    on R1108, R1690, R1245 from +3.3VM_CK505 to +3VS

    0.4

    for LAN IVRI thermal protect and limit current.

    23

    add R1

    0.4

    20

    addR3, R6, R9, R11, R15

    0.4

    Change KBC RST pin

    31

    change from PLT_RST# to NCPI_RST#

    0.4

    Change to USB port assignments

    28

    Move Dock1 from USB8 to USB7 and move WWAN from USB3 to USB8

    0.4

    Add resisters for GPI pins floating

    <2006.06.12>
    New PCIE assignments

    20

    Updated Changes:
    PCIe - port1 = Free
    PCIe - port2 = WLAN
    PCIe - port3 = Free
    PCIe - port4 = Robson
    PCIe - port5 = Docking
    PCIe - port6 = Intel LOM is fixed at this location

    Change SW design to Capsense SW.

    32

    Add new feature (Robson)

    15

    Add R5, R13 on SRC6 and R14, R17 on CLKREQ_E#

    Change GPIO pins

    18

    change GPIO4(SB) from LED_LINK_LAN# to PCI_PIRQG#

    20

    change GPIO1(SB) from CB_PE# to LANLINK_STATUS#(i)

    30

    Add R1740, R1741 and connect to +3vs

    Change HP debug port

    power source

    Change KBC 1070 GPIO pins

    31

    Change SW Connector JP18 type and relative circuits

    CRACK_GPIO28

    from GPIO28(KBC) to GPIO8(KBC)

    add R155, R156, R18, R20 and their signals connect to JP18
    Add Cap_INT on GPIO25(KBC)

    change WALN power source

    25

    change from +3valw to +3vM

    Change U75 power source for LAN function

    23

    U75 should be powered by V3.3M instead of 1.8VM

    Change USB power switch control pin

    28

    For support 2GB DIMMs

    10

    From S5 to S4_STATE# to control USB power

    BJ29 pin and BE24 pin (NB)connect to DDR DIMMA, B(A14 pin)

    13, 14
    For Crestline sightings requires

    11

    Modify PWROK circuits for All power source check

    add a 0ohm R1759 on pin N20(NB).

    35

    Change R1732 pin2's voltage from 3VM to 3VM_LAN

    <2006.06.14>
    A

    Compal Secret Data

    Security Classification
    2005/03/01

    Issued Date

    2005/04/06

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    HW PIR
    Size Document Number
    Custom
    Date:

    R ev
    0.4

    LA-3261P UMA

    Tuesday, March 27, 2007

    Sheet
    1

    50

    of

    55

    For DB2

    I tem

    <2006.06.19>

    Fixed Iss ue

    Rea son for change

    Add Intel RSMRST circuit

    PA GE

    Mod ify List

    M. B. V er.

    31

    Add R1749, R1750, R1751 and Q131, D68

    0.4

    25

    Change resister value meet G-vendor suggestion

    change R1359, R1362 VALUE

    0.4

    change R1736 pin2 contact to +RTCVCC

    0.4

    <2006.06.20>

    Kill switch design change

    22

    Change PWR_OK circuit

    35

    delete R157 and PGD_IN net

    0.4

    32

    Reserve R1753 0 ohm

    0.4

    Reserve resister on HDA _RST#_MDC

    delete two components on Debug part

    30

    delete R1740, R1741

    0.4

    Control Audio volume when boot

    28

    add EAPD link to KBC GPIO31

    0.4

    Add new feature -->Robson

    25

    Add and change JP13 pin assignment for Robson

    Fix LAN power circuit to IVRD

    23

    Delete R1 (0.68ohm), R1624, and install R1734

    improve LAN Power ripple

    23

    Add C1364, C1363 on +3V_LAN and +1.8VM_LAN

    improve DVI issue

    16

    Add SDVO_CLK/Data net name to NB SDVO_CLK/ Data pins

    28

    Change control signal name to S4_STATE and add Q132

    10

    change R1453, R1456 from Resister to bead

    <2006.06.21>

    Change USB control signal

    Isolate power noise for NB

    <2006.06.22>

    Hold RESET to modem

    Enable WLAN for AMT

    25

    Install R194, R195 and R197

    Improve TV-out signals and fix TV garbage issue

    10

    change R175, R176, R177 from150 ohm to 75 ohm

    32

    follow Intel Demo circuit for XDP

    <2006.06.23>

    21

    Chnage Fan Connector pins' count

    delete MDC disable reserve part

    28

    Install R1753

    Change pull up R1589 value for XDP_DBRESET# from 10K to 1K

    Chnage JP8 from 4pins to 3 pins.

    32

    delete U43B

    31

    add U43B

    Implement

    STB_LED# driver

    Modify power OK circuit

    35

    add Q134, Q133, R39, C2


    Delete R286, R127, C30, R117, R35, R34, R118, U79

    For Non-link part (INV_PWM from KBC to LCD)

    17

    delete R131

    Delete Repeated function circuit

    11

    Delete D21,R520

    For C-status

    20

    Install R179

    0.5

    For discharge issue

    34

    Change discharge circuit net from PM_SLP_M# to LAN_WOL_EN#

    0.5

    <2006.07.18>

    HP request

    31

    Install R155,R156 and un-install R127,R157

    0.5

    <2006.07.31>

    Do not support wake on WWAN card

    25

    Install R1383 and no install R1382

    0.5

    <2006.08.09>

    Add anti-pop circuit

    26

    Add anti-pop circuit

    0.5

    Eliminate glitch

    20

    Add R1767, no install R434, C1365, R1757

    0.5

    Compal Secret Data

    Security Classification
    2005/03/01

    Issued Date

    2005/04/06

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    HW PIR
    Size Document Number
    Custom
    Date:

    R ev
    0.4

    LA-3261P UMA

    Tuesday, March 27, 2007

    Sheet
    1

    51

    of

    55

    I tem

    Fixed Iss ue

    Rea son for change

    PA GE

    Mod ify List

    M. B. V er.

    HP request

    32

    Connect JP18 pin1 to +3VL, pin2 to +3VS

    0.5

    EMI request

    24

    Add D72 and D73 for EMI request

    0.5

    Add MAX9511

    9,16,33

    Add MAX9511

    0.5

    For OTS 214499

    31

    Add U82

    0.5

    HP request

    25

    No install R1418,R1358,R1359,R1360

    0.5

    HP request

    25

    JP44 PIN37,43 connected to GND


    JP44 PIN39,41 connected to +3VS

    0.5

    HP request

    25

    Isolate SLOT power from SYSTEM power.

    0.5

    HP request

    25

    Remove 1.5V from WWAN slot

    0.5

    HP request

    25

    Install schottkey diode D74

    0.5

    SIM I/O pull-up footprint is requested.

    25

    Add R1780 and no install

    0.5

    HP request

    25

    change +3VS to +3VS_WLAN ,Change +3VS on R1383.2 to +3VS_WWAN


    Change +3VS on R1071.1 and R1703.1 to +3VS_WWAN

    0.5

    HP request

    Changes for MAX9511

    0.5

    HP request

    25

    Remove SW1,C986,R521,D65,R200

    0.5

    HP request

    30

    Need to connect SPI_HOLD#_0 and SPI_HOLD#_1 together.

    0.5

    HP request

    31

    Item 191,192,193

    0.5

    HP request

    25

    Install R1363 and NO INSTALL R1364

    0.5

    HP request

    19

    Move D75 to SB and delete R1782

    0.5

    HP request

    25

    Add 1394 signals on M/B

    0.5

    HP request

    25

    Add a 0 ohm 0805 on 1.5VS to WLAN mini card connector

    0.5

    20

    Swap GPIO01 and GPIO11 connections.

    0.5

    32

    Change JP18 pin8 to WL_BLUE_LED#

    0.5

    16

    Change R142, R144 to 3.9K ohm

    0.5

    <2006.08.11>

    <2006.08.21>

    <2006.08.23>

    <2006.08.25>

    <2006.08.29>
    A

    <2006.08.30>

    OTS issue

    Compal Secret Data

    Security Classification
    2005/03/01

    Issued Date

    2005/04/06

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    HW PIR
    Size Document Number
    Custom
    Date:

    R ev
    0.1

    LA3261P_UMA

    Tuesday, March 27, 2007

    Sheet
    1

    52

    of

    55

    I tem

    Fixed Iss ue

    Rea son for change

    PA GE

    Mod ify List

    M. B. V er.

    Intel update

    HP request

    32

    <2006.09.04>

    EMI request

    28

    Add R1790,R1791,R1792

    0.5

    <2006.09.06>

    HP request

    23

    Change C1257 and C1359 to 10uF 0805

    0.5

    HP request

    25

    Remove R1412,1413,1414,1415,1416,1417

    0.5

    HP request

    25

    Remove R1418,1358,1353,1360

    0.5

    HP request

    30

    Add 0 ohm for SPI, R1793,1794,1795

    0.5

    HP request (MAX9511 issue)

    Remove MAX9511 from CRT circuit

    0.6

    No install BGA crack circuit

    0.6

    Add R1786,R1787,R1788,R1789

    0.5

    <2006.09.01>
    D

    <2006.10.13>

    <2006.10.31>
    <2006.11.01>

    Remove PLT_RST# connection to R21.2 and connect GPIO28 from ICH8

    0.5
    D

    9,16,33

    11,21,31

    Remove R23 and NPCI_RST# connection

    32

    Change KB connector

    0.6

    31

    Change RSMRST circuit, add R1796

    0.6

    Auto power on issue

    20

    Auto power on issue(add Q140, R1797)

    0.6

    1394 issue

    28

    Modify EMI request

    0.6

    <2006.11.03>

    HP request

    32

    Connect JP32 pin2 to +3VS

    0.6

    <2006.11.07>

    HP request

    31

    Install R1784, no install R1783

    0.6

    Intel document

    10

    Change R1471 to 100 ohm

    0.6

    <2006.11.09>

    Layout space

    22

    Remove kensinton circuit

    0.6

    <2006.11.11>

    HP request

    15

    Add CLRP4 and CLRP5 for FSB 667/800 select

    0.6

    <2006.11.13>

    HP request

    35

    Tie R1732.2 to 3VM instead of 3VM_LAN

    0.6

    HP request

    24

    Change R1639 to 1.4K based on Intel WW44

    0.6

    HP request

    Add resistors in series with the diode signals going to ADM1032.

    0.6

    HP request

    31

    Eliminate glitch circuit, install R1483 and no install R1484

    0.6

    Compal Secret Data

    Security Classification
    2005/03/01

    Issued Date

    2005/04/06

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    HW PIR
    Size Document Number
    Custom
    Date:

    R ev
    0.1

    LA3261P_UMA

    Tuesday, March 27, 2007

    Sheet
    1

    53

    of

    55

    I tem

    <2006.11.16>

    Fixed Iss ue

    Rea son for change

    HP request

    PA GE

    Mod ify List

    M. B. V er.

    10

    Change R1468, R1472, R1473 to bead

    0.6

    HP request

    24

    Change R1639 to 1.87K ohm

    0.6

    HP request

    27

    Change R261 and R253 to 56.2 ohms 1%.

    0.6

    HP request

    23

    Install Q102,R1730, no install R1612,Q104,Q105.

    0.6

    HP request

    Install R1739

    0.6

    HP request

    35

    Add Schmitt Trigger to eliminate glitch

    0.7

    HP request

    31

    Install R1646,C75

    0.7

    HP request

    19

    Update GPIO33 circuit

    0.7

    HP request

    Add C and no install

    0.7

    Chrontel request

    16

    Add C for DVI I2C

    0.7

    <2007.01.02>

    ME request

    25

    Change JP50 for rewrok

    0.7

    <2007.01.04>

    Intel request

    23

    Add R1804

    0.7

    ME request

    32

    Change JP20 to FFC connector

    0.7

    <2007.01.08>

    EMI request

    33

    Add R1805,R1806 0 ohm, reserve C1372, C1373

    0.7

    <2007.01.10>

    HP request

    31

    R1783 connected to +3VL

    0.7

    <2007.01.13>

    Compal request

    35

    Change LMV331 to LM393, delete R124 and C27

    0.7

    <2007.01.15>

    HP request

    26

    R370, R369 - change from 4.7k to 6.04k


    R374, R375 - change from 4.7k to 2.00k

    0.7

    <2007.01.16>

    HP request

    25

    Connected R1780.2 to UIM_PWR

    0.7

    <2007.01.17>

    HP request

    30

    Add pad for BIOS debug

    0.7

    <2007.01.19>

    HP request

    34

    Add R1807 and no stuff

    0.7

    CRT wavy issue

    10

    Add C1374 for CRT wavy issue

    0.7

    CRT wavy issue

    17

    Add 10uFX2 for CRT wavy issue(C586, C1376)

    0.9

    <2006.11.28>

    <2006.12.19>

    <2006.12.26>

    <2007.02.09>

    Compal Secret Data

    Security Classification
    2005/03/01

    Issued Date

    2005/04/06

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    HW PIR
    Size Document Number
    Custom
    Date:

    R ev
    0.1

    LA3261P_UMA

    Tuesday, March 27, 2007

    Sheet
    1

    54

    of

    55

    I tem

    <2007.02.09>

    Fixed Iss ue

    Rea son for change

    HP request

    PA GE

    Mod ify List

    M. B. V er.

    30

    Add Q142 for FPR

    0.9

    +3VM_LAN leakage

    20

    Add U83 for auto boot and leakage issue

    0.9

    Compal request

    15

    Delete CLPR4, CLRP5

    0.9

    HP request

    34

    Install R1807 and non install R630

    0.9

    LVDS sequence issue

    17

    Change C28 to 0.1uF

    0.9

    HP request

    31

    Add R1809 to GND

    0.9

    <2007.02.26>

    Safety request

    33

    Change RJ11 connector

    0.9

    <2007.02.27>

    HP request

    27

    Change R261 and R253 to 60.4 ohm

    0.9

    HP request

    35

    Move R1803

    0.9

    <2007.02.28>

    HP request

    11,21

    Change to +3VL

    0.9

    <2007.03.01>

    HP request

    10

    CRT wavy issue -- add C1374

    0.9

    HP request

    15

    Add CAP for WWAN issue

    0.9

    <2007.02.16>

    Compal Secret Data

    Security Classification
    2005/03/01

    Issued Date

    2005/04/06

    Deciphered Date

    THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
    AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
    DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
    MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
    5

    Title

    HW PIR
    Size Document Number
    Custom
    Date:

    R ev
    0.1

    LA3261P_UMA

    Tuesday, March 27, 2007

    Sheet
    1

    55

    of

    55

    You might also like