CS220: Introduction to Computer Organization

Running Bluespec System Verilog (BSV)

Amey Karkare August 2011

Contents
1 SETUP 2 CHECKING THE SETUP 3 LICENSING 3.1 Starting the license server . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 RUNNING BSV TOOLS 5 COMMON ERRORS 6 About the Document 1 1 2 2 3 4 5

SETUP

The Bluespec package is installed on all systems in the ground oor lab of CSE dept. The package is installed in /opt, so you have to add the following lines to your .bashrc le (assuming you use the default bash shell): export export export export BLUESPEC_HOME=/opt/Bluespec-2011.06.D BLUESPECDIR=${BLUESPEC_HOME}lib PATH=$PATH:${BLUESPEC_HOME}/bin LM_LICENSE_FILE=27000@cse6.cse.iitk.ac.in

CHECKING THE SETUP

The steps to check proper installation is : # Copy Smoke test to home directory cp -r /opt/Bluespec-2011.06.D/training/BSV/lab/ssmoke_test/ ~ cd ~/smoke_test && make smoke_test If everything is ne, then user should see the following output: -------------------------------------------------------------Checking Verilog generation bsc -verilog -keep-fires -cross-info -no-inline-reg FibOne.bsv Verilog file created: mkFibOne.v Checking Verilog simulation bsc -vsim iverilog -e mkFibOne -o mkFibOne_v mkFibOne.v Verilog binary file created: mkFibOne_v ./mkFibOne_v > smoke_test.out Comparing result of Bluespec Simulation Some simulator specific difference expected diff mkFibOne.out.expected smoke_test.out Bluespec installation looks OK --------------------------------------------------------------

LICENSING

The license server for running bluespec tools on IITK servers is: 27000@cse6.cse.iitk.ac.in. We have total 10 licenses for Bluespec tools. This means, at most 10 people can run the tool simulataneously. Because our designs are going to be small, this will be sucient for the purpose of the course. The license server will be accessible only from the IITK network. You will have to use machines in the ground oor lab in the CSE department to use the Bluespec tools. You can use remote login (ssh, putty etc.) to access the tool. Remember that we have got the licenses for free for academic purpose only. Any usage beyond the coursework will require explicit permissions from Bluespec company.

3.1

Starting the license server

If there is problem with checking out the licenses, follow these steps: 2

1. Check if cse6.iitk.ac.in is down. If it is down, ask some system administrator to boot it. Once cse6 is up, goto the next step. In case you do not have login on cse6, ask someone who has login on cse6 to do it. 2. Login to cse6 with you username and password. Do the following: cd /users/faculty/karkare/BlueSpec/flexlm/iitk ./lic_manager.sh start 3. You should be able to check out the licenses now. If this does not solve the issue, please mail karkare@cse... with the error message you are getting.

RUNNING BSV TOOLS

Consult the user guide located at ${BLUESPEC_HOME}/doc/user-guide.pdf to use bluespec tools. The rest of this section is borrowed from the user-guide, and describes the compilation process in brief. A BSV source le is compiled with a command like this: bsc [options] Foo.bsv where Foo.bsv is the top le in the design. Some common ages are: -g module -u -sim -verilog -e module -o name generate code for module (requires -sim or -verilog) check and recompile packages that are not up to date compile BSV generating Bluesim object compile BSV generating Verilog file top-level module for simulation name of generated executable

Use bsc -help to list all ags. If no ags are provided, the compile stops after the type checking phase. To compile through code generation, you must provide a ag indicating whether the target is Bluesim (-sim) or Verilog (-verilog). For this course, we will be generating Verilog code only. For example, to compile to code generation for Verilog, use: bsc -verilog Foo.bsv When compiling to code generation a module must be specied, using either the synthesize attribute in the BSV code, or the -g ag at compile time. From the command line, multiple modules can be specied for code generation at the same time. For example: bsc -verilog -g mkFoo -g mkBaz Foo.bsv 3

Linking requires a second call to the bsc compiler. When linking you must specify the top-level module with the -e ag. The name following the ag must be the name of a BSV module and only one module can be specied. You must also specify the back end with either the -sim or -verilog ag. For example, to link for Verilog: bsc -verilog -e mkFoo We use iverilog Verilog simulator for simulating the generated design.

COMMON ERRORS

In this section, I have enumerated some of the commong mistakes made by the BSV users, and suggest possible xes. This list is by no means exhaustive. I will keep updating the list as I come across errors. Further, the xes suggested here are just guidelines. They may not work for some similar problem of yours. In such case, please mail me the detailed description of the problem, with a small design/testcase that shows the problem. Please contribute to this list. If you nd x for some problem that most of your friends are facing, let me know the problem and the x. I will add it to the list. Unexpected identifier divIfc, expected interface type Reason: The name of interface does not start with uppercase letter. Possible Fix: Uppercase the interface name. In this case, use DivIfc. xyz.foo needs more than 1 ports for the following uses: xyz.foo 32d128 32d0 at "Top.bsv", line 24, column 12 xyz.foo 32d128 32d64 at "Top.bsv", line 24, column 12 Reason: Probably you have used (*synthesize*) directive for module xyz, and then instantiated it only once, but used its method foo twice. Possible Fix: Remove (*synthesize*) directive. OR create more instances of xyz. Either an Action/ActionValue statement was used in a module block or else a module instantiation was used in an Action/ActionValue block. Reason: An Action/ActionValue method ($display, $nish, some user dened method) is used outside rule ...endrule block. Possible Fix: Enclose the actions inside rule ...endrule.

About the Document

August 2011 Initial Draft