Estudio281c - 351 - 451 PC Board Repair Ver00

PC BOARD REPAIR MANUAL
MULTIFUNCTIONAL DIGITAL COLOR SYSTEMS
e-STUDIO281c/351c/451c
File No. RME05000100 R05032182900-TTEC Ver00_2005-06
2005 TOSHIBA TEC CORPORATION All rights reserved
GENERAL PRECAUTIONS REGARDING THE SERVICE FOR e-STUDIO281c/351c/451c

The installation and service should be done by a qualified service technician.
1) Transportation/Installation - When transporting/installing the equipment, employ four persons and be sure to hold the positions as shown in the figure. The equipment is quite heavy and weighs approximately 112 kg (246 lb), therefore pay full attention when handling it.
Be sure not to hold the movable parts or units (e.g. the control panel, ADU or RADF) when transporting the equipment. Be sure to use a dedicated outlet with AC 110 V / 13.2 A, 115 V or 127 V / 12 A, 220-240 V or 240 V / 8 A for its power source. The equipment must be grounded for safety. Select a suitable place for installation. Avoid excessive heat, high humidity, dust, vibration and direct sunlight. Provide proper ventilation since the equipment emits a slight amount of ozone. To insure adequate working space for the copying operation, keep a minimum clearance of 80 cm (32) on the left, 80 cm (32) on the right and 10 cm (4) on the rear. The equipment shall be installed near the socket outlet and shall be accessible. Be sure to fix and plug in the power cable securely after the installation so that no one trips over it.
2) General Precautions at Service - Be sure to turn the power OFF and unplug the power cable during service (except for the service should be done with the power turned ON). - Unplug the power cable and clean the area around the prongs of the plug and socket outlet once a year or more. A fire may occur when dust lies on this area. - When the parts are disassembled, reassembly is the reverse of disassembly unless otherwise noted in this manual or other related documents. Be careful not to install small parts such as screws, washers, pins, E-rings, star washers in the wrong places. - Basically, the equipment should not be operated with any parts removed or disassembled. - The PC board must be stored in an anti-electrostatic bag and handled carefully using a wristband since the ICs on it may be damaged due to static electricity. Caution: Before using the wristband, unplug the power cable of the equipment and make sure that there are no charged objects which are not insulated in the vicinity. Avoid expose to laser beam during service. This equipment uses a laser diode. Be sure not to expose your eyes to the laser beam. Do not insert reflecting parts or tools such as a screwdriver on the laser beam path. Remove all reflecting metals such as watches, rings, etc. before starting service. Be sure not to touch high-temperature sections such as the exposure lamp, fuser unit, damp heater and areas around them. Be sure not to touch high-voltage sections such as the chargers, transfer belt, 2nd transfer roller, developer, IH control circuit, high-voltage transformer, exposure lamp control inverter, inverter for the LCD backlight and power supply unit. Especially, the board of these components should not be touched since the electric charge may remain in the capacitors, etc. on them even after the power is turned OFF. Make sure that the equipment will not operate before touching potentially dangerous places (e.g. rotating/operating sections such as gears, belts pulleys, fans and laser beam exit of the laser optical unit). Be careful when removing the covers since there might be the parts with very sharp edges underneath. When servicing the equipment with the power turned ON, be sure not to touch live sections and rotating/operating sections. Avoid exposing your eyes to laser beam. Use designated jigs and tools. Use recommended measuring instruments or equivalents. Return the equipment to the original state and check the operation when the service is finished.
3) Important Service Parts for Safety - The breaker, door switch, fuse, thermostat, thermofuse, thermistor, IC-RAMs including lithium batteries, etc. are particularly important for safety. Be sure to handle/install them properly. If these parts are short-circuited and their functions become ineffective, they may result in fatal accidents such as burnout. Do not allow a short-circuit or do not use the parts not recommended by Toshiba TEC Corporation. 4) Cautionary Labels - During servicing, be sure to check the rating plate and cautionary labels such as Unplug the power cable during service, CAUTION. HOT, CAUTION. HIGH VOLTAGE, CAUTION. LASER BEAM, etc. to see if there is any dirt on their surface and if they are properly stuck to the equipment.
5) Disposal of the Equipment, Supplies, Packing Materials, Used Batteries and IC-RAMs - Regarding the recovery and disposal of the equipment, supplies, packing materials, used batteries and IC-RAMs including lithium batteries, follow the relevant local regulations or rules.
Caution: Dispose of used batteries and IC-RAMs including lithium batteries according to this manual. Attention: Se dbarrasser de batteries et IC-RAMs uss y compris les batteries en lithium selon ce manuel. Vorsicht: Entsorgung des gebrauchten Batterien und IC-RAMs (inclusive der Lithium-Batterie) nach diesem Handbuch.
CONTENS
e-STUDIO281c/351c/451c
1. SYSTEM BLOCK DIAGRAM ........................................................................................ 1-1 2. GENERAL DESCRIPTION OF MAIN IC....................................................................... 2-1
2.1 Scanner CPU (TMP95C063F) ............................................................................................. 2-1 2.1.1 Outline and features ................................................................................................. 2-1 2.1.2 Functions .................................................................................................................. 2-2 2.1.3 Pin assignment ......................................................................................................... 2-2 2.1.4 Signals...................................................................................................................... 2-3 2.2 Engine CPU (TMP95C063F) ............................................................................................... 2-8 2.2.1 Outline and features ................................................................................................. 2-8 2.2.2 Functions .................................................................................................................. 2-8 2.2.3 Pin assignment ......................................................................................................... 2-8 2.2.4 Signals...................................................................................................................... 2-9 2.3 Gate Array (EC/N075) ....................................................................................................... 2-14 2.3.1 Functions ................................................................................................................ 2-14 2.3.2 Pin assignment ....................................................................................................... 2-14 2.3.3 Signals for gate array-1 (IC40) ............................................................................... 2-15 2.3.4 Signals for gate array-2 (IC23) ............................................................................... 2-23
3. ELECTRIC CIRCUIT DIAGRAMS................................................................................. 3-1

3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 System control circuit (SYS board)...................................................................................... 3-2 Logic circuit (LGC board)................................................................................................... 3-25 Scanning section control circuit (SLG board) .................................................................... 3-45 CCD driving circuit (CCD board)........................................................................................ 3-63 Laser driving circuit (LDR board) ....................................................................................... 3-68 H-Sync signal detection circuit (SNS board)...................................................................... 3-70 Driving circuit (DRV board) ................................................................................................ 3-71 ADU driving circuit (ADU board) ........................................................................................ 3-72 Display circuit (DSP board)................................................................................................ 3-74 Key control circuit (KEY board).......................................................................................... 3-75 Filter circuit (FIL board)...................................................................................................... 3-77 Facsimile circuit (FAX board: GD-1200) ............................................................................ 3-78 Facsimile power supply circuit (FAX PWR board: GD-1200) ............................................ 3-92 Modem circuit (MDM board: GD-1160).............................................................................. 3-93 Telephone line network control circuit (NCU board: GD-1200/1160) *Only for NA/TW model397 3.16 Telephone line network control circuit (NCU board: GD-1200/1160) *Only for EU(EU-N)/AU/ AS/C model3-99
June 2005 TOSHIBA TEC
e-STUDIO281c/351c/451c CONTENS
e-STUDIO281c/351c/451c CONTENS
1.
CCD
PWM
SLG
SYS
LGC
Laser unit
SNS
Laser beam sensor
(R)
Amp A/D
(G/K-odd) ASIC LVDS driver Image processing (ASIC) ASIC LVDS receiver

LDR
ASIC 8 FRAM 256KB 8 Data-bus Scanner CPU 22MHz 32 Data-bus 32 ASIC Bus transceiver Engine CPU 24MHz 32 16 PCI-bus 8 Page memory (DIMM) Standard: 128MB Page memory (DIMM) Option:128MB 8 Laser diode 16 Flash ROM 512KB 16 Data-bus 8 SRAM 128KB 8 8 Download jig 32 32 32 64 System CPU 600MHz Gate array #2 Gate array #1 32 8 NVRAM 8KB
CCD
Amp A/D
(B/K-even)
Amp A/D
Data-bus
16
SRAM 128KB
Flash ROM 512KB
Download jig
RADF
SYSTEM BLOCK DIAGRAM
Control panel
Scrambler board
PCI slot
Fig.1-1
Wireless LAN module
1-1
64 ASIC Main memory (DDR DIMM) Standard: 256MB Option: 512MB Flash ROM 8MB ASIC 16 32 32 16 Flash ROM 8MB North bridge (System controller) 64 ASIC 16 32 RTC Ether PHY Battery 16 16 SRAM 512KB Download jig (SYS1) Download jig (SYS2)
Finisher
8 IPC Finisher
Parallel port (IEEE-1284)
Parallel interface kit
Bridge unit
HDD
USB connector (device)
USB connector (host: external)
I/O
PFP/LCF HVT Clutches Sensors Solenoids
USB connector (host: internal)
Bluetooth module
Key counter
ADU
Motors
Copy key card Bypass unit Switches
PSTN External TEL
NCU (LINE-1)
PSTN
NCU (LINE-2)
FAX
Modem
e-STUDIO281c/351c/451c SYSTEM BLOCK DIAGRAM
LAN connector (10BASE-T/100BASE-TX)
: Option
e-STUDIO281c/351c/451c SYSTEM BLOCK DIAGRAM
1-2
2.
2.1
GENERAL DESCRIPTION OF MAIN IC

Scanner CPU (TMP95C063F)
Outline and features
2
2.1.1
The TMP95C063F is developed as a high-speed, advanced 16-bit microcontroller for a range of mid to large-scale equipment. This device is presented in a 144-pin plastic flat package. Its features are as follows. 1) Original high-speed 16-bit CPU (900H_CPU) - Instruction mnemonics upwardly compatible with TLCS-90/900 - 16-Mbyte linear address space - General-purpose registers using register bank system - 16-bit multiplication/division instructions, bit transfer/arithmetic instructions - Micro DMA: 4 channels (640 ns/2 bytes at 25 MHz) 2) Minimum instruction execution time: 160 ns (at 25 MHz) 3) Internal RAM: No Internal ROM: No 4) External memory expansion - Expandable up to 16 Mbytes (common to programs and data) - External data bus width selection pin (AM8/16) - Can use both 8- and 16-bit external buses ... Dynamic data bus sizing 5) Internal DRAM controller: 2 channels - 2CAS/2WE selectable 6) 8-bit timer: 8 channels 7) 16-bit timer: 2 channels 8) Pattern generator: 4 bits, 2 channels 9) General-purpose serial interface: 2 channels - Baud rate generated by external clock 10)10-bit A/D converter: 8 channels 11)8-bit D/A converter: 2 channels 12)Watchdog timer 13)Chip selector, wait controller: 4 blocks 14)Interrupt function: - CPU interrupts: 2 (software interrupt instructions, illegal instructions) - Internal interrupts: 22 (7 priority levels available) - External interrupts: 11 (7 priority levels available) 15)Input/output ports - 91 pins 16)Standby function - 3 HALT modes (RUN, IDLE, STOP)
e-STUDIO281c/351c/451c GENERAL DESCRIPTION OF MAIN IC
2-1
2.1.2
Functions
The Scanner CPU interfaces with the System CPU and RADF, and controls the whole system of the scanning section such as the scan motor, APS sensor, exposure lamp and such. The Scanner CPU also sets the parameter of each image processing ASIC. These control programs of the Scanner CPU are stored in the Flash ROM on the SLG board. These programs can be updated by downloading the new programs with the download jig, PC which is serially connected and so on.
2.1.3
Pin assignment
AVCC AVSS VREFL VREFH PC7/AN7 PC6/AN6 PC5/AN5 PC4/AN4 PC3/AN3 PC2/AN2 PC1/AN1 P07/AN0 DVCC PD0/INT0 PD1 PD2 PD3 PD4 PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 DVSS A0 A1 A2 A3 A4 A5 A6 A7 A8
144
109
1 DAREFH DAREFL DAOUT0 DAOUT1 DVSS PB0/INT4/T18 PB1/INT5/T19 PB2/TO8 PB3/TO9 PB4/INT6/TIA PB5/INT7/TIB PB6/TOA PB7/TOB PA0/TXD0 PA1/RXD0 PA2/CTS0 PA3/SCLK0 DVCC PA4/TXD1 PA5/RXD1 PA6/CTS1 PA7/SCLK1 NMI P90/TI0 P91/TO1 P92/TI2 P93/TO3 P94/TI4 P95/TO5 P96/TI6 P97/TO7 T80/BS P81/SCOUT P82/WAIT AM8/16 CLK 36
140
135
130
125
120
115
110
108 DVCC A9 A10 A11 A12 A13 A14 A15 A16/P20 A17/P21 A18/P22 A19/P23 A20/P24 A21/P25 A22/P26 A23/P27 DVSS D15/P17 D14/P16 D13/P15 D12/P14 D11/P13 D10/P12 D9/P11 D8/P10 DVCC D7 D6 D5 D4 D3 D2 D1 D0 DVSS RD 73
105
10
100
TMP95C063F
MFP144 95
15
TOP VIEW
20
90
25
85
30
80
35
75
40 37
45
50
55
60
65
70
72
DVSS X1 X2 EA RESET WDTOUT P83/NMI2 P84/INT0 P85/INT1 P86/INT2 P87/INT3 DVCC P70/PG00 P71/PG01 P72/PG02 P73/PG03 P74/PG10 P75/PG11 P76/PG12 P77/PG13 DVSS P67/UCAS3/UW3/WE3 P66/LCAS3/LW3/REFOUT3 P65/CAS3/WE3 P64/CS3/RAS3 P63/UCAS1/UW1/WE1 P62/LCAS1/LW1/REFOUT1 P61/CAS1/WE1 P60/CS1/RAS1 P57/CS2 P56/CS0 P55/R/W P54/BUSAK P53/BUSRQ P52/HWR WR
Fig.2-1
2-2
2.1.4
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
Signals
Port name DAREFH DAREFL DAOUT0 DAOUT1 DVSS1 PB0/INT4/TI8 PB1/INT5/TI9 PB2/TO8 PB3/TO9 PB4/INT6/TIA PB5/INT7/TIB PB6/TOA PB7/TOB PA0/TXD0 PA1/RXD0 PA2/CTS0 PA3/SCLK0 DVCC1 PA4/TXD1 PA5/RXD1 PA6/CTS1 PA7/SCLK1 Signal name DAREFH DAREFL MOTREF-0 SG DFSCST-0 DFRAK-0 EEMCLK-1 DFRRQ-0 PNCNT-0 SSW-0 STXD-1 SRXD-1A SCTS-0A SRTS-0 DVCC DFTXD-0 DFRXD-0 DFAK-0 DFRQ-0 I/O I I O I I O I I I O I I O O I O O Function Reference voltage (H) for D/A converter (+5 V) Reference voltage (L) for D/A converter (Signal ground) Reference voltage for scan motor Not used Signal ground RADF scanning start signal (Down-edge trigger: scan start) Not used RADF acknowledge signal: SLG board <- RADF (Low-active) EEPROM clock RADF request signal: SLG board <- RADF (Down-edge trigger: transmission request) Not used Debug panel connection signal (L: connected) (For debug) Debug panel SW status signal (For debug) Transmission data: SLG board -> SYS board Reception data: SLG board <- SYS board Transmission clear signal: SLG board <- SYS board Transmission request signal: SLG board -> SYS board +5 V Transmission data: SLG board -> RADF Reception data: SLG board <- RADF Acknowledge signal: SLG board -> RADF (Low-active) Data transmission request signal: SLG board -> RADF (down edge trigger: transmission request) Non-maskable Interrupt signal (Pull-up: +5 V) EEPROM chip select signal Scan motor drive clock Checksum status signal (H: OK, L: NG) Download jig (Scanner ROM) LED drive signal (H: LED ON) EEPROM read data
23 24 25 26 27 28
NMI P90/TI0 P91/TO1 P92/TI2 P93/TO3 P94/TI4
/NMI EEMCS-1 MOTCLK-1 CHKSAMOK-1 LED EEMDTIN-1
I O O O O I
2-3
Pin No. 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
Port name P95/TO5 P96/TI6 P97/TO7 P80/BS P81/SCOUT P82/WAIT AM8/16 CLK DVSS2 X1 X2 EA RESET WDTOUT P83/NMI2 P84/INT0 P85/INT1 P86/INT2 P87/INT3 DVCC2 P70/PG00 P71/PG01 P72/PG02 P73/PG03 P74/PG10 P75/PG11 P76/PG12 P77/PG13 DVSS3 P67/UCAS3/UW3/ WE3 P66/LCAS3/LW3/ REFOUT3
Signal name EEMDTOUT-1 VSYNC-0 WORD-0 SG X1 X2 /EA MRST-0 WDTOUT-0 VSYNC-0 +5V LED0 LED1 LED2 LED3 LED4 LED5 LED6 LED7 SG FANON-0
I/O O I I I O I I O I I I I I I I I I O EEPROM write data Not used Not used Not used Not used Not used
Function
Bus width selection signal (H: 8-bit fixed, L: 8/16-bit coexisting) Not used (Open) Signal ground Clock input (22 MHz) Clock output (22 MHz) Pull-down: signal ground Reset signal (Low-active) Watchdog output signal (H: CPU is normal, L: CPU is out of control) Not used Not used Not used Not used +5 V Not used Not used Not used Not used Not used Not used Not used Not used Signal ground Not used Scanner unit cooling fan drive signal
2-4
Pin No. 60
Port name P65/CAS3/WE3
Signal name FANCHG-0
I/O O
Function Scanner unit cooling fan speed switching signal FANON-0 FANCHG-0 Status L L High speed drive L H Low speed drive H L High speed drive H H Stop Chip select signal [3] (Low-active) * For Flash ROM (PC downloading) Not used Exposure lamp ON signal (L: ON) CCD power supply control signal (H: supply, L: cutoff) Chip select signal [1] (Low-active) * For SRAM Chip select signal [2] (Low-active) * For ROM (Download jig for EPROM for PC downloading) Chip select signal [0] (Low-active) * For ASIC Gate array data bus input/output switching signal (H: input, L: output) Exposure lamp enable signal (Low-active) Not used SYS board detection signal (L: connected) Write signal (Low-active) Read signal (Low-active) Signal ground
61 62 63 64 65 66
P64/CS3/RAS3 P63/UCAS/UW1/ WE P62/LCAS/LW1/ REFOUT1 P61/CAS1/WE1 P60/CS1/RAS1 P57/CS2
CS3-0 LMPON-0 CCDPSOFF-0 CS1-0 CS2-0
O O O O O
67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87
P56/CS0 P55/R/W P54/BUSAK P53/BUSRQ P52/HWR WR RD DVSS4 D0 D1 D2 D3 D4 D5 D6 D7 DVCC3 D8/P10 D9/P11 D10/P12 D11/P13
CS0-0 GAWR-0 LMPEN-0 SYSCNT-0A MWR-0A MRD-0A SG MDT[0] MDT[1] MDT[2] MDT[3] MDT[4] MDT[5] MDT[6] MDT[7] +5V MDT[8] MDT[9] MDT[10] MDT[11]
O O I I I O -
I/O Data bus [0] I/O Data bus [1] I/O Data bus [2] I/O Data bus [3] I/O Data bus [4] I/O Data bus [5] I/O Data bus [6] I/O Data bus [7] +5 V
I/O Data bus [8] I/O Data bus [9] I/O Data bus [10] I/O Data bus [11]
2-5
Pin No. 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
Port name D12/P14 D13/P15 D14/P16 D15/P17 DVSS5 A23/P27 A22/P26 A21/P25 A20/P24 A19/P23 A18/P22 A17/P21 A16/P20 A15 A14 A13 A12 A11 A10 A9 DVCC4 A8 A7 A6 A5 A4 A3 A2 A1 A0 DVSS6 PE7 PE6
Signal name MDT[12] MDT[13] MDT[14] MDT[15] SG DWNLD-0 5VSWON-0 PNGT-0 SLEEP-1 MAD[18] MAD[17] MAD[16] MAD[15] MAD[14] MAD[13] MAD[12] MAD[11] MAD[10] MAD[9] +5V MAD[8] MAD[7] MAD[6] MAD[5] MAD[4] MAD[3] MAD[2] MAD[1] MAD[0] SG APSON
I/O I/O Data bus [12] I/O Data bus [13] I/O Data bus [14] I/O Data bus [15] O O O O O O O O O O O O O O O O O O O O O O O O Signal ground
Function
PC download status signal (L: downloading) 5VSW power supply signal (Low-active) Debug panel control signals ON/OFF signal (For debug) ASIC sleep mode control signal (H: sleep mode) Address bus [18] Address bus [17] Address bus [16] Address bus [15] Address bus [14] Address bus [13] Address bus [12] Address bus [11] Address bus [10] Address bus [9] +5 V Address bus [8] Address bus [7] Address bus [6] Address bus [5] Address bus [4] Address bus [3] Address bus [2] Address bus [1] Address bus [0] Signal ground Not used APS sensor power ON/OFF signal (H: APS sensor power ON, L: APS sensor power OFF) Not used
121
PE5
2-6
Pin No. 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144
Port name PE4 PE3 PE2 PE1 PE0 PD4 PD3 PD2 PD1 PD0/INT8 DVCC5 PC0/AN0 PC1/AN1 PC2/AN2 PC3/AN3 PC4/AN4 PC5/AN5 PC6/AN6 PC7/AN7 VREFH VREFL AVSS AVCC
Signal name MOTMD3-0 MOTMD2-0 MOTMD1-0 MOTDIR-0 MOTEN-1 ROMDT-0 DFCNT-0 APS3-0 APS2-0 APS1-0 +5V +24CHK HOME-1 PLTN-1 APSC-0 APSR-0 VREFH VREFL AVSS AVCC
I/O O O O O O I I I I I I I I I I I I I I
Function Scan motor control data [3] Scan motor control data [2] Scan motor control data [1] Scan motor rotational direction switching signal (H: CCW, L: CW) Scan motor hold ON/OFF signal (H: ON, L: OFF) Download jig (Scanner ROM) connection signal (L: connected) RADF connection signal (L: connected) APS-3 sensor detection signal (Low-active) APS-2 sensor detection signal (Low-active) APS-1 sensor detection signal (Low-active) +5 V Pull-down: signal ground Not used +24 V voltage check Pull-down: signal ground Carriage home position sensor detection signal (H: home position) Platen sensor detection signal (H: closed, L: opened) APS-C sensor detection signal (Low-active) APS-R sensor detection signal (Low-active) Reference voltage (H) for A/D converter (+5 V) Reference voltage (L) for A/D converter (Signal ground) A/D converter ground (Signal ground) A/D converter power supply (+5 V)
2-7
2.2
2.2.1
Engine CPU (TMP95C063F)

Outline and features
The Engine-CPU employs the same elemental devices as those of the Scanner CPU. Refer to the following pages for the outline and features of these elemental devices. P.2-1 "2.1.1 Outline and features"
2.2.2
Functions
The Engine-CPU has an interface with the System-CPU, gate array, laser unit and finisher control board (IPC board). It controls the overall printer engine section. Programs for the Engine-CPU to control these are stored into the Flash-ROM on the LGC board. New programs can be downloaded and updated from the download jig or a PC connected to the equipment with a USB by using these programs. Also, to prevent data loss and to simplify the data transfer process during the board replacement, the adjustment value and setting value, etc. are stored into the removable NVRAM on the LGC board.
2.2.3
Pin assignment
The Engine-CPU employs the same elemental devices as those of the Scanner CPU. Refer to the following pages for the pin assignment of these elemental devices. P.2-2 "2.1.3 Pin assignment"
2-8
2.2.4
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
Signals
Port name DAREFH DAREFL DAOUT0 DAOUT1 DVSS1 PB0/INT4/TI8 PB1/INT5/TI9 PB2/TO8 PB3/TO9 PB4/INT6/TIA PB5/INT7/TIB PB6/TOA PB7/TOB PA0/TXD0 PA1/RXD0 PA2/CTS0 PA3/SCLK0 DVCC1 PA4/TXD1 PA5/RXD1 PA6/CTS1 PA7/SCLK1 NMI P90/TI0 P91/TO1 P92/TI2 P93/TO3 P94/TI4 P95/TO5 P96/TI6 Signal name DAREFH DAREFL SG HTRDY1-0 HTRDY2-0 ANSW01 SZ0-0 MARK1-1 SZ1-0 SZ2-0 SZ3-0 +5V /NMI MARK0-1 MKEN-0 PVDEN-0A ADMCK-1 I/O I I I I O O I O O O I I O I O Function Reference voltage (H) for D/A converter (+5 V) Reference voltage (L) for D/A converter (Signal ground) Not used (Open) Not used (Open) Signal ground Heater ready signal [1] (L: center IH coil ready) Heater ready signal [2] (L: side IH coil abnormal temperature) Analog switch line select signal [1] (H: temperature detection, L: humidity detection) Paper size signal [0] for copy key card Transfer belt home position sensor-1 output signal (H: home position, Up-edge trigger: interrupt) Paper size signal [1] for copy key card Paper size signal [2] for copy key card Paper size signal [3] for copy key card +5 V Non-maskable Interrupt signal (Pull-up: +5 V) Transfer belt home position sensor-2 output signal (H: home position) Transfer belt home position sensor detection enable signal (L: enable) ASIC VDEN signal (H: standby, L: printing) ADU motor reference clock -
2-9
Pin No. 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
Port name P97/TO7 P80/BS P81/SCOUT P82/WAIT AM8/16 CLK DVSS2 X1 X2 EA RESET WDTOUT P83/NMI2 P84/INT0 P85/INT1 P86/INT2 P87/INT3 DVCC2 P70/PG00 P71/PG01 P72/PG02 P73/PG03 P74/PG10 P75/PG11 P76/PG12 P77/PG13 DVSS3 P67/UCAS3/UW3/ WE3 P66/LCAS3/LW3/ REFOUT3 -
Signal name
I/O I I I I O I I O I I I I I O O O O O O O O O O -
Function
EXTSW-1 FRDSW-1 ROMDT-1 SG X1 X2 /EA CPURST-0 WDT-0 SDCSW-1 STSINT-1 HSCTCP-1A CMDINT-1 PDWN-1 +5V RVMA-0 RVMB-0 RVMC-0 RVMD-0 EXTMA-0 EXTMB-0 EXTMC-0 EXTMD-0 SG ENVMT2-0 ENVMT1-0
Exit sensor detection signal (H: paper transport, L: none) Not used Front cover opening/closing switch detection signal (H: opened, L: closed) Bus width selection signal (H: 8-bit fixed, L: 8/16-bit coexisting) Not used (Open) Signal ground Clock input (24 MHz) Clock output (24 MHz) Pull-down: signal ground CPU reset signal (Low-active) Watchdog output signal (H: CPU is normal, L: CPU is out of control) Side cover opening/closing switch detection signal (H: opened, L: closed) Serial interface status interrupt signal (Up-edge trigger) H-sync counter coincidence status signal (Up-edge trigger) Serial interface command interrupt signal (Up-edge trigger) Power down interrupt signal (Up-edge trigger) +5 V Revolver motor drive signal [phase-A] (Low-active) Revolver motor drive signal [phase-B] (Low-active) Revolver motor drive signal [phase-C] (Low-active) Revolver motor drive signal [phase-D] (Low-active) Exit motor drive signal [phase-A] (Low-active) Exit motor drive signal [phase-B] (Low-active) Exit motor drive signal [phase-C] (Low-active) Exit motor drive signal [phase-D] (Low-active) Signal ground Charger cleaner motor drive signal [2] (Low-active) Charger cleaner motor drive signal [1] (Low-active)
2 - 10
Pin No. 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90
Port name P65/CAS3/WE3 P64/CS3/RAS3 P63/UCAS/UW1/ WE P62/LCAS/LW1/ REFOUT1 P61/CAS1/WE1 P60/CS1/RAS1 P57/CS2 P56/CS0 P55/R/W P54/BUSAK P53/BUSRQ P52/HWR WR RD DVSS4 D0 D1 D2 D3 D4 D5 D6 D7 DVCC3 D8/P10 D9/P11 D10/P12 D11/P13 D12/P14 D13/P15 D14/P16
Signal name PCDLCT-1 LCACS2-0 ROMLD-1 CS1-0 CS2-0 CS0-0 RW-0 CHKMD-0 RLCNT-0 JSPSW-0 WR-0 RD-0 SG D[0] D[1] D[2] D[3] D[4] D[5] D[6] D[7] +5V D[8] D[9] D[10] D[11] D[12] D[13] D[14]
I/O O O O O O O O I I I O O -
Function SRAM chip select circuit switch signal for PC download (H: normal, L: PC download) Chip select signal [3] (Low-active) * For gate array-2 (EC/N075: IC23) Not used Download jig loading status signal (H: loading) Chip select signal [1] (Low-active) * For gate array-1 (EC/N075: IC40) Chip select signal [2] (Low-active) * For Flash ROM (download jig (Engine ROM)) Chip select signal [0] (Low-active) * For ASIC, SRAM Read/write signal (H: read, L: write) * For IPC bus direction Not used Bridge unit detection signal [1](L: connected) Bridge unit detection signal [2](L: connected) Write signal (Low-active) Read signal (Low-active) Signal ground
I/O Data bus [0] I/O Data bus [1] I/O Data bus [2] I/O Data bus [3] I/O Data bus [4] I/O Data bus [5] I/O Data bus [6] I/O Data bus [7] +5 V
I/O Data bus [8] I/O Data bus [9] I/O Data bus [10] I/O Data bus [11] I/O Data bus [12] I/O Data bus [13] I/O Data bus [14]
2 - 11
Pin No. 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125
Port name D15/P17 DVSS5 A23/P27 A22/P26 A21/P25 A20/P24 A19/P23 A18/P22 A17/P21 A16/P20 A15 A14 A13 A12 A11 A10 A9 DVCC4 A8 A7 A6 A5 A4 A3 A2 A1 A0 DVSS6 PE7 PE6 PE5 PE4 PE3 PE2 PE1
Signal name D[15] SG A[23] A[22] A[21] WDE-0 A[19] A[18] A[17] A[16] A[15] A[14] A[13] A[12] A[11] A[10] A[9] +5V A[8] A[7] A[6] A[5] A[4] A[3] A[2] A[1] A[0] SG LDOFF-0 LE-0 RDY/BSY EWSCN-0 BUSEN-1 KCTRC-0 CTNE-0A
I/O I/O Data bus [15] O O O O O O O O O O O O O O O O O O O O O O O O O O I I O I I Signal ground Address bus [23] Address bus [22] Address bus [21]
Function
Watchdog enable signal (H: enable) Address bus [19] Address bus [18] Address bus [17] Address bus [16] Address bus [15] Address bus [14] Address bus [13] Address bus [12] Address bus [11] Address bus [10] Address bus [9] +5 V Address bus [8] Address bus [7] Address bus [6] Address bus [5] Address bus [4] Address bus [3] Address bus [2] Address bus [1] Address bus [0] Signal ground ASIC interface signal (H: normal, L: laser turn OFF) ASIC interface signal (H: disable, L: laser turn ON enable) Flash ROM status signal (H: ready, L: busy) Not used Not used Key copy counter detect signal (L: connected) Not used
2 - 12
Pin No. 126 127 128 129 130 131 132 133 134
Port name PE0 PD4 PD3 PD2 PD1 PD0/INT8 DVCC5 PC0/AN0 PC1/AN1
Signal name CUPE1-0 MVDEN-0 GCCTCP-1A CKSLS-0 LDON-0 ROMDT-0 +5V DVCTNR-1 TEMPS-1/HUMIS1
I/O I O I I O I I I Not used
Function
ASIC interface signal (H: standby, L: paper transport) ASIC interface signal (H: pixel counter overflow, L: normal) Color auto-toner sensor and color auto-toner sensor shutter solenoid detection signal (L: connected) ASIC interface signal (H: normal, L: laser turn ON) Download jig detection signal (L: connected) +5 V Color auto-toner sensor output signal (Analog signal) Temperature/humidity sensor output signal (Analog signal) (TEMPS-1: temperature detection, HUMIS-1: humidity detection) * Switch the detection item by ANSW01 (8 pins). Black auto-toner sensor output / 1st transfer resistance detection signal (Analog signal) * Switch the detection item by ALSW02 (101 pins of Gate array-1 (IC40)). Image quality sensor output signal (Analog signal) Sub thermistor output signal (Analog signal) Main thermistor output signal (Analog signal) Edge thermistor output signal (Analog signal) Drum thermistor output signal (Analog signal) Reference voltage (H) for A/D converter (+5 V) Reference voltage (L) for A/D converter (Signal ground) A/D converter ground (Signal ground) A/D converter power supply (+5 V)
135
PC2/AN2
ATS-1
136 137 138 139 140 141 142 143 144
PC3/AN3 PC4/AN4 PC5/AN5 PC6/AN6 PC7/AN7 VREFH VREFL AVSS AVCC
TNLVL-1A STH-1A ETH-1A MTH-1A DRTMP-1 VREFH VREFL AVSS AVCC
I I I I I I I I I
2 - 13
2.3
2.3.1
Gate Array (EC/N075)

Functions
The gate array is controlled by command from the Engine-CPU and the logic circuit inside the gate array. The primary functions of the gate array are as follows. I/O control of each electrical part (motor, sensor, switch, electromagnetic spring clutch, solenoid, etc.) Interface to control the bypass unit and ADU Interface to control the high-voltage transformer Interface to control the PFP, LCF and finisher Interface to control the NVRAM on the LGC board (An erroneous data loss is prevented with a key circuit provided when the CPU is running away.)
2.3.2
Pin assignment
156 157
105 104
TOP VIEW
208 1
Fig.2-2
53 52
2 - 14
2.3.3
Pin No. 1 2 3 4 5 6 7
Signals for gate array-1 (IC40)

Port name LVDD1 PA4 PA5 PA6 PA7 HVSS1 PB0 Signal name +3.3V H1ERR2-0 RVHOM-1 CTNR-1 IPCSW-0 SG FAN1L-0 I/O I I I I O +3.3 V IH error detection signal [2] (Low-active) Revolver home position sensor output signal (Up-edge trigger) Color toner cartridge sensor output signal (Low-active) IPC board (finisher controller) detection signal (L: connected) Signal ground Laser unit cooling fan low speed drive signal FAN1H-0 FAN1L-0 Status L L Not used L H High speed drive H L Low speed drive H H Stop * Use it by combining with FAN1H-0 signal (95 pins). Internal cooling fan low speed drive signal FAN2H-0 FAN2L-0 Status L L Not used L H High speed drive H L Low speed drive H H Stop * Use it by combining with FAN2H-0 signal (96 pins). IH control board cooling fan low speed drive signal FAN3H-0 FAN3L-0 Status L L Not used L H High speed drive H L Low speed drive H H Stop * Use it by combining with FAN3H-0 signal (97 pins). Ozone exhaust fan low speed drive signal FAN4H-0 FAN4L-0 Status L L Not used L H High speed drive H L Low speed drive H H Stop * Use it by combining with FAN4H-0 signal (98 pins). Signal ground Not used Color auto-toner sensor shutter closing solenoid drive signal (Low pulse: close) Main switch reset signal (H: normal, L: reset (power is turn OFF)) Function
PB1
FAN2L-0
PB2
FAN3L-0
10
PB3
FAN4L-0
11 12 13 14 15
HVSS2 PB4 PB5 PB6 PB7
SG HTFAN2-0 SLDVTNB-0 RSTSW-0
O O O
2 - 15
Pin No. 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49
Port name HVDD PC0 PC1 PC2 PC3 HVSS3 PC4 PC5 PC6 PC7 LVSS1 LVDD2 HVDD2 A0 A1 A2 A3 A4 A5 HVSS4 A6 A7 A12 A13 A14 HVDD3 D0 D1 D2 D3 HVSS5 D4 D5 D6
Signal name +5V H1PWR1-0 H1PWR2-0 H1PWR3-0 IH1ON-0 SG H2PWR1-0 H2PWR2-0 H2PWR3-0 IH2ON-0 SG +3.3V +5V A[0] A[1] A[2] A[3] A[4] A[5] SG A[6] A[7] A[12] A[13] A[14] +5V D[0] D[1] D[2] D[3] SG D[4] D[5] D[6]
I/O O O O O O O O O I I I I I I I I I I I +5 V
Function
Center IH coil control signal [1] Center IH coil control signal [2] Center IH coil control signal [3] Center IH coil control circuit ON/OFF signal (H: OFF, L: ON) Signal ground Side IH coil control signal [1] Side IH coil control signal [2] Side IH coil control signal [3] Side IH coil control circuit ON/OFF signal (H: OFF, L: ON) Signal ground +3.3 V +5 V Address bus [0] Address bus [1] Address bus [2] Address bus [3] Address bus [4] Address bus [5] Signal ground Address bus [6] Address bus [7] Address bus [12] Address bus [13] Address bus [14] +5 V
I/O Data bus [0] I/O Data bus [1] I/O Data bus [2] I/O Data bus [3] Signal ground
I/O Data bus [4] I/O Data bus [5] I/O Data bus [6]
2 - 16
Pin No. 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 D7
Port name
Signal name D[7] SG SG +3.3V RD-0 WR-0 LCACS1-0 SG +5V SG SG +5V GA1RST-0 SG SG
I/O I/O Data bus [7] I I I I Signal ground Signal ground +3.3 V
Function
HVSS6 LVSS2 LVDD3 RD WR CS HVSS7 CTS RXD CBSY CMD SACK SERR HVDD4 RXDINT TXDINT CMDINT STSINT RTS HVSS8 TXD SBSY STS CACK CERR HVSS9 SCLK HVDD5 RESET HVSS10 CNTRST TESTSW TSTEN LVSS3
Read signal (Low-active) Write signal (Low-active) Chip select signal [1] (Low-active) * For gate array-1 (EC/N075: IC40) Signal ground Pull-up: +5 V Pull-up: +5 V Pull-up: +5 V Pull-up: +5 V Pull-up: +5 V Pull-up: +5 V +5 V Not used (Open) Not used (Open) Not used (Open) Not used (Open) Not used (Open) Signal ground Not used (Open) Not used (Open) Not used (Open) Not used (Open) Not used (Open) Signal ground Pull-up: +5 V +5 V Reset signal (Low-active) Signal ground Pull-up: +5 V Pull-down: signal ground Pull-down: signal ground Signal ground
2 - 17
Pin No. 85 86 87 88 89 90 91 92
Port name PD0 PD1 PD2 PD3 LVDD4 PD4 PD5 PD6
Signal name IHDUTY-1 RVMC1-0 RVMC2-0 RVMC3-0 +3.3V POMON-0 TNLED-0 SLTBTNA-0
I/O O O O O O O O
Function IH coil duty control signal Revolver motor electric current control signal [1] (Low-active) Revolver motor electric current control signal [2] (Low-active) Revolver motor electric current control signal [3] (Low-active) +3.3 V Polygonal motor ON/OFF signal (H: OFF, L: ON) Image quality sensor LED drive signal (H: OFF, L: ON) Image quality sensor shutter solenoid drive signal (H: closed (normal), L: opened (Image quality controlling)) Not used (Open) Signal ground Laser unit cooling fan high speed drive signal FAN1H-0 FAN1L-0 Status L L Not used L H High speed drive H L Low speed drive H H Stop * Use it by combining with FAN1L-0 signal (7 pins). Internal cooling fan high speed drive signal FAN2H-0 FAN2L-0 Status L L Not used L H High speed drive H L Low speed drive H H Stop * Use it by combining with FAN2L-0 signal (8 pins). IH control board cooling fan high speed drive signal FAN3H-0 FAN3L-0 Status L L Not used L H High speed drive H L Low speed drive H H Stop * Use it by combining with FAN3L-0 signal (9 pins). Ozone exhaust fan high speed drive signal FAN4H-0 FAN4L-0 Status L L Not used L H High speed drive H L Low speed drive H H Stop * Use it by combining with FAN4L-0 signal (10 pins). Signal ground Not used
93 94 95
PD7 HVSS11 PE0
SG FAN1H-0
96
PE1
FAN2H-0
97
PE2
FAN3H-0
98
PE3
FAN4H-0
99 100
HVSS12 PE4
SG HTFAN1-0
2 - 18
Pin No. 101
Port name PE5
Signal name ALSW02
I/O O
Function
Analog switch line select signal [2] (H: black auto-toner sensor output detection, L: 1st transfer resistance detection)
Not used (Open) Not used (Open) +5 V Signal ground Clock input (8.25 MHz) +5 V Clock output (8.25 MHz) Signal ground D/A converter-2 (IC67) serial data D/A converter-2 (IC67) latch signal (L: latch) D/A converter-2 (IC67) serial data transfer clock Not used (Open) Not used (Open) Not used (Open) +5 V Charger cleaner front position detection switch signal (L: front position (home position)) Charger cleaner rear position detection switch signal (L: rear position (reverse position))
102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128
PE6 PE7 HVDD6 HVSS13 OSC1 HVDD7 OSC2 HVSS14 DICH1 LDCH1 CLKCH1 DICH2 LDCH2 CLKCH2 HVDD8 PF0 PF1 PF2 PF3 LVSS4 PF4 PF5 PF6 PF7 HVSS15 PG0 PG1
+5V SG OSC1 +5V OSC2 SG DA2DAT-1 DA2LTH-1 DA2CLK-1 +5V IPD[1] (ENVSNR1-0) IPD[2] (ENVSNR2-0) IPD[3] (IHSAD-0) SG IPD[4] (RLHSW-0) IPD[5] (RLTRS-0) IPD[6] (RLCSW-0) IPD[7] (RLC2S-0) SG EXTC1-0 EXTC2-0
I O O O O I I I I I I I O O
IH control board for SAD model detection signal (L: connected)

Signal ground Bridge unit load-full sensor detection signal (entrance section) (H: normal, L: full) Bridge unit intermediary transport sensor detection signal (H: normal, L: paper transport) Bridge unit transport cover opening/closing sensor detection signal (H: opened, L: closed) Bridge unit exit sensor detection signal (H: normal, L: paper transport) Signal ground Exit motor electric current control signal [1] (Low-active) Exit motor electric current control signal [2] (Low-active)
2 - 19
Pin No. 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147
Port name PG2 PG3 LVDD5 PG4 PG5 PG6 PG7 HVSS16 PH0 PH1 PH2 PH3 HVDD9 PH4 PH5 PH6 PH7 HVSS17 PI0
Signal name EXTC3-0 ADUCR-0 +3.3V GASOL-0 TC1IV-0 KCTRO-0 SG RMS0-1 RMS1-1 RMS2-1 RMS3-1 +5V RMS4-1 RMS5-1 SG FCOV-1
I/O O O O O O O O O O O O I
Function Exit motor electric current control signal [3] (Low-active)
ADU motor electric current switch signal (H: Low current, L: High current)
+3.3 V Not used (Open) Bridge unit gate solenoid drive signal (H: OFF (to finisher), L: ON (to inner receiving tray))
1st transfer output switch signal (H: voltage output, L: current output)
Key copy counter count signal (H: normal, L: count) Signal ground Copy key card control signal [0] * total counter ON signal Copy key card control signal [1] * device operation status signal Copy key card control signal [2] * exit sensor ON signal Copy key card control signal [3] * black printing count signal +5 V Copy key card control signal [4] * mono color printing count signal Copy key card control signal [5] * full color printing count signal Not used (Open) Not used (Open) Signal ground
Cover opening/closing interlock switch status detection signal

(H: ON (closed), L: OFF (opened)) Polygonal motor phase locked loop control signal (H: stop or error, L: uniform speed driving) Transport motor phase locked loop control signal (H: stop or error, L: uniform speed driving) Developer motor phase locked loop control signal (H: stop or error, L: uniform speed driving) Signal ground Main motor phase locked loop control signal (H: stop or error, L: uniform speed driving) Black developer contact position detection sensor signal (H: release, L: contact)
148 149 150 151 152 153
PI1 PI2 PI3 HVSS18 PI4 PI5
POMPL-0 FDMPL-1 DVMPL-1 SG MAMPL-1 BLK-1
I I I I I
2 - 20
Pin No. 154 155 PI6 PI7
Port name
Signal name KDS-1 TRPD-1
I/O I I
Function Black developer contact timing detection sensor signal (H: contact, L: release) 2nd transfer roller position detection sensor signal (Up-edge trigger: contact, Down-edge trigger: release) Signal ground +5 V Main motor reference clock Transport motor reference clock Developer motor reference clock Polygonal motor reference clock Signal ground Not used (Open) Not used (Open) Not used (Open) Not used (Open) Signal ground Pull-up: +5 V +5 V Bypass pickup solenoid drive signal (H: OFF (normal), L: ON (pickup)) Color auto-toner sensor shutter opening solenoid drive signal (Low-pulse: opened) ASIC PCLK phase locked loop control enable signal (Low-active) ASIC MCLK phase locked loop control enable signal (Low-active) Signal ground Not used Transfer motor rotational direction switch signal (H: CCW, L: CW) Transfer motor ON/OFF signal (L: ON) Transfer motor gain switch signal (H: high speed drive, L: low speed drive) Signal ground Not used (Open) Not used (Open) +3.3 V Not used
156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183
HVSS19 HVDD10 DCCLK1 DCCLK2 DCCLK3 DCCLK4 HVSS20 SM_A SM_B SM_NA SM_NB HVSS21 SMCLK HVDD11 PJ0 PJ1 PJ2 PJ3 HVSS22 PJ4 PJ5 PJ6 PJ7 HVSS23 MWR SMINT LVDD6 CS0
SG +5V MAMCK-0 FDMCK-0 DVMCK-0 POMCK-0 SG SG +5V SOLSFB-0 SLDVTNA-0 PLLENP-0 PLLENM-0 SG FDMCW-0 FDMON-0 FDMGA-0 SG +3.3V DBCS1-0
O O O O O O O O O O O O
2 - 21
Pin No. 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208
Port name CS1 CS2 CS3 CS4 CS5 HVSS24 PK0 PK1 PK2 PK3 LVSS5 PK4 PK5 PK6 PK7 HVDD12 MULTD0 MULTD1 MULTA MULTY PA0 PA1 PA2 PA3 LVSS6 -
Signal name
I/O O O O O O O O I I I I Not used (Open) Not used Not used (Open) Not used (Open) Not used (Open) Signal ground
Function
DBCS2-0 SG MAMON-0 MAMBK-0 MAMCW-0 MAMGA-0 SG DVMON-0 RTNMTLK-0A +5V FUSSW-1 ATSDET-0 USTFUL-1 H1ERR1-0 SG
Main motor ON/OFF signal (L: ON) Main motor brake signal (L: brake) Main motor rotational direction switch signal (H: CCW, L: CW) Main motor gain switch signal (H: high speed drive, L: low speed drive) Signal ground Developer motor ON/OFF signal (L: ON) Developer motor rotational direction switch signal (H: CCW, L: CW) Not used (Open) Not used (Open) +5 V Pull-up: +5 V Pull-up: +5 V Pull-up: +5 V Not used (Open) Fuser unit detection signal (H: connected) Black auto-toner sensor detection signal (L: connected) Toner bag full detection sensor output signal (H: toner bag full, L: normal) IH error detection signal [1] (Low-active) Signal ground
2 - 22
2.3.4
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
Signals for gate array-2 (IC23)

Port name LVDD1 PA4 PA5 PA6 PA7 HVSS1 PB0 PB1 PB2 PB3 HVSS2 PB4 PB5 PB6 PB7 HVDD PC0 PC1 PC2 PC3 HVSS3 PC4 PC5 PC6 PC7 LVSS1 LVDD2 HVDD2 A0 Signal name +3.3V LCCNT-0 HVTSTS ADCNT-1 SFSSW-0 SG CTUFED-1 CTLFED-1 PSTRTD-0 PSTPC-1 SG SFBFED-1 HTRDY0-0 DTNORG-1 KTNDET-0 +5V CLKB-1 CLKC-1 SCSWB-0 SCSWC-0 SG CLCDVR-0 CLKDVR-0 CLKDVP-0 LEDERS-0 SG +3.3V +5V A[0] I/O I I I I I I I I I I I I O O O O O O O O I +3.3 V LCF detection signal (L: connected) High voltage transformer status signal (H: normal, L: error) ADU detection signal (L: connected) Bypass unit detection signal (L: connected) Signal ground Upper drawer feed sensor detection signal (H: paper transport, L: normal) Lower drawer feed sensor detection signal (H: normal, L: paper transport) Not used Registration sensor detection signal (H: paper transport, L: normal) Signal ground Bypass feed sensor detection signal (H: normal, L: paper transport) Heater ready signal [0] (L: side IH coil ready) Used toner auger (from drum) lock status detection signal (H: lock, L: normal) Black toner cartridge switch detection signal (H: absence, L: presence) +5 V PFP/LCF signal output switch signal [1] (Up-edge trigger) PFP/LCF signal output switch signal [2] (Up-edge trigger) PFP/LCF signal input switch signal [1] (Low-active) PFP/LCF signal input switch signal [2] (Low-active) Signal ground Color developer drive clutch ON/OFF signal (L: ON) Black developer drive clutch ON/OFF signal (L: ON) Black developer lifting clutch ON/OFF signal (L: ON) Discharge LED drive signal (L: ON) Signal ground +3.3 V +5 V Address bus [0]
Function
2 - 23
Pin No. 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 A1 A2 A3 A4 A5
Port name
Signal name A[1] A[2] A[3] A[4] A[5] SG A[6] A[7] A[12] A[13] A[14] +5V D[0] D[1] D[2] D[3] SG D[4] D[5] D[6] D[7] SG SG +3.3V RD-0 WR-0 LCACS2-0 SG CBSY-0 CMD-0 SACK-0 SERR-0 +5V
I/O I I I I I I I I I I Address bus [1] Address bus [2] Address bus [3] Address bus [4] Address bus [5] Signal ground Address bus [6] Address bus [7] Address bus [12] Address bus [13] Address bus [14] +5 V
Function
HVSS4 A6 A7 A12 A13 A14 HVDD3 D0 D1 D2 D3 HVSS5 D4 D5 D6 D7 HVSS6 LVSS2 LVDD3 RD WR CS HVSS7 CTS RXD CBSY CMD SACK SERR HVDD4
I/O Data bus [0] I/O Data bus [1] I/O Data bus [2] I/O Data bus [3] Signal ground
I/O Data bus [4] I/O Data bus [5] I/O Data bus [6] I/O Data bus [7] I I I I I I I Signal ground Signal ground +3.3 V Read signal (Low-active) Write signal (Low-active) Chip select signal [3] (Low-active) * For gate array-2 (EC/N075: IC23) Signal ground Pull-up: +5 V Pull-up: +5 V System interface command busy signal System interface command data signal System interface status acknowledge signal System interface status error signal +5 V
2 - 24
Pin No. 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95
Port name RXDINT TXDINT CMDINT STSINT RTS HVSS8 TXD SBSY STS CACK CERR HVSS9 SCLK HVDD5 RESET HVSS10 CNTRST TESTSW TSTEN LVSS3 PD0 PD1 PD2 PD3 LVDD4 PD4 PD5 PD6 PD7 HVSS11 PE0 -
Signal name
I/O O O O O O O I O O O O O O O Not used (Open) Not used (Open)
Function
CMDINT-1 STSINT-1 SG SBSY-0 STS-0 CACK-0 CERR-0 SG +5V GA2RST-0 SG SG CLRGST-0 CLTRR-0 CLTRP-0 +3.3V CLBCUP-0 BMBCOR-0 DRCLB-0 SG KTNR1A-0
System interface command reception end signal System interface status reception end signal Not used (Open) Signal ground Not used (Open) System interface status busy signal System interface status data signal System interface command acknowledge signal System interface command error signal Signal ground Pull-up: +5 V +5 V Reset signal (Low-active) Signal ground Pull-up: +5 V Pull-down: signal ground Pull-down: signal ground Signal ground Registration clutch ON/OFF signal (L: ON) 2nd transfer roller drive clutch ON/OFF signal (L: ON) 2nd transfer roller contact clutch ON/OFF signal (L: ON) Not used (Open) +3.3 V Transfer belt cleaner clutch ON/OFF signal (L: ON) Transfer belt cleaner auger motor ON/OFF signal (L: ON) Not used Drum cleaner brush motor ON/OFF signal (L: ON) Signal ground Toner motor control signal-A
2 - 25
Pin No. 96
Port name PE1
Signal name KTNR1B-0
I/O O
Function Toner motor control signal-B KTNR1A-0 KTNR1B-0 Status L L OFF L H Toner supply H L Pirated edition detection H H Break Color developer toner supply clutch ON/OFF signal (L: ON) Upper transport clutch (Low speed) ON/OFF signal (L: ON) Signal ground Upper transport clutch (High speed) ON/OFF signal (L: ON) Not used (Open) ADU clutch ON/OFF signal (L: ON) Power supply cooling fan low speed drive signal PWRFNH-0 PWRFNL-0 Status L L Not used L H High speed drive H L Low speed drive H H Stop * Use it by combining with PWRFNH-0 signal (135 pins). +5 V Signal ground Clock input (8.334MHz) +5 V Clock output (8.334MHz) Signal ground D/A converter-1 (IC10) serial data D/A converter-1 (IC10) latch signal (L: latch) D/A converter-1 (IC10) serial data transfer clock Not used (Open) Not used (Open) Not used (Open) +5 V ADU entrance sensor detection signal (H: paper transport, L: normal) ADU exit sensor detection signal (H: paper transport, L: normal) ADU opening/closing switch detection signal (H: opened, L: closed)
97 98 99 100 101 102 103
PE2 PE3 HVSS12 PE4 PE5 PE6 PE7
CLCTNS-0 CLMFDH-0 SG CLMFCU-0 CLADU-0 PWRFNL-0
O O O O O
104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119
HVDD6 HVSS13 OSC1 HVDD7 OSC2 HVSS14 DICH1 LDCH1 CLKCH1 DICH2 LDCH2 CLKCH2 HVDD8 PF0 PF1 PF2
+5V SG OSC1 +5V OSC2 SG DA1DAT-1 DA1LTH-1 DA1CLK-1 +5V ADTR1-1 ADTR2-1 ADUCOV-1
I O O O O I I I
2 - 26
Pin No. 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 PF3
Port name
Signal name SFBSW-1 SG SFSZ0-0 SFSZ1-0 SFSZ2-0 SFSZ3-0 SG CLSFB-0 CLFED1-0 CLFED2-0 CLMFDL-0 +3.3V CLMFCL-0 TUP1 TUP2
I/O I I I I I O O O O O O O
Function Bypass paper sensor detection signal (H: paper absence, L: paper presence) Signal ground Bypass unit slide guide width detection signal [0] (Low-active) Bypass unit slide guide width detection signal [1] (Low-active) Bypass unit slide guide width detection signal [2] (Low-active) Bypass unit slide guide width detection signal [3] (Low-active) Signal ground Bypass feed clutch ON/OFF signal (L: ON) Upper drawer feed clutch ON/OFF signal (L: ON) Lower drawer feed clutch ON/OFF signal (L: ON) Lower transport clutch (High speed) ON/OFF signal (L: ON) +3.3 V Lower transport clutch (Low speed) ON/OFF signal (L: ON) Tray-up motor control signal [1] Tray-up motor control signal [2] TUP1 TUP2 Status L L OFF L H Upper drawer tray up H L Lower drawer tray up H H Break Power supply cooling fan high speed drive signal PWRFNH-0 PWRFNL-0 Status L L Not used L H High speed drive H L Low speed drive H H Stop * Use it by combining with PWRFNL-0 signal (103 pins). Signal ground Charger bias ON/OFF signal (L: ON) Color developer DC bias ON/OFF signal (L: ON) Color developer AC bias ON/OFF signal (L: ON) Black developer DC bias ON/OFF signal (L: ON) +5 V Black developer AC bias ON/OFF signal (L: ON) 1st transfer bias ON/OFF signal (L: ON) 2nd transfer bias ON/OFF signal (L: ON)
LVSS4 PF4 PF5 PF6 PF7 HVSS15 PG0 PG1 PG2 PG3 LVDD5 PG4 PG5 PG6
135
PG7
PWRFNH-0
136 137 138 139 140 141 142 143 144
HVSS16 PH0 PH1 PH2 PH3 HVDD9 PH4 PH5 PH6
SG CCON-0 CDVDON-0 CDVAON-0 KDVDON-0 +5V KDVAON-0 TC1ON-0 TC2ON-0
O O O O O O O
2 - 27
Pin No. 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170
Port name PH7 HVSS17 PI0 PI1 PI2 PI3 HVSS18 PI4 PI5 PI6 PI7 HVSS19 HVDD10 DCCLK1 DCCLK2 DCCLK3 DCCLK4 HVSS20 SM_A SM_B SM_NA SM_NB HVSS21 SMCLK HVDD11 PJ0
Signal name ECON-0 SG CUTOP-1 CLTOP-1 CUEMP-1 CLEMP-1 SG CUFLS-0 CLFLS-0 CUSW-0 CLSW-0 SG +5V HVCLK-0 SG ADM2A-0 ADM2B-0 ADM2C-0 ADM2D-0 SG ADMCK-1 +5V DRV0-1
I/O O I I I I I I I I O O O O O I O
Function Drum cleaning blade bias ON/OFF signal (L: ON) Signal ground Upper drawer tray-up sensor detection signal (H: top position, L: normal) Lower drawer tray-up sensor detection signal (H: top position, L: normal) Upper drawer empty sensor detection signal (H: paper absence, L: paper presence) Lower drawer empty sensor detection signal (H: paper absence, L: paper presence) Signal ground Upper drawer paper stock sensor detection signal (H: paper absence, L: paper presence) Lower drawer paper stock sensor detection signal (H: paper absence, L: paper presence) Upper drawer detection switch signal (H: drawer opened, L: drawer closed) Lower drawer detection switch signal (H: drawer opened, L: drawer closed) Signal ground +5 V Timer output for high voltage transformer (AC output reference frequency) Not used (Open) Not used (Open) Not used (Open) Signal ground ADU motor drive signal [phase-A] ADU motor drive signal [phase-B] ADU motor drive signal [phase-C] ADU motor drive signal [phase-D] Signal ground ADU motor drive reference clock +5 V PFP/LCF output signal [0] * P.2-31 "[ 1 ] Description of signals DRV [0][7]" PFP/LCF output signal [1] * P.2-31 "[ 1 ] Description of signals DRV [0][7]"
171
PJ1
DRV1-1
2 - 28
Pin No. 172 PJ2
Port name
Signal name DRV2-1
I/O O
Function PFP/LCF output signal [2] * P.2-31 "[ 1 ] Description of signals DRV [0][7]" PFP/LCF output signal [3] * P.2-31 "[ 1 ] Description of signals DRV [0][7]" Signal ground PFP/LCF output signal [4] * P.2-31 "[ 1 ] Description of signals DRV [0][7]" PFP/LCF output signal [5] * P.2-31 "[ 1 ] Description of signals DRV [0][7]" PFP/LCF output signal [6] * P.2-31 "[ 1 ] Description of signals DRV [0][7]" PFP/LCF output signal [7] * P.2-31 "[ 1 ] Description of signals DRV [0][7]" Signal ground Write enable signal for NVRAM (Low-active) Not used (Open) +3.3 V Not used Chip select signal for NVRAM (Low-active) Not used (Open) Chip select signal [3] (Low-active) * For IPC board (finisher controller) Not used (Open) Not used (Open) Signal ground PFP/LCF input signal [0] * P.2-33 "[ 2 ] Description of signals RETS [0][7]" PFP/LCF input signal [1] * P.2-33 "[ 2 ] Description of signals RETS [0][7]" PFP/LCF input signal [2] * P.2-33 "[ 2 ] Description of signals RETS [0][7]" PFP/LCF input signal [3] * P.2-33 "[ 2 ] Description of signals RETS [0][7]" Signal ground
173
PJ3
DRV3-1
174 175
HVSS22 PJ4
SG DRV4-1
176
PJ5
DRV5-1
177
PJ6
DRV6-1
178
PJ7
DRV7-1
179 180 181 182 183 184 185 186 187 188 189 190
HVSS23 MWR SMINT LVDD6 CS0 CS1 CS2 CS3 CS4 CS5 HVSS24 PK0
SG NWR-0 +3.3V DBCS0-0 NVRAMCS-0 CSIPC-0 SG RETS0-1
O O O I
191
PK1
RETS1-1
192
PK2
RETS2-1
193
PK3
RETS3-1
194
LVSS5
SG
2 - 29
Pin No. 195
Port name PK4
Signal name RETS4-1
I/O I
Function PFP/LCF input signal [4] * P.2-33 "[ 2 ] Description of signals RETS [0][7]" PFP/LCF input signal [5] * P.2-33 "[ 2 ] Description of signals RETS [0][7]" PFP/LCF input signal [6] * P.2-33 "[ 2 ] Description of signals RETS [0][7]" PFP/LCF input signal [7] * P.2-33 "[ 2 ] Description of signals RETS [0][7]" +5 V Pull-up: +5 V Pull-up: +5 V Pull-up: +5 V Not used (Open) PFP/LCF drawer detection switch detection signal [0] * P.2-35 "[ 3 ] Description of signals SIZE [0][3]" PFP/LCF drawer detection switch detection signal [1] * P.2-35 "[ 3 ] Description of signals SIZE [0][3]" PFP/LCF drawer detection switch detection signal [2] * P.2-35 "[ 3 ] Description of signals SIZE [0][3]" PFP/LCF drawer detection switch detection signal [3] * P.2-35 "[ 3 ] Description of signals SIZE [0][3]" Signal ground
196
PK5
RETS5-1
197
PK6
RETS6-1
198
PK7
RETS7-1
199 200 201 202 203 204
HVDD12 MULTD0 MULTD1 MULTA MULTY PA0
+5V SIZE0-0
205
PA1
SIZE1-0
206
PA2
SIZE2-0
207
PA3
SIZE3-0
208
LVSS6
SG
2 - 30
[ 1 ] Description of signals DRV [0]-[7]

The following functions are assigned to the signals DRV [0]-[7] depending on the installation status of the PFP and LCF. These signals are latched by the up-edge trigger of the CLKB-1 or CLKC-1 signal. [ 1-1 ] When CLKB-1 = Up-edge trigger and PFP is installed:
Function PFP motor drive signal [A] PFP motor drive signal [B] DRV[1] DRV[0] Status L L Break L H ON H L Not used H H OFF Not used Not used PFP upper drawer feed clutch drive signal (H: OFF, L: ON) PFP lower drawer feed clutch drive signal (H: OFF, L: ON) PFP transport clutch drive signal (H: OFF, L: ON) Not used
Signal name DRV[0] DRV[1]
DRV[2] DRV[3] DRV[4] DRV[5] DRV[6] DRV[7]
[ 1-2 ]
When CLKB-1 = Up-edge trigger and LCF is installed:

Function LCF transport motor drive signal (H: ON) LCF transport motor speed switch signal (H: low speed drive, L: high speed drive) LCF transport clutch drive signal (H: OFF, L: ON) LCF feed clutch drive signal (H: OFF, L: ON) LCF pickup solenoid drive signal (H: OFF, L: ON) Not used Not used Not used
Signal name DRV[0] DRV[1] DRV[2] DRV[3] DRV[4] DRV[5] DRV[6] DRV[7]
2 - 31
[ 1-3 ]
When CLKC-1 = Up-edge trigger and PFP is installed:

Function PFP upper drawer tray-up motor drive signal [A] PFP upper drawer tray-up motor drive signal [B] DRV[1] DRV[0] Status L L OFF L H Up H L Down H H Break PFP lower drawer tray-up motor drive signal [A] PFP lower drawer tray-up motor drive signal [B] DRV[3] DRV[2] Status L L OFF L H Up H L Down H H Break Not used Not used Not used Not used
DRV[2] DRV[3]
DRV[4] DRV[5] DRV[6] DRV[7]
[ 1-4 ]
When CLKC-1 = Up-edge trigger and LCF is installed:

Function LCF tray-up motor drive signal [A] LCF tray-up motor drive signal [B] DRV[1] DRV[0] Status L L OFF L H Up H L Down H H Break LCF end fence motor drive signal [A] LCF end fence motor drive signal [B] DRV[3] DRV[2] Status L L OFF L H Transfer H L Reverse H H Break LCF end fence solenoid drive signal (H: OFF, L: ON) Not used Not used Not used
DRV[2] DRV[3]
DRV[4] DRV[5] DRV[6] DRV[7]
2 - 32
[ 2 ] Description of signals RETS [0]-[7]

The following functions are assigned to the signals RETS [0]-[7] depending on each status of the signals SCSWB-C-0 and installation status of the PFP and LCF. [ 2-1 ] When SCSWB-0 = Low and PFP is installed:
Function PFP upper drawer tray-up sensor detection signal (H: top position, L: normal) PFP upper drawer empty sensor detection signal (H: paper presence, L: paper absence) PFP side cover opening/closing switch detection signal (H: opened L: closed) PFP connection signal (L: connected) PFP upper drawer feed sensor detection signal (H: paper transport, L: none) PFP upper drawer paper stock sensor detection signal (H: paper absence L: paper presence) Not used Not used
Signal name RETS[0] RETS[1] RETS[2] RETS[3] RETS[4] RETS[5] RETS[6] RETS[7]
[ 2-2 ]
When SCSWB-0 = Low and LCF is installed:

Function LCF feeding side paper stock sensor detection signal (H: paper presence L: paper absence) Not used Not used Not used Not used Not used LCF feeding side paper mis-stacking sensor detection signal (H: lever to detect mis-stacking is opened) LCF tray bottom sensor detection signal (H: bottom position, L: normal)
2 - 33
[ 2-3 ]
When SCSWC-0 = Low and PFP is installed:

Function PFP lower drawer tray-up sensor detection signal (H: top position, L: normal) PFP lower drawer empty sensor detection signal (H: paper presence, L: paper absence) Not used PFP motor phase locked loop control signal (H: stop or error, L: uniform speed driving) PFP lower drawer feed sensor detection signal (H: paper transport, L: none) PFP lower drawer paper stock sensor detection signal (H: paper absence L: paper presence) Not used Not used
[ 2-4 ]
When SCSWC-0 = Low and LCF is installed:

Function LCF feeding side paper empty sensor detection signal (H: paper presence L: paper absence) LCF drawer feed sensor detection signal (H: none, L: paper transport) LCF tray-up sensor detection signal (H: top position, L: normal) LCF transport motor LD signal (H: stop, L: rotation) LCF side cover opening/closing switch detection signal (H: closed L: opened) LCF standby side paper empty sensor detection signal (H: paper absence L: paper presence) LCF end fence stop position sensor detection signal (H: stop position) LCF end fence home position sensor detection signal (H: home position)
2 - 34
[ 3 ] Description of signals SIZE [0]-[3]

The following functions are assigned to the signals SIZE [0]-[3] depending on each status of the signals SCSWB-C-0 and installation status of the PFP and LCF. [ 3-1 ] When SCSWB-0 = Low and PFP is installed:
Function PFP upper drawer detection switch detection signal (H: drawer opened, L: drawer closed) Not used Not used Not used
Signal name SIZE[0] SIZE[1] SIZE[2] SIZE[3]
[ 3-2 ]
When SCSWB-0 = Low and LCF is installed:

Function LCF drawer detection switch detection signal (H: drawer opened, L: drawer closed) Not used Not used Not used
[ 3-3 ]
When SCSWC-0 = Low and PFP is installed:

Function PFP lower drawer detection switch detection signal (H: drawer opened, L: drawer closed) Not used Not used Not used
[ 3-4 ]
When SCSWC-0 = Low and LCF is installed:

Function Not used Not used Not used Not used
2 - 35
2 - 36
3.
ELECTRIC CIRCUIT DIAGRAMS

3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 System control circuit (SYS board) ................................................... 1/23 to 23/23 Logic circuit (LGC board) .................................................................. 1/20 to 20/20 Scanning section control circuit (SLG board) ................................... 1/18 to 18/18 CCD driving circuit (CCD board) ....................................................... 1/5 to 5/5 Laser driving circuit (LDR board) ...................................................... 1/2 to 2/2 H-Sync signal detection circuit (SNS board) ..................................... 1/1 Driving circuit (DRV board) ............................................................... 1/1 ADU driving circuit (ADU board) ....................................................... 1/2 to 2/2 Display circuit (DSP board) .............................................................. 1/1
3.10 Key control circuit (KEY board) ......................................................... 1/2 to 2/2 3.11 Filter circuit (FIL board) .................................................................... 1/1 3.12 Facsimile circuit (FAX board: GD-1200) ........................................... 1/14 to 14/14 3.13 Facsimile power supply circuit (FAX PWR board: GD-1200) ............ 1/1 3.14 Modem circuit (MDM board: GD-1160) ............................................. 1/4 to 4/4 3.15 Telephone line network control circuit (NCU board: GD-1200/1160) *Only for NA/TW model .................................................................... 1/2 to 2/2 3.16 Telephone line network control circuit (NCU board: GD-1200/1160) *Only for EU(EU-N)/AU/AS/C model ................................................ 1/2 to 2/2
e-STUDIO281c/351c/451c ELECTRIC CIRCUIT DIAGRAMS
3-1
3.1
System control circuit (SYS board)
SYS board 1/23
Fig.3-1
e-STUDIO281c/351c/451c ELECTRIC CIRCUIT DIAGRAMS June 2005 TOSHIBA TEC
3-2
SYS board 2/23
Fig.3-2
3-3
SYS board 3/23
Fig.3-3
3-4
SYS board 4/23
Fig.3-4
3-5
SYS board 5/23
Fig.3-5
3-6
SYS board 6/23
Fig.3-6
3-7
SYS board 7/23
Fig.3-7
3-8
SYS board 8/23
Fig.3-8
3-9
SYS board 9/23
Fig.3-9
3 - 10
SYS board 10/23
Fig.3-10
3 - 11
SYS board 11/23
Fig.3-11
3 - 12
SYS board 12/23
Fig.3-12
3 - 13
SYS board 13/23
Fig.3-13
3 - 14
SYS board 14/23
Fig.3-14
3 - 15
SYS board 15/23
Fig.3-15
3 - 16
SYS board 16/23
Fig.3-16
3 - 17
SYS board 17/23
Fig.3-17
3 - 18
SYS board 18/23
Fig.3-18
3 - 19
SYS board 19/23
Fig.3-19
3 - 20
SYS board 20/23
Fig.3-20
3 - 21
SYS board 21/23
Fig.3-21
3 - 22
SYS board 22/23
Fig.3-22
3 - 23
SYS board 23/23
Fig.3-23
3 - 24
3.2
Logic circuit (LGC board)
LGC board 1/20
Fig.3-24
June 2005 TOSHIBA TEC e-STUDIO281c/351c/451c ELECTRIC CIRCUIT DIAGRAMS
3 - 25
LGC board 2/20
Fig.3-25
3 - 26
LGC board 3/20
Fig.3-26
3 - 27
LGC board 4/20
Fig.3-27
3 - 28
LGC board 5/20
Fig.3-28
3 - 29
LGC board 6/20
Fig.3-29
3 - 30
LGC board 7/20
Fig.3-30
3 - 31
LGC board 8/20
Fig.3-31
3 - 32
LGC board 9/20
Fig.3-32
3 - 33
LGC board 10/20
Fig.3-33
3 - 34
LGC board 11/20
Fig.3-34
3 - 35
LGC board 12/20
Fig.3-35
3 - 36
LGC board 13/20
Fig.3-36
3 - 37
LGC board 14/20
Fig.3-37
3 - 38
LGC board 15/20
Fig.3-38
3 - 39
LGC board 16/20
Fig.3-39
3 - 40
LGC board 17/20
Fig.3-40
3 - 41
LGC board 18/20
Fig.3-41
3 - 42
LGC board 19/20
Fig.3-42
3 - 43
LGC board 20/20
Fig.3-43
3 - 44
3.3
Scanning section control circuit (SLG board)
SLG board 1/18
Fig.3-44
3 - 45
SLG board 2/18
Fig.3-45
3 - 46
SLG board 3/18
Fig.3-46
3 - 47
SLG board 4/18
Fig.3-47
3 - 48
SLG board 5/18
Fig.3-48
3 - 49
SLG board 6/18
Fig.3-49
3 - 50
SLG board 7/18
Fig.3-50
3 - 51
SLG board 8/18
Fig.3-51
3 - 52
SLG board 9/18
Fig.3-52
3 - 53
SLG board 10/18
Fig.3-53
3 - 54
SLG board 11/18
Fig.3-54
3 - 55
SLG board 12/18
Fig.3-55
3 - 56
SLG board 13/18
Fig.3-56
3 - 57
SLG board 14/18
Fig.3-57
3 - 58
SLG board 15/18
Fig.3-58
3 - 59
SLG board 16/18
Fig.3-59
3 - 60
SLG board 17/18
Fig.3-60
3 - 61
SLG board 18/18
Fig.3-61
3 - 62
3.4
CCD driving circuit (CCD board)
CCD board 1/5
Fig.3-62
3 - 63
CCD board 2/5
Fig.3-63
3 - 64
CCD board 3/5
Fig.3-64
3 - 65
CCD board 4/5
Fig.3-65
3 - 66
CCD board 5/5
Fig.3-66
3 - 67
3.5
Laser driving circuit (LDR board)
LDR board 1/2
Fig.3-67
3 - 68
LDR board 2/2
Fig.3-68
3 - 69
3.6
H-Sync signal detection circuit (SNS board)
Fig.3-69
3 - 70
3.7
Driving circuit (DRV board)
Fig.3-70
3 - 71
3.8
ADU driving circuit (ADU board)
ADU board 1/2
Fig.3-71
3 - 72
ADU board 2/2
Fig.3-72
3 - 73
3.9
Display circuit (DSP board)
Fig.3-73
3 - 74
3.10 Key control circuit (KEY board)

KEY board 1/2
Fig.3-74
3 - 75
KEY board 2/2
Fig.3-75
3 - 76
3.11 Filter circuit (FIL board)
Fig.3-76
3 - 77
3.12 Facsimile circuit (FAX board: GD-1200)

FAX board 1/14
Fig.3-77
3 - 78
FAX board 2/14
Fig.3-78
3 - 79
FAX board 3/14
Fig.3-79
3 - 80
FAX board 4/14
Fig.3-80
3 - 81
FAX board 5/14
Fig.3-81
3 - 82
FAX board 6/14
Fig.3-82
3 - 83
FAX board 7/14
Fig.3-83
3 - 84
FAX board 8/14
Fig.3-84
3 - 85
FAX board 9/14
Fig.3-85
3 - 86
FAX board 10/14
Fig.3-86
3 - 87
FAX board 11/14
Fig.3-87
3 - 88
FAX board 12/14
Fig.3-88
3 - 89
FAX board 13/14
Fig.3-89
3 - 90
FAX board 14/14
Fig.3-90
3 - 91
3.13 Facsimile power supply circuit (FAX PWR board: GD-1200)
Fig.3-91
3 - 92
3.14 Modem circuit (MDM board: GD-1160)

MDM board 1/4
Fig.3-92
3 - 93
MDM board 2/4
Fig.3-93
3 - 94
MDM board 3/4
Fig.3-94
3 - 95
MDM board 4/4
Fig.3-95
3 - 96
3.15 Telephone line network control circuit (NCU board: GD-1200/ 1160) *Only for NA/TW model
NCU board 1/2
Fig.3-96
3 - 97
NCU board 2/2 *Only for NA/TW model
Fig.3-97
3 - 98
3.16 Telephone line network control circuit (NCU board: GD-1200/ 1160) *Only for EU(EU-N)/AU/AS/C model
NCU board 1/2
Fig.3-98
3 - 99
NCU board 2/2 *Only for EU(EU-N)/AU/AS/C model
Fig.3-99
3 - 100

Estudio281c - 351 - 451 PC Board Repair Ver00

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Estudio281c - 351 - 451 PC Board Repair Ver00

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PC BOARD REPAIR MANUAL

MULTIFUNCTIONAL DIGITAL COLOR SYSTEMS

File No. RME05000100 R05032182900-TTEC Ver00_2005-06

2005 TOSHIBA TEC CORPORATION All rights reserved

GENERAL PRECAUTIONS REGARDING THE SERVICE FOR e-STUDIO281c/351c/451c

3. ELECTRIC CIRCUIT DIAGRAMS................................................................................. 3-1

June 2005 TOSHIBA TEC

June 2005 TOSHIBA TEC

June 2005 TOSHIBA TEC

Flash ROM 512KB

SYSTEM BLOCK DIAGRAM

Wireless LAN module

Parallel port (IEEE-1284)

Parallel interface kit

USB connector (device)

USB connector (host: external)

USB connector (host: internal)

Copy key card Bypass unit Switches

PSTN External TEL

e-STUDIO281c/351c/451c SYSTEM BLOCK DIAGRAM

LAN connector (10BASE-T/100BASE-TX)

e-STUDIO281c/351c/451c SYSTEM BLOCK DIAGRAM

June 2005 TOSHIBA TEC

GENERAL DESCRIPTION OF MAIN IC

June 2005 TOSHIBA TEC

e-STUDIO281c/351c/451c GENERAL DESCRIPTION OF MAIN IC

e-STUDIO281c/351c/451c GENERAL DESCRIPTION OF MAIN IC

June 2005 TOSHIBA TEC

NMI P90/TI0 P91/TO1 P92/TI2 P93/TO3 P94/TI4

/NMI EEMCS-1 MOTCLK-1 CHKSAMOK-1 LED EEMDTIN-1

June 2005 TOSHIBA TEC

e-STUDIO281c/351c/451c GENERAL DESCRIPTION OF MAIN IC

e-STUDIO281c/351c/451c GENERAL DESCRIPTION OF MAIN IC

June 2005 TOSHIBA TEC

Port name P65/CAS3/WE3

Signal name FANCHG-0

P64/CS3/RAS3 P63/UCAS/UW1/ WE P62/LCAS/LW1/ REFOUT1 P61/CAS1/WE1 P60/CS1/RAS1 P57/CS2

CS3-0 LMPON-0 CCDPSOFF-0 CS1-0 CS2-0

June 2005 TOSHIBA TEC

e-STUDIO281c/351c/451c GENERAL DESCRIPTION OF MAIN IC

June 2005 TOSHIBA TEC

e-STUDIO281c/351c/451c GENERAL DESCRIPTION OF MAIN IC

Engine CPU (TMP95C063F)

e-STUDIO281c/351c/451c GENERAL DESCRIPTION OF MAIN IC

June 2005 TOSHIBA TEC

June 2005 TOSHIBA TEC

e-STUDIO281c/351c/451c GENERAL DESCRIPTION OF MAIN IC

e-STUDIO281c/351c/451c GENERAL DESCRIPTION OF MAIN IC

June 2005 TOSHIBA TEC

June 2005 TOSHIBA TEC

e-STUDIO281c/351c/451c GENERAL DESCRIPTION OF MAIN IC

e-STUDIO281c/351c/451c GENERAL DESCRIPTION OF MAIN IC

June 2005 TOSHIBA TEC

I/O I O I I O I I I Not used

136 137 138 139 140 141 142 143 144

PC3/AN3 PC4/AN4 PC5/AN5 PC6/AN6 PC7/AN7 VREFH VREFL AVSS AVCC

TNLVL-1A STH-1A ETH-1A MTH-1A DRTMP-1 VREFH VREFL AVSS AVCC

June 2005 TOSHIBA TEC

e-STUDIO281c/351c/451c GENERAL DESCRIPTION OF MAIN IC

Gate Array (EC/N075)

e-STUDIO281c/351c/451c GENERAL DESCRIPTION OF MAIN IC

June 2005 TOSHIBA TEC