6.

976 High Speed Communication Circuits and Systems Lecture 9 Low Noise Amplifiers
Michael Perrott Massachusetts Institute of Technology

Copyright 2003 by Michael H. Perrott

Narrowband LNA Design for Wireless Systems

Zin

From Antenna and Bandpass Filter

PC board trace

Zo

Package Interface

To Mixer LNA

Design Issues

- Noise Figure impacts receiver sensitivity - Linearity (IIP3) impacts receiver blocking performance - Gain high gain reduces impact of noise from components that follow the LNA (such as the mixer) - Power match want Z = Z (usually = 50 Ohms) - Power want low power dissipation - Bandwidth need to pass the entire RF band for the intended radio application (i.e., all of the relevant channels) - Sensitivity to process/temp variations need to make it
in o

manufacturable in high volume

M.H. Perrott

MIT OCW

Our Focus in This Lecture

Zin

From Antenna and Bandpass Filter

PC board trace

Zo

Package Interface

To Mixer LNA

Designing for low Noise Figure Achieving a good power match Hints at getting good IIP3 Impact of power dissipation on design Tradeoff in gain versus bandwidth

M.H. Perrott

MIT OCW

Our Focus: Inductor Degenerated Amp

Source inout Rs ens Lg

Zgs

vgs

Cgs

gmvgs

indg

Source Rs Lg

Iout M1 Ldeg

Ldeg

vin Vbias

Same as amp in Lecture 7 except for inductor degeneration

- Note that noise analysis in Tom Lees book does not include
inductor degeneration (i.e., Table 11.1)

M.H. Perrott

MIT OCW

Recall Small Signal Model for Noise Calculations

iout Iout

G D S
Zg Zgs vgs Cgs gmvgs

G
Zg

indg

Zdeg

S
Zdeg

M.H. Perrott

MIT OCW

Key Assumption: Design for Power Match

Zin Lg M1 Ldeg Iout

vin Vbias

Rs

Input impedance (from Lec 6)

Real!

Set to achieve pure resistance = Rs at frequency wo

M.H. Perrott

MIT OCW

Process and Topology Parameters for Noise Calculation

Source inout Rs ens Lg

Zgs

vgs

Cgs

gmvgs

indg

Ldeg

Process parameters

- For 0.18 CMOS, we will assume the following

Circuit topology parameters Zg and Zdeg

M.H. Perrott MIT OCW

Calculation of Zgs
Source inout Rs ens Lg

Zgs

vgs

Cgs

gmvgs

indg

Ldeg

M.H. Perrott

MIT OCW

Calculation of
Source inout Rs ens Lg

Zgs

vgs

Cgs

gmvgs

indg

Ldeg

= Rs
M.H. Perrott MIT OCW

Calculation of Zgsw
By definition Calculation

M.H. Perrott

MIT OCW

Calculation of Output Current Noise

Step 3: Plug in values to noise expression for indg

M.H. Perrott

MIT OCW

Compare Noise With and Without Inductor Degeneration

Source inout Rs ens Lg

Zgs

vgs

Cgs

gmvgs

indg

Ldeg

From Lecture 7, we derived for Ldeg = 0, wo2 = 1/(LgCgs)

We now have for (gm/Cgs)Ldeg = Rs, wo2 = 1/((Lg + Ldeg)Cgs)

M.H. Perrott

MIT OCW

Derive Noise Factor for Inductor Degenerated Amp

Source inout Rs ens Lg

Zgs

vgs

Cgs

gmvgs

indg

Ldeg

Recall the alternate expression for Noise Factor derived in Lecture 8

We now know the output noise due to the transistor noise

- We need to determine the output noise due to the source

resistance

M.H. Perrott

MIT OCW

Output Noise Due to Source Resistance

Source inout Rs ens Lg

Zin

Zgs

vgs

Cgs

gmvgs

indg

Ldeg

M.H. Perrott

MIT OCW

Noise Factor for Inductor Degenerated Amplifier

Noise Factor scaling coefficient

M.H. Perrott MIT OCW

Noise Factor Scaling Coefficient Versus Q

Noise Factor Scaling Coefficient Versus Q for 0.18 NMOS Device
7 6.5

Noise Factor Scaling Coefficient

6 5.5 5 4.5 4 3.5 3 2.5 1

Achievable values as a function of Q under the constraints that 1 = wo (Lg+Ldeg)Cgs gm L = Rs Cgs deg

c = -j0 c = -j0.55 c = -j1

1.5 2 2.5 3

Note: 1 Q= 2RswoCgs

3.5

4.5

M.H. Perrott

MIT OCW

Achievable Noise Figure in 0.18 with Power Match

Suppose we desire to build a narrowband LNA with center frequency of 1.8 GHz in 0.18 CMOS (c=-j0.55)

- From Hspice at V

1 V with NMOS (W=1.8, L=0.18) measured gm =871 S, Cgs = 2.9 fF

gs =

- Looking at previous curve, with Q 2 we achieve a Noise

Factor scaling coefficient 3.5

M.H. Perrott

MIT OCW

Component Values for Minimum NF with Power Match

Assume Rs = 50 Ohms, Q = 2, fo = 1.8 GHz, ft = 47.8 GHz

-C -L

gs

calculated as

deg

calculated as

-L

calculated as

M.H. Perrott

MIT OCW

Have We Chosen the Correct Bias Point? (Vgs = 1V)

gm and gdo (milliAmps/Volts) and Vgs (Volts)
4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 100 200 300 400 500 600 700

Vgs , gm , and gdo versus Current Density for 0.18 NMOS

Chosen bias point is Vgs = 1 V Lower power Higher power Higher ft Lower ft Lower IIP3 Higher IIP3 gdo gdo Lower g Higher g m m

Id

Vgs

M1 1.8 W = L 0.18

gdo

Vgs gm

Current Density (microAmps/micron)

Note: IIP3 is also a function of Q

M.H. Perrott MIT OCW

Calculation of Bias Current for Example Design

Calculate current density from previous plot

Calculate W from Hspice simulation (assume L=0.18 m)

- Could also compute this based on C

Calculate bias current

ox

value

- Problem: this is not low power!!

M.H. Perrott MIT OCW

We Have Two Handles to Lower Power Dissipation

Key formulas

Lower current density, Iden

- Benefits - Negatives

Lower W

- Benefit: lower power - Negatives

MIT OCW

M.H. Perrott

First Step in Redesign Lower Current Density, Iden

gm and gdo (milliAmps/Volts) and Vgs (Volts)
4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 100 200 300 400 500 600 700

Vgs , gm , and gdo versus Current Density for 0.18 NMOS

New bias point is Vgs = 0.8 V

Id

Vgs

M1 1.8 W = L 0.18

gdo

Vgs gm

Current Density (microAmps/micron)

M.H. Perrott

Need to verify that IIP3 still OK (once we know Q)

MIT OCW

Recalculate Process Parameters

Assume that the only thing that changes is gm/gdo and ft

- From previous graph (I

den

= 100 A/ m)

We now need to replot the Noise Factor scaling coefficient

- Also plot over a wider range of Q

Noise Factor scaling coefficient

M.H. Perrott MIT OCW

Update Plot of Noise Factor Scaling Coefficient

Noise Factor Scaling Coefficient Versus Q for 0.18 NMOS Device
18 16

Noise Factor Scaling Coefficient

14 12 10 8 6 4

Achievable values as a function of Q under the constraints that 1 = wo (Lg+Ldeg)Cgs gm L = Rs Cgs deg

c = -j0.55 c = -j0 c = -j1 Note: 1 Q= 2RswoCgs

3 4 5

10

M.H. Perrott

MIT OCW

Second Step in Redesign Lower W

Recall Ibias can be related to Q as

We previously chose Q = 2, lets now choose Q = 6

- Cuts power dissipation by a factor of 3! - New value of W is one third the old one

M.H. Perrott

MIT OCW

Power Dissipation and Noise Figure of New Design

Power dissipation

- At 1.8 V supply
Noise Figure
t

- f previously calculated, get scaling coeff. from plot

M.H. Perrott

MIT OCW

Updated Component Values

Assume Rs = 50 Ohms, Q = 6, fo = 1.8 GHz, ft = 42.8 GHz

-C -L

gs

calculated as

deg

calculated as

-L

calculated as

M.H. Perrott

MIT OCW

Inclusion of Load (Resonant Tank)

Add output load to achieve voltage gain

- Note: in practice, use cascode device

Were ignoring Cgd in this analysis
Rs ens Lg

LL inout

RL iout

CL vout

vin

Zin

Zgs

vgs

Cgs

gmvgs

indg

LL

RL

CL Vout

Ldeg

Rs

Lg

Iout M1 Ldeg

vin Vbias

M.H. Perrott

MIT OCW

Calculation of Gain
Assume load tank resonates at frequency wo
Rs ens Lg

LL inout

RL iout

CL vout

vin

Zin

Zgs

vgs

Cgs

gmvgs

indg

Assume Zin = Rs

Ldeg

M.H. Perrott

MIT OCW

Setting of Gain

Parameters gm and Q were set by Noise Figure and IIP3 considerations

- Note that Q is of the input matching network, not the

amplifier load

RL is the free parameter use it to set the desired gain

- Note that higher R -

M.H. Perrott

for a given resonant frequency and capacitive load will increase QL (i.e., Q of the amplifier load) There is a tradeoff between amplifier bandwidth and gain Generally set RL according to overall receiver noise and IIP3 requirements (higher gain is better for noise) Very large gain (i.e., high QL) is generally avoided to minimize sensitivity to process/temp variations that will shift the center frequency
L

MIT OCW

The Issue of Package Parasitics

Noise Voltage Lbondwire2

Equivalent Source Rs Lext Lbondwire3

LL

RL

CL Vout

Noise Current Mixer and Other Circuits

M1 Ldeg Noise Current

vin Vbias
Noise Voltage

Lbondwire1

- Value of degeneration inductor is altered - Noise from other circuits couples into LNA M.H. Perrott

Bondwire (and package) inductance causes two issues

MIT OCW

Differential LNA
LL RL CL Vout M1 Ldeg CL Vout Ldeg M2 RL LL

Rs

Lg

Lg

Rs

vin
2

-vin
2

Vbias

Ibias

Advantages

- Value of L is now much better controlled - Much less sensitivity to noise from other circuits
deg

Disadvantages

- Twice the power as the single-ended version - Requires differential input at the chip
MIT OCW

M.H. Perrott

Note: Be Generous with Substrate Contact Placement

To Ldeg
GND S Substrate Contact N+

To Lg
G

To amplifer load
GND D N+ Substrate Contact

enRsub

enRsub

Hot electrons and other noise

Rsub

P-

Rsub

Hot electrons and other noise

Having an abundance of nearby substrate contacts helps in three ways

- Reduces possibility of latch up issues - Lowers R and its associated noise Impacts LNA through backgate effect (g ) - Absorbs stray electrons from other circuits that will
sub mb

otherwise inject noise into the LNA

Negative: takes up a bit extra area

M.H. Perrott MIT OCW

Another CMOS LNA Topology

Consider increasing gm for a given current by using both PMOS and NMOS devices

- Key idea: re-use of current

gm1+gm2 Id Id/2 M1 (1/2)W/L Id M1

(1/2)W/L Id/2 M2 gm1+gm2

M2 Id/2 Id/2

gm

W/L

(1/2)W/L

Issues

(1/2)W/L

M1

- PMOS device has poorer transconductance than NMOS for a given amount of current, and f is lower - Not completely clear there is an advantage to using this
t

technique, but published results are good See A. Karanicolas, A 2.7 V 900-MHz CMOS LNA and Mixer, JSSC, Dec 1996

M.H. Perrott

MIT OCW

Biasing for LNA Employing Current Re-Use

Stage 1 M4 Rbig1 M2 Vout1 Ibias Cbig1 Rbig2 M1 Cbig2 M3 Cbig3 Vout2 Stage 2

Vrf

Matching Network

opamp

Vref

PMOS is biased using a current mirror NMOS current adjusted to match the PMOS current Note: not clear how the matching network is achieving a 50 Ohm match

- Perhaps parasitic bondwire inductance is degenerating

the PMOS or NMOS transistors?

M.H. Perrott

MIT OCW

Broadband LNA Design

Zin High Speed Broadband Signal

PC board trace

Zo

Package Interface

LNA

Most broadband systems are not as stringent on their noise requirements as wireless counterparts Equivalent input voltage is often specified rather than a Noise Figure Typically use a resistor to achieve a broadband match to input source
to be higher than 3 dB

- We know from Lecture 8 that this will limit the noise figure

For those cases where low Noise Figure is important, are there alternative ways to achieve a broadband match?
M.H. Perrott MIT OCW

Recall Noise Factor Calculation for Resistor Load

Source Rs Source Rs enRs enRL

vin

RL

vout

RL

vnout

Total output noise

Total output noise due to source

Noise Factor

M.H. Perrott

MIT OCW

Noise Figure For Amp with Resistor in Feedback

Source Rs Rf Source Rs enRs Rf enRf

Vin

A
Vref

Vout

incremental ground

Vnout

Total output noise (assume A is large)

Total output noise due to source (assume A is large)

Noise Factor

M.H. Perrott

MIT OCW

Input Impedance For Amp with Resistor in Feedback

Source Rs enRs Rf enRf

A
Zin

Vnout

Recall from Miller effect discussion that

If we choose Zin to match Rs, then

Therefore, Noise Figure lowered by being able to choose a large value for Rf since
M.H. Perrott MIT OCW

Example Series-Shunt Amplifier

Rin Rs Rf Rout RL

vin Vbias

vx
M1 R1

vout

Recall that the above amplifier was analyzed in Lecture 5 Tom Lee points out that this amplifier topology is actually used in noise figure measurement systems such as the Hewlett-Packard 8970A
than a CMOS device, though

- It is likely to be a much higher performance transistor

MIT OCW

M.H. Perrott