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36V Rad Hard Dual Precision Operational Amplifier

ISL70227SRH
The ISL70227SRH is a high precision dual operational amplifier featuring very low noise, low offset voltage, low input bias current and low temperature drift. These features plus its radiation tolerance make the ISL70227SRH the ideal choice for applications requiring both high DC accuracy and AC performance. The combination of precision, low noise, and small footprint provides the user with outstanding value and flexibility relative to similar competitive parts. Applications for these amplifiers include precision and analytical instrumentation, active filters, precision power supply controls, and industrial controls. The ISL70227SRH is available in a 10 Ld hermetic ceramic flatpack and operates over the extended temperature range of -55C to +125C.

Features
Wide Supply Range . . . . . . . . . . . . . . . . . . . .4.5V to 36V Max. Very Low Voltage Noise . . . . . . . . . . . . . . . . . .2.5nV/Hz, Typ. Gain-bandwidth Product . . . . . . . . . . . . . . . . . . . . . . . . 10MHz Superb Offset Drift . . . . . . . . . . . . . . . . . . . . . . . . 1V/C, Max Operating Temperature Range. . . . . . . . . . . . -55C to +125 Low Input Voltage Offset . . . . . . . . . . . . . . . . . . . . . . 10V, Typ. Input Bias Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1nA, Typ. Unity Gain Stable No Phase Reversal Radiation Tolerance - High Dose Rate. . . . . . . . . . . . . . . . . . . . . . . . . . 100krad(Si) - Low Dose Rate . . . . . . . . . . . . . . . . . . . . . . . . . . 100krad(Si) - SEL/SEB LETTH . . . . . . . . . . . . . . . . . . . . . . 86MeV/mg/cm2

Applications
Precision Instruments Industrial Controls Active Filter Blocks Data Acquisition Power Supply Control

Related Literature
See AN1669, ISL70227SRH Evaluation Board Users Guide

C1
1.5nF

0 -5 V+ VOS (V)

-10 -15 -20 -25 BIASED

VIN

R1 95.3

R2 232 68.3nF C2

ISL70227SRH

OUTPUT

V-30 0

GROUNDED 10 20 30 40 50 60 70 80 90 100 TOTAL DOSE (krad(Si))

Sallen-Key Low Pass Filter (1MHz)

FIGURE 1. TYPICAL APPLICATION

FIGURE 2. OFFSET VOLTAGE vs RADIATION

September 23, 2011 FN7925.1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners.

ISL70227SRH Ordering Information


.

ORDERING NUMBER ISL70227SRHMF (Notes 1, 2) ISL70227SRHF/PROTO (Notes 1, 2) ISL70227SRHMX ISL70227SRHX/SAMPLE ISL70227MHEVAL1Z NOTES:

PART MARKING ISL70227 SRHMF ISL70227 SRHF/PROTO

TEMP RANGE (C) -55 to +125 -55 to +125 -55 to +125 -55 to +125

PACKAGE (Pb-free) 10 Ld FLATPACK 10 Ld FLATPACK DIE DIE

PKG. DWG. # K10.A K10.A

Evaluation Board

1. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. 2. For Moisture Sensitivity Level (MSL), please see device information page for ISL70227SRH. For more information on MSL please see techbrief TB363.

Pin Configuration
ISL70227SRH (10 LD FLATPACK) TOP VIEW
OUTA -IN A +IN A NC V1 2 3 4 5 10 9 V+ OUT B -IN B +IN B NC

- +
+ -

8 7 6

Pin Descriptions
PIN NUMBER 3 5 7 8 9 10 1 2 4, 6 PIN NAME +IN_A V+IN_B -IN_B OUT B V+ OUT A -IN_A NC
V+ ININ+

EQUIVALENT CIRCUIT Circuit 1 Circuit 3 Circuit 1 Circuit 1 Circuit 2 Circuit 3 Circuit 2 Circuit 1 Amplifier A non-inverting input Negative power supply Amplifier B non-inverting input Amplifier B inverting input Amplifier B output Positive power supply Amplifier A output Amplifier A inverting input

DESCRIPTION

Not Connected This pin is not electrically connected internally.


V+ OUT VV+ CAPACITIVELY TRIGGERED ESD CLAMP V-

V-

CIRCUIT 1

CIRCUIT 2

CIRCUIT 3

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ISL70227SRH
Absolute Maximum Ratings
Maximum Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V Maximum Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA Maximum Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5V Min/Max Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V Max/Min Input Current for Input Voltage >V+ or <V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA Output Short-Circuit Duration (1 Output at a Time) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite ESD Tolerance Human Body Model (Tested per JESD22-A114F) . . . . . . . . . . . . . . . . 2kV Machine Model (Tested per EIA/JESD22-A115-A) . . . . . . . . . . . . . . 300V Charged Device Model (Tested per JESD22-C101D) . . . . . . . . . . . . 750V Di-electrically Isolated PR40 Process . . . . . . . . . . . . . . . . . . . Latch-up free

Thermal Information
Thermal Resistance (Typical) JA (C/W) JC (C/W) 10 Ld Ceramic Flatpack (Notes 3, 4) . . . . . 130 20 Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C

Recommended Operating Conditions


Ambient Operating Temperature Range . . . . . . . . . . . . . .-55C to +125C Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . .+150C Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V (2.5V) to 30V (15V)

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 3. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 4. For JC, the case temp location is the center of the exposed metal pad on the package underside.

Electrical Specifications
PARAMETER VOS

VS 15V, VCM = 0, VO = 0V, RL = Open, TA = +25C, unless otherwise noted. Boldface limits apply over the operating temperature range, -55C to +125C, and over the radiation tolerance limit with exposure at a high dose rate. DESCRIPTION Offset Voltage CONDITIONS MIN (Note 5) -75 -100 TCVOS IOS Offset Voltage Drift Input Offset Current -1 -10 -12 IB Input Bias Current -10 -12 VCM Input Voltage Range Guaranteed by CMRR -13 -12 CMRR Common-Mode Rejection Ratio VCM = -13V to +13V VCM = -12V to +12V PSRR Power Supply Rejection Ratio VS = 2.25V to 5V VS = 3V to 15V AVOL VOH Open-Loop Gain Output Voltage High VO = -13V to +13V RL = 10k to ground RL = 10k to ground 115 115 110 110 1000 13.5 13.2 RL = 2k to ground 13.4 13.1 VOL Output Voltage Low RL = 10k to ground RL = 2k to ground TYP -10 .1 1 1 120 117 1500 13.65 13.5 -13.65 -13.5 MAX (Note 5) 75 100 1 10 12 10 12 13 12 -13.5 -13.2 -13.4 -13.1 UNIT V V V/C nA nA nA nA V V dB dB dB dB V/mV V V V V V V V V

FN7925.1 September 23, 2011

ISL70227SRH
Electrical Specifications
PARAMETER IS VS 15V, VCM = 0, VO = 0V, RL = Open, TA = +25C, unless otherwise noted. Boldface limits apply over the operating temperature range, -55C to +125C, and over the radiation tolerance limit with exposure at a high dose rate. (Continued) DESCRIPTION Supply Current/Amplifier CONDITIONS MIN (Note 5) ISC VSUPPLY Short-Circuit Supply Voltage Range RL = 0 to ground Guaranteed by PSRR 2.25 TYP 2.2 45 MAX (Note 5) 2.8 3.7 15 UNIT mA mA mA V

AC SPECIFICATIONS
GBW enp-p en en en en in THD + N Gain Bandwidth Product Voltage Noise Voltage Noise Density Voltage Noise Density Voltage Noise Density Voltage Noise Density Current Noise Density Total Harmonic Distortion + Noise 0.1Hz to 10Hz f = 10Hz f = 100Hz f = 1kHz f = 10kHz f = 10kHz 1kHz, G = 1, VO = 3.5VRMS, RL = 2k 10 85 3 2.8 2.5 2.5 0.4 0.00022 MHz nVP-P nV/Hz nV/Hz nV/Hz nV/Hz pA/Hz %

TRANSIENT RESPONSE
SR tr, tf, Small Signal Slew Rate Rise Time 10% to 90% of VOUT Fall Time 90% to 10% of VOUT ts Settling Time to 0.1% 10V Step; 10% to VOUT Settling Time to 0.01% 10V Step; 10% to VOUT tOL Output Overload Recovery Time AV = 10, RL = 2k, VO = 4VP-P AV = -1, VOUT = 100mVP-P, Rf = Rg = 2k, RL = 2k to VCM AV = -1, VOUT = 100mVP-P, Rf = Rg = 2k, RL = 2k to VCM AV = -1, VOUT = 10VP-P, Rg = Rf = 10k, RL = 2k to VCM AV = -1, VOUT = 10VP-P, RL = 2k to VCM AV = 100, VIN = 0.2V, RL = 2k to VCM 3.6 36 38 3.4 3.8 1.7 V/s ns ns s s s

Electrical Specifications
temperature range, -55C to +125C. PARAMETER VOS TCVOS IOS IB CMRR PSRR AVOL VOH

VS 5V, VCM = 0, VO = 0V, TA = +25C, unless otherwise noted. Boldface limits apply over the operating MIN (Note 5) VCM = -3V to +3V VS = 2.25V to 5V VO = -3V to +3V RL = 10k to ground RL = 10k to ground RL = 2k to ground MAX (Note 5) -

DESCRIPTION Offset Voltage Offset Voltage Drift Input Offset Current Input Bias Current Common-Mode Rejection Ratio Power Supply Rejection Ratio Open-Loop Gain Output Voltage High

CONDITIONS

TYP -10 .1 1 1 120 125 1500 3.65 3.5

UNIT V V/C nA nA dB dB V/mV V

FN7925.1 September 23, 2011

ISL70227SRH
Electrical Specifications
PARAMETER VOL VS 5V, VCM = 0, VO = 0V, TA = +25C, unless otherwise noted. Boldface limits apply over the operating temperature range, -55C to +125C. (Continued) DESCRIPTION Output Voltage Low CONDITIONS RL = 10k to ground RL = 2k to ground IS ISC Supply Current/Amplifier Short-Circuit MIN (Note 5) TYP -3.65 -3.5 2.2 45 MAX (Note 5) mA mA UNIT V

AC SPECIFICATIONS
GBW THD + N Gain Bandwidth Product Total Harmonic Distortion + Noise 1kHz, G = 1, Vo = 2.5VRMS, RL = 2k 10 0.0034 MHz %

TRANSIENT RESPONSE
SR tr, tf, Small Signal Slew Rate Rise Time 10% to 90% of VOUT Fall Time 90% to 10% of VOUT ts Settling Time to 0.1% Settling Time to 0.01% AV = 10, RL = 2kOH AV = -1, VOUT = 100mVP-P, Rf = Rg = 2k, RL = 2k to VCM AV = -1, VOUT = 100mVP-P, Rf = Rg = 2k, RL = 2k to VCM AV = -1, VOUT = 4VP-P, Rf = Rg = 2k, RL = 2k to VCM AV = -1, VOUT = 4VP-P, Rf = Rg = 2k, RL = 2k to VCM 3.6 36 38 1.6 4.2 V/s ns ns s s

NOTE: 5. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.

Post Radiation Characteristics


PARAMETER VOS IOS IB CMRR PSRR AVOL IS DESCRIPTION Offset Voltage Input Offset Current Input Bias Current

VS 15V, VCM = 0V, VO = 0V, RL = Open, TA = +25C, unless otherwise noted. This data is ATE test data of the ISL70227SRH post radiation exposure at a high dose rate of 50 to 300rad(Si)/s, these are not limits nor are they guaranteed. CONDITIONS 50k RAD 34 -1 -1 VCM = -13V to +13V VS = 2.25V to 15V VO = -13V to +13V RL = 10k to ground 155 116 3500 2.2 75k RAD 30 -1 -2 155 116 3500 2.2 100k RAD 30 -2 -3 155 116 3500 2.2 UNIT V nA nA dB dB V/mV mA

Common-Mode Rejection Ration Power Supply Rejection Ratio Open-Loop Gain Supply Current/Amplifier

FN7925.1 September 23, 2011

ISL70227SRH
VS 15V, VCM = 0V, VO = 0V, RL = Open, TA = +25C, unless otherwise noted. This data is ATE test data of the ISL70227SRH post radiation exposure at a low dose rate of <10mrad(Si)/s, these are not limits nor are they guaranteed.
0 -5 10 -10
VOS (V) IB+ (nA)

Post Radiation Characteristics

15

BIASED 5

-15 -20 -25 -30 GROUNDED 0 10 20 30 40 50 60 70 80 90 100 TOTAL DOSE (krad(Si)) BIASED

GROUNDED

-5

10

20

30

40

50

60

70

80

90

100

TOTAL DOSE (krad(Si))

FIGURE 3. OFFSET VOLTAGE vs RADIATION

FIGURE 4. POSITIVE INPUT BIAS CURRENT vs RADIATION

15

10
IB- (nA) IIO (nA)

BIASED 0

5 GROUNDED 0 BIASED -5

GROUNDED

10

20

30

40

50

60

70

80

90

100

-5

10

20

30

40

50

60

70

80

90

100

TOTAL DOSE (krad(Si))

TOTAL DOSE (krad(Si))

FIGURE 5. NEGATIVE INPUT BIAS CURRENT vs RADIATION

FIGURE 6. OFFSET CURRENT vs RADIATION

10

SUPPLY CURRENT (mA)

BIASED GROUNDED

10

20

30

40

50

60

70

80

90

100

TOTAL DOSE (krad(Si))

FIGURE 7. TOTAL SUPPLY CURRENT vs RADIATION

FN7925.1 September 23, 2011

ISL70227SRH Typical Performance Curves


100 INPUT NOISE VOLTAGE (nV/Hz) INPUT NOISE VOLTAGE (nV) 80 60 40 20 0 -20 -40 -60 -80 -100 0 1 2 3 4 5 TIME (s) 6 V+ = 38V RL = 10k CL = 3.5pF Rg = 10, Rf = 100k AV = 10,000 7 8 9 10

VS = 15V, VCM = 0V, RL = Open, unless otherwise specified.


100 VS = 19V AV = 1

10

1 0.1

10

100

1k

10k

100k

FREQUENCY (Hz)

FIGURE 8. INPUT NOISE VOLTAGE 0.1Hz TO 10Hz

FIGURE 9. INPUT NOISE VOLTAGE SPECTRAL DENSITY

100 INPUT NOISE CURRENT (pA/Hz) VS = 19V AV = 1 10

0.1 0.1

10

100

1k

10k

100k

130 120 110 100 90 80 70 60 50 40 30 20 10 0 -10

PSRR+ AND PSRR- VS = 5V RL = INF CL = 5.25pF AV = +1 VS = 1VP-P PSRR+ and PSRR- VS = 15V

PSRR (dB )

10

100

1k

10k

100k

1M

10M

FREQUENCY (Hz)

FREQUENCY (Hz)

FIGURE 10. INPUT NOISE CURRENT SPECTRAL DENSITY

FIGURE 11. PSRR vs FREQUENCY, V S = 5V, 15V

130 120 110 100 90 80 70 60 50 40 30 20 10 0 -10 10

VS = 5V VS = 2.25V

70 60 50 VOS (V) VS = 15V

CMRR (dB)

VS = 15V

40 30 20 10

RL = INF CL = 5.25pF AV = +1 VCM = 1VP-P 100 1k 10k 100k 1M 10M

0 -60

-40

-20

FREQUENCY (Hz)

20 40 60 80 TEMPERATURE (C)

100

120

140

FIGURE 12. CMRR vs FREQUENCY, VS = 2.25, 5V, 15V

FIGURE 13. VOS vs TEMPERATURE

FN7925.1 September 23, 2011

ISL70227SRH Typical Performance Curves


1.0 0.8 0.6 IB+ (nA) IB- (nA) 0.4 IB+ 0.2 0 -0.2 -0.4 -60 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 140

VS = 15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)


0 -0.1 -0.2 -0.3

VS = 15V

VS = 15V

-0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -60 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 140 IB-

FIGURE 14. IB+ vs TEMPERATURE

FIGURE 15. IB- vs TEMPERATURE

0 -0.2

3.5 3.0

VS = 15V
-0.4 ICC (mA) IIO (nA) -0.6 -0.8 -1.0 -1.2 -1.4 -60 -40 -20 0 20 40 60 80 100 120 140 IIO 2.5

VS = 15V
2.0 1.5 1.0 0.5 0 -60 -40 -20 0 20 40 60 80 100 120 140 ICC

TEMPERATURE (C)

TEMPERATURE (C)

FIGURE 16. IOS vs TEMPERATURE

FIGURE 17. SUPPLY CURRENT vs TEMPERATURE

13.2 13.1 13.0 12.9 VOUT (V) 12.8 12.7 12.6 12.5 12.4 12.3 12.2 -60 -40 -20 0 20 40 60 TEMPERATURE (C) 80 AV = 10, VIN = 1.31V VS = 15V 100 120 VOH @ RL = 100k VOH @ RL = 2k

-12.2 -12.3 -12.4 -12.5 VOUT (V) -12.6 -12.7 -12.8 -12.9 -13.0 -13.1 -13.2 -60 -40 -20 0 20 40 60 80 VOL @ RL = 100k VOL @ RL = 2k

AV = 10, VIN = - 1.31V VS = 15V

100

120

TEMPERATURE (C)

FIGURE 18. VOH vs TEMPERATURE, VS = 15V

FIGURE 19. VOL vs TEMPERATURE, VS = 15V

FN7925.1 September 23, 2011

ISL70227SRH Typical Performance Curves


14 13 12 11 10 9 8 7 6 5 4 AV = 10, 3 VIN = 1.31V 2 VS = 15V 1 0 0.0001 0.001 VOUT (V) -55C VOUT (V) 0C VOUT (V) +25C VOUT (V) +125C

VS = 15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)


200 180 160 140 PHASE 120 100 80 60 40 GAIN 20 0 -20 R = 10k L -40 CL = 10pF -60 -80 SIMULATION -100 0.1m 1m 10m 100m 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz)

0.01

0.1

10

OUTPUT CURRENT (mA)

FIGURE 20. VOH vs OUTPUT CURRENT

FIGURE 21. OPEN-LOOP GAIN, PHASE vs FREQUENCY, R L = 10k, CL = 10pF

0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 0.0001

OPEN LOOP GAIN (dB)/PHASE () OPEN LOOP GAIN (dB)/PHASE()

VOH (V)

AV = 10, VIN = - 1.31V VS = 15V

VOUT (V) +125C VOUT (V) +25C VOUT (V) 0C VOUT (V) -55C

0.001

0.01

0.1

10

200 180 160 140 120 100 80 60 40 20 0 -20 R = 10k L -40 CL = 100pF -60 SIMULATION -80 -100 0.1m 1m 10m 100m 1

PHASE

VOL (V)

GAIN

10 100 1k 10k 100k 1M 10M 100M

OUTPUT CURRENT (mA)

FREQUENCY (Hz)

FIGURE 22. VOL vs OUTPUT CURRENT

FIGURE 23. OPEN-LOOP GAIN, PHASE vs FREQUENCY, R L = 10k, CL = 100pF

70 60 50 GAIN (dB) 40 30 20 10 0 AV = 10 Rg = 10k, Rf = 100k AV = 1 Rg = OPEN, Rf = 0 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M AV = 100 AV = 1000 Rg = 100, Rf = 100k Rg = 1k, Rf = 100k
GAIN (dB)

21 20 19 18

+130C +125C -60C

+25C

VS = 15V CL = 3.5pF RL = INF VOUT = 100mVP-P

17 16 15 14 13 12 AV = 10, VOUT = 100mVP-P, VS = +-15V, RL = 2k 1k 10k 100k 1M 10M

-10 100

11 100

FREQUENCY (Hz)

FIGURE 24. FREQUENCY RESPONSE vs CLOSED LOOP GAIN

FIGURE 25. GAIN vs FREQUENCY vs TEMPERATURE

FN7925.1 September 23, 2011

ISL70227SRH Typical Performance Curves


15 13 NORMALIZED GAIN (dB) 11 9 7 5 VS = 15V 1 RL = 10k -1 CL = 3.5pF AV = +2 -3 VOUT = 100mVP-P -5 10k 1k 3 Rf = Rg = 100 Rf = Rg = 100k Rf = Rg = 10k Rf = Rg = 1k NORMALIZED GAIN (dB)

VS = 15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)


2 RL = 10k 1 0 -1 -2 -3 -4 -5 1k VS = 15V CL = 3.5pF AV = +1 VOUT = 100mVP-P 10k RL = 499 RL = 100 RL = 49.9 RL = 1k

100k

1M

10M

100M

FREQUENCY (Hz)

100k 1M FREQUENCY (Hz)

10M

100M

FIGURE 26. FREQUENCY RESPONSE vs FEEDBACK RESISTANCE Rf/Rg

FIGURE 27. GAIN vs FREQUENCY vs RL

7 6 NORMALIZED GAIN (dB) 5 4 3 2 1 0 -1 -2 -3

1 VS = 15V RL = 10k AV = +1 VOUT = 100mVP-P

VS = 2.25V

CL = 1000pF CL = 220pF CL = 100pF CL = 25.5pF

NORMALIZED GAIN (dB)

0 VS = 5V VS = 15V CL = 3.5pF RL = 10k AV = +1 VOUT = 100mVP-P 1k 10k 100k 1M 10M 100M

-1

-2

CL = 3.5pF 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M -3

FREQUENCY (Hz)

FIGURE 28. GAIN vs FREQUENCY vs CL

FIGURE 29. GAIN vs FREQUENCY vs SUPPLY VOLTAGE

6 5 4 LARGE SIGNAL (V) LARGE SIGNAL (V) 3 2 1 0 1 -2 -3 -4 -5 -6 0 5 10 15 TIME (s) 20 25 30 RL = 2k RL = 10k VS = 15V CL = 3.5pF AV = 1 Rf = 0 Rg = inf VOUT = 10VP-P

6 5 4 3 2 1 0 -1 -2 -3 -4 -5 -6 0 10 OUTPUT +125C OUTPUT +25C OUTPUT -55C VS = 15V RL = 2k AV = 1 Rf = 0 Rg = inf VOUT = 10VP-P 20 TIME (s) 30 40

FIGURE 30. LARGE SIGNAL 10V STEP RESPONSE, VS = 15V

FIGURE 31. LARGE SIGNAL 10V STEP RESPONSE, VS = 15V vs TEMPERATURE

10

FN7925.1 September 23, 2011

ISL70227SRH Typical Performance Curves


2.4 2.0 LARGE SIGNAL (V) VS = 15V, RL = 2k, 10k SMALL SIGNAL (mV) 1.6 1.2 0.8 0.4 0 -0.4 -0.8 -1.2 -1.6 -2.0 -2.4 0 5 10 VS = 5V, RL = 2k, 10k CL = 3.5pF AV = 1 VOUT = 4VP-P 15 20 25 TIME (s) 30 35 40

VS = 15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)


80 60 40 20 0 20 40 60 80 0 0.2 0.4 0.6 RL = 2k CL = 3.5pF AV = 1 VOUT = 100mVP-P 0.8 1.0 1.2 1.4 1.6 1.8 2.0 VS = 5V, 15V

TIME (ms)

FIGURE 32. LARGE SIGNAL TRANSIENT RESPONSE vs RL, VS = 5V, 15V

FIGURE 33. SMALL SIGNAL TRANSIENT RESPONSE, VS = 5V, 15V

0.06 0.02 -0.02 INPUT (V) -0.06 -0.10 -0.14 -0.18 -0.20 -0.26 0 5 10 15 VS = 15V RL = 10k CL = 3.5pF AV = 100 Rf = 100k, Rg = 1k VIN = 200mVP-P OUTPUT 20 25 TIME (s) 30 35 INPUT

15 13 11 OUTPUT (V) INPUT (V) 9 7 5 3 1 -1 40

0.26 0.22 0.08 0.04 0.10 0.06 0.02 -0.02 -0.06 0 5 10 15 20 25 TIME (s) 30 35 OUTPUT VS = 15V RL = 10k CL = 3.5pF AV = 100 Rf = 100k, Rg = 1k VIN = 200mVP-P INPUT

2 0 -2 OUTPUT (V) -4 -6 -8 -10 -12 -14 40

FIGURE 34. POSITIVE OUTPUT OVERLOAD RESPONSE TIME, VS = 15V

FIGURE 35. NEGATIVE OUTPUT OVERLOAD RESPONSE TIME, VS = 15V

90 80 70 OVERSHOOT (%) 60 50 40 30 20 10 0 10 100 1000 CAPACITANCE (pF) 10000


O O

VS = 15V RL = 10k AV = 1 VOUT = 100mVP-P


RS VE HO

OT

HO RS VE

OT

FIGURE 36. % OVERSHOOT vs LOAD CAPACITANCE, VS = 15V

11

FN7925.1 September 23, 2011

ISL70227SRH Applications Information


Functional Description
The ISL70227SRH is a dual, low noise 10MHz BW precision op amp fabricated in a new precision 40V complementary bipolar DI process. A super-beta NPN input stage with input bias current cancellation provides low input bias current (1nA typical), low input offset voltage (10V typ), low input noise voltage (3nV/Hz), and low 1/f noise corner frequency (5Hz). These amplifiers also feature high open loop gain (1500V/mV) for excellent CMRR (120dB) and THD+N performance (0.0002% @ 3.5VRMS, 1kHz into 2k). A complimentary bipolar output stage enables high capacitive load drive without external compensation.
VINVIN+ RINRIN+ V+

VOUT + RL

V-

FIGURE 38. INPUT ESD DIODE CURRENT LIMITING - DIFFERENTIAL INPUT

Operating Voltage Range


The devices are designed to operate over the 4.5V (2.25V) to 36V (18V) range and are fully characterized at 30V (15V). Parameter variation with operating voltage is shown in the Typical Performance Curves beginning on page 7.

Output Current Limiting


The output current is internally limited to approximately 45mA at +25C and can withstand a short circuit to either rail as long as the power dissipation limits are not exceeded. This applies to only 1 amplifier at a time. Continuous operation under these conditions may degrade long term reliability.

Input ESD Diode Protection


The input terminals (IN+ and IN-) have internal ESD protection diodes to the positive and negative supply rails, and an additional anti-parallel diode pair across the inputs (see Figures 37 and 38).
V+

Output Phase Reversal


Output phase reversal is a change of polarity in the amplifier transfer function when the input voltage exceeds the supply voltage. The ISL70227SRH are immune to output phase reversal, even when the input voltage is 1V beyond the supplies.

Power Dissipation
VOUT RL

VIN RIN +

V-

FIGURE 37. INPUT ESD DIODE CURRENT LIMITING - UNITY GAIN

It is possible to exceed the +150C maximum junction temperatures under certain load and power supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related using Equation 1:
T JMAX = T MAX + JA xPD MAXTOTAL (EQ. 1)

For unity gain applications (see Figure 37) where the output is connected directly to the non-inverting input a current limiting resistor (RIN) will be needed under the following conditions to protect the anti-parallel differential input protection diodes. The amplifier input is supplied from a low impedance source. The input voltage rate-of-rise (dV/dt) exceeds the maximum slew rate of the amplifier (3.6V/s). If the output lags far enough behind the input, the anti-parallel input diodes can conduct. For example, if an input pulse ramps from 0V to +10V in 1s, then the output of the ISL70227SRH will reach only +3.6V (slew rate = 3.6V/s) while the input is at 10V, The input differential voltage of 6.4V will force input ESD diodes to conduct, dumping the input current directly into the output stage and the load. The resulting current flow can cause permanent damage to the ESD diodes. The ESD diodes are rated to 20mA, and in the previous example, setting RIN to 1k resistor (see Figure 37) would limit the current to <6.4mA, and provide additional protection up to 20V at the input. In applications where one or both amplifier input terminals are at risk of exposure to high voltage, current limiting resistors may be needed at each input terminal (see Figure 38 RIN+, RIN-) to limit current through the power supply ESD diodes to 20mA. 12

where: PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) PDMAX for each amplifier can be calculated using Equation 2:
V OUTMAX PD MAX = V S I qMAX + ( V S - V OUTMAX ) -----------------------R
L

(EQ. 2)

where: TMAX = Maximum ambient temperature JA = Thermal resistance of the package PDMAX = Maximum power dissipation of 1 amplifier VS = Total supply voltage IqMAX = Maximum quiescent supply current of 1 amplifier VOUTMAX = Maximum output voltage swing of the application RL = Load resistance

FN7925.1 September 23, 2011

ISL70227SRH Revision History


The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev.
REVISION FN7925.1 DATE CHANGE 9/20/11 Added Related Literature on page 1. Made correction to Ordering Information - Eval board name changed from "ISL70227SRHEVAL1Z" TO "ISL70227MHEVAL1Z" 9/7/11 Initial Release.

FN7925.0

Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL70227SRH To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at: http://rel.intersil.com/reports/search.php

For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com

13

FN7925.1 September 23, 2011

ISL70227SRH
Ceramic Metal Seal Flatpack Packages (Flatpack)
K10.A MIL-STD-1835 CDFP3-F10 (F-4A, CONFIGURATION B)
10 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE e
-Ab PIN NO. 1 ID AREA E1 0.004 M H A-B S D S 0.036 M -BA A D

INCHES SYMBOL A b MIN 0.045 0.015 0.015 0.004 0.004 0.240 0.125 0.030 MAX 0.115 0.022 0.019 0.009 0.006 0.290 0.260 0.280 -

MILLIMETERS MIN 1.14 0.38 0.38 0.10 0.10 6.10 3.18 0.76 1.27 BSC 0.20 6.35 0.66 0.13 10 0.38 9.40 1.14 0.04 MAX 2.92 0.56 0.48 0.23 0.15 7.37 6.60 7.11 NOTES 3 3 7 2 8 6 Rev. 0 3/07

S1 H A-B S D S

b1 c c1 D E

Q A -C-

C -D-H-

E1 E2 E3 e k L

L E3

E2 E3 LEAD FINISH

SEATING AND BASE PLANE

0.050 BSC 0.008 0.250 0.026 0.005 10 0.015 0.370 0.045 0.0015

c1

BASE METAL b1 M M (b) SECTION A-A

(c)

Q S1 M N

NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturers identification shall not be used as a pin one identification mark. Alternately, a tab (dimension k) may be used to identify pin one. 2. If a pin one identification mark is used in addition to a tab, the limits of dimension k do not apply. 3. This dimension allows for off-center lid, meniscus, and glass overrun. 4. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 5. N is the maximum number of terminal positions. 6. Measure dimension S1 at all four corners. 7. For bottom-brazed lead packages, no organic or polymeric materials shall be molded to the bottom of the package to cover the leads. 8. Dimension Q shall be measured at the point of exit (beyond the meniscus) of the lead from the body. Dimension Q minimum shall be reduced by 0.0015 inch (0.038mm) maximum when solder dip lead finish is applied. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH.

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FN7925.1 September 23, 2011