6N137

Single-Channel: 6N137, HCPL2601, HCPL2611 Dual-Channel: HCPL2630, HCPL2631 High Speed 10MBit/s Logic Gate Optocouplers
January 2011
Features

Description
The 6N137, HCPL2601, HCPL2611 single-channel and HCPL2630, HCPL2631 dual-channel optocouplers consist of a 850 nm AlGaAS LED, optically coupled to a very high speed integrated photo-detector logic gate with a strobable output. This output features an open collector, thereby permitting wired OR outputs. The coupled parameters are guaranteed over the temperature range of -40C to +85C. A maximum input signal of 5mA will provide a minimum output sink current of 13mA (fan out of 8). An internal noise shield provides superior common mode rejection of typically 10kV/s. The HCPL2601 and HCPL2631 has a minimum CMR of 5kV/s. The HCPL2611 has a minimum CMR of 10kV/s.
Very high speed 10 MBit/s Superior CMR 10 kV/s Double working voltage-480V Fan-out of 8 over -40C to +85C Logic gate output Strobable output Wired OR-open collector U.L. recognized (File # E90700)
Applications
Ground loop elimination LSTTL to TTL, LSTTL or 5-volt CMOS Line receiver, data transmission Data multiplexing Switching power supplies Pulse transformer replacement Computer-peripheral interface
Schematics
Package Outlines
N/C 1
8 VCC
+ 1 VF1
8 VCC
1
+ 2 VF _ 3
7 VE
_ 2
7 V01
8
6 VO
_ V
6 V02
8 1 1
F2
N/C 4
5 GND
+ 4
5 GND
Truth Table (Positive Logic)

Input
H
Enable
H H L L NC NC
Output
L H H H L H
www.fairchildsemi.com
6N137 HCPL2601 HCPL2611
HCPL2630 HCPL2631
L H L H L
A 0.1F bypass capacitor must be connected between pins 8 and 5(1).
2005 Fairchild Semiconductor Corporation 6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8
Absolute Maximum Ratings (TA = 25C unless otherwise specied) Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol
TSTG TOPR TSOL EMITTER IF VE VR PI DETECTOR Supply Voltage VCC (1 minute max) IO VO PO Output Current Output Voltage Collector Output Power Dissipation Single Channel Dual Channel (Each Channel) Each Channel Single Channel Dual Channel (Each Channel) 7.0 50 50 7.0 85 60 V mW V mA DC/Average Forward Input Current Enable Input Voltage Not to Exceed VCC by more than 500mV Reverse Input Voltage Power Dissipation Single Channel Dual Channel (Each Channel) Single Channel Each Channel Single Channel Dual Channel (Each Channel) 50 30 5.5 5.0 100 45 V V mW mA Storage Temperature Operating Temperature Lead Solder Temperature (for wave soldering only)*
Parameter
Value
-55 to +125 -40 to +85 260 for 10 sec
Units
C C C
*For peak soldering reow, please refer to the Reow Prole on page 11.
Recommended Operating Conditions

The Recommended Operating Conditions table denes the conditions for actual device operation. Recommended operating conditions are specied to ensure optimal performance to the datasheet specications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.
Symbol
IFL IFH VCC VEL VEH TA N
Parameter
Input Current, Low Level Input Current, High Level Supply Voltage, Output Enable Voltage, Low Level Enable Voltage, High Level Low Level Supply Current Fan Out (TTL load)
Min.
0 *6.3 4.5 0 2.0 -40
Max.
250 15 5.5 0.8 VCC +85 8
Units
A mA V V V C
*6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0mA or less.
www.fairchildsemi.com 2
Electrical Characteristics (TA = 0 to 70C unless otherwise specied)

Individual Component Characteristics Symbol
EMITTER VF BVR CIN VF / TA DETECTOR ICCH ICCL High Level Supply Current Low Level Supply Current VCC = 5.5V, IF = 0mA, VE = 0.5V Single Channel Dual Channel IEL IEH VEH VEL Low Level Enable Current High Level Enable Current High Level Enable Voltage Low Level Enable Voltage VCC = 5.5V, VE = 0.5V VCC = 5.5V, VE = 2.0V VCC = 5.5V, IF = 10mA VCC = 5.5V, IF = 10mA
(3)
Parameter
Input Forward Voltage Input Reverse Breakdown Voltage Input Capacitance Input Diode Temperature Coefcient IF = 10mA
Test Conditions
Min.
Typ.*
Max.
1.8
Unit
V V
TA = 25C IR = 10A VF = 0, f = 1MHz IF = 10mA 5.0
1.4
1.75
60 -1.4
pF mV/C
Single Channel Dual Channel VCC = 5.5V, IF = 10mA VE = 0.5V
7 10 9 14 -0.8 -0.6 2.0
10 15 13 21 -1.6 -1.6 0.8
mA mA
mA mA V V
Switching Characteristics (TA = -40C to +85C, VCC = 5V, IF = 7.5mA unless otherwise specied)
Symbol
TPLH
AC Characteristics
Propagation Delay Time to Output HIGH Level Propagation Delay Time to Output LOW Level Output Rise Time (1090%) Output Rise Time (9010%) Enable Propagation Delay Time to Output HIGH Level Enable Propagation Delay Time to Output LOW Level Common Mode Transient Immunity (at Output HIGH Level)
Test Conditions
RL = 350, CL = 15pF(4) (Fig. 12) TA = 25C(5) RL = 350, CL = 15pF (Fig. 12) (RL = 350, CL = 15pF (Fig. 12) RL = 350, CL = 15pF
(6)
Min.
20
Typ.*
45
Max. Unit
75 100 ns
TA = 25C
TPHL
25
45
75 100
ns
|TPHLTPLH| Pulse Width Distortion tr tf tELH
3 50 12 20
35
ns ns ns ns
(Fig. 12)
RL = 350, CL = 15pF(7) (Fig. 12) IF = 7.5mA, VEH = 3.5V, RL = 350, CL = 15pF(8) (Fig. 13) IF = 7.5mA, VEH = 3.5V, RL = 350, CL = 15pF(9) (Fig. 13) TA = 25C, |VCM| = 50V 6N137, HCPL2630 (Peak), IF = 0mA, HCPL2601, HCPL2631 VOH (Min.) = 2.0V, RL = 350(10) (Fig. 14) |VCM| = 400V HCPL2611 RL = 350, IF = 7.5mA, 6N137, HCPL2630 VOL (Max.) = 0.8V, HCPL2601, HCPL2631 TA = 25C(11) (Fig. 14) |VCM| = 400V HCPL2611
tEHL
20
ns
|CMH|
10,000 5000 10,000
V/s
10,000 5000 10,000
15,000 10,000 10,000 15,000
V/s
|CML|
Common Mode Transient Immunity (at Output LOW Level)
Electrical Characteristics (Continued)

Transfer Characteristics (TA = -40 to +85C unless otherwise specied) Symbol
IOH VOL IFT
DC Characteristics
HIGH Level Output Current LOW Level Output Current Input Threshold Current
Test Conditions
VCC = 5.5V, VO = 5.5V, IF = 250A, VE = 2.0V(2) VCC = 5.5V, IF = 5mA, VE = 2.0V, ICL = 13mA(2) VCC = 5.5V, VO = 0.6V, VE = 2.0V, IOL = 13mA
Min.
Typ.*
Max.
100
Unit
A V mA
.35 3
0.6 5
Isolation Characteristics (TA = -40C to +85C unless otherwise specied.) Symbol

II-O
Characteristics
Input-Output Insulation Leakage Current Withstand Insulation Test Voltage Resistance (Input to Output) Capacitance (Input to Output)
Test Conditions
Relative humidity = 45%, TA = 25C, t = 5s, VI-O = 3000 VDC(12) RH < 50%, TA = 25C, II-O 2A, t = 1 min.(12) VI-O = 500V(12) f= 1MHz(12)
Min.
Typ.*
Max.
1.0*
Unit
A
VISO RI-O CI-O
2500 1012 0.6
VRMS pF
*All Typicals at VCC = 5V, TA = 25C

Notes:
1. The VCC supply to each optoisolator must be bypassed by a 0.1F capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package VCC and GND pins of each device. 2. Each channel. 3. Enable Input No pull up resistor required as the device has an internal pull up resistor. 4. tPLH Propagation delay is measured from the 3.75mA level on the HIGH to LOW transition of the input current pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse. 5. tPHL Propagation delay is measured from the 3.75mA level on the LOW to HIGH transition of the input current pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse. 6. tr Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse. 7. tf Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse. 8. tELH Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse. 9. tEHL Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse. 10. CMH The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the HIGH state (i.e., VOUT > 2.0V). Measured in volts per microsecond (V/s). 11. CML The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the LOW output state (i.e., VOUT < 0.8V). Measured in volts per microsecond (V/s). 12. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted together.
Typical Performance Curves

Fig.1 Low Level Output Voltage vs. Ambient Temperature
VOL LOW LEVEL OUTPUT VOLTAGE (V)
0.8 0.7 0.6
IOL = 12.8 mA Conditions: IF = 5 mA VE = 2 V VCC = 5.5V
Fig. 2 Input Diode Forward Voltage vs. Forward Current

30 16 10
0.5 0.4 0.3 0.2 0.1 0.0 -40

IOL = 9.6mA IOL = 6.4mA IOL = 16mA
IF FORWARD CURRENT (mA)

60 80
0.1
0.01
0.001 -20 0 20 40 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6
TA AMBIENT TEMPERATURE (C)
VF FORWARD VOLTAGE (V)
Fig.3 Switching Time vs. Forward Current

VCC = 5 V
IOL LOW LEVEL OUTPUT CURRENT (mA)
120
50
Fig. 4 Low Level Output Current vs. Ambient Temperature

IF = 15mA
TP PROPAGATION DELAY (ns)
100
RL = 4 k (TPLH)
45
IF = 10mA
80
40
IF = 5mA
60
RL = 1 k (TPLH)
35
40
30
20
RL = 350 (TPLH)
RL = 1 k RL = 4 k (TPHL) RL = 350 k
25
Conditions: VCC = 5 V VE = 2 V VOL = 0.6 V
11
13
15
20
-40
-20
20
40
60
80
IF FORWARD CURRENT (mA)
TA AMBIENT TEMPERATURE (C)
IFT INPUT THRESHOLD CURRENT (mA)
Fig. 5 Input Threshold Current vs. Ambient Temperature

Conditions: VCC = 5.0 V VO = 0.6 V
Fig. 6 Output Voltage vs. Input Forward Current

6
VO OUTPUT VOLTAGE (V)
5
RL = 350
3
RL = 350
4
RL = 4k RL = 1k
RL = 1k
2
RL = 4k
1 -40
0 -20 0 20 40 60 80 0 1 2 3 4 5 6 TA AMBIENT TEMPERATURE (C)
IF - FORWARD CURRENT (mA)
Typical Performance Curves (Continued)

Fig. 7 Pulse Width Distortion vs. Temperature
80 600
Fig. 8 Rise and Fall Time vs. Temperature

RL = 4 k (tr) Conditions: IF = 7.5 mA VCC = 5 V
PWD PULSE WIDTH DISTORTION (ns)
60
Conditions: IF = 7.5mA VCC = 5A
Tr/Tf RISE AND FALL TIME (ns)
RL = 4 k
500 400 300 200

RL = 1 k (tr)
40
20
RL = 1 k
100 0
RL = 350 (tr) RL = 1 k RL = 4 k RL = 350
RL = 350
(tf)
-60
-40
-20
20
40
60
80
100
-60
-40
-20
20
40
60
80
100
TA TEMPERATURE (C)
TA TEMPERATURE (C)
Fig. 9 Enable Propagation Delay vs. Temperature

TE ENABLE PROPAGATION DELAY (ns)
120 120
Fig. 10 Switching Time vs. Temperature
100
RL = 4 k (TELH)
TP PROPAGATION DELAY (ns)
RL = 4 k TPLH
100
80
80
60
60
RL = 1 k TPLH
40
RL = 1 k (TELH) RL = 350 (TELH) RL = 350 RL = 1 k RL = 4 k (TEHL)
20
40
RL = 350 TPLH RL = 1 k RL = 4 k RL = 350 TPHL
0 -60
-40
-20
20
40
60
80
100
20 -60
-40
-20
20
40
60
80
100
TA TEMPERATURE (C)
TA TEMPERATURE (C)
Fig. 11 High Level Output Current vs. Temperature

IOH HIGH LEVEL OUTPUT CURRENT (A)
20
Conditions: VCC = 5.5 V VO = 5.5 V VE = 2.0 V IF = 250 A
15
10
0 -60
-40
-20
20
40
60
80
100
TA TEMPERATURE (C)
Test Circuits
Pulse Generator tr = 5ns Z O = 50
+5V
IF = 7.5 mA
1 2
Input Monitor (I F) 47
VCC
8 7 6
CL .1 f bypass RL Output (VO )
Input (IF ) t PHL Output (VO ) tPLH
IF = 3.75 mA
1.5 V 90% 10% tf tr
3 4
GND
Output (VO )
Fig. 12 Test Circuit and Waveforms for tPLH, tPHL, tr and tf
Pulse Generator tr = 5ns Z O = 50
Input Monitor (V E) +5V
3.0 V VCC
1
7.5 mA
8 7 6
CL RL Output (VO )
Input (VE ) t EHL t ELH
1.5 V
2 3 4
.1 f bypass
Output (VO ) 1.5 V
GND
Fig. 13 Test Circuit tEHL and tELH
Test Circuits (Continued)

VCC
1
IF A B VFF
8 7 6 5
.1 f bypass
+5V
2 3 4
350 Output (VO)
GND
VCM Pulse Gen
Peak VCM 0V
5V Switching Pos. (A), IF = 0 VO VO (Min)
CM H
VO (Max) VO 0.5 V Switching Pos. (B), I F = 7.5 mA CM L
Fig. 14 Test Circuit Common Mode Transient Immunity
Package Dimensions
Through Hole
PIN 1 ID.
4 3 2 1
4 3 2 1
0.4" Lead Spacing

PIN 1 ID.
0.270 (6.86) 0.250 (6.35)

5 6 7 8
0.270 (6.86) 0.250 (6.35)
0.390 (9.91) 0.370 (9.40)
SEATING PLANE
0.070 (1.78) 0.045 (1.14) 0.200 (5.08) 0.140 (3.55) 0.020 (0.51) MIN
SEATING PLANE
0.390 (9.91) 0.370 (9.40) 0.070 (1.78) 0.045 (1.14) 0.200 (5.08) 0.140 (3.55) 0.004 (0.10) MIN
0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0.016 (0.40) 0.008 (0.20) 15 MAX 0.300 (7.62) TYP
0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0.016 (0.40) 0.008 (0.20) 0 to 15 0.400 (10.16) TYP
Surface Mount
0.390 (9.91) 0.370 (9.40)
4 3 2 1
8-Pin DIP Land Pattern

0.070 (1.78)
PIN 1 ID.
0.270 (6.86) 0.250 (6.35)
0.060 (1.52)
0.100 (2.54) 0.295 (7.49) 0.415 (10.54) 0.030 (0.76)
0.070 (1.78) 0.045 (1.14) 0.020 (0.51) MIN
0.300 (7.62) TYP 0.016 (0.41) 0.008 (0.20)
0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP Lead Coplanarity : 0.004 (0.10) MAX
0.045 (1.14) 0.315 (8.00) MIN 0.405 (10.30) MAX.
Note: All dimensions are in inches (millimeters)
Ordering Information
Option
S SD W V WV SV SDV
Example Part Number

6N137S 6N137SD 6N137W 6N137V 6N137WV 6N137SV 6N137SDV
Description
Surface Mount Lead Bend Surface Mount; Tape and Reel 0.4" Lead Spacing VDE0884 VDE0884; 0.4 Lead Spacing VDE0884; Surface Mount VDE0884; Surface Mount; Tape and Reel
Marking Information
1
2601 V
3 4
2 6
XX YY T1
5
Denitions
1 2 3 4 5 6 Fairchild logo Device number VDE mark (Note: Only appears on parts ordered with VDE option See order entry table) Two digit year code, e.g., 03 Two digit work week ranging from 01 to 53 Assembly package code
Tape Specications
12.0 0.1 4.90 0.20 0.30 0.05 4.0 0.1 4.0 0.1 1.55 0.05 1.75 0.10
7.5 0.1 13.2 0.2 10.30 0.20 16.0 0.3
0.1 MAX
10.30 0.20
1.6 0.1
User Direction of Feed
Reow Prole
300 Temperature (C) 250 200 150 100 50 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Time (Minute) Peak reflow temperature: 225C (package surface temperature) Time of temperature higher than 183C for 60150 seconds One time soldering reflow is recommended Time above 183C, 60150 sec Ramp up = 3C/sec 225 C peak 215 C, 1030 s
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ANTI-COUNTERFEITING POLICY Fairchild Semiconductor Corporation's Anti-Counterfeiting Policy. Fairchild's Anti-Counterfeiting Policy is also stated on our external website, www.fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufacturers of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed applications, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild's quality standards for handling and storage and provide access to Fairchild's full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address any warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Preliminary No Identification Needed Obsolete Product Status Formative / In Design First Production Full Production Not In Production Definition Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.
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6N137

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Available Formats

Single-Channel: 6N137, HCPL2601, HCPL2611 Dual-Channel: HCPL2630, HCPL2631 High Speed 10MBit/s Logic Gate Optocouplers

Truth Table (Positive Logic)

6N137 HCPL2601 HCPL2611

A 0.1F bypass capacitor must be connected between pins 8 and 5(1).

Recommended Operating Conditions

Electrical Characteristics (TA = 0 to 70C unless otherwise specied)

TA = 25C IR = 10A VF = 0, f = 1MHz IF = 10mA 5.0

Single Channel Dual Channel VCC = 5.5V, IF = 10mA VE = 0.5V

7 10 9 14 -0.8 -0.6 2.0

10 15 13 21 -1.6 -1.6 0.8

|TPHLTPLH| Pulse Width Distortion tr tf tELH

10,000 5000 10,000

10,000 5000 10,000

15,000 10,000 10,000 15,000

Common Mode Transient Immunity (at Output LOW Level)

Electrical Characteristics (Continued)

Isolation Characteristics (TA = -40C to +85C unless otherwise specied.) Symbol

VISO RI-O CI-O

2500 1012 0.6

*All Typicals at VCC = 5V, TA = 25C

Typical Performance Curves

Fig. 2 Input Diode Forward Voltage vs. Forward Current

0.5 0.4 0.3 0.2 0.1 0.0 -40

IF FORWARD CURRENT (mA)

TA AMBIENT TEMPERATURE (C)

VF FORWARD VOLTAGE (V)

Fig.3 Switching Time vs. Forward Current

IOL LOW LEVEL OUTPUT CURRENT (mA)

Fig. 4 Low Level Output Current vs. Ambient Temperature

TP PROPAGATION DELAY (ns)

Conditions: VCC = 5 V VE = 2 V VOL = 0.6 V

IF FORWARD CURRENT (mA)

TA AMBIENT TEMPERATURE (C)

IFT INPUT THRESHOLD CURRENT (mA)

Fig. 5 Input Threshold Current vs. Ambient Temperature

Fig. 6 Output Voltage vs. Input Forward Current

VO OUTPUT VOLTAGE (V)

0 -20 0 20 40 60 80 0 1 2 3 4 5 6 TA AMBIENT TEMPERATURE (C)

IF - FORWARD CURRENT (mA)

Typical Performance Curves (Continued)

Fig. 8 Rise and Fall Time vs. Temperature

PWD PULSE WIDTH DISTORTION (ns)

Tr/Tf RISE AND FALL TIME (ns)

500 400 300 200

RL = 350 (tr) RL = 1 k RL = 4 k RL = 350

Fig. 9 Enable Propagation Delay vs. Temperature

Fig. 10 Switching Time vs. Temperature

TP PROPAGATION DELAY (ns)

RL = 350 TPLH RL = 1 k RL = 4 k RL = 350 TPHL

Fig. 11 High Level Output Current vs. Temperature

Input (IF ) t PHL Output (VO ) tPLH

1.5 V 90% 10% tf tr

Fig. 12 Test Circuit and Waveforms for tPLH, tPHL, tr and tf

Pulse Generator tr = 5ns Z O = 50

Input Monitor (V E) +5V

Input (VE ) t EHL t ELH

Output (VO ) 1.5 V

Fig. 13 Test Circuit tEHL and tELH

Test Circuits (Continued)

350 Output (VO)

VCM Pulse Gen

5V Switching Pos. (A), IF = 0 VO VO (Min)

VO (Max) VO 0.5 V Switching Pos. (B), I F = 7.5 mA CM L

Fig. 14 Test Circuit Common Mode Transient Immunity