2012 IEEE 7th International Power Electronics and Motion Control Conference - ECCE Asia June 2-5, 2012,

Harbin, China

Semi-Bridgeless Boost PFC Rectifier for Wide Voltage Input Range Based on Voltage Feed-Forward Control
Xiang LU1,2Yunxiang XIE1, Li CHENG1, Zhiping WANG1,3 and Cunbing GUI1
School of electric powerSouth China University of Technology, Guangzhou 510641, China 2 College of Physical Science and Technology, Guangxi University, Nanning 530004, China 3 Automation Engineering R&M Center, Guangdong Academy of Science, Guangzhou 510090, China e-mail:luxiang@gxu.edu.cn
ABSTRACT- Considering the advantages and disadvantages of the circuit topology of traditional Boost PFC, two phase interleaved Boost PFC, basic type bridgeless Boost PFC and semi-bridgeless Boost PFC, a rectifier based on the semi-bridgeless Boost PFC with wide range input voltage is proposed. The circuit works in CCM mode, uses double closed loop control strategy, i.e. , the inner current loop uses average current control, the outer voltage loop uses the PI control strategy. In order to verify the performance of the proposing circuit, this circuit is simulated by using the SimPowerSystems kit in Matlab/simulink software, and a 660W prototype of the proposed rectifier based on the digital control chip TMS320F2812 is realized. The simulation and experimental results show that, the rectifier output a stable DC voltage while its input voltage at 140V - 260V, and its ripple voltage is low, the input current waveform can follow the input voltage waveform, its power factor is close to unit, the THD is less than 5% at 100 kHz switching frequency. KEY WORDS Semi-bridgeless Boost; Power Factor Correction (PFC); average current control; Voltage feed-forward control
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I.

INTRODUCTION

With the development of power electronic technology and its control technology, all kinds of power electronic devices are widely used, but they also bring the harmonic pollution to the power grids, lead to the decline of power factor, increase of equipment capacity, current and line loss, lower efficiency of transmission, distribution line and equipment. In order to limit the harmonic pollution, every country had imposed some standard on input current harmonic. Active power factor correction (APFC) had been system researched and used in recent decades because of the small total harmonic distortion (THD) and high power factor [1]. Nowadays, more and more electronic equipment needs the power supply which can be used in both 110V and 220V power grid. Therefore, APFC technology with wide input voltage range is a research hotspot. In [2-4], a traditional Boost APFC circuit topology was proposed; the circuit can work in the input voltage range 85V265V. It has been widely used in high power applications. However, this topology has large conduction loss in bridge rectifier diode, as well as the conduction loss and switching

loss of Boost converter switching tube and the freewheeling diode. In [5-7], a two-phase interleaved parallel Boost PFC circuit topology was proposed, the circuit is composed by two Boost PFC circuit with the same parameters and its driving signal of two switch tube is differ 180 degree, and the two PFC unit circuit are in the staggered working state. Compare with traditional Boost PFC, it can greatly reduce the capacity of input EMI filter and the output capacitor, and in the same power level, each PFC unit circuit switch device and inductor current stress is only half of the traditional Boost PFC. However, the topology of main circuit and control circuit is relatively complex, and there are large conduction loss of bridge rectifier diode. In [8-11], basic bridgeless Boost PFC topology was proposed, the main circuit uses two MOSFET instead of two rectifying diodes in the traditional rectifier bridge, there are only two semiconductor devices in the current path, so the circuit can effectively reduce the switching loss, improve the efficiency of the system. But the circuit cancels the rectifier bridge, and the two inductors directly connected with the AC power supply, it is equivalent to open circuit to high frequency signal. The entire circuit is in suspension state because of isolation between output and input power, there exists serious EMI, and it bring difficulties to the measurement of voltage and current. In order to overcome the defects of basic bridgeless Boost PFC, some other bridge Boost PFC structure had been put forward, it largely improves the EMI inhibition performance [12-13]. In this paper, a kind of wide input voltage range rectifier based on the semi-bridgeless Boost PFC is designed. The current inner loop use average current control strategy, voltage outer loop uses PI control strategy. The simulation and experimental results show that, the rectifier can output a stable DC voltage, ripple voltage is low, power factor is close to unit, and power loss is low in a wide input voltage range. II. PROPOSED BOOST TOPOLOGY OPERATION

A. Proposed Boost Topology The bridgeless rectifier uses improved Boost PFC topology, as shown in Fig.1. Compare with the traditional APFC, the biggest difference is that it eliminates the tradition rectifier bridge, and uses two MOSFET S1 and S2 to replace the two rectifier diodes of the traditional rectifier leg, and add

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978-1-4577-2088-8/11/$26.00 2012 IEEE

two diodes D3 and D4 to the bridgeless configuration to link the ground of the PFC to the input line and D3 and D4 offer the return path, which makes the input line voltage no longer floating but rather traditionally referenced to ground.
D1
D2

D1

D2

L1

AC

CO L2
D3
D4

RO

S1

S2

L1
AC

L2
D3
D4

CO

RO

(a)
D1

S1

S2

D2

Fig.1. Diagram of Semi-Bridgeless Boost PFC topology.

L1
AC
L2
D3
D4

CO

RO

B. Circuit Operation Analysis In order to simplify the analysis the input line cycle has been separated into the positive and negative half-cycles as explained in the following. And assume that: (1) All devices, including power switching tube S1 and S2, boost inductor L1 and L2, diode D1-D4, capacitor C, etc., are ideal; (2) Boost inductor L1 = L2 = L, its value is large enough, so that it can be equivalent as constant current source in the switching cycle; (3) Output filter capacitor is large enough, so that the output voltage is constant and equivalent to a constant voltage source. (4) The switching frequency is much higher than the power grid frequency, power grid vin and DC side voltage VO is constant in a switching cycle. 1) Positive Half-Cycle Operation During the positive half-cycle, the circuits operation can be divided into four working modes, as shown in Fig. 2. a) Mode1Switching tube S1 is off and S2 is on, as shown in Fig. 2 (a). The power and the energy stored in L1 and L2 provide energy to the load through L1, D1, S2 and L2, and the current in series inductor L1 and L2 decreases linearly. b) Mode2 Switching tube S1 is on and S2 is off, as shown in Fig.2 (b). The power provide energy to the inductances L1 and L2 through L1, S1, body diode of S2 and L2, and the current in series inductances L1 and L2 continues to increase linearly and store the energy in these inductors. The energy stored in Co provides the load energy. c) Mode3Switching tube S1 and S2 are on, as shown in Fig.2 (c). The power provide energy to the inductances L1 and L2 through L1, S1, S2 and L2, and the current in series inductances L1 and L2 increase linearly and store the energy in these inductors. The energy stored in Co provides the load energy. Note that, this stage only occurs when the duty cycle is greater than 0.5. d) Mode4Switching tube S1 and S2 are off, as shown in Fig.2 (d). The power and the energy stored in L1 and L2 provide energy to the load through L1, D1, body diode of S2 and L2, and the current in series inductor L1 and L2 decreases linearly. Note that, this stage only occurs when the duty cycle is less than 0.5.

S1

S2

(b)
D1
D2

L1

AC
CO L2
D3 D4

RO

S1

S2

(c)

D1

D2

L1
AC

CO L2
D3 D4

RO

S1

S2

(d) Fig.2. Modes of positive half-cycle for Fig.1: (a) S1 is OFF and S2 is ON. (b) S1 is ON and S2 is OFF. (c) S1 and S2 are ON. (d) S1 and S2 are OFF.

2Negative Half-Cycle Operation During the negative half-cycle, the circuits operation also can be divided into four working modes, as shown in Fig. 3. a) Mode1 Switching tube S1 is off and S2 is on, as shown in Fig.3 (a). The power provide energy to the inductances L1 and L2 through L2, S2, body diode of S1 and L1, and the current in series inductances L1 and L2 increase linearly and store the energy in these inductors. The energy stored in Co provides the load energy.

b) Mode2: Switching tube S1 is on and S2 is off, as shown in Fig. 3 (b). The power and the energy stored in L1 and L2 provide energy to the load through L2, D2, S1 and L1,

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and the current in series inductor L1 and L2 decreases linearly. Fig.3 (c). The power provide energy to the inductances L1 and L2 through L2, S2, S1 and L1, and the current in series inductances L1 and L2 increase linearly and store the energy in these inductors. The energy stored in Co provides the load energy. Note that, this stage only occurs when the duty cycle is greater than 0.5.

c) Mode3: Switching tube S1 and S2 are on, as shown in

d) Mode4: Switching tube S1 and S2 are off, as shown in Fig.3 (d). The power and the energy stored in L1 and L2 provide energy to the load through L2, D2, body diode of S1 and L1, and the current in series inductor L1 and L2 decreases linearly. Note that, this stage only occurs when the duty cycle is less than 0.5.
D1
D2

3Simplification for circuit model As semi-bridgeless Boost PFC circuit uses the same type of switching tube, diode, and inductor. Meanwhile, the two inductors are independent, so the equivalent circuit is the same as traditional Boost PFC circuit. In Fig.4, the equivalent circuit in a switching cycle is shown. Note that, this is based on assumptions that the boost converter operates at continuous conduction mode and the switching frequency is much higher than the line frequency.
L
VD
S
(a)

+ vin
L

+ uC

L1
AC

+
CO
RO

L2

vin

iL

C
(b)

+ uC

D3

D4

S1

S2

L
+

(a)
D1
L1
AC

D2

vin

iL

C
(c )

+ uC

CO L2

RO

Fig.4. Simplification for circuit model: (a) equivalent circuit for SemiBridgeless boost PFC. (b) Switching tube is ON. (c) Switching tube is OFF.

D3

D4

S1

S2

According to Kirchhoffs law, the state equation for switch is given, respectively

(b)
D1
D2

diL L dt = vin C duc = uc dt R

CO

L1
AC

RO

L2

D3

D4

S1

S2

diL L dt = vin uc C duc = i uc L dt R

(c)
D1

where, vin is the input line voltage, iL is the input inductor current, uC is the output capacitor voltage.
D2

L1
AC

CO
L2

RO

Suppose that, d is the duty cycle for the switch in each cycle, d is the ratio for switch shutdown time and switching cycle, the input inductor current and output capacitor voltage are state variable, equation of state can be given in a switching cycle

D3

D4

S1

S2

iL iL iL = d A1 + Cvin + d A2 + Cvin uc uC uC

(d) Fig.3. Modes of negative half-cycle for Fig.1: (a) S1 is OFF and S2 is ON. (b) S1 is ON and S2 is OFF. (c) S1 and S2 are ON. (d) S1 and S2 are OFF.

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 0 0 0 where A = 1 A2 = 1 0 1 RC C
III.

1 1 L C = L . 1 0 RC

IV.

DESIGN PROCEDURE AND ANALYSIS

In this section, a converter with the following specifications is designed: input sinusoidal voltage, vin = 85~265V (AC)/50Hz; output dc voltage, Vo =390 5 V (DC) output power, po =660 W; switching frequency, f sw =100 kHz; maximum input current ripple, I l = 0.2 I i ( pk ) max . A. Design for Boost Inductor In the Boost PFC circuit, the inductor design is critical. The design for inductor will have a direct impact on circuit performance. The factors which affecting the value of input inductor and the specific formula is as follows: Step1: Calculate Input Current From the converter efficiency and output power and input sinusoidal voltage, the following equation can be obtained:

CONTROL STRATEGY FOR PROPOSED TOPOLOGY

In this paper, the average current control strategy with input voltage feed-forward is adopted, which use doubleloop control and introduce the input voltage feed-forward control strategy. The inner current loop make input current being close to sinusoidal, the out voltage loop make output voltage stability. In PFC control system, the current loop is the main factor affecting the input current distortion. However, there is a delay link for digital control system (DCS), resulting in steady-state performance of the current loop is not ideal [1]. Furthermore, for most switching mode converter, the output voltage is directly proportional to the input voltage, resulting in the output voltage will change immediately as a transient occurs on the input voltage. However, the feedback control loop is not fast enough to counteract the effect of the transient. To solve this problem, this paper proposes a feed-forward controller[14-15] based on the average current control, its control diagram is shown in Fig.5. In this way, the impact of the input voltage act on output voltage can be reduced.
ui
+

I in _ RMS =

Pout

Vin _ min
2 Pout Vin _ min

(6) (7)

ui * uo
+
PI
+

I i ( pk ) _ max = 2 I in _ RMS =

* uo

PI

iL

where I in _ RMS is the average current, I i ( pk ) max is maximum input current peak. If efficiency, , is set equal to 95%, then
u PWM

uo

I l = 0.2 I i ( pk ) max =

2 Pout 0.2 = 2.3 A . Vin _ min

(8)

Fig.5. Diagram of average current control with input voltage feed-forward.

Step2: Calculate Maximum Duty Cycle

as

Input voltage feed-forward expression can be expressed

d max =

Vo 2Vin _ min Vo

u ff = 1
where,

ui * uo
for input voltage

(4) feed-

390 85 2 = 0.691 . 390

(9)

Step3: Calculate Input Inductor The inductor parameter is according to the minimum input voltage of circuit. In the case of full load, when the input voltage is minimum, the current flows through inductor is the biggest, the corresponding duty cycle is given by

u ff

is

output

value

* forward aspects, ui is AC input voltage sampled values, uo is output voltage reference value.

From diagram of average current control with input voltage feed-forward shown in Fig.4, it is obviously that when the input voltage changes, the duty cycle command signal change direct rather than through the current loop regulator. As a result, it is not only to reduce the burden of the current loop PI regulator, but also to improve the dynamic response of the input voltage. In order to enhance the low-frequency loop gain for the current closed loop, a PI compensator is adopted. The transfer function of the PI compensator is 1+is . (5) Gci ( s ) = K pi s

L1 = L2 =

2Vin _ miin d max I l f sw

(10)

If the switching frequency, fsw, is set to 100 kHz, then

L1 = L2 = 2Vin _ miin d max I l f sw = 2 85 0.691 360 H . (11) 2.3 100 103

B. Design for Output Capacitor In the PFC rectifier, the output filter capacitor should be selected by according to the required of holding time. Hold

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time is determined by the output capacitor energy storage, load power, output voltage and the minimum voltage value of load. The parameter of Comin is given by

V.

SIMULATION AND EXPERIMENTAL RESULTS

A. Simulation Analysis In order to verify the performance of the circuit, this circuit is simulated by using the SimPowerSystems kit in Matlab/simulink software. Input voltage and input current waveform as shown in Fig.6, harmonic content as shown in Fig.7, Output voltage ripples as shown in Fig.8. The simulation results show: 1) input current is sinusoidal and track the input voltage waveform very well; 2) Output voltage is stable, and its ripple voltage is low. B. Experimental In order to verify the operation of the proposed converter, a DC output voltage of 400V, 660 W output power rectifier is built, which is control by TMS320F2812. According to the aforementioned design considerations, the circuit elements are obtained as L1 =360H, L2 =360H, and CO = 450F. Input voltage and input current waveform as shown in Fig.9. Waveforms of power tube drive signal and the inductor current as shown in Fig.10 for duty cycles less than 0.5. The relations for output voltage, PF and input voltage rang are provided in tab.1.

Co min =

2 Po t 2 Po = 2 V Vo (min) f line (Vo2 Vo2(min) )

2 o

(12)

where, t is holding time VO (min) is the minimum output voltage of capacitor during the holding time. Assume that the holding time as a power frequency cycle; the smallest frequency of grid is 47Hz; during the holding time after power failure, the minimum output voltage is 0.75Vo; the power efficiency is 95%. From equation (12), we obtain

Co min =

2 660 450 F . 0.95 47 (3902 292.52 )

13

Therefore, we can choose two 225 F parallel, the output peak voltage ripple Vripple is
Vripple =

capacitors in

2 Po 2 660 = = 13.4V 4 f lineCoVo 4 3.14 0.95 47 450 10 6 390

14 In order to meet the requirements of the capacitance holding time, the low-frequency RMS current I cout ( LF ) and high-frequency RMS current I cout ( HF ) must also be considered, respectively

I cout ( LF ) =
P = o V o

Pout 2Vo

660W 1.26 A 2 0.95 390

2

15

I cout ( HF )

16 VO 2 2 I cout ( LF ) 6 2 Vin (min) 16 390V (0.95) 2 6 2 85 2 (1.26) 2.07 A.

2

660W = 0.95 390V

Fig.6. Waveform of input voltage vin, input inductor current iin.

16 C. Choice for power semiconductor devices The choice of power semiconductor devices is based on the requirements for converter power level. For Boost PFC circuit, when the switching tube is on, the current which flows through the switching is the inductor current; when the switching tube is off, the voltage on the switching tube is output voltage. Therefore, when selecting switching tube, its rated voltage must be greater than the output voltage, and rated current must be greater than the maximum inductor current. Usually, the rated current for switching tube and rectifier bridges is 1.5-2 time actual current; the output voltage of the switching tube pressure value is 1.21.5 time output voltage, i.e.

Fig.7. Harmonic content.

VVEM 1.2Vo . IVEM 1.5 I L ( PK )

(17)

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proposed converter. The converter achieved a better power factor correction, and work steadily at a wide voltage range, and improve its efficiency. References
[1] Fig.8. Output ripples voltage. [2] BEN Hong-qi, ZHANG Ji-hong, LIU Gui-hua, et al, Active power factor correction technology for switching power supply ,Beijing: Mechanical Industry Press, 2010. H. H. C. Iu, Zhou, and C. K. Tse, Fast-scale instability in a boost PFC converter under average current control, Int. J. Circuits Theory Appl.,vol. 31, no. 6, pp. 611624, 2003. L. Huber, B. T. Irving, C. Adragna, and M. M. Jovanovic, Implementation of open-loop control for interleaved DCM/CCM boundary boost PFC converters, in Proc. Appl. Power Electron. Conf., Feb. 2008, pp. 10101016. De Belie, Frederik M. L. L.; Van De Sype, David M.; De Gussem, Koen; Ryckaert, Wouter R. A.; Melkebeek, Jan A. A., Digitally controlled boost PFC converter with improved output voltage controller, Electrical Engineering, vol.89, no.5, pp.363-370, 2007. HU Yah-shen, XIE Yun-xiang, Design and Implement of 3Channels Interleaved Boost DC/DC Converter, Power Electronic, vol.40, no.2 , pp.45-47, 2006. B. Lu, A novel control method for interleaved transition mode PFC, in Proc. Appl. Power Electron. Conf., Feb. 2008, pp. 697701. Xiaojun Xu, Wei Liu, Alex Q. Huang. Two-phase interleaved critical mode PFC boost converter with closed loop interleaving strategy,IEEE Transactions on Power Electronics, vol. 24, no.12, pp.3003-3013, 2009.

[3]

[4]

[5]

Fig.9. Waveforms of input voltage, input current and output voltage.

[6] [7]

[8]

Huber, Laszlo ; Jang, Yungtaek; Jovanovic, Milan M. Performance evaluation of bridgeless PFC boost rectifiers, IEEE Transactions on Power Electronics, vol.23, no.3, p p.1381-1390, 2008.
Mahdavi, Mohammad; Farzanehfard, Hosein, Zero-current-transition bridgeless PFC without extra voltage and current stress, IEEE Transactions on Industrial Electronics, vol.56, no.7, pp. 2540-2547, 2009. O'loughlin, Michael, Choosing between semi-bridgeless and interleaved pfc pre-regulators,Power Electronics Technology, v ol.35, no.7, pp.28-31, 2009. Tao Yu-Bo, Tian Hu, Yang Cheng-Zhi, Lin Hong, Theoretic and simulation study of bridgeless topology active power factor correction, Dianli Xitong Baohu yu Kongzhi/Power System Protection and Control, vol. 39, no.13, pp. 83-90, 2011. Kong, Pengju; Wang, Shuo; Lee, Fred C, Common mode EMI noise suppression for bridgeless PFC converters, IEEE Transactions on Power Electronics, vol. 23, no.1, pp.291-297, 2008. Musavi, Fariborz; Eberle, Wilson; Dunford, William G, A phase shifted semi-bridgeless boost power factor corrected converter for plug in hybrid electric vehicle battery chargers, Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition, pp.821-828, 2011. Wanfeng Zhang, Yan-Fei Liu, Bin Wu, A New Duty Cycle Control Strategy for Power Factor Correction and FPGA Implementation, IEEE Transactions on Power Electronics, vol. 21, no. 6, pp. 17451753, 2006 David M. Van de Sype; Koen De Gussem; Alex P. M. Van den Bossche; and Jan A. Melkebeek, Duty-Ratio Feedforward for Digitally Controlled Boost PFC Converters, IEEE Transactions on Industrial Electronics, vol. 52, no. 1, pp. 108-115, 2005

[9]

[10] Fig.10. Waveforms of power tube drive signal and the inductor current. [11]

Tab.1. Relations for output voltage, PF and input voltage rang

Input voltage(V) Output voltage(V) PF 140 391 0.99 160 392 0.99 180 393 0.98 200 394 0.98 220 394 0.98 240 394 0.97 260 395 [13] 0.97 [12]

From the experimental results, it can be concluded that dc output voltage is stable at about 394V for input voltage from 140V to 260V, and input current track the input voltage waveform very wellthese waveforms match the theoretical models. VI. CONCLUSION In this paper, a semi-bridgeless boost PFC rectifier is proposed. The working principle and characteristics are analyzed by detailed, and the CCM mode converter design parameters and steps are given. Simulation and experimental results confirm that the correctness of theoretical analysis and feasibility of the design parameters for the

[14]

[15]

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