Code No: V3219/R07

Set No: 1

III B.Tech II Semester Supplementary Examinations, November/ December 2011 VLSI DESIGN (Common to Electrical and Electronics Engineering & Electronics and Communications Engineering & Bio-Medical Engineering) Time: 3 Hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1. Explain with neat diagrams the nMOS transistor fabrication process. 2 For a CMOS inverter, calculate the shift in the transfer characteristic when the n ratio is varied from 1 to 10. 3 Draw the stick diagram and a mask layout for an 8:1 nMOS inverter circuit. Both the input and output points should be on the Polysilicon layer. Also explain the diagram. a) How are large capacitive loads driven? b) How do we estimate CMOS inverter delay? Construct a color-code stick diagram to represent the design of integrated nMOS and CMOS structures in 8:1 MUX. Explain the diagram. a) Draw a neat CPLD cell structure and explain. b) What are the different types of ASICs and the design constraints? Explain how a pseudo-random sequence generator may be used to test a 16 bit data path. Write a note on HDL design circuits i. Package body and declaration ii. Delay modeling in VHDL. *****

7 8

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Code No: V3219/R07

Set No: 2

III B.Tech II Semester Supplementary Examinations, November/ December 2011 VLSI DESIGN (Common to Electrical and Electronics Engineering & Electronics and Communications Engineering & Bio-Medical Engineering) Time: 3 Hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1 What are the characteristics on which the figure of merit of a transistor model depends? Explain

2. Explain the process of BiCMOS fabrication in an n-well process. 3. What are the effects of scaling on device parameters? Derive the expressions of parameters. 4. A particular section of layout includes a 3 wide neutral path which crosses a 2 wide polysilicon path at right angles. If the layers are separated by 0.5um thick layer of silicon dioxide, find the capacitance between the two layers. 5. a) What are the different choices of layers? b) What is the propagation delay in pass transistor chain? Derive the overall delay for n sections. 6. a) What are basic blocks in a CPLD and FPGA cell? Give a detailed diagram of each microcell. b) How does LUTs help in implementing circuits on FPGAs? 7. a) What is a TAP controller? b) Explain the fault model in CMOS circuits. 8. Write a brief note on a. Critical path delay in a design. b. Behavioral model Vs. structured model in HDL. *****

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Code No: V3219/R07

Set No: 3

III B.Tech II Semester Supplementary Examinations, November/ December 2011 VLSI DESIGN (Common to Electrical and Electronics Engineering & Electronics and Communications Engineering & Bio-Medical Engineering) Time: 3 Hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1. Explain the flow diagram of Bukeley n- well fabrication. 2. How can we enhance CMOS Processes to increase routing of circuits, Provide high quality capacitors and provide resistors of variable characteristics 3. Though scaling down gives the desirable effects in a device, why further miniaturization of device not allowed? What are the limitations of scaling? Explain. 4. A layer of MOS circuit has resistivity = 1 ohm cm. A section of this layer is 55 m long and 5 m wide and its thickness of 1 m calculate the resistance from one end of the section to other. What is the value of sheet resistance Rs? 5. Construct a stick diagram for a CMOS Parity generator. The required responses is Z=1 if there are even number of ones on inputs and Z=0 if there are odd ones. Explain the diagram. 6. a) With an example, explain the CMOS chip design using programmable interconnect. b) Give a brief note on PLDs. 7. a) Explain the need for CMOS testing? b) Explain serial scan testing procedure? 8. Write a brief note of VHDL design units with examples. *****

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Code No: V3219/R07

Set No: 4

III B.Tech II Semester Supplementary Examinations, November/ December 2011 VLSI DESIGN (Common to Electrical and Electronics Engineering & Electronics and Communications Engineering & Bio-Medical Engineering) Time: 3 Hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1. Compare Bi CMOS technology with CMOS and Bipolar technologies. 2. In an inverter circuit, define ZPU and Zpd. also derive a relation between them in nMOS inverter derived from another nMOS inverter. 3. Draw the models of metal interconnect and electro optical interconnection along with their equivalent circuits and explain. 4. An off chip capacitance load of 10PF is to be driven from CMOS inverter. Set out suitable arrangement giving appropriate channel L: W ratios and dimension. Calculate the number of inverter stages required and the delay by the overall Circuit to drive 10PF load. 5. Draw a transistor circuit diagram of shift register capable of holding and shifting 4 bit word. Explain the circuit operation. 6. Design a square generator of given 4 bit binary number using PROM device. 7. a) Draw a clocked field programmable logic array structure and explain its operation. b) How CPLDs are different from FPGAs. 8. Write a brief note on (a) Configuration declaration in HDL (b) LUTs & slice in FPGAs *****

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Code No: V3224/R07

Set No: 1

III B.Tech II Semester Supplementary Examinations, November/ December 2011 COMPUTER NETWORKS (Common to Computer Science and Engineering &Information Technology & Electronics and Computer Engineering) Time: 3 Hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1. a) What are the reasons for using layered protocols? b) Explain the OSI reference model. 2. a) What is the difference between a passive stared an active repeater in a fiber network? b) What are the differences between message switching and packet switching? c) How do guided media differ from unguided media? 3. a)What kind of error is undetectable by the checksum? b) Discuss the concept of redundancy in error detection and correction. c) Explain the selective repeat sliding window protocol. a)What is the relationship between a switch and a bridge? b) Explain CSMA protocols.

4.

5. a) Give three examples of protocol parameters that might be negotiated when a connection is set up. b) Explain the design issues of network layer. 6. a) Give an argument why the leaky bucket algorithm should allow just one packet per tick, independent of how large the packet is. b) What is NAT? How can NAT help in address depletion? c) Explain Border Gateway protocol (BGP). 7. a) Explain the TCP header. b) Explain the TCP connection establishment. 8. a) Can a machine with a single DNS name have multiple IP addresses? How could this occur? b) Explain the session initiation protocol. *****

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Code No: V3224/R07

Set No: 2

III B.Tech II Semester Supplementary Examinations, November/ December 2011 COMPUTER NETWORKS (Common to Computer Science and Engineering &Information Technology & Electronics and Computer Engineering) Time: 3 Hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1. a) How do the layers of the internet model correlate to the layers of the OSI model? b) Explain in detail about ARPANET. 2. a) Compare circuit switched and packet switched networks. b) Compare fiber optics and copper wire. c) What is refraction? What is reflection? 3. a) Explain the unrestricted simplex and simplex stop-and-wait data link protocols. b) An 8-bit byte with binary value 10101111 is to be enclosed using an even parity hamming code. What is the binary value after encoding? 4. a) Write the differences between store-and-forward and cut-through switches. b) Explain the spanning tree bridges. 5. a) A network on the internet has a subnet mask of 255.255.240.0. What is the maximum number of hosts it can handle? b) Explain the shortest path and distance vector routing algorithms. 6. a) The protocol field used in the IPv4 header is not present in the fixed IPv6 header. Why not? b) What are the differences between classful addressing and classless addressing in IPv4? 7. a) Explain the TCP connection management with the help of finite state machine. b) Write the advantages of transactional TCP over RPC. 8. a) Many business computers have three distinct and worldwide unique identifiers. What are they? b) A sender sends unformatted text. Show the MIME header. c) Explain why FTP does not have a message format. *****

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Code No: V3224/R07

Set No: 3

III B.Tech II Semester Supplementary Examinations, November/ December 2011 COMPUTER NETWORKS (Common to Computer Science and Engineering &Information Technology & Electronics and Computer Engineering) Time: 3 Hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1. a) What are the reasons for using layer protocol? b) Discuss the design issues for the layers in communication protocols 2. a)Compare different transmission media b) Give the services provided by broad band ISDN a) Find the checksum for the data 1010110110110001 send using a check of 4 bits. b) Explain the parameters to be considered in flow control

3.

4. a) Discuss the problems with minimum/ maximum length frames used in MAC layer. b) What are the services needed in wireless LAN MAC sub layers. 5. a) Compare virtual circuit and datagram subnets. b) Explain link state routing in detail. 6. a)Describe route discovery in detail. b) What are the differences between classful addressing and classless addressing in IPv4. c) Explain the token bucket congestion control algorithm.

7. a) List and explain the socket primitives used in Berkeley UNIX for TCP. b) Explain the TCP connection management. 8. Write short notes on any three of the following a) Domain name space b) MIME *****

c) SNMP

d) electronic mail

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Code No: V3224/R07

Set No: 4

III B.Tech II Semester Supplementary Examinations, November/ December 2011 COMPUTER NETWORKS (Common to Computer Science and Engineering &Information Technology & Electronics and Computer Engineering) Time: 3 Hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1. a)Explain Novell NetWare Reference model. b) How do the layers of the internet model correlate to the layers of the OSI model? c) What is a peer to peer process? 2. a) Write the advantages of optical fiber over twisted-pair and coaxial cables. b) Write the differences between message switching and packet switching. c) Why does ATM uses small and fixed length cells? 3. a) Explain any two elementary data link protocols. b) A bit string, 0111101111101111110, needs to be transmitted at the data link layer. What is the string actually transmitted after bit stuffing? c) Compare and contrast flow control and error control. 4. a) Describe the static channel allocation in LANs and MANs. b)Explain Bit-Map and Binary Countdown collision-free protocols. 5. a) List the differences between datagram and virtual circuit subnets. b) Explain count to infinity problem with suitable example. 6. Explain different congestion prevention policies at different layers 7. a) Give the functions of transport layer. b) Explain ATM AAL2 layer protocol. 8. Write short notes on the following: a) MIME b) Audio compression c) DNS d) Voice over IP *****

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Code No: P0203/R05

Set No. 1

III B.Tech II Semester Supplementary Examinations, Nov/Dec 2011 SWITCHGEAR AND PROTECTION (Electrical & Electronic Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks 1. A Circuit Breaker is rated as 2500A, 1500MVA, 33kV, 3 secs, 3-phase oil circuit breaker .Determine the rated symmetrical breaking current, rated making current, short time rating and rated service voltage. [16] 2. Explain the procedure to lling SF6 gas in a circuit breaker. And What are the applications of SF6 gas? [10+6] 3. (a) Describe the construction, principle of operation and applications of an i. Induction disc and ii. Induction cup type of relays. (b) What is the ratio of reset to pick up value in case of these relays. [10+6]

4. (a) Explain how the inclusion of a resistance in the neutral earthing circuit of an alternator aects the performance of the dierential protection of the threephase stator. (b) Describe how protection is provided in large turbo-alternators against earthfault in the rotor [8+8] 5. (a) Discuss biased dierential protection for transformers. (b) A 3-phase, 33/6.6 kV transformer is connected in star/delta and the protecting current transformer on the LV side have a ratio of 300/5. What will be the ratio of the current transformer on the HV side? [6+10] 6. (a) Explain over current protection of feeder. (b) Explain a scheme of protection for a ring mains. [8+8]

7. Discuss the merits and demerits of earthing it solidly, through a resistance and through reactance. [16] 8. Describe the construction and principle of operation of valve type and Zinc oxide lightning arrester. [16]

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Code No: P0203/R05

Set No. 2

III B.Tech II Semester Supplementary Examinations, Nov/Dec 2011 SWITCHGEAR AND PROTECTION (Electrical & Electronic Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks 1. Derive an expression for restriking voltage. Show that the RRRV is proportional to the natural frequency of the circuit. [8+8] 2. (a) With the help of neat sketches, describe the principle of resistance switching units in an Air blast circuit breaker. (b) Describe the construction of a vacuum interrupter and vacuum circuit breaker. [8+8] 3. Discuss the function of Directional relays in power system protection. Explain the term dead zone in case of a directional relay and explain how it is taken care? [8+8] 4. (a) Explain how the inclusion of a resistance in the neutral earthing circuit of an alternator aects the performance of the dierential protection of the threephase stator. (b) Describe how protection is provided in large turbo-alternators against earthfault in the rotor [8+8] 5. (a) Describe the working of a Buchholtz relay. (b) A 3-phase transformer having a line voltage ratio of 400/3300V is star-delta connected. The CTs on the 400V side have a ratio of 800/5A. What must be the ratio of CTs on 3300V side? [6+10] 6. (a) Explain bus bar protection need special attention. Why? (b) What is back up protection of bus bars? [10+6]

7. (a) Explain the phenomenon of Arcing grounds and suggest the method to minimize the eect of this phenomenon. (b) Explain the dierent types of neutral groundings. 8. (a) Explain the function of surge diverter. (b) Describe the construction and working of a valve type lightning arrester with neat diagram. [10+6] [10+6]

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Code No: P0203/R05

Set No. 3

III B.Tech II Semester Supplementary Examinations, Nov/Dec 2011 SWITCHGEAR AND PROTECTION (Electrical & Electronic Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks 1. (a) Dene the terms i. recovery voltage ii. Rate of Rise of Restriking Voltage (RRRV) Derive the expression for RRRV. (b) Explain the eect of RRRV on the operation of circuit breaker under fault condition. [8+8] 2. Distinguish between Air Blast circuit breaker and SF6 circuit breakers? [8+8]

3. Discuss the Over current relays and their classication and plot their characteristics? [8+8] 4. (a) Explain how the inclusion of a resistance in the neutral earthing circuit of an alternator aects the performance of the dierential protection of the threephase stator. (b) Describe how protection is provided in large turbo-alternators against earthfault in the rotor [8+8] 5. (a) What are the various protections usually recommended for power transformers? In what respect core balance leakage protection is inferior to combined leakage and over load protection for power transformer. (b) Draw a diagram of connections of the merz price circulating current system for protection of a 1000 kVA, 11kV/400V, delta/star, 3-phase transformer with star point connected to ground and mark on the diagram the turn ratio of the CT for a nominal 5A secondary current. [8+8] 6. Discuss why carrier current protection is suitable for important either connected lines. [16] 7. (a) Explain the phenomenon of arcing ground. (b) Suggest some methods to minimize the eect of this phenomenon with neat sketch. [6+10] 8. (a) Explain the function of surge diverter. (b) Describe the construction and working of a valve type lightning arrester with neat diagram. [10+6] 1 of 1

Code No: P0203/R05

Set No. 4

III B.Tech II Semester Supplementary Examinations, Nov/Dec 2011 SWITCHGEAR AND PROTECTION (Electrical & Electronic Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks 1. (a) Describe briey the arc phenomena in a Circuit Breaker. (b) In a short circuit test on a circuit breaker, the following readings were obtained on single frequency transient: i. time to reach the peak restriking voltage, 50 sec ii. the peak restriking voltage, 100 kV Determine the average RRRV and frequency of oscillations. [8+8]

2. Explain the principle of Puer type SF6 circuit breaker. With the help of sketches explain the conguration of a puer type SF6 circuit breaker. [6+10] 3. Dene the following terms and explain their signicance in distance protection (a) Reach of a distance relay. (b) Under reach. [8+8]

4. Discuss the dierent types of faults that can occur on a generator and the protection schemes employed. [16] 5. (a) What is the principle of harmonic restraint relay? Explain its application. (b) A 3-phase delta-star connected 30 MVA, 33/11kV transformer is protected by a simple dierential relaying scheme. The CT ratio on the primary side is 500: 5 and that on the secondary side is 2000:5. Sketch the CT connection diagram for the relaying scheme. Also, calculate the relay current setting for fault drawing up to 200% of rated current. [8+8] 6. (a) Explain with sketches, how earth fault protection is achieved in case of feeders. (b) Explain the need for a three stepped distance protection in a transmission line. [10+6] 7. (a) Describe the various methods of grounding. (b) A 132kV, 3 phase, 50Hz overhead line of 100 km length has a capacitance to earth of each line of 0.01 F per km. Determine inductance and kVA rating of the arc suppression suitable for this line. [10+6] 8. (a) Write short notes on: i. Causes of over voltages ii. Phenomenon of lightning 1 of 2

Code No: P0203/R05 iii. Surge absorbers.

Set No. 4

(b) How is the protection system graded with respect to the time of operation of relays. [10+6]

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Code No: P1203/R05

Set No. 1

III B.Tech II Semester Supplementary Examinations, Nov/Dec 2011 MIDDLEWARE TECHNOLOGIES (Information Technology) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks 1. (a) Explain how program execution time diers in Distributed environment when compared to Mainframe. (b) How Distributed computing aects resource availability. (c) Centralized computing results in single point of failure. Comment. [5+5+6] 2. (a) What is Distributed CORBA object? (b) What is IDL in the context of CORBA? [8+8]

3. How Assemblies helps in running multiple applications. Explain with an example. [16] 4. With an example, explain how you connect to a database, query the database and display the results of a query. [16] 5. (a) Give the Container class hierarchy of Java. (b) Dene the terms i. ii. iii. iv. namebinding naming context resolve a name compound name.

[8+8]

6. (a) Mention when a Java Interface conforms RMI/IDL remote interface. (b) Discuss Holder Class and Helper class of CORBA with examples. [8+8]

7. Give a brief notes on the interfaces and classes provided by java.beans package. [16] 8. (a) When does a transactional session bean implement SessionSynchronization interface? (b) Discuss the typical characteristics of an Entity Bean. [8+8]

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Code No: P1203/R05

Set No. 2

III B.Tech II Semester Supplementary Examinations, Nov/Dec 2011 MIDDLEWARE TECHNOLOGIES (Information Technology) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks 1. (a) Give examples of applications which prefer Mainframe environment. Give examples of applications which prefer Client/Server environment. Explain them with proper justication. (b) How are security and reliability achieved in Client/Server environment. [10+6] 2. Explain in detail about RMI interfaces and classes that support core functionality. [16] 3. (a) How function pointers are related to Delegates. Why delegates are type-safe. Give few examples which stress the need for delegates. (b) What are the steps in creating delegates in C#. [10+6]

4. Dene Reection. What is the functionality that is supported by reection. Explain in detail. [16] 5. (a) What are the dierent ways to invoke CORBA methods? Distinguish between them. (b) Explain how client programs obtain object reference. (c) Write about HTML applet tag. [6+5+5]

6. (a) Illustrate with an example the server behavior that can be obtained by combining dierent POA policies. (b) State about the dierent activation styles of POA. [8+8]

7. (a) Write about Object aggregation/delegation and Drag and drop support of JDK 1.2. (b) Explain about ObjectInputStream classes. 8. Give the overview of an EJB architecture. [8+8] [16]

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Code No: P1203/R05

Set No. 3

III B.Tech II Semester Supplementary Examinations, Nov/Dec 2011 MIDDLEWARE TECHNOLOGIES (Information Technology) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks 1. (a) How Hardware contributed to evolution of Client/Server computing. (b) How Software contributed to evolution of Client/Server computing. 2. What are the steps in RMI development process? Explain. [8+8] [16]

3. Every object of a derived class is also an object of the derived classs base class. However, base class objects are not objects of their derived classes. Comment. How do you take advantage of this relationship in C#. Explain with an example. [16] 4. Dene Reection. What is the functionality that is supported by reection. Explain in detail. [16] 5. Explain with an example the process mapping from CORBA IDL to Java. 6. (a) Explain how trader service prunes a search. (b) Dene the following of CORBA: i. ii. iii. iv. Sequence Array Enum Any. [16]

[8+8] [16]

7. Discuss the Java security APIs. 8. (a) Discuss about the i. Finder Interface ii. Handle Interface.

(b) Show how declarative transaction attributes are used to let an EJB container manage the propagation of transactions on your behalf. [8+8]

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Code No: P1203/R05

Set No. 4

III B.Tech II Semester Supplementary Examinations, Nov/Dec 2011 MIDDLEWARE TECHNOLOGIES (Information Technology) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks 1. Explain how Client/Server computing can be used in a Super market environment. [16] 2. Explain the dierent RMI Classes and Interfaces. [16]

3. (a) What is encapsulation. What is its signicance. What are the limitations of it. (b) How do you establish relationships among classes. [6+10]

4. (a) What is the dierence in marshalling with .NET Remoting and ASP .NET web services. (b) What is the signicance of directional attributes. (c) What are the methods for renewing a lease. [6+5+5]

5. (a) What are the dierent ways to invoke CORBA methods? Distinguish between them. (b) Explain how client programs obtain object reference. (c) Write about HTML applet tag. [6+5+5]

6. (a) Show the CORBA::ORB Initialization methods and their Java Mapping. (b) Explain the CORBA IDL-to-Java Mappings with respect to i. ii. iii. iv. General Constructs Primitive Types Constructed Types Pseudo-Objects to Java Class.

[8+8]

7. (a) Draw and explain JFC/AWT visual framework for JavaBeans. (b) Distinguish between design time and run time beans. [8+8]

8. (a) What happens in the major transition From pool to active state in the life of an EJB instance. (b) What constitutes the ejb-jar le. [8+8]

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