DEVICE DRIVERS AND INTERRUPTS SERVICE MECHANISM

Lesson-4: Interrupt Service Threads as Second Level Interrupt Handlers

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Chapter-4 L04: "Embedded Systems - " , Raj Kamal, Publs.: McGraw-Hill Education

ISR executed in two parts

One part is short execution time service routine Runs the critical part of the ISR and passes a signal or message to the OS for running the remaining second part later.

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Chapter-4 L04: "Embedded Systems - " , Raj Kamal, Publs.: McGraw-Hill Education

First level ISR (FLISR).

First part does the device dependent handling only. For example, it does not perform data decryption of data received from the network. It simply does the transfer of data to the memory buffer for the device data Second part waits during execution of the interrupts of lesser priority.

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Chapter-4 L04: "Embedded Systems - " , Raj Kamal, Publs.: McGraw-Hill Education

Second level ISR (SLISR) [Interrupt service thread (IST)] Second part is long service routine The OS schedules the IST as per its priority. Does the device independnet handling. IST is also the software interrupt, when it is triggered by an SWI (software interrupt instruction) [Signal] in FLISR

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Chapter-4 L04: "Embedded Systems - " , Raj Kamal, Publs.: McGraw-Hill Education

First level ISR and second level IST approach to handle the device hardware interrupts followed by software interrupt Interrupt (signal) event e1 Interrupt ISR (first level) Read byte Save byte Signal thread 1 ISR (first level) Run short code Signal thread 2 IST_thread 1 (second level) Run remaining codes at thread 1 Interrupt (signal) IST_thread 2 (second level) Run remaining codes at thread 2
5

event e2 Interrupt
2008

Chapter-4 L04: "Embedded Systems - " , Raj Kamal, Publs.: McGraw-Hill Education

First level ISR and second level IST approach to handle the device hardware interrupts followed by software interrupt
IST_ADC thread (second level) 1. Start ADC scan from first to last pixel in a row Hardware and for dark are pixels for SWI Interrupt Interrupt finding offset values ISR_Start 2. Signal task read frame (first level) pixel after each row read Signal 3. Repeat steps 1 and 2 for ADC scan next row till last row SWI Interrupt on Chapter-4 L04: "Embedded Systems - " , Rajsignal Kamal,
Publs.: McGraw-Hill Education

Camera Start key pressed Interrupt

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Summary

2008

Chapter-4 L04: "Embedded Systems - " , Raj Kamal, Publs.: McGraw-Hill Education

We learnt
Interrupt service can be done in two parts: the hardware device dependent codes executed in first fast level part ISR, which has short execution time and softwareinterrupt from first part to second level ISR, also called interrupt service thread

2008

Chapter-4 L04: "Embedded Systems - " , Raj Kamal, Publs.: McGraw-Hill Education

End of Lesson 4 of Chapter 4

2008

Chapter-4 L04: "Embedded Systems - " , Raj Kamal, Publs.: McGraw-Hill Education