Hardware Used

Power supply section

Pinout of the 7805 regulator IC. regulator IC. 1. Unregulated voltage in 2. Ground 3. Regulated voltage out

Pinout of the 7812 1. Unregulated voltage in 2. Ground 3. Regulated voltage out

The power supply designed for catering a fixed demand connected in this project. The basic requirement for designing a power supply is as follows,

1. The voltage levels required for operating the devices is +5volt. Here +5Volt required for operating microcontroller. And as well as required for drivers and amplifiers and ir transmitters and receivers. 2. The current requirement of each device or load must be added to estimate the final capacity of the power supply. The power supply always specified with one or multiple voltage outputs along with a current capacity. As it is estimate the requirement of power is approximately as follows, Out Put Voltage = +5Volt, Capacity = 1000mA The power supply is basically consisting of three sections as follows, 1. 2. 3. Step down section Rectifier Section Regulator section

Design principle: There are two methods for designing power supply, the average value method and peak value method. In case of small power supply peak value method is quit economical, for a particular value of DC output

the in put AC requirement is appreciably less. In this method the DC out put is approximately equal to Vm. A full wave bridge rectifier is designed using two diodes and the output of the rectifier is filtered with a low pass filter. The capacitor value is decided so that it will back up for the voltage and current during the discharging period of the DC output. In this case the out put with reference to the center tap of the transformer is taken in to consideration, though the rectifier designed is a full wave bridge rectifier but the voltage across the load is a half wave rectified out put. The Regulator section used here is configured with a series regulator LM78XX the XX represents the output voltage and 78 series indicates the positive voltage regulator 79 series indicates the negative regulator for power supply. The positive regulator works satisfactorily between the voltage XX+2 to 40 Volt DC. The output remains constant within this range of voltage. The output remains constant within this range of voltage.

Circuit connection: - In this we are using Transformer (12-0-12) v / 1mA, IC 7805 , diodes IN 4007,LED & resistors. Here 230V, 50 Hz ac signal is given as input to the primary of the transformer and the secondary of the transformer is given to the bridge rectification diode. The positive out put of the bridge rectifier is given as i/p to the IC regulator (7805) through capacitor (1000uf/25v). The o/p of the IC regulator is given to the LED

through resistors to act as indicator. Circuit Explanations: - When ac signal is given to the primary of the transformer, due to the magnetic effect of the coil magnetic flux is induced in the coil (primary) and transfer to the secondary coil of the transformer due to the transformer action. Transformer is an electromechanical static device which transformer electrical energy from one coil to another without changing its frequency. Here the diodes are connected to the two +12volt output of the transformer. The secondary coil of the transformer is given to the diode circuit for rectification purposes.

During the +ve cycle of the ac signal the diodes D1 conduct due to the forward bias of the diodes and diodes D2 does not conduct due to the reversed bias of the diodes. Similarly during the ve cycle of the ac signal the diodes D2 conduct due to the forward bias of the diodes and the diodes D1 does not conduct due to reversed bias of the diodes. The output of the bridge rectifier is not a power dc along with rippled ac is also present. To overcome this effect, a low pass filter is connected to the o/p of the diodes (D1 & D2). Which removes the unwanted ac signal and thus a pure dc is obtained. Here we need a fixed voltage, thats for we are using IC regulators (7805 ).Voltage regulation is a circuit that supplies a constant voltage regardless of changes in load current. This ICs are designed as fixed voltage regulators and with adequate heat sinking can deliver output current in excess of 1A. The o/p the full wave rectifier is given as input to the IC regulator through low pass filter with respect to GND and thus a fixed o/p is obtained. The o/p of the IC regulator (7805) is given to the LED for indication purpose through resistor. Due to the forward bias of the

LED, the LED glows ON state, and the o/p are obtained from the pin no-3. .

1 IC7805 3
330R

+5VDC

2
12-0-12 LED

230VAC 50Hz

IN4007

GND

POWER SUPPLY SECTION

MICROCONTROLLER

BLOCK DIAGRAM

PB0-PB7

PD0-PD7

The microcontroller used here is atmega 16 which has inbuilt adc and counter along with microcontroller.the pin configuration and details are given below. The ATmega16 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega16 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. The ATmega16 provides the following features: 16K bytes of In-System Programmable Flash Program memory with Read-WhileWrite capabilities, 512 bytes EEPROM, 1K byte SRAM, 32 general purpose I/O lines, 32 general purpose working registers, a JTAG interface for Boundary-scan, On-chip Debugging support and

programming, three flexible Timer/Counters with compare modes, Internal and External Interrupts, a serial programmable USART, a byte oriented Two-wire Serial Interface, an 8-channel, 10-bit ADC with optional differential input stage with programmable gain (TQFP package only),a programmable Watchdog Timer with Internal Oscillator, an SPI serial port, and six software selectable power saving modes. The Idle mode stops the CPU while allowing the USART, Two-wire interface, A/D Converter, SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next External Interrupt or Hardware Reset. In Power-save mode, the Asynchronous Timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except Asynchronous Timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low-power consumption. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue to run. The device is manufactured using Atmels high density nonvolatile memory technology. The On-chip ISP Flash allows the program memory to be reprogrammed in-system through an SPI serial interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR core. The boot program can use any interface to download the application program in the Application Flash memory. Software in the Boot Flash section will continue to run while the Application Flash section is updated,

providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel ATmega16 is a powerful microcontroller that provides a highly-flexible and cost-effective solution to many embedded control applications. The ATmega16 AVR is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and evaluation kits.

Pin Descriptions

VCC Digital supply voltage.

GND Ground. Port A (PA7..PA0) Port A serves as the analog inputs to the A/D Converter. Port A also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins can provide internal pull-up resistors (selected for each bit). The Port A output buffers have symmetrical drive characteristics with both high sink and source capability. When pins PA0 to PA7 are used as inputs and are externally pulled low, they will source current if the internal pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B (PB7..PB0) Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running.Port B also serves the functions of various special features of the ATmega16 . Port C (PC7..PC0) Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port C output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset condition becomes active, even if the clock is not running. If the JTAG interface is enabled, the pull-up resistors on pins PC5(TDI), PC3(TMS) and PC2(TCK) will be activated even if a reset occurs. Port C also serves the functions of the JTAG interface and other special features of the ATmega16 as listed on page 61. Port D (PD7..PD0) Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D pins that are externally pulled low

will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port D also serves the functions of various special features of the ATmega16. RESET Reset Input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not running. The minimum pulse length is 0.1 vcc. Shorter pulses are not guaranteed to generate a reset. XTAL1 Input to the inverting Oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting Oscillator amplifier. AVCC AVCC is the supply voltage pin for Port A and the A/D Converter. It should be externally connected to VCC, even if the ADC is not used. If the ADC is used, it should be connected to VCC through a low-pass filter. AREF AREF is the analog reference pin for the A/D Converter. Adc 10-bit Resolution 0.5 LSB Integral Non-linearity 2 LSB Absolute Accuracy 13 - 260 s Conversion Time Up to 15 kSPS at Maximum Resolution 8 Multiplexed Single Ended Input Channels 7 Differential Input Channels 2 Differential Input Channels with Optional Gain of 10x and 200x(1) Optional Left adjustment for ADC Result Readout 0 - VCC ADC Input Voltage Range Selectable 2.56V ADC Reference Voltage Free Running or Single Conversion Mode ADC Start Conversion by Auto Triggering on Interrupt Sources

 Interrupt on ADC Conversion Complete Sleep Mode Noise Canceler Note: 1. The differential input channels are not tested for devices in PDIP Package. This feature is only guaranteed to work for devices in TQFP and QFN/MLF Packages .The ATmega16 features a 10-bit successive approximation ADC. The ADC is connected to an 8channel Analog Multiplexer which allows 8 single-ended voltage inputs constructed from the pins of Port A. The single-ended voltage inputs refer to 0V (GND). The device also supports 16 differential voltage input combinations. Two of the differential inputs (ADC1, ADC0 and ADC3, ADC2) are equipped with a programmable gain stage, providing amplification steps of 0 dB (1x), 20 dB (10x), or 46 dB (200x) on the differential input voltage before the A/D conversion. Seven differential analog input channels share a common negative terminal (ADC1), while any other ADC input can be selected as the positive input terminal. If 1x or 10x gain is used, 8-bit resolution can be expected. If 200x gain is used, 7-bit resolution can be expected. The ADC contains a Sample and Hold circuit which ensures that the input voltage to the ADC is held at a constant level during conversion.. The ADC has a separate analog supply voltage pin, AVCC. AVCC must not differ morethan 0.3 V from VCC. See the paragraph ADC Noise Canceler on page 213 on how toconnect this pin. Internal reference voltages of nominally 2.56V or AVCC are provided On-chip. The voltage reference may be externally decoupled at the AREF pin by a capacitor for better noise performance. Operation The ADC converts an analog input voltage to a 10-bit digital value through successive approximation. The minimum value represents GND and the maximum value represents the voltage on the AREF pin

minus 1 LSB. Optionally, AVCC or an internal 2.56V reference voltage may be connected to the AREF pin by writing to the REFSn bits in the ADMUX Register. The internal voltage reference may thus be decoupled by an external capacitor at the AREF pin to improve noise immunity. The analog input channel and differential gain are selected by writing to the MUX bits in ADMUX. Any of the ADC input pins, as well as GND and a fixed bandgap voltage reference, can be selected as single ended inputs to the ADC. A selection of ADC input pins can be selected as positive and negative inputs to the differential gain amplifier.If differential channels are selected, the differential gain stage amplifies the voltage difference between the selected input channel pair by the selected gain factor. This amplified value then becomes the analog input to the ADC. If single ended channels are used, the gain amplifier is bypassed altogether. The ADC is enabled by setting the ADC Enable bit, ADEN in ADCSRA. Voltage reference and input channel selections will not go into effect until ADEN is set. The ADC does not consume power when ADEN is cleared, so it is recommended to switch off the ADC before entering power saving sleep modes. The ADC generates a 10-bit result which is presented in the ADC Data Registers,ADCH and ADCL. By default, the result is presented right adjusted, but can optionally be presented left adjusted by setting the ADLAR bit in ADMUX. If the result is left adjusted and no more than 8-bit precision is required, it is sufficient to read ADCH. Otherwise, ADCL must be read first, then ADCH, to ensure that the content of the Data Registers belongs to the same conversion. Once ADCL is read, ADC access to Data Registers is blocked. This means that if ADCL has been read, and a conversion completes before ADCH is read, neither register is updated and the result from the conversion is lost. When ADCH is read, ADC access to the ADCH and ADCL Registers is re-enabled.

The ADC has its own interrupt which can be triggered when a conversion completes. When ADC access to the Data Registers is prohibited between reading of ADCH and ADCL, the interrupt will trigger even if the result is lost. Starting a Conversion A single conversion is started by writing a logical one to the ADC Start Conversion bit,ADSC. This bit stays high as long as the conversion is in progress and will be cleared by hardware when the conversion is completed. If a different data channel is selected while a conversion is in progress, the ADC will finish the current conversion before performing the channel change. Alternatively, a conversion can be triggered automatically by various sources. Auto Triggering is enabled by setting the ADC Auto Trigger Enable bit, ADATE in ADCSRA. The trigger source is selected by setting the ADC Trigger Select bits, ADTS in SFIOR When a positive edge occurs on the selected trigger signal, the ADC prescaler is reset and a conversion is started. This provides a method of starting conversions at fixed intervals. If the trigger signal still is set when the conversion completes, a new conversion will not be started. If another positive edge occurs on the trigger signal during conversion, the edge will be ignored. Note that an Interrupt Flag will be set even if the specific interrupt is disabled or the global interrupt enable bit in SREG is cleared. A conversion can thus be triggered without causing an interrupt. However, the Interrupt Flag must be cleared in order to trigger a new conversion at the next interrupt event

IR TRANSMITTER The IR transmitter section built around IC 555 which is wired as an astable multivibrator and produces about 38kHz frequency. The main reason for using the IC 555 in astable mode is that to modulate the IR

to 38 kHz frequency so that other IR radiations do not cause any interference. 555 TIMER IC555 is a highly stable controller capable of producing accurate timing pulses. It is an 8 pin IC. It consists of three 5k resistors. It has two basic operating modes: stable and monostable. It can operate with a supply voltage in the range of 4.5 to 18V.

555 consists of 8 pins they are : GROUND TRIGGER

OUTPUT RESET CONTROL

THRESHOLD DISCHARGE VCC

Pin1: Ground. All voltages are measured with respect to this terminal. Pin2: Trigger. The output of the timer depends on the amplitude of the external trigger pulse applied to this pin. The output is low if the voltage at this pin is greater than 2/3 VCC. When a negative going pulse of amplitude greater than 1/3 VCC is applied to this pin, comparator 2 output goes low, which in turn switches the output of the timer high. The output remains high as long as the trigger terminal is held at a low voltage. Pin3: Output. There are two ways by which a load can be connected to the output terminal: either between pin 3 and ground or between

pin3 and supply voltage +VCC. When the output is low the load current flows through the load connected between pin3 and +VCC into the output terminal and is called sink current. The current through the grounded load is zero when the output is low. For this reason the load connected between pin 3 and +VCC is called the normally on load and that connected between pin 3 and ground is called normally off-load. On the other hand, when the output is high the current through the load connected between pin 3 and +VCC is zero. The output terminal supplies current to the normally off load. This current is called source current Pin4: Reset. The 555 timer can be reset (disabled) by applying a negative pulse to this pin. When the reset function is not in use, the reset terminal should be connected to +VCC to avoid any possibility of false triggering.

Pin5: Control Voltage. An external voltage applied to this terminal changes the threshold as well as trigger voltage. Thus by imposing a voltage on this pin or by connecting a pot between this pin and ground, the pulse width of the output waveform can be varied. Pin6: Threshold. This is the non-inverting input of comparator 1, which monitors the voltage across the external capacitor. When the

voltage at this pin is greater than or equal to the threshold voltage 2/3 VCC, the output of comparator 1 goes high, which in turn switches the output of the timer low. Pin7: Discharge. This pin is connected internally to the collector of transistor Q1. When the output is high Q1 is OFF and acts as an open circuit to external capacitor C connected across it. On the other hand, when the output is low, Q1 is saturated and acts as a short circuit, shorting out the external capacitor C to ground. Pin8: +VCC. The supply voltage of +5V to + 18V is applied to this pin with respect to ground.

ASTABLE MULTIVIBRATOR

Astable Multivibrator is a two stage switching circuit in which the output of the first stage is fed to the input of the second stage and vice versa. The outputs of both the stages are complementary. This free running multivibrator generates square wave without any external triggering pulse. The circuit has two stable states and switches back and forth from one state to another, remaining in each state for a time depending upon the discharging of the capacitive circuit

The multivibrator is one form of relaxation oscillator, the frequency of which may be controlled by external synchronizing pulses. When supply voltage, VCC is applied, one transistor will

conduct more than the other due to some circuit imbalance. Initially let us assume that Q1 is conducting and Q2 is cut-off. Then VC1, the output of Q1 is equal to VCESAT which is approximately zero and VC2 is equal to VCC. At this instant C1 charges exponentially with the time constant R1C1 towards the supply voltage through R1 and correspondingly VB2 also increases exponentially towards VCC. When VB2 crosses the coupling voltage Q2 starts conducting and VC2 falls to VCESAT. Also VB1 falls due to capacitive coupling between collector of Q2 and base of Q1, thereby driving Q1 into OFF state. The rise in voltage VC1 is coupled through C1 to the base of Q2 causing a small overshoot in voltage VB2. Thus Q1 is OFF and Q2 is ON. At this instant the voltage levels are: VB1 is negative, VC1=VCC, VB2=VBESAT and VC2=VCESAT. When Q1 is OFF and Q2 is ON the voltage VB1 increases exponentially with a time constant R2C2 towards VCC. Therefore Q1 is driven to saturation and Q2 to cut-off. Now the voltage levels are: VB1=VBESAT, VC1=VCESAT, VB2 is negative and VC2=VCC. From the above it is clear that when Q2 is ON the falling voltage VC2 permits the discharging of capacitor C2 which in turn drives Q1 into cut-off. The rising voltage of VC1 is fed back to the base of Q2 tending to turn it ON. This process is regenerative.

555 Timer Astable Multivibrator Circuit

This circuit diagram shows how a 555 timer IC is configured to function as an astable multivibrator. An astable multivibrator is a timing circuit whose 'low' and 'high' states are both unstable. As such,

the output of an astable multivibrator toggles between 'low' and 'high' continuously, in effect generating a train of pulses. This circuit is therefore also known as a 'pulse generator' circuit. In this circuit, capacitor C1 charges through R1 and R2, eventually building up enough voltage to trigger an internal comparator to toggle the output flip-flop. Once toggled, the flip-flop discharges C1 through R2 into pin 7, which is the discharge pin. When C1's voltage becomes low enough, another internal comparator is triggered to toggle the output flip-flop. This once again allows C1 to charge up through R1 and R2 and the cycle starts all over again.

C1's charge-up time t1 is given by: t1 = 0.693(R1+R2)C1. C1's discharge time t2 is given by: t2 = 0.693(R2)C1. Thus, the total period of one cycle is t1+t2 = 0.693 C1(R1+2R2). The frequency f of the output wave is the reciprocal of this time period, and is therefore given by: f = 1.44/(C1(R1+2R2)), wherein f is in Hz if R1 and R2 are in mega ohms and C1 is in microfarads. Considering this formula the frequency 38 khz has been set.

MONOSTABLE MULTIVIBRATOR Monostable multivibrator often called a one shot multivibrator is a pulse generating circuit in which the duration of this pulse is

determined by the RC network connected externally to the 555 timer. In a stable or standby state, the output of the circuit is approximately zero or a logic-low level. When external trigger pulse is applied output is forced to go high ( VCC). The time for which output remains high is determined by the external RC network connected to the timer. At the end of the timing interval, the output automatically reverts back to its logic-low stable state. The output stays low until trigger pulse is again applied. Then the cycle repeats. The monostable circuit has only one stable state (output low) hence the name monostable.

Operation:

Initially when the circuit is in the stable state i.e. when the output is low, transistor Q1 is ON and the capacitor C is shorted out to ground. Upon the application of a negative trigger pulse to pin 2, transistor Q1 is turned OFF, which releases the short circuit across the external capacitor C and drives the output high. The capacitor C now starts charging up towards VCC through R. When the voltage across the capacitor equals 2/3 VCC, comparator 1s output switches from low to high, which in turn drives the output to its low state via the output of the flip-flop. At the same time the output of the flip-flop turns transistor Q1 ON and hence the capacitor C rapidly discharges through the transistor. The output of the monostable remains low until a trigger pulse is again applied. Then the cycle repeats. The pulse width of the trigger input must be smaller than the expected pulse width of the output waveform. Also the trigger pulse must be a negative going input signal with amplitude larger than 1/3 VCC. Once triggered, the circuits output will remain in the high state until the set time, t elapses. The output will not change its state even if an input trigger is applied again during this time interval t. The circuit can be reset during the timing cycle by applying negative pulse to the reset terminal. The output will remain in the low state until a trigger is again applied.

Bistable Multivibrator

As shown here, the circuit we're looking at really is nothing more than two basic inverters, each taking its input from the other's output. If, when power is first applied, Q1 turns on, its output will be a logic 0. This will be applied to Q2's input resistor, keeping Q2 turned off so that its output will be a logic 1. This logic 1 will be applied back to Q1's input resistor, keeping Q1 turned on and holding the entire circuit locked into this stable state. On the other hand, if Q1 stays off at power-up, it will apply a logic 1 to Q2's input, thus turning Q2 on. The resulting logic 0 output from Q2 will in turn hold Q1 off. The circuit will then remain in this stable state indefinitely. Because this circuit has two possible logical states, it is known technically as a multivibrator. Because it has two possible stable states, it is a bistable multivibrator. It is also the most basic possible binary latch circuit.

Circuit operation

The above figure shows the circuit diagram which is used in the astable mode to get thesquare wave atbthe pin no 3. The 5-volt vcc is supplied to the pin no 4 and 8. the IC 555 which is in astable mode generates a square wave at the pin no -3.which is the fed to the transistor through a resistor.the IR led is connected to the collector

through a resistor being connected to the vcc.which continuously emits IR radiations .This IR radiation can not be visible in bare eyes inorder to make it visible we have to see it through a camera or digital camera.

IR RECEIVER The modulated IR beam from the transmitter continuously falls on the receiver section built around IR sensor TSOP1738 and some discrete components. The receiver sensor TSOP1738 responds to 38 kHz frequency. The modulated IR beam falling on receiver sensor TSOP1738 makes its output low and when somebody crosses the path of IR rays it senses this and its output goes high momentarily which gives a difference in signal to the microcontroller. The out put from the IR sensor is given to the transistor (BC547) AND the output is taken from the collector and given to the microcontroller.

TSOP The TSOP17 series are miniaturized receivers for infrared remote control systems. The three pin terminals of the TSOP are GND, VCC and OUTPUT. The circuit of the TSOP17 is designed in that way unexpected output pulses due to noise or disturbance signals are avoided. A bandpassfilter and an integrator stage are used to suppress such disturbances. Maximum forward current for the diode is 100mA continuous, 1A peak (300pps, 1uS pulse). Luminous intensity is 1 8mW at IF=50mA, with a 30 viewing angle. Phototransistor VCEO is 30 Volts, with a max dissipation of 100mW. Light IC = 20mA max and dark current is 100nA max, viewing angle 70 , rise/fall times=5uS @ RL=1K. FEATURES

1. 2. 3. 4. 5. 6. 7. 8. 9.

Photo detector and pre amplifier in one package Internal filter for PCM frequency Improved shielding against electrical field disturbance TTL, CMOS compatibility Output active low Low power consumption High immunity against ambient light Continuous data transmission possible Suitable burst length >=10 cycles/burst The circuit of the TSOP is designed in such a way that the unexpected output pulses due to noise or disturbance signals are avoided. A band pass filter, an integrator stage and an automatic gain control are used to suppress such disturbances. The distinguishing mark between data signals and disturbance signal are carrier frequency, burst length and duty cycle. The data signal should fulfill the following condition.

Carrier frequency should be close to center frequency of the band pass. Burst length should be 10 cycles/burst or longer. After each burst which is between 10 cycles and 70 cycles a gap time of at least 14 cycles is necessary.

PARAMETER

TEST CONDITION

SYMBOL

VALUE NIT

Supply voltage (pin 2) Supply current (pin 2) Output voltage (pin 3) Output current (pin 3) Junction temperature Storage temperature range Operating temperature range Power consumption Soldering temperature

VS IS

- 0.3 to + 6.0 3 A

V m

VO

IO

- 0.3 to (VS + 0.3) 5 A

Tj

100 C

Tstg

- 25 to + 85 - 25 to + 85 10 260

C C mW C

Tamb

Tamb 85 C t 10 s,1 mm from case

Ptot Tsd

For each burst which is longer than 1.8 ms a corresponding gap time

have at least same length as the burst. Up to 1400 short bursts per second can be received continuously. When a disturbance signal is applied to the TSOP 17 it can still receive the data signal. However the sensitivity is reduced to that level that no unexpected pulses will occur.
SERVO MOTOR INTERFACING:

What are Servo Motors?

Servo refers to an error sensing feedback control which is used to correct the performance of a system. Servo or RC Servo Motors are DC motors equipped with a servo mechanism for precise control of angular position. The RC servo motors usually have a rotation limit from 90 to 180. Some servos also have rotation limit of 360 or more. But servos do not rotate continually. Their rotation is restricted in between the fixed angles.

Servo Motor wiring and plugs:

The Servo Motors come with three wires or leads. Two of these wires are to provide ground and positive supply to the servo DC motor. The third wire is for the control signal. These wires of a servo motor are color coded. The red wire is the DC supply lead and must be connected to a DC voltage supply in the range of 4.8 V to 6V. The black wire is to provide ground. The color for the third wire (to provide control signal) varies for different manufacturers. It can be yellow (in case of Hitec), white (in case of Futaba), brown etc.

Unlike DC motors, reversing the ground and positive supply connections does not change the direction (of rotation) of a servo. This may, in fact, damage the servo motor. That is why it is important to properly account for the order of wires in a servo motor.

Servo Control: The servo motor can be moved to a desired angular position by sending PWM (pulse width modulated) signals on the control wire. The servo understands the language of pulse position modulation. A pulse of width varying from 1 millisecond to 2 milliseconds in a repeated time frame is sent to the servo for around 50 times in a second. The width of the pulse determines the angular position. For example, a pulse of 1 millisecond moves the servo towards 0, while a 2 milliseconds wide pulse would take it to 180. The pulse width for in between angular positions can be interpolated accordingly. Thus a pulse of width 1.5 milliseconds will shift the servo to 90. It must be noted that these values are only the approximations. The actual behavior of the servos differs based on their manufacturer.

A sequence of such pulses (50 in one second) is required to be passed to the servo to sustain a particular angular position. When the servo receives a pulse, it can retain the corresponding angular position for next 20 milliseconds. So a pulse in every 20 millisecond time frame must be fed to the servo. Inside a Servo Motor: A servo motor mainly consists of a DC motor, gear system, a position sensor which is mostly a potentiometer, and control electronics.

The DC motor is connected with a gear mechanism which provides feedback to a position sensor which is mostly a potentiometer. From the gear box, the output of the motor is delivered via servo spline to the servo arm. The potentiometer changes position corresponding to the current position of the motor. So the change in resistance produces an equivalent change in voltage from the potentiometer. A pulse width modulated signal is fed through the control wire. The pulse width is converted into an equivalent voltage that is compared with that of signal from the potentiometer in an error amplifier.

The difference signal is amplified and provided to the DC motor. So the signal applied to the DC servo motor is a damping wave which diminishes as the desired position is attained by the motor.

When the difference between the desired position as indicated by the pulse train and current position is large, motor moves fast. When the same difference is less, the motor moves slow. Power supply for Servo: The servo requires a DC supply of 4.8 V to 6 V. For a specific servo, its voltage rating is given as one of its specification by the manufacturer. The DC supply can be given through a battery or a regulator. The battery voltage must be closer to the operating voltage of the servo. This will reduce the wastage of power as thermal radiation. A switched regulator can be used as the supply for better power efficiency.

RF TRANSMITTER Introduction Radio Frequency Technology Radio Frequency (RF) in the range of 3 Hz and 30 GHz. RF communications are typically support 1200 to 9600 baud. Recently developed modulation schemes and spread spectrum technologies are achieving up to 19,200 baud. RF technology evolution challenges:

 Higher frequency utilization Higher bit rates and thus larger BWs RF is affected by absorption, multi path interference, EMI etc. RF is affected by material like steel, wall, window glass etc. Radio based on frequency convertible platforms. Flexible and scalable modular architecture. Increased integration to fit new standards and frequencies in the same cabinet Co-sitting capabilities with other standards requires high performance transmitters and receivers. RF Network Configuration: System Identification Should be unique Channel / Frequency Should have minimal interference with other systems Data Rates. TLP434A Ultra Small Transmitter Diagram

Frequency 315, 418 and 433.92 Mhz Modulation Operation Voltage Pin Specifications Pin 1: GND Pin 2: Data In Pin 3: Vcc Pin 4: Antenna (RF output) RF Transmitter Specifications : ASK : 2 - 12 VDC

Application Circuit Typical Key-chain Transmitter using HT12E-18DIP, a Binary 12 bit Encoder from Holtek Semiconductor Inc.

RECEIVER Introduction Radio Frequency Technology: Radio Frequency (RF) in the range of 3 Hz and 30 GHz. RF communications are typically support 1200 to 9600 baud. Recently developed modulation schemes and spread spectrum technologies are achieving up to 19,200 baud. RF technology evolution challenges: Higher frequency utilization Higher bit rates and thus larger BWs RF is affected by absorption, multi path interference, EMI etc. RF is affected by material like steel, wall, window glass etc. Radio based on frequency convertible platforms. Flexible and scalable modular architecture.Increased integration to fit new standards and frequencies in the same

cabinet. Co-sitting capabilities with other standards requires high performance transmitters and receivers. RF Network Configuration: System Identification Should be unique Channel / Frequency Should have minimal interference with other systems Data Rates RLP434A SAW Based Receiver Diagram

Frequency 315, 418 and 433.92 MHz Modulation Supply Voltage Output Pin Specifications Pin 1: Gnd Pin 2: Digital Data Output : ASK : 3.3 - 6.0 VDC : Digital & Linear

Pin 3: Linear Output /Test Pin 4: Vcc Pin 5: Vcc Pin 6: Gnd Pin 7: Gnd Pin 8: Antenna RF Receiver Specifications

Application Circuit Typical RF Receiver using HT12D-18DIP, a Binary 12 bit Decoder with 8 bit uC HT48RXX from Holtek Semiconductor Inc.

Selection of a Servo : The typical specifications of servo motors are torque, speed, weight, dimensions, motor type and bearing type. The motor type can be of 3 poles or 5 poles. The pole refers to the permanent magnets that are attached with the electromagnets. 5 pole servos are better than 3 pole motor because they provide better torque. The servos are manufactured with different torque and speed ratings. The torque is the force applied by the motor to drive the servo arm. Speed is the measure that gives the estimate that how fast the servo attains a position. A manufacturer may compromise torque over speed or speed over torque in different models. The servos with better torque must be preferred. The weight and dimensions are directly proportional to the torque. Obviously, the servo having more torque will also have larger dimensions and weight. The selection of a servo can be made according to the torque and speed requirements of the application. The weight and dimension may also play a vital role in optimizing the selection such as when a servo is needed for making an RC airplane or helicopter.

Code:
#include <avr/io.h> #include <util/delay.h> void main() { DDRA=0X00; unsigned char i,x,temp,y; //Configure TIMER1 TCCR1A|=(1<<COM1A1)|(1<<COM1B1)|(1<<WGM11); TCCR1B|=(1<<WGM13)|(1<<WGM12)|(0<<CS11)|(1<<CS10); ICR1=19999; // NON Inverted PWM // PRESCALER=1 MODE // // fPWM = 50Hz (Period = 20ms Standard). // PWM Pins as Out DDRD|=(1<<PD4)|(1<<PD5); while(1) { x=PINA&0b00000011; if(x==0b00000001) { OCR1A=600; } else if (x==0b00000010) { OCR1A=1950; } } } // 90 degree _delay_ms(200); // 0 degree _delay_ms(200); 14(FAST PWM)