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EE331 Microprocessor

Chapter 3 Introduction to PIC Microcontroller Part 1

KHAN WAHID 2010-11 (Term 1)

EE 331: Microprocessor

Chapter Objectives

This chapter covers


General microcontroller and microprocessor architecture PIC16F84A MCU architecture

Fetch and Execute units: PC, ID, ALU, Stack, Program Store, Data Store, Status Register, etc. Peripherals: Oscillator, Timer, I/O Ports, Data EEPROM, etc. Problem solving

Dr. KHAN WAHID 2010-11 (Term 1)

EE 331: Microprocessor

General Microcontroller Architecture


Microprocessors (MPU) and microcontrollers (MCU) are different MPU is general purpose in nature, and generally contains only CPU on one chip MCU is basically a microprocessor, memory, timers, I/O ports, etc. all on one chip

MCU is less flexible than MPU as it has fixed amount of memory and internal peripherals MCU is a complete system on one chip, hence, normally used in embedded systems

We can at any time build our own flexible MPU-based system by adding external chips to MPU

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EE 331: Microprocessor

Basic Microprocessor Architecture

A Microprocessor Unit (MPU) consists of 6 basic components:


Arithmetic logic unit (ALU) Accumulator (or Working Reg) Instruction decoder Control unit Memory/Registers Internal system bus

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EE 331: Microprocessor

Basic Microprocessor Architecture

Arithmetic logic unit (ALU)

Performs arithmetic (e.g. add, sub, etc.) and logic operations (e.g. AND, OR, etc.)

**Accumulator (or Working Register)


The accumulator is usually the register that is used in all ALU operations When data is sent from the MPU to external world or received from the external world to the MPU, it normally goes out or comes into from the accumulator via data bus

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EE 331: Microprocessor

Basic Microprocessor Architecture

Instruction decoder

Decodes the instructions (it receives over the internal data bus) at a binary level, and sends the appropriate signals to the control unit Performs the operation as instructed Sends data to the appropriate internal section Also sends out any needed control signals externally to the MPU over the control bus to external devices (e.g. memories, I/O, etc.)

Control unit

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EE 331: Microprocessor

Basic Microprocessor Architecture

General purpose registers (GPR)


Used by the MPU for data storage The size and number vary depending upon specific MPU type Accumulator Program counter (PC)

Special function registers (SFR)


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Instructions are normally stored sequentially in program memory, and PC is the counter register that keeps track of the current instruction A simple binary up counter PC always contains only the memory address of the next instruction to be executed Sometimes, referred as Instruction pointer

EE 331: Microprocessor

Let us explore the ALU-Accumulator


Add two 8-bits words: A + B Recall 74LS382

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EE 331: Microprocessor

8-bit ALU-Accumulator Processor

Add two 8-bits words: A + B

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8-bit ALU-Accumulator Processor

Let us give a system look of the ALU-Accumulator

(from data memory)

(from program memory)

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Q. Can you add two 16-bits numbers using this hardware architecture?

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Microcontroller Putting it all together

For a real application, a microcontroller alone is not enough; besides it needs a program that would be executed

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Freescale 68HC908 Microcontroller

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Other Microcontroller

Block diagram of an MC6811 microcontroller

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PIC12F508/509 Microcontroller

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PIC16F84A vs. PIC12F508/509

Learn ONE, learn ALL


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MCU Programming

Programming can be done in several languages, such as Assembly, C and BASIC, which are the most commonly used languages Assembly belongs to lower level languages that is programmed slowly, but takes up the least amount of space in memory and gives the best results Programs in C language are easier to be written and understood, but are slower in executing from assembly programs BASIC is the easiest one to learn, and its instructions are nearest a human's way of reasoning, but like C language, it is also slower than assembly

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MCU Compile / Assemble


Compile: translation from the high level source code to assembly code

Assemble: translation from the assembly code to the target machine code Both compiler and assembler are machine (and vendor) specific (e.g., PIC assembler won't work with ARM)
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Example Car Odometer

Consider a car odometer monitoring system that displays two things: (a) total distance since manufactured and (b) a trip odometer
Resource Budget (List of subsystem): 1. An edge-triggered input for the tachometer pulse train to add up engine revolutions 2. Gear ratio, mi/km option and trip reset 3. Four output digital lines to clock the two shift registers and provide segment data 4. An MPU to do the calculations and to read/write to the input/output ports 5. Program memory, usually ROM of some kind 6. Data memory for temporary storage of program variables, usually static RAM 7. Non-volatile memory to store physical variables

Any improvements? (SAQ3.6)

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Any improvements? (SAQ3.5)

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E3.1 Greenhouse Environment Controller

A greenhouse controller is to monitor an analog signal from a soil moisture probe and if below a certain value turn on a water valve for 5 seconds and off for 5 seconds.

Resource Budget (List of subsystem): 1. An input for an external oscillator, connected to a counter/timer to allow the MCU to calculate time. In practice the system clock can often be used by this internal timer to measure duration. 2. A 1-input analog input line to measure the analog signal from the moisture detector 3. A 1-input digital line to check the level of the reservoir water tank 4. A 1-output digital line to open and close the water valve 5. A 1-output digital line to activate the buzzer alarm 6. A microprocessor to do the calculations and to read/write to the input/output ports, respectively 7. Program memory, usually ROM of some kind 8. Data memory for temporary storage of program variables, usually static RAM

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E3.2 MCU controlled robot to cross a road, pp. 63-67

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Microchip and PIC MCU

Peripheral Interface Controller (PIC)


PIC was originally a design of General Instruments (now Motorola Connected Home Solutions) Microchip (formed in 1989) developed their first 8-bit Harvard architecture MCU PIC16C5xx All MCUs are low-cost, self-contained, Harvard arch, pipelined, RISC, single accumulator, with fixed reset and interrupt vectors
Instruction Word size 12 or 14-bit 12-bit 14-bit 16-bit 16-bit Number of Instructions 33 33 35 58, including hardware multiply 77, including hardware multiply Interrupt Vectors None None 1 4 2 (prioritised)

PIC Family

Stack size (words) 12CXXX/12FXXX 2 16C5XX/16F5XX 2 16CXXX/16FXXX 8 17CXXX 16 18CXXX/18FXXX 32

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Microchip and PIC MCU

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Microchip and PIC MCU

PIC16F84A

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PIC16F84A Microcontroller (8-bit)


Pin no.1 RA2 Second pin on port A. Pin no.2 RA3 Third pin on port A. Pin no.3 RA4 Fourth pin on port A. TOCK1 which functions as a timer is also found on this pin. Pin no.4 MCLR Reset input and Vpp programming voltage of a microcontroller. Pin no.5 VSS Ground of power supply. Pin no.6 RB0 Zero pin on port B. Interrupt input is an additional function. Pin no.7 RB1 First pin on port B. Pin no.8 RB2 Second pin on port B. Pin no.9 RB3 Third pin on port B. Pin no.10 RB4 Fourth pin on port B. Pin no.11 RB5 Fifth pin on port B. Pin no.12 RB6 Sixth pin on port B. Pin no.13 RB7 Seventh pin on port B. Pin no.14 VDD Positive power supply pole. Pin no.15 OSC2 Pin assigned for connecting with an oscillator. Pin no.16 OSC1 Pin assigned for connecting with an oscillator. Pin no.17 RA2 Second pin on port A. Pin no.18 RA1 First pin on port A.
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Parameter Name Program Memory Type Program Memory (KB) CPU Speed (MIPS) RAM Bytes Data EEPROM (bytes) Timers Temperature Range (C)

Value Flash 1.75 5 68 64 1 x 8-bit -40 to 85 2 to 6 18

Operating Voltage Range (V) Pin Count

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PIC16F84A Microcontroller (8-bit)

Block diagram from the manufacturers data sheet

A good understanding of the block diagram leads to an ability to design with the microcontroller, and to program it.
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PIC16F84A Microcontroller (8-bit)

Block diagram from the textbook for better understanding Lets explore inside and look at the components one by one

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System-look of ALU-Accumulator

Now lets extend the ALU-Accumulator (add other components)

IR / ID

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MPU: State Machine

An MPU needs a set of instructions to follow that tells it what operations to perform on what data

It fetches the first instruction from a designated area in its memory Loads it into instruction register Decodes it and executes that operation This sequence of fetch, decode and execute is continued until instructed to stop

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MPU: Fetch-Decode-Execute
Example: Num_2 = Num_1 + 4 => D[26] = D[25] + 4

IR

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Program Store

Example: Num_2 = Num_1 + 4


Machine code (program store content, 14-bits)
10-bit address

Mnemonics (Assembly)

movf 25, w addlw 4 movwf 26

00100000100101 11111000000100 00000010100110 0825 3E04 00A6

Hexadecimal
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MPU: Fetch-Decode-Execute
(14-bits)

Example: Num_2 = Num_1 + 4 => D[26] = D[25] + 4


The Quintessential PIC Microcontroller: pp. 49-57

(8-bits)

??
Basic All-purpose Stored Instruction Computer (BASIC)

?? ??

??

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MPU: Fetch-Decode-Execute
(14-bits)

Example: Num_2 = Num_1 + 4 => D[26] = D[25] + 4

(8-bits)

movf 25, w

Move contents of File h25 into w (working register)


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MPU: Fetch-Decode-Execute
(14-bits)

Example: Num_2 = Num_1 + 4 => D[26] = D[25] + 4

(8-bits)

addlw 04
Adds literal (i.e., a constant) 04 to w and save into w

movwf 26
Move the contents of w into File h26 (save results)
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2-Stage Pipelining

BASIC architecture is divided into two parts

Any execution of memory access will be on the Data store and each store has its own bus

the fetch and execution processes can progress in parallel

Pipelining: While instruction n is being fetched, instruction (n 1) is being executed (see SAQ3.3)

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2-Stage Pipelining

BASIC architecture is divided into two parts

next current

Any execution of memory access will be on the Data store and each store has its own bus

the fetch and execution processes can progress in parallel

The instruction codes for both the current and the immediate next instructions are held in the two Instruction registers IR2 and IR1 respectively During each cycle, except for the first, one fetch and one execution are proceeding simultaneously

Lets explore in more details


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2-Stage Pipelining

Assume that, the PC has been reset to h000 and has just finished the Cycle 1 (Fetch) Cycle 2 (Fetch) Increment PC (h001) to point to inst 2 Simultaneously move the inst word 1 down the pipeline from IR1 to IR2 PC (h001) to the Program stores address bus The inst word 2 then appears on the Program stores data bus and is loaded into IR1 Cycle 2 (Execute) The operand address h25 moves to the FAR and out onto the FA bus The content is read onto the Data stores data bus and loaded into the FDR The ALU is configured to the Pass Through mode, which feeds the data through to the Working register

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2-Stage Pipelining

Cycle 3 (Fetch) Increment PC (h002) to point to inst 3 Simultaneously move the inst word 2 down the Pipeline from IR1 to IR2 PC (h002) to the Program stores address bus The inst word 3 then appears on the Program stores data bus and is loaded into IR1 Cycle 3 (Execute) The ALU is configured to the Add mode and the literal (which is part of inst word 2) is added to the data in W The ALU output, (NUM_1 + 4), is placed in W

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2-Stage Pipelining

Cycle 4 (Fetch) Increment PC (h003) to point to inst 4 Simultaneously move the inst word 3 down the Pipeline from IR1 to IR2 PC (h003) to the Program stores address bus The inst word 4 then appears on the Program stores data bus and is loaded into IR1 Cycle 4 (Execute) The operand address (i.e., NUM_2) h26 to the FAR and out onto the FA bus The ALU is configured to the Pass Through mode, which feeds the contents of W through to the FDR and onto the Data stores data bus The data in the FDR is written into the Data store at the address on the Data stores address bus and becomes the new data in NUM_2

Self-study: Example 4.1 (pp. 90-91)


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Q. How many cycles are needed to perform Fetch and Execute?

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2-Stage Pipelining

In PIC MCU, each instruction takes 4 clock cycles to execute


Q1: Decode Q2: Read Q3: Process Q4: Write To

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PIC: Instruction Set

Two categories of Instructions:


File Direct Literal

File Direct

Instructions that specify the File address where their target operand is located use this type of addressing; e.g., movf h25,w designates File h25 as the target

001000

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Instruction Set: File Direct

The leftmost six bits (#13 through #8): operation code, or op-code

Every instruction has a unique op-code, and it is this pattern that the decoding circuits use to define what type of instruction it is

The middle bit (#7) labeled d defines the destination of the outcome

If the destination is W and the d bit is 0

addwf h30, w addwf h30, f


addwf h30, w Before execution: After execution: addwf h30, f Before execution: After execution: w x x+y h30 y y 001000

If the destination is F and the d bit is 1

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x x

y x+y

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Instruction Set: File Direct

The leftmost six bits (#13 through #8): operation code, or op-code

Every instruction has a unique op-code, and it is this pattern that the decoding circuits use to define what type of instruction it is

The middle bit (#7) labeled d defines the destination of the outcome

If the destination is W and the d bit is 0

addwf h30, w addwf h30, f

If the destination is F and the d bit is 1

The rightmost seven bits (#6 through #0) define the File address

E.g. File h25 is b010_0101 Only a bank of 27 = 128 Files can be directly addressed; that is File 00 through File h7F

001000

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Instruction Set: Literal

The leftmost six bits (#13 through #8): operation code, or op-code

Every instruction has a unique op-code, and it is this pattern that the decoding circuits use to define what type of instruction it is

The lower 8-bit zone is the byte constant itself

The outcome is always in the Working register and so there is no need for a destination bit nor Data store address

The literal is limited to the range b00000000 b11111111 (h00 hFF, or decimal zero through 255),

Remember, the Working register is only 8-bits wide

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PIC16F84A

Let us now extend the BASIC architecture (discussed earlier) to PIC16F family Two parts in common:

Fetch unit Execute unit

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Fetch Unit

Primarily concerned in fetching instructions down into the Pipeline from the Program store Program Store (16F84A)

Flash EEPROM type 1024 (1k) instructions can be stored (8192 instructions in PIC16F876/7) 14-bit long instruction

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Fetch Unit Program Store

Primarily concerned in fetching instructions down into the Pipeline from the Program store Program Store (16F84A)

Flash EEPROM type 1024 (1k) instructions can be stored (8192 instructions in PIC16F876/7) 14-bit long instruction

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Fetch Unit Program Counter

Program Counter

13-bit register normally increments after each fetch, effectively acting as a binary counter However, there are a few instructions, (such as goto, call) that will cause execution of the program to jump to another part of the Program store Thus PCs normal up count can be overridden If the program attempts to go to any instruction above 1024, the address will wrap around back to address zero
6

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Fetch Unit Program Counter

Program Counter

In all cases the PC will be cleared on a reset; that is, the first instruction is always in location h000 (reset vector) In 16F84A, out of the 13-bits, only the lower 10-bits are physically connected (hardwired)

PIC16F628 uses 11-bits (211 = 2K), 16F874 uses 12-bits (212 = 4K), 16F877 and 16F886 uses all 13 bits (213 = 8K)

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Fetch Unit Instruction Decoder

Instruction Decoder

uses logic circuitry to decode the 6-bit op-code of the 14-bit instruction gates the appropriate addresses and data to the correct execution units circuitry configures the ALU

All PIC MCU have an internal circuitry to generate time-related sequences of operations commanded by the Instruction Decoder

Note that, 16F84A does not have onchip oscillator

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Fetch Unit Instruction Decoder

The oscillator is frequency-divided as to give four internal nonoverlapping quadrature clocks


Q1: Decode Q2: Read Q3: Process Q4: Write To A consequence is that an instruction cycle takes four external clock periods (1/fosc) to complete

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Example: with a 4MHz crystal, the instruction cycle rate is fosc/4, or 1MHz => 1 instruction takes 1us (4/fosc) to complete

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Building Clock Oscillator

Needs

One Mod-4 counter One 2:1 decoder

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Data Flow inside 16F84A

movf h25, w
001000_0_0100101 ffffffff

001000_0_0100101

001000

0100101

d=0

d=1

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Data Flow inside 16F84A

addlw h04
111110_00000100

111110_00000100

111110

00000100

d=0

d=1

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Data Flow inside 16F84A

movwf h26
000000_1_0100110 ffffffff

000000_1_0100110

000000

0100110

d=0

d=1

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MCU Elements Oscillator

Some MCUs have on-chip oscillator that supplies synchronized clock pulses

Ensures harmonic and synchronous operation of all circuits of the microcontroller

Usually configured to use quartz crystal or ceramic resonator for frequency stabilization Instructions are not executed at the rate imposed by the oscillator itself, but several times slower (do you remember WHY?)

Because each instruction is executed in several steps In some MCU, the same number of cycles is needed to execute any instruction, while in others, the execution time is not the same for all instructions

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Clock Oscillator and Instruction Cycle


Some popular clock frequencies for PIC16 series For the fastest clock frequency, 20 MHz (the instruction cycle freq. is 5 MHz => 5,000,000 instructions per sec; period of 200 ns) The slightly cheaper version of the controller, the 16F84-04, with maximum clock frequency of 4 MHz (1 us)

Simple timing applications, using software delay loops and the counter/timer

A popular clock frequency is 32.768 kHz (122.07 us)


The result is very low power, but strictly no high-speed calculations! E.g., digital clock, wristwatches (WHY used?)
http://seng.ulster.ac.uk/eme/sidk/quintessential/Chapters_2ed/Chapter4/ch4_9_2.htm

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Clock Oscillator

Two types of oscillator circuit in common use in microcontrollers

Resistor-Capacitor, P = CV2f

See notes for details

Crystal Oscillator

Depends on the piezo-electric properties of quartz crystal

Any mechanical distortion of the material causes a voltage to be produced across opposite sides of it; similarly, if a voltage is applied to the material, a mechanical distortion results Crystal vibration occurs at a fixed and remarkably stable frequency a great advantage

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PIC16F84A Clock Oscillator

Four different oscillator modes, allowing implementation of RC, crystal or ceramic oscillators, and external clock source

Selected by user: Configuration Word

RC resistorcapacitor

An external R-C must be connected to pin 16. This is the lowest cost way of getting an oscillator, but should not be used when any timing accuracy is required. This mode is intended for low-frequency crystal applications (up to 200kHz) and gives the lowest power consumption possible. This is the standard crystal configuration (1MHz 4MHz) This is a higher drive version of the XT configuration (4MHz 20MHz). It recognizes that higher frequency crystals, and ceramic resonators in general, require a higher drive current. It leads to the highest current consumption of all the oscillator modes.

LP low power

XT crystal

HS high speed

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PIC16F84A Clock Oscillator

Four different oscillator modes, allowing implementation of RC, crystal or ceramic oscillators, and external clock source

Selected by user: Configuration Word


Pin 16

Pin 15

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Problems (E10.1, SAQ10.2)

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Q. Find out fosc

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PIC16F84A Clock Oscillator


Fig. Typical supply current vs. Clocking frequency

All PIC MCU families feature a Sleep mode which effectively turns off the internal clock oscillator => using sleep instruction. Once asleep, the contents of the Data store are retained provided that the supply voltage remains above 1.5V (VDR in the Data sheet). The PIC MCU can be awakened either by resetting the device, by an enabled interrupt request, or if the enabled Watchdog timer overflows. [SID pp. 277] Dr. KHAN WAHID
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Basic Microprocessor Architecture

Special function registers (SFR) Stack pointer

A last in, first out (LIFO) special memory structure characterized by only two operations push and pop At any given time, the SP holds the address of the next free location in the stack

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PIC16F84A 8-level Stack

Eight 13-bit registers are stacked below and are connected to the PC

Used to hold past states of the PC to remember the jumping-off point when a subroutine is called up Also used for goto instruction No push and pop instructions in 16F84A Details to follow

Call subroutine (push PC to stack) Return from subroutine (pop PC from stack)
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PIC16F84A Microcontroller

We have so far discussed the Fetch unit Now let us look into the Execute unit

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Acknowledgments

These slides have been prepared by Khan Wahid and may contain material copyrighted by:

The Quintessential PIC Microcontroller, Sid Katzen, 2nd edition, 2005, ISBN: 978-1-85233-942-5 Designing Embedded Systems with PIC Microcontrollers: Principles and Applications, Tim Wilmshurt, 2007, ISBN: 9780750667555 PIC16F84A Data Sheet, 35007b, Microchip Technology Inc. Microprocessors/Microcontrollers Course Notes, Delmar Cengage Leaning, ISBN: 1435453816 PIC Microcontroller and Embedded Systems using Assembly and C for PIC18, Mazidi, Mckinlay, Causey, 2008 PIC Microcontrollers, Milan Verle, free online (www.mikroe.com/en/books/picmcubook/)

Dr. KHAN WAHID 2010-11 (Term 1)

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