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E Part 4
by Ray Marston
Field-Effect Transistors
T Ray Marston looks at practical VMOS power FET circuits in this final episode of
this four-part series.
1 AUGUST 2000/Nuts & Volts Magazine ©T & L Publications, Inc. All rights reserved.
Figure 10.
Method of
boosting the
output of
Figure 9 by
driving three
VN66AFs in
Figure 6. parallel.
Typical
saturation
characteristics
of the
VN66AF. Figure 11. If
inductive loads
such as relays
(a) or bells,
buzzers, or
speakers (b) are
used in digital
switching
circuits,
protection
speed analog power switch. diodes must
be wired as
DIGITAL CIRCUITS shown.
©T & L Publications, Inc. All rights reserved. Nuts & Volts Magazine/AUGUST 2000 2
wired in the drain-to-gate negative
DC LAMP CONTROLLERS feedback loop and sets the quiescent
drain voltage at roughly half-supply
Figure Figures 16 to 18 show three value, so that maximal signal level
15. simple but useful DC lamp controller swings can be accommodated before
Warble- circuits that can be used to control clipping occurs.
tone the brilliance of any 12V lamp with When — in the Figure 19 circuit
six
watt a power rating of up to six watts. A — R3 has a value of zero ohms, the
alarm. VMOS power FET can, for many pur- circuit exhibits an input impedance
poses, be regarded as a voltage con- that, because of the AC negative
trolled constant-current generator; feedback effects, is roughly equal to
thus, in Figure 16, the VMOS drain the parallel values of R1 and R2 divid-
current (and thus the lamp bright- ed by the circuit’s voltage gain (RL x
ness) is directly controlled by the gM. If R3 has a finite value, the input
variable voltage of RV1’s slider. The impedance is slightly less than the R3
circuit thus functions as a manual value, unless AC feedback-decoupling
lamp dimmer. capacitor C2 is fitted in place, in
The Figure 17 circuit is a simple which case, the input impedance is
modification of the above design, slightly greater than the R3 value.
the action being such that the lamp Figure 20 shows how to bias the
turns on slowly when the switch is VN66AF for common drain (voltage
closed as C1 charges up via R3, and follower) operation. Potential divider
turns off slowly when the switch is R1-R2 sets the VMOS gate at a quies-
opened as C1 discharges via R3. cent value slightly greater than half-
The Figure 18 circuit is an effi- supply voltage. When the R3 value is
Figure 16. Simple DC cient ‘digital’ lamp dimmer which zero, the circuit input impedance is
Figure 17. Soft-start controls the lamp brilliance without equal to the parallel values of R1 and
lamp dimmer. lamp switch.
causing significant power loss across R2. When the R3 value is finite, the
the VMOS device. The two 4011B input impedance equals the R3 value
CMOS gates form an astable multivi- plus the parallel R1-R2 values. The
brator with a mark/space ratio that input impedance can be raised to a
is fully variable from 10:1 to 1:10 via value many times greater than R3 by
RV1; its output is fed to the VN66AF adding the C2 ‘bootstrap’ capacitor
Figure 18. gate, and enables the mean lamp to the circuit.
High- brightness to be varied from virtually Finally, Figure 21 shows a practi-
efficiency fully-off to fully-on. In this circuit, the cal example of a VMOS linear appli-
DC lamp VMOS device is alternately switched cation. The circuit is wired as a class-
dimmer. fully on and fully off, so power loss- A power amplifier which, because of
es are negligible. the excellent linearity of the VN66AF,
gives remarkably little distortion for
LINEAR CIRCUITS so simple a design. The VN66AF
must be mounted on a good
VMOS power FETs can, when heatsink in this application. When
suitably biased, easily be used in the design is used with a purely
In the manually activated either the common source or com- resistive 8R0 load, the amplifier
Figure 19. Biasing delayed-turn-off circuit of Figure 13, mon drain (voltage follower) linear bandwidth extends up to 10MHz. NV
technique for C1 charges rapidly via R1 when modes. The voltage gain in the com-
FET
linear common push-button switch PB1 is closed, mon source mode is equal to the
source operation. and discharges slowly via R2 when product of RL and the device’s gM or
PB1 is open. The load thus activates forward transconductance. In the
as soon as PB1 is closed, but does case of the VN66AF, this gives a
not deactivate until some 10s of sec- voltage gain
onds after PB1 is released. of 0.25 per
In the simple relay-output timer ohm of RL
circuit of Figure 14, the VMOS value, i.e., a
device is driven by the output of a gain of x4 Figure 21.
manually triggered monostable or with a 16R Simple class-A
one-shot multivibrator designed load, or x25 audio power
around two gates of a 4001B CMOS with a 100R amplifier gives
1% THD at 1W.
IC; the relay turns on as soon as PB1 load. The volt-
simple but useful digital applications is closed, and then turns off auto- age gain in
of the VN66AF. The water- or touch- matically again some pre-set ‘delay the common
activated power switch of Figure 12 time’ later. The delay is variable from drain mode is
could not be simpler: when the a few seconds to a few minutes via slightly less
touch contacts and water probes are RV1. than unity.
open, zero volts are on the gate of Finally, Figure 15 shows the A VMOS power
the VN66AF, so the device passes practical circuit of an inexpensive FET can be biased
zero current. When a resistance but very impressive alarm-call gener- into the linear com- Figure 20.
(zero to 10s of megohms) is placed ator that produces a ‘dee-dah’ mon source mode Biasing
across the contacts (by contact with sound like that of a British police car by using the stan- techniques for
skin resistance) or probes (by water siren. The alarm can be turned on dard enhancement- linear common
drain (voltage
contact), a substantial gate voltage by closing PB1 or be feeding a ‘high’ mode MOSFET bias- follower)
is developed by potential divider voltage to the R1-R2 junction. The ing technique operation.
action and the VN66AF passes a circuit uses an 8R0 speaker and gen- shown in Figure 19,
high drain current, thus activating erates roughly six watts of output in which the R1-R2
the bell, buzzer, or relay. power. potential divider is
3 AUGUST 2000/Nuts & Volts Magazine ©T & L Publications, Inc. All rights reserved.