American Technical Ceramics, 2007

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APPLICATION NOTE 026
CAPACITOR PI NETWORK FOR IMPEDANCE MATCHING
PI Matching Networks
Designing matching networks is one of the key aspects of RF/Microwave design. A lossless network that
matches an arbitrary load to real impedance has to have at least two reactive elements. However, two elements
do not give control over the bandwidth and the degree of match simultaneously. Three-element matching
networks, i.e. Pi- and Tee-networks, provide additional control of the frequency response.
In this application note we explore the idea of designing an all-capacitor Pi matching network by using one of the
elements beyond its self-resonant frequency, when it has become inductive rather than capacitive. Essentially,
the effective series inductance (ESL) of the series element in the Pi network is utilized. The design process is
enabled via the broad-band accuracy of the Modelithics Global capacitor models, in particular those for ATC
600L 0402 capacitors. The use of method of moments co-simulation, wherein numerical electromagnetic
simulation is used to represent the distributed interconnects and discrete models are used for the lumped
components, is also demonstrated.
Capacitors Used as Induct ors after SRF
Port
P2
C
Cp
R
Rs
C
C
L
Ls
Port
P1

Figure 1 Simple circuit model.
-0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 -1.0 1.0
Inductive
Capacitive
Capacitive
Inductive
SRF

Figure 2 Frequency response of simple model (S21 on left, S11 on right).
Figure 1 shows a simplified two port equivalent circuit of a capacitor; C Capacitance, Ls Series Inductance,
Cp Parallel capacitance, Rs Series resistance. As there are three reactive components in the circuit model,
there are at least two resonant frequencies the series resonant frequency (SRF) and the parallel resonant
frequency (PRF). At the SRF the capacitors impedance is a minimum, while at the PRF it is a maximum.
Usually, the parallel capacitance (Cp) is much smaller than the nominal component value (C) and the PRF
occurs at a higher frequency than the SRF.
Figure 2 shows a 2-port S-Parameter simulation of the circuit shown in Figure 1. It can be seen that at above the
resonant frequency the capacitor acts like an inductor. In general, the SRF sets the frequency limit on the useful
operating range of a capacitor. But in this application, we exploit this phenomenon and use a capacitor as an
inductor after SRF to match a complex load to a real load.





American Technical Ceramics, 2007

PI Network
Term
Term2
Z=25+j*12
Num=2
C
C2
C=1.0 pF
Term
Term3
Z=50
Num=2
C
C3
C=1.0 pF
C
C1
C=27 pF
C
C6
C=1.0 pF
C
C5
C=1.0 pF
C
C4
C=27 pF
Term
Term4
Z=50 Ohm
Num=1
Term
Term1
Z=50 Ohm
Num=1

Figure 3 Simplified equivalent circuit.
Load
Source
Shunt C
Shunt C
Series L

Figure 4 Typical path traced on the Smith Chart at
the center frequency.
The simplified schematic of the matching network is shown in Figure 3. The design specification is to match an
impedance of 25+j12 to a 50 load at 1.6GHz. As mentioned earlier, the basic idea is to use the capacitor C1
(27pF) in the series arm of the PI network, as an inductor after SRF. The new pad-scalable model for ATC 600L
capacitors (CAP-ATC-0402-101) and Rogers 60 mil-thick R04003 (r =3.6) substrate were used in the design.
The impedance transformation at the center frequency is illustrated in Figure 4. Figure 5 shows the layout of the
PCB. It is important to note that the inductance of interconnects does play a role in determining the SRF and
hence the effective equivalent series inductance.
CAP_ATC_0402_001_MDLXCLR1
ATC_600L_C3
Pad_Gap=G1 mil
Pad_Length=L1 mil
Pad_Width=W1 mil
Tolerance=1.0
Sim_mode=0
Subst=Sub
C=1 pF
CAP_ATC_0402_001_MDLXCLR1
ATC_600L_C2
Pad_Gap=G1 mil
Pad_Length=L1 mil
Pad_Width=W1 mil
Tolerance=1.0
Sim_mode=0
Subst=Sub
C=1 pF
CAP_ATC_0402_001_MDLXCLR1
ATC_600L_C1
Pad_Gap=G1 mil
Pad_Length=L1 mil
Pad_Width=W1 mil
Tolerance=1.0
Sim_mode=0
Subst=Sub
C=27 pF
VAR
Size402
G1=16
Sub="MSub3"
L1=15.5
W1=28
Eqn
Var
Term
Term2
Z=25+j*1
Num=2
Term
Term3
Z=50
Num=2
Term
Term1
Z=50 Ohm
Num=1
VAR
VAR1
len=4.5
tand=0.0027
er=3.62
Eqn
Var
S_Param
SP1
Step=50 MHz
Stop=5 GHz
Start=100 MHz
S-PARAMETERS
MTAPER
Taper6
L=24 mil
W2=W1 mil
W1=14.1 mil
Subst=Sub
VIAHS
V4
T=1.7 mil
H=60 mil
D=15 mil
MLIN
TL10
L=len mil
W=24 mil
Subst=Sub
MLIN
TL9
L=len mil
W=24 mil
Subst=Sub
VIAHS
V3
T=1.7 mil
H=60 mil
D=15 mil
MTAPER
Taper3
L=24 mil
W2=W1 mil
W1=14.1 mil
Subst=Sub
MTEE_ADS
Tee1
W3=14.1 mil
W2=14.1 mil
W1=14.1 mil
Subst=Sub
MLIN
TL3
L=25 mil
W=14.1 mil
Subst=Sub
MLIN
TL5
L=18.6 mil
W=14.1 mil
Subst=Sub
MTAPER
Taper7
L=72 mil
W2=14.1 mil
W1=138.23 mil
Subst=Sub
MLIN
TL1
L=25 mil
W=14.1 mil
Subst=Sub
MTAPER
Taper1
L=24 mil
W2=W1 mil
W1=14.1 mil
Subst=Sub
MSUB
MSub3
Rough=0 mm
TanD=0.0021
T=1.7 mil
Hu=1.0e+033 mm
Cond=1.0E+50
Mur=1
Er=er
H=60 mil
MSub
MTAPER
Taper2
L=24 mil
W2=14.1 mil
W1=W1 mil
Subst=Sub
MLIN
TL2
L=25 mil
W=14.1 mil
Subst=Sub
MTEE_ADS
Tee2
W3=14.1 mil
W2=14.1 mil
W1=14.1 mil
Subst=Sub
MTAPER
Taper8
L=72 mil
W2=14.1 mil
W1=138.23 mil
Subst=Sub
MLIN
TL8
L=25 mil
W=14.1 mil
Subst=Sub
MLIN
TL11
L=18.6 mil
W=14.1 mil
Subst=Sub

Figure 5.ADS schematic of the layout used.






VAR
Size0402
G1=16
Sub="MSub3"
L1=15.5
W1=28
Eqn
Var
CAP_ATC_0402_001_MDLXCLR1
ATC_600L_C1
Pad_Gap=G1 mil
Pad_Length=L1 mil
Pad_Width=W1 mil
Tolerance=1.0
Sim_mode=0
Subst=Sub
C=27 pF
Term
Term2
Z=50 Ohm
Num=2
Term
Term1
Z=50 Ohm
Num=1
MLIN
TL2
L=25 mil
W=14.1 mil
Subst=Sub
MTAPER
Taper2
L=24 mil
W2=14.1 mil
W1=W1 mil
Subst=Sub
MTAPER
Taper1
L=24 mil
W2=W1 mil
W1=14.1 mil
Subst=Sub
MLIN
TL1
L=25 mil
W=14.1 mil
Subst=Sub
(-Y21)
(Y11+Y12) (Y22+Y21)

1
2
0
3

Figure 6.ADS schematic used to extract Ls (right). Extracted values for nominal Capacitance (C) and series
Inductance (Ls) (left)
Figure 6 shows the schematic of the circuit used to extract the equivalent capacitance (C) and inductance (Ls)
of the series element in the matching network; these values are found by using Y21. When -Imag(Y21) >0, C=-
Imag(Y21)/(2f), and when -Imag(Y21) <0, Ls=1/(Imag(Y21)2f). The microstrip and taper sections are
included with the capacitor effects in this calculation. It is interesting to note that the Ls value is fairly constant at
~2.2 nH after the SRF.
Results
Figures 7 and 8 compare the measured result with circuit simulation and method-of-moments (MoM) co-
simulation results. The layout of the PCB used in the MoM simulation is shown in Figure 9. The taper at the
input and the output side is used to match the 50 line (not shown in the layout) with the mounting pads for the
capacitor. The MoM co-simulation results provide improved comparisons to the measured data, as the
interconnect and ground-via effects are more accurately represented.
1 2 3 4 0 5
-15
-10
-5
-20
0
MoM
Cosimulation
Measured
Circuit
Simulation

1 2 3 4 0 5
-30
-20
-10
-40
0
MoM
Cosimulation
Measured
Circuit
Simulation

Figure 7 Comparison between simulated and measured response when port 2 is terminated with 50.

The properties of the substrate (thickness and
r
) used are critical in obtaining a good correlation between
measured and simulated data. The substrate-scaling features of the Modelithics Global models enable all
substrate-related parasitics to be taken into account. To illustrate this feature, a simulation comparing two
substrates is shown in Figure 11.






1 2 3 4 0 5
-15
-10
-5
-20
0
MoM
Cosimulation
Measured
Circuit
Simulation

1 2 3 4 0 5
-30
-20
-10
-40
0
MoM
Cosimulation
Measured
Circuit
Simulation
Figure 8 Comparison between simulated and measured response when port 2 is terminated with 25+j12.

Figure 9 Layout of the PCB used in the MoM Simulation.

Figure 10 Photograph of the matching circuit.
1 2 3 4 0 5
-20
-15
-10
-5
-25
0
freq, GHz
RO4350, 60mils
RO4350, 4mils

1 2 3 4 0 5
-30
-20
-10
-40
0
freq, GHz
RO4350, 60mils
RO4350, 4mils
Figure 11.Comparison of simulated results Case1: RO4350 60 mils substrate, Case2: RO4350 4 mils substrate
and Case3: RO4350 60 mils substrate using ideal components. Port 2 is terminated with 25+j12










About thi s work

This work was performed as a collaboration between American Technical Ceramics and Modelithics,
Inc, funded by ATC. University of South Florida MS student Aswin J ayaraman assisted with the
development of this material under grant funding provided by Modelithics, Inc..


Contact i nformati on


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