Establishment of a Design Methodology for High-performance Circuits Based on Automatic Optimization Methods

-abstractThe heterogeneity of novel electronic systems implies the evolution towards nanometerscale CMOS processes along with the increasing development of systems-on-a-chip (SoCs) and systems-in-a-package (SiPs) including mixed analog and digital circuitry combined with mircro-electro-mechanical systems (MEMS). The conception of these systems requires a very difficult design effort, one of the main drawbacks residing in a gap of the current analog design methodologies, which cannot assure an optimal, time-effective system level solution when the circuits are implemented at technological level.

De facto, the complex analog parts should be recursively optimized based not only on
system-level requirements but also on process limitations and imperfections. Furthermore, high-level behavioral models used for chip-level simulations, which can be re-adjusted to changes at the transistor level, should be employed. In this context, the aim of this thesis is to establish an efficient analog design methodology, the algorithms and the corresponding design tools which can be employed in the dynamic conception of weakly non-linear continuous-time (CT) functions, assuring that the performance figures for a complete system can be rapidly investigated, but with comparable accuracy to the low-level evaluations. This methodology can be easily interfaced with the existing digital, mixed-signal and multi-domain conception paradigms, for a complete system characterization. In a first part of this work, we present the novel design methodology based on the automatic optimization process of transistor-level cells using a modified Bayesian Kriging approach and the synthesis of robust high-level analog behavioral models in environments like Mathworks Simulink, VHDL-AMS or Verilog-A. The macro-model extraction process involves a complete set of analyses (DC, AC, transient, parametric, Harmonic Balance) which are performed on the analog schematics implemented on a specific technology process. Then, the extraction and calculus of a multitude of figures of merit assures that the models include the low-level characteristics and can be directly regenerated during the optimization process. The optimization algorithm uses a Bayesian method, where the evaluation space is created by the means of a Kriging surrogate model, and the selection is effectuated by using the expected improvement (EI) criterion subject to constraints. The objectives are considered along with 2 types of constraints: strong constraints (nonlinearities, distortions) and normal constraints (offsets, impedances, gains, bandwidths), which are adequate for analog

characterization, ensuring robust optimal solutions on a limited number of evaluations. A conception tool was developed (SIMECT), which was integrated as a Matlab toolbox, including all the macro-models extraction and automatic optimization techniques. The developed methodology and tools were applied to the conception and optimization of two CT Sigma-Delta modulator architectures using micro-mechanical resonators of type Lamb Wave Resonator (LWR). Realistic design conditions based on a 350nm Austrianmicrosystems technology process and measured responses for the LWRs provided by CEA-LETI allowed precisely characterizing the feasibility and the performances of the resulted Sigma-Delta structures.