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EE115C Digital Electronic Circuits Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics
In this exercise, you will learn how to enter simple schematic and run a simulation to obtain characteristics of transistors for our technology (gpdk090).

Entering Design Schematic

In the library browser, click to select ee115c library and then click File > New > Cell view to create schematic view for the new cell.

Type MOS_IV in the Cell Name field as shown. Click OK.

After you click OK, Virtouso Schematic Editing window will pop up.

Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics

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Next, we will create simple schematic consisting of an NMOS, a PMOS, and a few bias voltage sources. To create an instance, you can click Create > Instance in the Virtuoso schematic editor or simply use shortcut key i. The following dialog will appear:

Click Browse to select a library component.

Another window will show up.

Choose gpdk090 library, nmos1v cell, symbol view. (note: while you are doing this, the Add Instance window is getting updated as well). Note: You can find all the cells in a library under Everything Category. Alternatively, and to find cells faster, you can choose an appropriate category first and choose the desired cell (as shown above). For this Show Categories much be checked. Click Close and point your mouse cursor over the Virtuoso editing window. Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics 2

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Left click to place the instance into a desired location. As you move the mouse away, you will see a contour for another instance (shown in yellow); press Esc key to exit from Add Instance mode and the yellow symbol will disappear.

Now, add instance of a PMOS device (press i) and type pmos1v as the Cell name.

Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics

Electrical Engineering Department The Virtuoso schematic editing window should look like this:

EE115C

Now we can adjust the size of the transistors by editing instance properties. Left click on the NMOS to select the component. Then, press q to modify its properties. Modify the transistor width and set Total Width to 240nm (this is 2x the minimum channel width), then press Tab key and the Finger Width will be set to the same value.

Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics

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Click OK and repeat this for PMOS to set Total Width and Finger Width to 480nm. Next, instantiate DC voltage source (cell vds from analogLib library) to bias the transistors.

Since we are going to sweep values of gate and drain voltages, specify parametric values VGS and VDS as DC voltage under object properties. The (almost final) schematic should look like Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics 5

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this (use Create > Wire menu or simply press w key to enter wiring mode / Esc to exit):

It is a good practice to periodically save your work by clicking on Check and Save button . You can also save your work from the drop-down menu File > Save (or File > Check and Save). The last step is to add zero valued voltage sources in series with the transistors in order to be able to probe the currents. The final schematic looks like this:

Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics

Electrical Engineering Department

EE115C

Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics

Electrical Engineering Department

EE115C

Spectre Simulation
Invoke simulation environment by choosing Launch > ADE L from the Virtuoso schematic editor window. Note: If you are asked to check the license for Analog_Design_Environment_XL, choose Yes or Always. (See Below). *_XL tools are offered in Cadence 6 and usually prove to be much more capable of their *_L counterparts.

The Analog Design Environment window will pop up:

The first step is to setup simulation environment, including models, input sources, type of analysis etc. From the Virtuoso Analog Design Environment window, choose Setup > Simulator/Directory/Host and set the simulation directory to ~/ee115c/cadencelabs/simulation Click OK and go to Setup > Model Libraries and set the Model Library File to
/usr/public.2/ee115c/cadence-labs/gpdk090_v3.4/models/spectre/gpdk090.scs

and set Section to NN as shown below. Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics 8

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Note: Make sure all other model files, if any, are unchecked in Model Library Setup. (As shown above). Alternatively, you can remove Model Files that are not used. Click OK and go to Variables > Edit to specify initial values for VGS and VDS parameters. Enter VDS in the Name field and 0.5 in the Value (Expr) field and click Add to save the variable settings. Repeat this for VGS, you should get the window as shown on the left. Click OK.

Go to Analyses > Choose, following entry form will show up.

Specify the parameters for DC analysis to sweep VDS from 0 to 1V in steps of 50mV. Click OK.

Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics

Electrical Engineering Department Your Analog Design Environment window should now look like this:

EE115C

Next, select outputs to be plotted: go to Outputs > To Be Plotted > Select On Schematic. Schematic window will pop up, click on the positive terminal of dummy voltage sources to select IDS for NMOS and PMOS as shown below.

Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics

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Electrical Engineering Department The Artist environment window should now look like this:

EE115C

Before closing the Virtuoso Analog Environment window, it is a good idea to save design settings in a state file, so we can load it up next time. To do this, click on Session > Save State and set State Save Directory to ~/ee115c/cadence-labs/.artist_states

and save state name in the Save As field as state_MOS_IV. Next time you run Cadence, you can simply load the simulation settings from this file.

Note: when you are loading up the file, dont forget to specify the correct path (in our case, it is: ~/ee115c/cadencelabs/.artist_states).

Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics

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The settings so far would generate I-V curve for a single value of VGS variable (0.5V). In order to sweep VGS, go to Tools > Parametric Analysis and set the parameters as shown below:

Save these settings in the Parametric Analysis window by selecting File > Save. The following dialog box will pop up.

Click Save to save the settings for later use (you can load the setting back using File > Load). In the Parametric Analysis window, click Analysis > Start - Selected to create netlist and run parametric simulation. After the simulation finishes, you will get a plot of overlapped I-V curves for NMOS and PMOS that look like this: Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics 12

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Finally, we are going to separate the plots into two sub-graphs. Click on the Split Current Strip button ( ) as shown in the figure above. You can also do this through Graph > Split Current Strip.

Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics

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We can format the axis to display currents on the same scale. Double-click on the Y-axis labels for the NMOS (left plot) and enter following settings.

Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics

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Do the same for PMOS (right plot) to plot both currents on a 0-175A scale. You can also color the lines and add labels (Graph > Add Label). The final plot could look like this:

Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics

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To Learn More About Virtuoso and Analog Artist (Schematic Editor)

To learn more about Virtuoso and other tools just type cdnshelp at your Unix prompt, and the documentation browser should appear. Open Table Of Contents as highlighted below to get familiar with Cadence online documentation.

Reading through the manuals and design practice are an essential part of your design experience!

Cadence 6 Tutorial 1.2: Getting Familiar with Technology, MOS IV Characteristics

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