A Transformer Inrush Mitigation Method for Series Voltage Sag Compensators

Po-Tai Cheng Wei-Ting Chen Yu-Hsing Chen Chih-Hsiang Wang CENTER FOR ADVANCED POWER TECHNOLOGIES
Department of Electrical Engineering National Tsing Hua University Hsin-Chu, 30013, TAIWAN ptcheng@ee.nthu.edu.tw; g923916@oz.nthu.edu.tw; d937904@oz.nthu.edu.tw
AbstractVoltage sags are major power quality problems encountered by industries. Especially for high-tech companies which reside within inside industry park, any voltage sag event in the distribution system could affect many manufacturers and inflict significant losses. The voltage sag compensator, based on transformer-coupled series-connected voltage source inverter, is among the most cost-effective solution to protect sensitive loads. For the off-line sag compensator, one important issue is the transformer inrush at the start of sag compensation. The inrush current may trigger the over-current protection of the compensator inverter, and the transformer output voltage is greatly reduced due the magnetics saturation. Oversizing the transformer is a common approach to avoid the inrush current. However, this would dramatically increase the size and weight of the sag compensation system. This paper proposes a new technique for mitigating the inrush of the coupling transformer and preserving the output voltage for effective sag compensation. Detailed explanations of the proposed inrush mitigation technique are presented, and the effectiveness of the proposed scheme is verified by laboratory test results. The inverter-assisted commutation sequence of the bypass thyristors for fast start of the compensator is also presented and verified by test results. Keywords-voltage sag compensator; transformer inrush;voltage sags.

three-phase VSI and a coupling transformer for serial connection. Several manufacturers adopt this circuit topology for their voltage sag compensation products. The advantages of this circuit include its low switch counts and simple circuit structure.
Vtrs

Load Utility

Vtrp

Figure 1. Series voltage sag conpensator.

I.

INTRODUCTION

Power quality issues have received much attention in recent years. Survey results suggest that 92% of the interruptions at industrial installations are voltage-sag related [1]. In many countries, high-tech manufacturers often concentrate in industry parks, therefore any power quality events, especially voltage sags, in the utility grid can affect a large number of manufacturers. For example, a typical semiconductor fabhouse which process 200 mm wafers could suffer up to USD 1 million per voltage sag event. The losses will be much more severe for the current generation of 300mm-based production lines. In recent years, significant research efforts focus on utilizing pulse width modulated (PWM) voltage source inverters (VSIs) for voltage sag compensation. The transformer-coupled series compensator as illustrated in Fig. 1 has been presented in previous literatures [2-7] for three phase power systems. The compensator consists of a conventional

One important issue of this system is the transformer inrush at the start of sag compensation. The inrush current may trigger the over-current protection of the compensator inverter, and the transformer output voltage is also reduced due to the magnetics saturation. Eventually the system fails to compensate the voltage sag. Oversizing the transformer at more than the rated flux is a common approach to avoid the inrush current. However, this would dramatically increase the size and weight of the sag compensation system, which could be prohibitive due to the space constraint for many manufacturers in densely developed high-tech industry parks. In this paper, a new technique for mitigating the inrush of the coupling transformer is presented. By controlling the voltage injection of the sag compensator properly, the transformer inrush can be mitigated while preserving the output voltage for effective sag compensation. With the inrush mitigating technique, the transformer de-rating can be scaled down to maintain the compactness of the sag compensation system. A brief survey of inrush mitigation techniques is provided in this paper. Detailed explanation of the proposed inrush mitigation technique and test results will be presented. The inverter-assisted commutation sequence of the bypass thyristors for fast start of the compensator is also presented and verified by test results.

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vcmd<0
Voltage Sag Detection

VSI off Bypass Switch on

vcmd
vcmd> 0
VSI on Bypass Switch off Thyristor Control & Commutation

van vbn vcn

qdc qdp

vqp
Disturbance filter

vfqp
Holding

vrqp vrdp

+ +

icn ibn ian

vcqp vcdp
qdp abc

Utility

vdp

vfdp

vax vbx0 vcx0

Inrush Suppression
0

vax1 vbx1 vcx1 (Vcomp )

1

VSI

vcmd

(Vcomp )

Critical load

Figure 2. Control diagram of series voltage sag compensator.

II.

SURVEY OF INRUSH MITIGATION

block will issue the compensation command. The threshold can be adjusted based on the sag sensitivity of critical loads. The compensation voltage command (vcqp, vcdp) is determined by the difference between the pre-fault voltages (vrqp, vrdp) stored in the holder and the faulted voltages (vqp, vdp). vcqp and vcdp are then transformed into the three-phase voltage commands vax0, vbx0, and vcx0. The inrush mitigation procedures will adjust the shape of the original voltage commands to alleviate the inrush, and then apply the modified commands vax1, vbx1, and vcx1 to the PWM inverter. The basic principle of the proposed inrush suppression is to control the injection voltage so that the flux linkage of transformer does not exceed the pre-determined maximum flux linkage (m). This can be achieved by cutting off the voltage applied to the transformer when the flux linkage reaches m. Assume the original compensation voltage command, its projected flux linkage and the magnetizing current are Vcomp0 , 0 and i0 respectively. The modified compensation voltage command, its projected flux and current are Vcomp1 and 1 and i1 respectively. The flux linkages developed by Vcomp0 and Vcomp1 can be expressed as follows, assuming no residual flux
0 0 = Vcomp dt ; 1 1 = Vcomp dt

Several inrush mitigation methods have been proposed in the past. The conventional approach is to gradually increase the applied voltage on the transformer, by means of electronic softstart control [8] or by using reactor starting method [9], so the transformer flux will not exceed the saturation knee of the B-H curve. Another approach is to apply the voltage at a proper point-on-wave (like the peak of the sine wave) [10][11], this could also prevent the developed flux from exceeding the saturation knee. However, the aforementioned methods may seriously impede the capability of the sag compensator because the injected voltage, which is vital for sag compensation, is compromised by these inrush mitigation methods. Another approach is to adjust the shape of the injection voltage by applying a certain form factor to avoid magnetics saturation [12]. In the constant form factor scheme, the injection voltage magnitude is scaled down by 50% for the first half cycle. In the adaptive form factor scheme, the injection voltage is adjusted based on the flux estimation for the first cycle The resulting reduction the peak compensation voltage may lower its effectiveness for diode front-end sensitive loads. The calculation of the form factor assumes the compensation voltage is sinusoidal, but the line voltages within industrial installations often contains significant harmonic distortion, in some cases the voltage THD may reach 8% due to high concentration of nonlinear loads. III. PROPOSED APPROACH TO INRUSH CURRENT MITIGATION

(1)

Fig. 3 shows an example of how the inrush suppression works.

The control block diagram of the series sag compensator is shown in Fig. 2. The controller uses the magnitude of the positive sequence component of the line voltages to identify voltage sags. The three phase voltages are transformed into the synchronous reference frame, and the positive sequence components are extracted by a disturbance filter, which is a low-pass filter and contains a notch at 120Hz. The disturbance filter can remove the negative sequence components and other harmonics components of the line voltages and extract only the positive sequence components. The voltage sag detection block then calculates the magnitude of the positive sequence voltages, if the magnitude is lower than a pre-determined threshold level (0.85-0.9pu for example), then the detection

Figure 3. The compensation voltage and developed flux linkage

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The compensation voltage is injected at t=t1. There is no need to modify the injection voltage at this moment as the flux linkage builds up within the transformer. As the projected flux linkage 0 exceeds m at t=t2, the risk of high inrush current becomes apparent because of magnetics saturation. The proposed mitigation scheme modifies the the original voltage command Vcomp0 into Vcomp1 by cutting off the voltage for t>t2 as illustrated,. The developed flux linkage 1 by Vcomp1 will not exceed m, thus the inrush can be avoided. For t>t3, negative half of the injection voltage lowers the flux linkage and the transformer is then out of the danger of sarturation. In this stage, no modification is needed. Although the flux linkage 1 is maintained at m and the inrush is avoided by the proposed mitigation scheme, the output voltage of the compensator is reduced and the effectiveness of voltage sag compensation is also affected. In addition, if the DC offset of the flux linkage remains, the modification of compensation voltage may continue and the effectiveness of the sag compensation might be reduced even further. To address this problem, two voltage adjustment schemes, the DC thrust and the AC thrust, are presented in the following. Both schemes can drive the flux linkage 1 to its steady state level at the end of the negative half cycle to avoid any further magnetics saturation. The DC thrust scheme is illustrated in Fig. 4. Assuming the voltage command is a sinusoid with the peak value of Vm, so the peak value of the steady state flux linkage can be easily calculated as Vm/2. In Fig. 6, the injection starts at an arbitrary instant t=t0. As the voltage increases, the developed flux linkage exceeds m at t=t1. The proposed scheme cuts off the voltage for the remaining positive half cycle and maintains the flux linkage at the level of m to avoid the inrush.

VDCT

Vm 2 = t3 t 2

(4)

The AC thrust scheme is shown in Fig. 5. The magnitude of the negative half cycle is adjusted to VACT so the flux linkage could reach its steady state value of (-Vm/2) at the end of the negative half cycle, which is described in (5).

(t 2 ) (t 3 ) = m +

V m V ACT = 2

(5)

Figure 5. Calculation of the increased voltage amplitude (VACT)

Therefore VACT can be calculated as

Vm (6) 2 The proposed inrush mitigation scheme can effectively suppress the inrush current when the inverter starts injecting the compensation voltage, so the size of the coupling transformer can be reduced, and eliminate the risk of tripping the over-current protection of the inverter. The subsequent DC thrust and AC thrust can drive the flux linkage into steady state immediately to avoid further saturation, and also increase the compensation voltage to make up the loss for the inrush mitigation. VACT = m +
IV. EXPERIMENTAL RESULTS

A. Transformer identification The circuit illustrated in Fig. 6 is to estimate the relationship between the flux linkage and the magnetizing
Figure 4. Calculation of the additional dc voltage value (VDCT)

A DC voltage thrust of VDCT is added to the negative half cycle of the voltage command as shown in Fig. 6. The purpose of VDCT is to drive the flux linkage to its steady state value of (Vm/2) at t=t3, the end of the negative half cycle as in (3)

(t 2 ) (t 3 ) = m +

Therefore the magnitude of the DC thrust can be derived as:

Vm V = (t 3 t 2 ) V DCT + m 2

(3)
Figure 6. B-H curve measurement circuit

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current of the transformer. An adjustable AC sinusoidal voltage vp is applied to the transformer. The specifications of the transformer is given in Table I
TABLE I. TRANSFORMER PARAMETERS Value 0.5 KVA 24 V(RMS) 63.5 V(RMS) 60 Hz 3.77 %

Parameters
Transformer rating Primary side voltage Secondary side voltage frequency Leakage inductance

In Fig. 6, R=24k and C=4F. The relationship between the capacitor voltage vo , the input voltage vp and the estimated flux linkage can be expressed as

Figure 8. Derived -I curve

v0

The experimental waveform of vo vs. ip is plotted in Fig. 7

1 1 v p dt = RC RC

With this data, we can choose appropriate m to achieve effective inrush mitigation. B. No load test To demonstrate the operation of the proposed inrush mitigation method, a no-load test on a single-phase transformer as illustrated in Fig. 9 is performed. The transformer is the same one identified in part A. The circuit parameters are given in Table .

(3)

ip
Vdc

vp

Cf

vs

Figure 7. vo vs. ip (Ch1: 5A/div, ch2: 1V/div)

The estimated flux linkage and the magnetizing current are summarized in Table II and Fig. 8.
TABLE III. TABLE II. (Wb-T) 0 0.0047 0.0095 0.0143 0.0189 0.0236 0.0284 0.0331 0.0378 0.0425 MEASURED FLUX LINKAGE AND CURRENT i (A) 0 0.3677 0.4865 0.5685 0.6364 0.7071 0.7778 0.8613 0.9687 1.1243 (Wb-T) 0.0473 0.0520 0.0567 0.0614 0.0662 0.709 0.0756 0.0803 0.0813 0.0832 i (A) 1.4086 1.8102 2.03617 2.9981 3.7901 4.6669 5.9397 8.4570 9.5459 12.5441
All in peak values.

Figure 9. No load test circuit

CIRCUIT PARAMETERS IN THE SINGLE PHASE TEST. Parameters

Inverter dc bus voltage

Value 280 V 20 kHz 26.7 V(RMS)

Inverter switching frequency Injected voltage command

Fig. 10 shows the waveforms of injected voltage command V*comp, projected flux linkage , and transformer output voltage vs, and the inverter output current ip respectively at the instant of inverter starting. The inverter injects a sinusoidal voltage with the peak value of 37.76 V into the transformer. Without any inrush mitigation, the inverter current reaches the peak of 23.6A near the end of the positive half cycle due to the magnetic saturation. In the meantime, the output voltage vs on the secondary side also decreases as the flux saturates.

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Figure 10. Without inrush mitigation

Figure 12. Inrush mitigation with DC thrust

Figure 11. Without inrush mitigation with m=0.084 Wb-T

Figure 13. Inrush mitigation with AC thrust

Fig. 11 shows the test results of the proposed inrush mitigation scheme. As the projected flux linkage reaches the pre-determined m of 0.084 Wb-T, the voltage command V*comp is suppressed to zero, so remains at the level of m for the remainder of the positive half cycle. The proposed scheme reduces the inrush current is down to 14A. Although the voltage command V*comp is suppressed to mitigation the inrush current, the reduction of the transformer output voltage vs is roughly the same as the voltage during inrush in Fig. 10. The loss of voltage due to the proposed inrush mitigation scheme is marginal. The test results of the proposed inrush mitigation scheme and the subsequent DC voltage thrust and the AC voltage thrust are given in Fig. 12 and Fig. 13 respectively. The voltage command V*comp is suppressed to zero as the flux linkage reaches m. As the beginning of the negative half cycle of V*comp, the voltage thrusts, VDCT in Fig. 12 and VACT in Fig. 13 are applied. The flux linkage in both figures reaches its steady state level at the end of the cycle, so the DC offset of the flux linkage is eliminated. Compare to the flux linkage in Fig. 10 and Fig. 11, where the DC offset of the flux linkage remains significant, both the DC voltage thrust and the AC voltage thrust can effectively reduce further risk of magnetics saturation by driving the flux into its steady state level.

The reduction of inrush current can be more effective if a lower m setting is chosen. Test results in Fig. 14 uses m of 0.0524 Wb-T, the inrush current is limited down to 3 A. However, a large portion of the command voltage V*comp is suppressed to zero to the loss of voltage in exchange for the reduction of peak flux linkage.

Figure 14. Inrush mitiation with m=0.0524 Wb-T

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C. Sag compensation system Fig. 15 shows the laboratory test bench for testing the sag compensator and the proposed inrush mitigation scheme of the coupling transformer. The sag compensator is installed on a 220V(RMS), three-phase power system. A balanced load of RLoad=93.33 and LLoad=2mH is applied. The control block diagram in Fig. 2 is implemented in a TMS320C6711 floating point Digital Signal Processor (DSP) of Texas Instruments (TI).

invA

Figure 17. Load voltages without inrush mitigation

invB

invC

Fig. 18 shows the test results of the proposed inrush mitigation scheme and the AC voltage thrust. The proposed inrush mitigation scheme effectively reduces the peak current down to 18A in the first half cycle and 10A in the second half cycle, a significant improvement compared to the test results in Fig. 16. The subsequent AC voltage thrust also increases the compensation voltage as shown in VinvA of Fig. 18. Then the transformer reaches steady state and V1AB is restored back to the pre-fault level.

Figure 15. Sag compensation system

A three-phase balanced fault with a duration of 0.1 second is introduced in the AC source. When the fault occurs, the load voltages reduce down to 50%, and the sag compensator is triggered into operation. Fig. 16 shows the operation of the sag compensator without employing the inrush mitigation scheme. At the instant when the sag compensator starts, a peak current of 92A near the end of the first half cycle and another peak of 41A near the end of the second half cycle can be clearly observed in Fig. 16. Fig. 17 shows the load voltages at the instant when the sag compensator starts compensation. The inrush current reduces the transformer output voltages so the load voltages are not restored back to its pre-fault level immediately.
Figure 18. Faulted voltage and load voltage

Figure 16. Without inrush mitigation Figure 19. Load voltages with inrush mitigation and AC thrust scheme

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mode 3

mode 2

mode 4

mode 1

q-axis

mode 5

mode 6

d-axis

mode 1: mode 2: mode 3: mode 4: mode 5: mode 6:

ia +, ib , ic ia +, ib +, ic ia , ib +, ic ia , ib +, ic + ia , ib , ic + ia +, ib , ic +

Figure 22. Vector diagram of the injected high frequency pulse signal

Figure 20. Injection voltage commands

Fig. 19 shows the three phase load voltages at the beginning of the compensation. The inrush mitigation scheme suppresses compensation voltage command as the projected flux linkage reaches its limit. Some sudden reduction of load voltages can be observed in Fig. 19. Compared to the test waveforms without inrush mitigation in Fig. 17, the reduction in voltage is marginal but the reduction of inrush current is very significant. Fig. 20 shows the compensation voltage commands of all three phases. The inrush mitigation scheme suppresses the voltage command as the projected flux linkage reaches its limit. The subsequent AC voltage thrust is also very clear as the peak value of the voltage command is adjusted to drive the flux linkage into its steady state level. V. FORCED COMMUTATION OF THYRISTOR (SCR)

Figure 23. Inverter output when turnning off

The sag compensator uses thyristor bypass to conduct load current while the grid voltage is normal. This off-line system can improve the operating efficiency significantly compared to the on-line compensator. A thyristor commutation scheme is proposed to cut off the thyristor current immediately upon detection of voltage sags. The proposed method uses the compensation inverter to produce voltage pulses across the thyristors upon detection of voltage sags, so the thyristor current is reduced immediately. As the thyristors are cut-off completely, the compensation voltages can be injected, By converting the thyristor current in the stationary dq frame as in Fig. 21, the required commutation voltage pulses can be quickly determined as in Fig. 22.

Figure 24. Conducting current when turnninf off

mode 3

mode 2

mode 4

mode 1

q-axis

mode 5

mode 6

d-axis

mode 1: mode 2: mode 3: mode 4: mode 5: mode 6:

ia +, ib , ic ia +, ib +, ic ia , ib +, ic ia , ib +, ic + ia , ib , ic + ia +, ib , ic +

This proposed commutation scheme expedites the turn-off process of the bypass thyristors. Fig.23 shows the high frequency voltage pulses of the inverter and Fig. 24 shows the current of the bypass thyristors are cut off instantaneously by forced commutation. VI. CONCLUSION

Figure 21. Vector diagram of the SCR conducting current

With the proposed inrush suppression scheme and the forced commutation scheme of thyristors, the sag compensator can deliver proper compensation voltages within very short time and without the risk of inrush current, which may trigger the over-current protection of the compensator. The inrush suppression scheme eliminates the need for de-rating the coupling transformer, therefore reduces the foot-print and

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improves the compactness of the compensator system. The proposed AC voltage thrust and the DC voltage thrust associated with the inrush mitigation can drive the flux linkage of the transformer into steady state in approximately one cycle to avoid further magnetics saturation at the starting of the compensator. The compensation voltage may suffer slight reduction due to the inrush mitigation, but the suppression of inrush current is very significant. The offline compensator system using thyristor bypass also improves the operating efficiency, and the thyristor commutation scheme allows fast cut-off of thyristor to ensure the compensation voltage can be delivered very quickly within the time constraint required by SEMI F47 standard. These features are attractive for many high-tech manufacturers because the space within the facility is limited. ACKNOWLEDGMENT This research is co-sponsored by Rhymebus Corporation, Taiwan and the National Science Council, Taiwan under grant NSC-93-2622-E-007-019-CC3. The authors would like to thank Mr. Jarsun Lin, Mr. Cheng-Ching Chang and several of their colleagues at Rhymebus for the support in the test facility. REFERENCES
[1] D. Sabin, An assessment of distribution system power quality, Elect. Power Res. Inst., Palo Alto, CA, EPRI Final Rep. TR-106249-V2, vol. 2, Statistical Summary Report, May 1996 D. M. Vilathgamuwa, A. A. D. R. Perera and S. S. Choi, Voltage sag compensation with energy optimized dynamic voltage restorer, IEEE Trans. Power Delivery, vol.18, pp.928-936, July 2003

[3]

[2]

Po-Tai Cheng; Chian-Chung Huang; Chun-Chiang Pan; Bhattacharya, Design and implementation of a series voltage sag compensator under practical utility conditions, IEEE Trans. Ind. Applicat., Vol. 39, pp. 844-853, May-June 2003. [4] N. H. Woodley, L. Morgan and A. Sundaram, Experience with an inverter-based dynamic voltage restorer, IEEE Trans. Power Delivery, Vol. 14 , Issue: 3 ,pp. 1181-1186, July 1999. [5] Chi-Jen Huang, Shyh-Jier Huang, Fu-Sheng Pai, Design of dynamic voltage restorer with disturbance -filtering enhancement, IEEE Trans. Power Electronics, vol.18, pp. 1202-1210 Sept. 2003. [6] A. Kara, P. Dahler, D. Amhof; H. Gruning, Power supply quality improvement with a dynamic voltage restorer (DVR), Proceeding of the 1998 APEC, Vol. 2 ,pp. 986-993, 15-19 Feb. 1998 [7] S. S. Choi, B. H. Li and D. M. Vilathgamuwa, Dynamic voltage restoration with minimum energy injection, IEEE Trans. Power System, Vol. 15 , Issue: 1 ,pp. 51-57 Feb. 2000. [8] Grkan Zenginobuz, Isik Cadirci, Muammer Ermis and Cneyt Barlak, Performance Optimization of Induction Motors During VoltageControlled Soft Starting, IEEE Trans. Energy Conversion, vol. 19, pp. 278-288, June 2004. [9] Joseph Nevelsteen and Humberto Aragon, Starting of Large Motors Methods and Economics, IEEE Trans. Ind. Applicat., vol. 25, pp. 10121018, Nov.-Dec. 1989. [10] M. S. J. Asghar, Elimination of Inrush Current of Transformers and Distribution Lines. Proceedings of the 1996 International Conference on Power Electronics, Drives and Energy Systems for Industrial Growth, vol. 2, pp. 976-980, 1996. [11] P. C. Y. Ling and A. Basak, Investigation of magnetization inrush current in a single-phase transformer, IEEE Trans. Magn., vol.: 24, Issue: 6, pp.3217-3222, Nov 1988. [12] C. Fitzer, A. Arulampalam, M. Barners and R. Zurowski, Mitigation of saturation in dynamic voltage restorer connection transformer, IEEE Trans Power Electronics, Vol. 17, Issue: 6, pp. 1058-1066, Nov. 20

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