You are on page 1of 6

Effects of conductor surface condition on signal integrity

Martin Bayes Shipley Company L.L.C., Marlborough, Massachusetts, USA and Rohm and Haas Electronic Materials L.L.C., Marlborough, Massachusetts, USA Al Horn Rogers Corporation, Rogers, Connecticut, USA

Keywords
Printed-circuit boards, Surface conductivity

Introduction
Understanding the impact of printed wiring board (PWB) material properties on electrical performance at high frequencies has become increasingly important, as semiconductor device rise times have fallen and system speeds have risen (Bayes, 2003). In order to create correct functioning systems without extensive prototyping, the inuence of design rules and material choices on system signal integrity must be assessed at the design stage. A selection of electromagnetic modeling tools [1,2] is available to PWB designers, allowing such simulations. In order to use electromagnetic modeling tools, a variety of system design attributes must be entered into the model. These include both geometric parameters such as conductor dimensions (trace widths, heights and lengths) and dielectric spacing, and also material electrical properties such as dielectric constant, dissipation factor and conductivity of the conductor material. There are a number of methods for measurement of dielectric electrical properties over the ranges of frequencies relevant to system designers. Such test methods are necessary, since there is no simple physical model that can accurately predict the values of dielectric constant and dissipation factor from other physical properties of the dielectric. In contrast, it has generally been possible to adequately predict conductor properties using the material conductivity and a skin depth model for high frequency conductivity. However, modeling of more complex situations, such as those involving conductor roughness or the use of surface coating on conductors (for either adhesion promotion or solderability enhancement), has required the use of more empirical approaches (Byers, 2002).

resistivity of silver is approximately 7 percent lower than that of copper; and resistivity of nickel is approximately 4.5 times larger than that of copper.

Abstract
The evolution of digital electronic systems to ever-faster pulse rise times has placed increased demands on printed wiring board (PWB) materials. Signal loss associated with dielectric materials has driven development and commercialization of costeffective low loss laminate materials. In order to provide a better understanding of conductor material and surface nish choices, efforts have been made to quantify the impacts of these factors on loss. An alternative test approach has been identied which provides a measure of conductor performance, decoupled from both system geometry and the inuence of laminate material.

In contrast to the DC model, resistivity is not the only parameter responsible for characterizing the resistance posed by a conductor to the ow of alternating current. The skin-effect phenomenon introduces a more complex relationship involving several material properties and the frequency of the alternating current. Passage of a signal along an interconnection corresponds to the presence of time-varying electric and magnetic elds around the conductor. The degree to which these elds penetrate into a conductor is governed by two properties of the conductor material: 1 conductivity electric eld, and 2 permeability magnetic eld. Solution of Maxwells equations allows calculation of the magnetic and electric elds as a function of depth within the conductor (Ramo et al., 1993). The form of the solution shows that the magnitude of both magnetic eld and current density decrease exponentially with penetration into the conductor. The ow of alternating current is therefore concentrated towards the surface or skin of the conductor. A parameter that usefully characterizes the distribution of current within the conductor is known as the skin depth (d), the depth at which current and magnetic eld have decreased to 1/e of their surface values.

d 1=P f sm1=2
where f is the frequency (Hz), s is the conductivity (S/m), and m is the permeability H=m m0 mr : If the depth dependent current distribution is integrated, an equivalent surface resistivity to alternating current (Rs) can be calculated. Rs is found to be identical to the DC resistance of a planar conductor of thickness d: Rs 1=ds P f m=s1=2 At frequencies where the skin depth is much less than the thickness of the conductor, the relative behaviour of conductors towards AC current ow may be inferred from their respective values of surface resistivity. Table II shows the calculated values of surface resistivity for metals commonly used in electronic applications. Since surface resistivity is proportional to the square root of both (conductivity)2 1 and permeability, the relative
The current issue and full text archive of this journal is available at www.emeraldinsight.com/0305-6120.htm

Conductor dissipative losses


Any conductor with a nite conductivity presents resistance to ow of current. The resistance to ow of direct current of a material is characterized by its resistivity. The relative behaviour of conductors towards DC current ow may be inferred from their respective values of resistivity. Table I shows resistivity values for metals commonly used in electronic applications (Handbook of Chemistry and Physics, 2002; Karim, 2001). At DC, several observations may be made about the relative performance of metals:
The Emerald Research Register for this journal is available at www.emeraldinsight.com/researchregister

Circuit World 30/3 [2004] 1116 q Emerald Group Publishing Limited


[ISSN 0305-6120] [DOI: 10.1108/03056120410520551]

[ 11 ]

Martins Bayes and Al Horn Effects of conductor surface condition on signal integrity Circuit World 30/3 [2004] 1116

Table I Resistivity of metals used in electronic applications (at 208C) Metal Silver Copper Gold Aluminum Nickel Tin Tin 99.3 copper 0.7 Tin 96.5 silver 3.5 Tin 63 lead 37 Electroless Ni-P Resistivity (m V cm) 1.59 1.72 2.44 2.82 7.80 11.5 11.7 12.3 15 ca. 50-120

Use of increased conductor widths comes at the price of reduced wiring density and increased layer-to-layer separations (so as to maintain the original transmission line impedance). While industry roadmaps understandably emphasize the evolving needs for ner line capabilities, many high frequency applications ranging from backplanes to 10 Gbit optical interface modules use relatively wide traces (Sayre et al., 1999; Williams et al., 2003).

Conductor dissipative losses surface roughness effects


Additional conductor losses at high frequencies, associated with surface roughness, have been well known since the 1930s. Morgan (1949) published the rst quantitative analysis of the effect of surface roughness on conductor losses. His analysis, based on numerical solution, provides values for relative power dissipation (versus a smooth surface) for a number of well-dened surface geometries, including square, rectangular and triangular grooves, oriented both parallel and perpendicular to the direction of current ow. Morgan characterized the surface roughness effects in terms of the ratio of root mean square roughness (D) to skin depth (d). For a surface with regular square grooves, of depth and width x and period 2x: D x=2

Table II Calculated surface resistivity of metals used in electronic applications Metal Silver Copper Gold Aluminum Tin Tin 99.3 copper 0.7 Tin 96.5 silver 3.5 Tin 63 lead 37 Electroless Ni-P Nickel Surface resistivity (V) 2.51 102 7 ( f 1/2) 2.61 102 7 ( f 1/2) 3.10 102 7 ( f 1/2) 3.33 102 7 ( f 1/2) 6.74 102 7 ( f 1/2) 6.80 102 7 ( f 1/2) 6.97 102 7 ( f 1/2) 7.69 102 7 ( f 1/2) 1.42 2.2 102 6 ( f 1/2) 1.36 102 5 ( f 1/2)

behaviour of metals at AC frequencies differs from that at DC. Two observations can be made about these values for surface resistivity of metals 1 Surface resistivities of non-magnetic metals differ by a smaller proportion than their DC resistivities; for example, the value for silver is about 4 percent less than that of copper. 2 Surface resistivities of magnetic metals differ by a greater proportion than their DC resistivities; for example, the value for nickel is more than 50 times larger than that of copper. The data shown in Table II would be expected to accurately reect the relative performance for cases where the conductor consists of a single ideal material with a smooth surface. A number of cases can be identied where the frequency dependence of the surface resistivity would be expected to differ from the ideal f 1/2 behavior. In the case of a conductor with a surface nish, consisting of one or more layers of different materials over a substrate, the distribution of the current between the substrate and the surface nish will depend on the frequency. As the frequency rises (and current becomes more and more concentrated towards the surface of the conductor), the effective surface resistivity will vary between the values for the substrate and the surface nish. A conductor with signicant surface roughness would also be expected to show higher values of effective surface resistivity at frequencies where the skin depth is comparable to or smaller than the RMS roughness. Just as the DC resistance of a conductor is inversely proportional to its cross-sectional area, the AC resistance of a conductor is inversely proportional to its perimeter length. For a typical PWB interconnection: Perimeter / trace width trace thickness Reduction in conductor loss can therefore be achieved by two obvious means, increased conductor width or reduced conductor length.

Table III shows the values that Morgan derived for relative power dissipation for the case of square grooves aligned transversely to the direction of current ow. In order for a reduction in surface roughness of a conductor to yield a signicant reduction in conductor loss, D/d must be greater than approximately 0.5 for the frequencies of interest.

Experimental measurement of interconnection loss review of recent publications


Approaches to measurements of interconnection loss may be divided into two groups 1 measurements of total system loss, and 2 measurements of fundamental parameters controlling loss. The testing approach adopted will depend on the intended use of the data. A design engineer may wish to carry out measurements to validate the results of modeling experiments. As long as the measured results are acceptably close to the predicted values, there is little incentive to develop a more rened model or to isolate the root cause of any deviations. In contrast, a supplier of PWB materials may wish to record data to either ensure consistency of supplied product or to develop improved products. In these circumstances, it is desirable to be able to make measurements that enable isolation of the contributions of separate loss mechanisms.

Table III Effect of surface roughness on conductor loss (after Morgan) RMS roughness/ skin depth (D/d) 0 0.25 0.50 1.00 1.75 Relative power dissipation 1.00 1.04 1.17 1.57 1.75

[ 12 ]

Martins Bayes and Al Horn Effects of conductor surface condition on signal integrity Circuit World 30/3 [2004] 1116

Brist et al. (2002) and Cullen et al. (2001) have carried out several investigations of the effects of dielectric materials and surface nish on high frequency signal loss. In their rst paper Cullen et al. (2001), the test vehicles used were microstrip circuits, fabricated from three different dielectric constant materials (all 500 mm thickness). In order to maintain a constant 50 V characteristic impedance, it was necessary to adjust the microstrip widths for each of the laminate materials. For each dielectric material, samples were prepared with each of a number of different surface nishes (OSP, ENIG, immersion silver and HASL) to allow evaluation of their effects on total system loss. The differences in loss between the surface nishes were relatively small (less than 0.04 dB/cm at 10 GHz). The authors hypothesized that larger differences would be seen at higher frequencies. Results of a second phase of measurements (Brist et al., 2002), carried out using a differential pair test structure, were presented at the 2002 SMTA Conference. Under these test conditions, the effect of surface nish was found to be more pronounced, due to the greater magnitude of the electromagnetic eld at the conductor surfaces with the surface nish. Immersion tin was found to exhibit an increase of attenuation of approximately 0.2 dB/cm (over OSP and immersion silver), while a 5.4 mm thick electroless nickel with immersion gold showed an increase of approximately 0.6 dB/cm. Overall levels of loss were found to be higher in the second study. The higher losses were attributed at least in part due to differences in effective conductor cross-section and width between single ended microstrip and differential pair test structures. Analysis of these data demonstrates the difculties of experimental design and interpretation when many factors inuencing both dielectric and conductor loss are varied.

The Q factor derived from the measured resonance (Qloaded) requires adjustment to eliminate the effect of measurement process, so as to provide the value of Qunloaded. The measurement consists of the determination of the width of the resonances of the different nodes across the desired range of frequencies (at a specied level of power). The applied power level is maintained within the specied range through the use of a coupling xture with an adjustable gap dimension. Signal generation and measurement of the resonant frequencies and power levels are most easily achieved using a network analyzer. The overall losses are related by the following equation: Loss tangent 1=Qunloaded 2 1=Qconductor 1/Qconductor is the conductor loss factor. The (complex) equations for the conductor loss are as follows (IPC-TM-650, Methods 2.5.5.5 and 2.5.5.5.1, and 1998a, b): 1=Qconductor ac c=p f r 1r 0:5

ac 4Rs 1r Z 0 Y =3772 B
Rs 0:00825 f r 0:5 surface resistivity

Z 0 377=41r 0:5 C f W =B 2 T 377 120p Free space impedance V C f 2X loge X 1 2 X 2 1 loge X 2 2 1=p Y X 2WX 2 =B X 2 1 T =B loge X 1=X 2 1=p X 1=1 2 T =B where 1r is the relative permittivity of dielectric; B is the ground plane spacing (mm); c is the 299.976 speed of light (mm/ns); W is the resonator width (mm); T is the resonator conductor thickness (mm); and fr is the node resonant frequency (GHz). The only parameters in these equations that are not simple functions of the physical dimensions of the test structure are the relative permittivity of the dielectric, the surface resistivity of the conductor and the frequency of the resonance. Since the relative permittivity can be calculated from the frequencies at which a resonance occurs, the only remaining variables are the surface resistivity and the frequency. The equation for 1/Qconductor can therefore be expressed in a simplied form as follows: 1=Qconductor KRs =K 0 f r An estimate of the surface resistivity of a conductor versus that of a reference sample may be made as follows. . An initial series of measurements of (1/Qunloaded) are made with smooth copper conductors and two sheets of dielectric material. . Values of (1/Qreference conductor) for the smooth copper conductors are calculated from the conductor loss equations, as a function of frequency. . Values of loss tangent for the dielectric material are then calculated from the values of (1/Qunloaded) and(1/Qconductor). . The smooth copper conductors are removed and replaced with the conductors to be tested. These tests are performed with the same sheets of dielectric material. . Values for Qunloaded are obtained as a function of frequency.

Separation of conductor and dielectric loss


It is desirable to be able to make measurements that clearly separate conductor and dielectric effects. Examples of this type of approach are the standard IPC methods used to measure dielectric loss tangents. IPC-TM-650 Methods, 2.5.5.5 and 2.5.5.5.1 (1998a, b) and Traut (1997a, b) both use an approach in which the conductor losses of a well-characterized electrical structure (a resonant stripline) are subtracted from the total system losses to yield values for dielectric loss. Equations earlier derived (Cohen, 1954, 1955) for conductor loss in a stripline resonator are used to calculate the conductor correction. The most accurate measurements of loss tangent are obtained when the use of smooth copper foils eliminates the need to adjust conductor losses for the inuence of surface roughness. A modication of the 2.5.5.5.1 test method has been evaluated which would allow the measurement of relative surface resistivity versus a smooth copper surface.

Description of modied IPC-TM-650 2.5.5.5.1 test method


The 2.5.5.5.1 method is based on the stripline resonator test structure shown in Figure 1. This structure resonates both at a fundamental frequency and at a number of higher nodes (integral multiples of the fundamental frequency). At these resonant frequencies, the reection (or return loss, whichever you want to use) of microwave energy in the structure is diminished. The width at half power (3 dB points) of each of these resonances can be used to derive the Q (quality) factor of the structure, which is related to the total system loss.

[ 13 ]

Martins Bayes and Al Horn Effects of conductor surface condition on signal integrity Circuit World 30/3 [2004] 1116

The values of Qunloaded and the previously measured values for the loss tangent of the dielectric material are used to calculate values for (1/Qtest conductor). The ratio of the measured conductor loss to the reference conductor loss provides a measure of their relative surface resistivities: 1=Qtest conductor KRs test =K 0 f r 1=Qreference conductor KRs reference =K 0 f r Rs test Rs reference

Use of a dielectric material with as low as possible a loss tangent, will increase the proportion of the loss associated with the conductor, and thus improve the measurement accuracy of the conductor loss.

Experimental
Reference data were obtained from a 15.2 cm long resonator structure, prepared from smooth, mechanical wrought copper foil (52 mm thick). The widths of the two ground planes and the center conductor were 2.54 and 0.64 cm, respectively. Test samples were either prepared by further processing samples of the wrought foils (surface nishes/inner-layer adhesion promotion) or cutting samples of commercially available PWB foil materials to the required dimensions. Two 1.55 mm thick sheets of RT/Duroidw 5880 PTFE composite laminate (Rogers Corporation, Rogers, CT) were used as the low loss dielectric material. Measurements were made using a Hewlett Packard 8510C Network Analyzer over a range of frequencies from 600 MHz to 14 GHz. The overall test matrix was as follows. Sample type/description Electroless nickel 8 percent P: 1.25 mm Electroless nickel 8 percent P: 2.5 mm Electroless nickel 8 percent P: 3.75 mm Electroless nickel 8 percent P: 5 mm Electroless nickel 8 percent P: 6.25 mm Immersion tin: 0.5 mm Immersion tin: 1.5 mm Black oxide Converted black oxide Oxide replacement: 1 mm etch Oxide replacement: 3 mm etch Electrodeposited (ED) Foil A: vendor treat side ED Foil B: vendor treat side ED Foil B: reverse treated foil (RTF) side

Figure 2, clearly illustrate the effects of both coating thickness and frequency on relative surface resistivity (relative Rs). At low frequencies, all values of relative Rs tend towards 1, as the behavior of the conductor approximates to that of the underlying copper. As frequency rises, the relative Rs of all the electroless nickel samples rises. The degree of increase is strongly affected by the deposit thickness. At an electroless nickel thickness of 5 mm or less, values of Rs increase progressively over the range of frequencies evaluated. The degree of increase of the thinner coatings is smaller ( 1.5 for the 1.25 mm thickness and 3.3 for the 2.5 mm thickness). The relative Rs for the sample with a thickness of 6.25 mm, reaches a stable value (approximately 8) above 6 GHz, presumably as the current ow above that frequency becomes restricted to the coating alone. The value of the relative Rs at frequencies above 6 GHz corresponds to a resistivity 82, i.e. 64 times larger than copper, since the surface resistivity is proportional to the square root of the resistivity. Based on a value of copper resistivity of 1.7 mm cm, the value of resistivity for electroless nickel (8 wt percent P) is calculated to be approximately 110 mV cm, in good agreement with previously published values.

Results and discussion immersion tin


The results of tests of two different thickness (0.5 and 1.5 mm nominal) samples of immersion tin are shown in Figure 3. The samples show behaviour that is analogous in form to that of the electroless nickel samples, with low frequency relative Rs tending towards 1. The relative Rs of the 1.5 mm thick sample reaches a limiting value (of approximately 4.4) at about 4 GHz. The observed limiting value corresponds to a relative resistivity versus copper of (4.4)2 i.e. 19.4. Based on this value, the value of resistivity for an immersion tin coating is calculated to be approximately 33 mV cm. While this value is substantially larger than the value for pure tin (11 mV cm), it is certainly not unreasonable, considering the formation mechanism and structure of the immersion tin deposits. The lower thickness required to reach the limiting relative Rs (versus electroless nickel) may be a consequence of the lower resistivity of the immersion tin deposit, since lower resistivity yields smaller values of skin depth. The 0.5 mm thick sample shows much lower values of relative Rs, suggesting that the copper substrate dominates performance over the range of frequencies examined.

Results and discussion electroless nickel


The results of tests of electroless Ni-P (8 wt percent P) surface nishes, varying from 1.25 to 6.25 mm, shown in

Results and discussion PWB foil adhesion treatments


Results of tests carried out on PWB foil surfaces are shown in Figure 4. Results obtained for the vendor side treatment of Foil A showed an increase in relative Rs from 1 at 600 MHz to approximately 1.7 at 14 GHz. The relative Rs behaviour of the vendor and RTF sides of Foil B was relatively similar (and considerably superior to Foil A). The values of relative Rs at low frequencies were less than 1, possibly reecting the effects of measurement errors. At higher frequencies, the relative Rs increase with the values reaching 1.1 at 14 GHz. Measurements of the surface roughness of the foil samples were taken using a Dektak (Model 200v) stylus prolometer. Results were derived from 256 parallel scans, covering a total sampled area of 500 500 mm: The measured values of RMS deviation (variance) and Ra (mean deviation) for each of the three foil samples are shown in Table IV.

Figure 1 Stripline resonator structure

[ 14 ]

Martins Bayes and Al Horn Effects of conductor surface condition on signal integrity Circuit World 30/3 [2004] 1116

Figure 2 Relative surface resistivity of electroless nickel over a copper substrate

Figure 3 Relative surface resistivity of immersion tin over a copper substrate

These measurements conrm that the sample exhibiting the highest relative Rs (Foil A) was the roughest of the three samples. However, while the surface roughness measurements show a signicant difference between the two sides of Foil B, the relative Rs behavior of the two sides is very similar. This may indicate that factors other than surface roughness contribute to the measured loss behaviour.

Repetition of these experiments on ED foil substrates is planned, to determine if differences in copper grain structure might have an inuence on performance.

Conclusions
.

Results and discussion inner-layer adhesion promotion


The behaviour of the four adhesion promotion processes evaluated was found to be indistinguishable from wrought copper foil (within the experimental error) between 600 MHz and 14 GHz. Based on these results, the surface composition and morphology changes produced by these inner-layer adhesion promotion processes are too small to have a measurable impact on loss.
.

A simple modication of an existing dielectric test method IPC-TM-650 2.5.5.5.1, allows measurement of conductor surface resistivity relative to a reference conductor (a smooth copper foil) at frequencies up to 14 GHz. Preliminary results using this technique demonstrate the ability to quantitatively measure the effects of both nature and thickness of surface nishes and surface roughness of PWB foil surfaces on conductor surface resistivity. Values of electroless nickel resistivity derived from these measurements are consistent with values previously reported.

[ 15 ]

Martins Bayes and Al Horn Effects of conductor surface condition on signal integrity Circuit World 30/3 [2004] 1116

Figure 4 Relative surface resistivity of PWB foil treatments

Table IV Surface roughness measurements of PWB foil adhesion treatments (mm) Sample Foil A Foil B Foil B Treatment Vendor side RTF side Vendor side RMS 3.05 1.42 1.00 Ra 2.42 1.13 0.72

Values of immersion tin resistivity derived from these measurements are about three times higher than literature values for pure tin. Inner-layer adhesion promotion processes, applied to the wrought copper foil surface, were found to have almost no inuence on relative surface resistivity.

Notes
1 Ansoft HFSSe Available at: www.ansoft.com 2 Mayo Clinic Special Purpose Processor Development Group, Available at: http//:www.mayo.edu/sppdg

The authors would like to thank Pat Larrow of Rogers Corporation for her invaluable assistance with the electrical measurements.

References
Bayes, M. (2003), Printed wiring board material sets implications of high frequency applications, IPC EXPO, March 2003. Brist, G. et al. (2002), Reduction of high-frequency signal loss through the control of conductor geometry and surface metallization, SMTA Conference 2002.

Byers, A. (2002), Accounting for high frequency transmission line effects in HFSS, Presentation at Ansoft Design Conference. Available at Web site: http://www.ansoft.com/hfworkshop03/ andy_Byers_Tektonix.pdf, Los Angeles, CA Cohen, S.B. (1954), Characteristic impedance of the shielded-strip transmission line, IRE Trans. MTT, No. 2, pp. 52-7. Cohen, S.B. (1955), Problems in strip transmission lines, IRE Trans. MTT, No. 3, pp. 119-26. Cullen, D. et al. (2001), Effects of surface nish on high frequency signal loss using various substrate materials, IPC Expo, April 2001. (1998a), Stripline test for permittivity and loss tangent at X-band, Revision C. (1998b), Stripline test for complex relative permittivity of circuit board materials to 14 GHz. Karim, Z. (2001), Lead-free solder bump technologies for ip chip packaging applications, Proceedings of Advanced Packaging Technology Conference, SMTA, 2001. Morgan, S. (1949), J. Appl. Phys., Vol. 20 No. 4, pp. 352-62. Ramo, S., Whinnery, J. and Van Duzer, T. (1993), Fields and Waves in Communication Electronics, Wiley, New York, NY. Sayre, E. et al. (1999), OC-48/2.5 Gbps interconnect engineering design rules, Digital Communication System Design Conference. Traut, G.R. (1997a), Complex permittivity of RF circuit board materials by resonances of a stripline section in the 0.2-15 GHz range, Measurement Science Conference, January 1997. Traut, G.R. (1997b), Complex permittivity over a wide frequency range by adjustable air gap probing a stripline resonator, IPC EXPO, March 1997. Weast, R.C. (Ed.) (2002), Handbook of Chemistry and Physics, CRC Press, Florida, FL. Williams, L. et al. (2003), Simulating the XFP electrical interface, CommsDesign, Available at Web site: www.commsdesign. com/design_corner/OEG20030129S0013

[ 16 ]

You might also like