July 2003

AOD412 N-Channel Enhancement Mode Field Effect Transistor

General Description
The AOD412 uses advanced trench technology to provide excellent RDS(ON), low gate chargeand low gate resistance. This device is ideally suited for use as a high side switch in CPU core power conversion.

Features
VDS (V) = 30V ID = 85A RDS(ON) < 7.0m (VGS = 10V) RDS(ON) < 10.5m (VGS = 4.5V)

TO-252 D-PAK D Top View Drain Connected to Tab G S G D S

Absolute Maximum Ratings TA=25C unless otherwise noted Parameter Symbol VDS Drain-Source Voltage VGS Gate-Source Voltage Continuous Drain Current B,G Pulsed Drain Current Avalanche Current C Repetitive avalanche energy L=0.1mH TC=25C Power Dissipation B Power Dissipation
A C

Maximum 30 20 85 65 200 30 120 100 50 2.5 1.6 -55 to 175

Units V V A A mJ W W C

TC=25C

TC=100C B

ID IDM IAR EAR PD PDSM TJ, TSTG

TC=100C TA=25C TA=70C

Junction and Storage Temperature Range Thermal Characteristics Parameter Maximum Junction-to-Ambient A A Maximum Junction-to-Ambient C Maximum Junction-to-Lead

Symbol t 10s Steady-State Steady-State RJA RJL

Typ 14.2 39 0.8

Max 20 50 1.5

Units C/W C/W C/W

Alpha & Omega Semiconductor, Ltd.

AOD412

Electrical Characteristics (TJ=25C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage IDSS IGSS VGS(th) ID(ON) RDS(ON) gFS VSD IS Zero Gate Voltage Drain Current Gate-Body leakage current Gate Threshold Voltage On state drain current Static Drain-Source On-Resistance VGS=4.5V, ID=20A Forward Transconductance VDS=5V, ID=20A Diode Forward Voltage IS=1A,VGS=0V Maximum Body-Diode Continuous Current Conditions ID=250A, VGS=0V VDS=24V, VGS=0V TJ=55C VDS=0V, VGS= 20V VDS=VGS ID=250A VGS=10V, VDS=5V VGS=10V, ID=20A TJ=125C 1.5 85 5.5 8.8 8.25 60 0.72 7 11 10.5 1 85 1320 VGS=0V, VDS=15V, f=1MHz VGS=0V, VDS=0V, f=1MHz 533 154 0.95 26 VGS=4.5V, VDS=15V, ID=20A 13.3 3.2 6.6 7.2 12.5 22 6 29.7 22.3 2.15 Min 30 1 5 100 2.5 Typ Max Units V A nA V A m m S V A pF pF pF nC nC nC nC ns ns ns ns ns nC

DYNAMIC PARAMETERS Ciss Input Capacitance Coss Output Capacitance Crss Rg Reverse Transfer Capacitance Gate resistance

SWITCHING PARAMETERS Qg(10V) Total Gate Charge Qg(4.5V) Total Gate Charge Qgs Gate Source Charge Qgd Gate Drain Charge tD(on) tr tD(off) tf trr Qrr Turn-On DelayTime Turn-On Rise Time Turn-Off DelayTime Turn-Off Fall Time

VGS=10V, VDS=15V, RL=0.75, RGEN=3

IF=20A, dI/dt=100A/s Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge IF=20A, dI/dt=100A/s
2

A: The value of R JA is measured with the device mounted on 1in FR-4 board with 2oz. Copper, in a still air environment with TA =25C. The Power dissipation PDSM is based on steady-state R JA and the maximum allowed junction temperature of 150C. The value in any a given application depends on the user's specific board design, and the maximum temperature fo 175C may be used if the PCB or heatsink allows it. B. The power dissipation P D is based on TJ(MAX)=175C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. C: Repetitive rating, pulse width limited by junction temperature T J(MAX)=175C. D. The R JA is the sum of the thermal impedence from junction to case R JC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300 s pulses, duty cycle 0.5% max. F. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25C. The SOA curve provides a single pulse rating. G. The maximum current rating is limited by the package current capability.

Alpha & Omega Semiconductor, Ltd.

AOD412

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

60 50 40 ID (A) 30 20 10 0 0 1 2 3 4 5 VDS (Volts) Fig 1: On-Region Characteristics 12 Normalized On-Resistance 11 10 RDS(ON) (m ) 9 8 7 6 5 4 0 10 20 30 40 50 60 ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage 20 1.0E+02 1.0E+01 16 RDS(ON) (m ) ID=20A IS (A) 1.0E+00 1.0E-01 1.0E-02 1.0E-03 25C 4 2 4 6 8 10 VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage 1.0E-04 1.0E-05 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VSD (Volts) Figure 6: Body-Diode Characteristics 25C 125C VGS=10V VGS=4.5V 1.8 1.6 1.4 VGS=4.5V 1.2 1 0.8 0 25 50 75 100 125 150 175 Temperature (C) Figure 4: On-Resistance vs. Junction Temperature ID=20A VGS=10V VGS=3V ID(A) 10V 4.0V 60 50 40 125C 3.5V 30 25C 20 10 0 1.5 2 2.5 3 3.5 4 4.5 VGS(Volts) Figure 2: Transfer Characteristics VDS=5V

12 125C 8

Alpha & Omega Semiconductor, Ltd.

AOD412

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

10 8 VGS (Volts) 6 4 2 0 0 5 10 15 20 25 30 Qg (nC) Figure 7: Gate-Charge Characteristics 2400 VDS=15V ID=20A Capacitance (pF) 2000 1600 1200 800 400 0 0 15 20 25 VDS (Volts) Figure 8: Capacitance Characteristics 5 10 30 Crss Coss

Ciss

1000 RDS(ON) limited 1ms 10ms 0.1s 1s 1 TJ(Max)=150C TA=25C 10s DC 10s 100s Power (W)

100 80 60 40 20 0 0.01

100 ID (Amps)

TJ(Max)=150C TA=25C

10

0.1 0.1 1 VDS (Volts) Figure 9: Maximum Forward Biased Safe Operating Area (Note F) 10 100

0.1

10

100

1000

Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F)

10 Z JA Normalized Transient Thermal Resistance

D=Ton/T TJ,PK=TA+PDM.ZJA.RJA RJA=50C/W

In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse

0.1 PD 0.01 Single Pulse 0.001 0.00001 0.0001 0.001 0.01 0.1 1 Ton T 100 1000

10

Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)

Alpha & Omega Semiconductor, Ltd.

AOD412

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

120 ID(A), Peak Avalanche Current Power Dissipation (W) 0.001 0.01 100 80 60 40 20 0 0.00001 TA=25C 120 100 80 60 40 20 0 0.0001 0 25 50 75 100 125 150 175 TCASE (C) Figure 13: Power De-rating (Note B)

tA =

L ID BV VDD

Time in avalanche, t A (s) Figure 12: Single Pulse Avalanche capability

100 80 Current rating ID(A) 60 40 20 0 0 25 50 75 100 125 150 175 TCASE (C) Figure 14: Current De-rating (Note B)

Alpha & Omega Semiconductor, Ltd.

ALPHA & OMEGA

SEMICONDUCTOR, INC.

DPAK Package Data

(JEDEC TO-252)

DIMENSION IN MILLIMETERS MIN. A A1 A2 b b1

1 2 3

DIMENSIONS IN INCHES MIN. 0.088 0.000 0.035 0.027 0.035 0.205 0.018 0.019 0.235 0.170 0.255 0.170 NOM. 0.090 --------0.030 --------0.020 ----0.240 ----0.260 ----0.090 BSC. 0.180 BSC. MAX. 0.094 0.004 0.045 0.035 0.045 0.215 0.022 0.023 0.245 0.210 0.265 -----

NOM. 2.286 --------0.762 ----4.45 0.508 ----6.096 ----6.604 ----2.286 BSC. 4.572 BSC.

MAX. 2.388 0.102 1.143 0.889 1.143 5.461 0.559 0.584 6.223 5.334 6.731 -----

2.235 0.000 0.889 0.686 0.889 5.207 0.457 0.483 5.969 4.318 6.477 4.318

b2 c c1 D D1 E E1 e e1 H L L1 L2

9.779 1.270 0.635 0.889

-----------------

10.414 2.032 1.016 1.270

0.385 0.050 0.025 0.035

-----------------

0.410 0.080 0.040 0.050

DETAIL 'D'

NOTE 1. PACKAGE BODY SIZES EXCLUDE MOLD FLASH AND GATE BURRS 2. DIMENSION L IS MEASURED IN GAGE PLANE 3. TOLERANCE 0.10 mm UNLESS OTHERWISE SPECIFIED 4. CONTROLLING DIMENSION IS MILLIMETER. CONVERTED INCH DIMENSIONS ARE NOT NECESSARILY EXACT. 5. FOLLOWED FROM JEDEC TO-252 (AA)

PACKAGE MARKING DESCRIPTION

RECOMMENDED LAND PATTERN

NOTE:

D412 FAYWLC
1 2 3
D412 F A Y W LC

- AOS LOGO - PART NUMBER CODE. - FAB LOCATION - ASSEMBLY LOCATION - YEAR CODE - WEEK CODE. - ASSEMBLY LOT CODE

DPAK PART NO. CODE

PART NO. AOD412

CODE D412

UNIT: mm
Rev. A

ALPHA & OMEGA

SEMICONDUCTOR, INC.
TO-252 (DPAK) Carrier Tape

TO-252 (DPAK) Tape and Reel Data

TO-252 (DPAK) Reel

TO-252 (DPAK) Leader / Trailer & Orientation