CSE chapter 10 Application software: programs that help us solve real-world problems System software: programs that manage

a computer system and interact with hardware Operating system: system software that manages computer resources and provides an interface for system interactions (such as various versions of Microsoft; windows NT, window XP, Windows Vista, Windows 7) UNIX (Linux) for serious programmers Memory, process and cpu management Multiprogramming: the technique of keeping multiple programs in main memory at the same time, competing for the CPU Memory management: the act of keeping track of how and where programs are loaded in main memory Process: the dynamic representation of a program during execution Process management: the act of keeping track of information for active processes CPU scheduling: the act of determining which process in memory is given access to the CPU so that it may execute Batch Processing Program and system interactions are called a job Timesharing Timesharing: a system in which CPU time is shared among multiple interactive users at the same time Virtual machine: the illusion created by a time-sharing system that each user has a dedicated machine Mainframe: a large multiuser computer often associated with early timesharing systems Dumb terminal: a monitor and keyboard that allowed the user to access the main fram computer in early timesharing systems The OS factors Mainframe computers to mini computers which became basic hardware platform for timesharing systems, microcomputers relied on a CPU (single integrated chip) Real-time system: a system in which response time is crucial given the nature of the application domain Response time: the time delay between receiving a stimulus and producing a response Memory Management Main memory divided into groups of 8, 16, 32 bits First memory address is 0

Logical address: a reference to a stored value relative to the program making the reference Physical address: an actual address in the main memory device Address binding: the mapping from a logical address to a physical address Underlying principles of three techniques 1. Single contiguous memory management 2. Partition memory management 3. Paged memory management Single contiguous memory management Single contiguous memory management: the approach to memory management in which a program is loaded into one continuous area of memory Ex. program loaded starting at address A then the physical address corresponding to logical address L is A+L. with numbers if program loaded starting at 555555 and when program uses relative address 2222222, it is actually referring to address 777777 in main memory Simple to implement and manage almost certainly wastes both memory space and CPU time Application program unlikely to need all of memory not used by operating system and CPU time is wasted when program has to wait for some resource

Partition memory management Operating systems job to ensure that one program doesnt access anothers memory space Example of security mechanism at low level, outside knowledge of user. Fixed-partition technique: the memory management technique in which memory is divided into a specific number of partitions into which programs are loaded Dynamic-partition technique: the memory management technique in which memory is divided into partitions as needed to accommodate programs Base register: a register that holds the beginning address of the current partition Bounds register: a register that holds the length of the current partition 3 approaches to partition selection 1. First fit, in which the program is allocated to the first partition big enough to hold it 2. Best fit, in which the program is allocated to the smallest partition big enough to hold it 3. Worst fit, in which the program is allocated to the largest partition big enough to hold it

Paged memory management Paged memory management: a memory management technique in which processes are divided into fixed-size pages and stored in memory frames when loaded Frames: a fixed-size portion of main memory that holds a process page Page: a fixed-size portion of a process that is stored into a memory frame Page-map table (PMT): the table used by the operating system to keep track of page/frame relationships

Demand paging: an extension to paged memory management in which pages are brought into memory only when referenced (on demand) Page swap: bringing one page from secondary memory possibly cuasing another to be removed Virtual memory: the illusion that there is no restriction on program size because an entire process need not be in memory at the same time Thrashing: inefficient processing caused by constant page swapping

Process management The process states: conceptual stages through which a process moves as it is managed by the operating system Examination of what is happening to a process in each state New state process is being created. (login process created by user logging into a timesharing system, application process created when user submits a program for execution, or a system process created by the operating system to accomplish a specific system task.) Ready state- process that has no barriers to its execution. Ready state is not waiting for an event to occur or for data to e brought in from secondary memory, it is waiting for its chance to use CPU Running state process currently being executed by CPU, its instructions are being processed in the fetch-execute cycle Waiting state process currently waiting for resources (other than CPU), process in the waiting state may be waiting for a page of its memory to be brought in from secondary memory or for another Terminated state process has completed its execution and is no longer active. At this point the operating system no longer needs to maintain the information regarding the process Process control block (PCB): the data structure used by the operating system to manage information about a process Context switch: the exchange of register information that occurs when one process is removed from the CPU and another takes its place

CPU Scheduling Nonpreemptive scheduling: CPU scheduling that occurs when the currently executing process gives up the CPU voluntarily Preemptive scheduling: CPU scheduling that occurs when the operating system decides to favor another process, preempting the currently executing process Turnaround time: the CPU scheduling metric that measures the elapsed time between a processs arrival in the ready state and its ultimate completion

First come first served (FCFS algorithm) Processes are moved to the CPU in order which they arrive in the running state. It is nonpreemptive Turnaround time for each process would be its completion time minus its arrival time

Shortest job next (SJN CPU scheduling algorithm) Looks at all processes in ready state and dispatches the one with the smallest service time, It is nonpreemptive like FCFS

Round robin Distributes processing time equitably among all ready processes Round robin algorithm establishes a particular time slice (quantum) which is the amount of time each process receives before preempted and returned to ready state to allow another process to take its turn. Preemptive

Chapter 4 Computers and electricity Gates 1. 2. 3. 4. Not And Or Xor Gate: a device that performs a basic operation on electrical signals, accepting one or more input signals and producing a single output signal Circuits: combination of interacting gates designed to accomplish a specific logical function The three powerful notational methods: 1. Boolean algebra: mathematical notation for expressing two-valued logical functions 2. Logic diagram: graphical representation of a circuit: each type of gate has its own symbol 3. Truth table: table showing all possible input values and the associated output values

5. Nand 6. Nor Not gate one input, one output Boolean expression of not gate x=A (not represented by , x is output and A is input) Example of Boolean 1=0 Logic diagram symbol of not gate A--0---x (not represented by triangle/arrow and a small circle) Truth table of not gate (A input values, X output values) A 0 1 X 1 0

And gate two input, one output Boolean exp. X = A * B or X = A.B or X = AB Logic diagram / truth table

Boolean of And, represented by single (.) or (*) Or gate(inclusive or) 2 input, one out put like And gate

Boolean + sign 4 input combos just like AND gate Xor gate/or gate produces 0 if inputs are same, and a 1 otherwise or and xor differ in input situation

Boolean is plus with circle around it

NAND and NOR gates, 2 inputs but opposite of AND and OR gates. Output of NAND is same as if you took the output of AND and put it through an inverter

no specific symbols we only rely on their definitions to express concept.boolean expression for NAND is the negation of an AND operation, same with NOR and OR logic diagrams are same, except that NOR and NAND symbols use an inversion bubble (to indicate negation)

review of gate processing NOT gate inversts single input value AND gate produces 1 if both input values are 1 OR gate produces 1 if one or the other or both input values are 1 XOR produces 1 if one or the other (but not both values are same) NAND produces opposite results of an AND

NOR produces opposite results of an OR

Gates with more input 3 input AND gate, produces output of 1 only if all input values are 1 3 input OR gate produces 1 if any input is 1

Construction Gates Transistor: device acting as wire or resistor depending on the voltage level of an input signal Semiconductor: material such as silicon that is neither a good conductor nor a good insulator

If electrical signal is ground: allowed to flow through an alternative route to the ground(0 volts)

Because of how transistor works, easiest gates to create are NOT, NAND, NOR gates. Vin = input, Vout = output NOT Vin low (not ground) so Vout = high Vin high (grounded) so Vout = low Signal inverted

NAND NOR V1, V2 (two transistors required like NAND) Not connected in series, source connects to each other separately If either transistor allows source to be ground, output is 0/ output is low When both V1 and V2 are low, input 0, output is high (1) V1 (input) V2 (input) Both inputs high (grounded), output low Either signal low (not grounded, output high ((binary 0, output 1)) 1*0=0 invert 1

AND Produces output opposite of NAND output of gate To construct AND, pass output of NAND through an inverter (which is a NOT gate) AND more complicated to construct than NAND, requires 2 transistors (2 for NAND , 1 for NOT) Same reasoning in relationship to NOR and OR gates

Circuits Combinational circuit: output is solely determined by its input value Sequential circuit: output is a function of its input values and the current state of the circuit

Combinational circuit

Output of two AND gates used as input to OR gate.

(AB+AC) A(B + C)

Circuit equivalence: same output for each corresponding input-value combination for two circuits

DeMorgans law 1. NOT operator applied to the AND of two variables equal to the NOT applied to each of the two variable with an OR between. Inverting the output of an AND gate is equivalent to inverting the individual signals first and then passing them through an OR gate 2. NOT operator applied to OR of two variables is equal to the NOT applied to each of the 2 variables with an AND between. Inverting output of an OR is equal to inverting both signals first and then passing them through an AND gate: (A+B) = AB

Adder: electronic circuit that performs an addition operation on binary values 1 + 1 = 10 Half adder: circuit that computes the sum of two bits and produces the appropriate carry bit
1+ 1 = 1 carry

Full adder: circuit that computes the sum of two bits, taking an input carry bit into account

Multiplexers: circuit that uses few input control signals to determine which of several input data lines is routed to its output

Circuits as Memory Can store info Output of circuit also serves as input to circuit S-R latch memory circuit stores single binary digits (1 or 0)

This memory circuit could be designed using a variety of gates (ex. NAND) design of circuits guarantees 2 outputs X and Y complimenting each other. When X=0, Y=1 S-R latch maintains value as long as S and R are 1.

Integrated circuits/IC (chip) Piece of silicon on which multiple gates have been embedded

This SSI chip has 14 pins; 8 for input gates, 4 for ouput gates, 1 for ground, 1 for power

CPU chips Most important integrated circuit in any computer is CPU

CHAPTER 5 Individual computer components Ex. Core 2(processor) Duo(presence of two processors on single chip) 2.66GHz(how fast processor is, G is giga,(billion)) FSB (front side bus), processor needs to access memory and input/output devices through set of wires called bus 6 MB cache (megabyte, memory- how FSB keeps up with 2.66 GHz) GPU (graphic processing unit) RAM (random access memory) Dual channel DDR2 ( second generation, double-data rate) Hard disk drive computers secondary auxiliary/storage device

Stored-program concept

Von Neumann architecture

Units that process info are separate from units that store info, leads to 5 components of von Neumann arch 1. Memory unit holds both data and instructions Arithmetic/logic unit capable of performing arithmetic and logic operations on data Input unit moves data from outside world into computer Output unit moves results from inside computer to the outside world Control unit acts as stage manager ensuring all other components act in concert

Memory Capable of holding 1 or 0

Addressability: number of bits stored in each addressable location in memory

Arithmetic/logic unit (ALU) computer compnent that performs arithmetic operations (add/subract/mulitply/divide) and logical operations (comparison of two valeus) Register: small storage area in CPU used to store intermediate values or special data Input unit: device accepts data to be stored in memory Output unit : device prints displays data stored in memory or makes a permanent copy of info sotres in memory or another device Control unit: comp component controls actions of other components so as to execute instruction in sequence Instruction regiers (IR): register contains instructions currently being executed Progrom countr (PC): register that contains addres of next instruction to be executed CPU: central processing unit, combiation of the arithmetic/logic unit and the control unit; the brain of a comp that interprets and executes instructions Bus width: number of bits that can be tranferred in parallel over bus Cache memory: type of small, high-speed memory used to hold frequently used data Pipelining: technique that breaks an instruction into smaller steps that can be overlapped Increases speed

Motherboard: main circuit board of a personal computer

The fetch-execute cycle 1. 2. 3. 4. Fetch next isntruction Decode instruction Get data if needed Execute instruction

Fetch next instruction Control unit address in memory specified in pc makes copy of contents places copy in instruction register IR contains instruction to be executed, before going to next step PC must update to hold address of next instruction to be executed when current instruction is completed In case of instruction that must get data from memory, ALU sends address to memory bus and memory responds by returning value at that location

Decode instruction Control unit dteremines what instruction it is goes to access data from an input device to send data to an output device or perform operation on data value --- instruction decoded into control signals (logic of circuitry in CPU determines which operation to be executed) this is why comp only exp in own machine language

Get data if needed Get contents of memory location

Execute instruction Sending signal to arithmetic/logic unit to carry out processing, operand is sent to ALU and added to contents of register, then cycle begins again

RAM and ROM RAM(random-access memory) each cell/bye can be directly accessed ROM(read-only memory)- contents cant be changed, placing bit content in ROM is called BURNING

Secondary storage devices Secondary/auxilary storage devices, data must be read from them and written to them. Is also an input/output device

Magnetic tape Used to back up (copy) data on disk inc ase disk is later damaged

Magnetic disks Track: concentric circle on surface of disk Sector: section of track Block: info stored in sector

Process of magnetic disk read/write 1. 2. 3. 4. 5. Seek time: time it takes for read/write head to get positioned over specified track Latency: time it takes for specified sector to be in position udner the read/write head Access time: time it takes for a block to start being read; sum of seek time and latency Tranfer rate: rate at which data moves from the disk to memory Cylinder: set of concentric tracks on all surfaces

CDs and DVDs CDDA (disk digital) CD-ROM(read only) CD-R(recordable)

Flash drives Floppy disk, USB universal serial bus, flash mem used to build SSD (solid state disk)

Touch screens Resistive touch screen one layer horizontal line, one layer vertical line Capacitive touch screen laminate over glass, small current Infrared touch screen projects xcross horizontal vertical beams of infrared light over screen sruface Surface acoustic wave (SAW) projects high freq sound waves across hor/ver axes

Gloves cannot be used with capacitive but every other

Embedded systems Ex embedded sys housed on single microprocessor chip with programs stored in ROM

Parallel architectures Parallel computing 4 levels 1. Bit leve 2. Instruction level 3. Data level 4. Task level

SIMD (single instructions, multiple data) ----this is data level parallelisms basis, relies on control unit directing multiple ALUSs to carry out same operation (ex addition on diff sets of operands) this approach is called synchronous processing Synchronous processing: multiple processors apply same program in lock-step to multiple data sets

Shared memory parallel processor: situation in which multiple processors share a global memory

Classes of parallel hardware SMP (symmetric multiprocessors) have multiple identical cores, share memory and bus connects them. 32 processor limit