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Instructor: Mazad S. Zaveri Faculty Block 4, Room 4206 Email: mazad_zaveri@daiict.ac.in http://intranet.daiict.ac.in/~mazad_zaveri/
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EL 511 VLSI Design
For our course, we will assume VOH and VOL to be the settled values
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EL 511 VLSI Design
This is the approx. resistance of the transmission gate and is relatively constant.
NMOS-LIN PMOS-OFF
EL 511 VLSI Design
NMOS-LIN PMOS-LIN
NMOS-OFF PMOS-LIN
IR =
VDD Vout R
Topics covered
From the DJVU file on \\daiictpdc
2.5.2 2.5.3 2.5.4
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EL 511 VLSI Design
MOSFET Capacitance
Gate capacitance Cg Diffusion capacitance Cdb and Csb For a rough analysis
Cg = Cdb = Csb = ~2fF/micro-m of gate-width (W)
2 4 2 2
1 1 1
Switch-level RC models
Resistance at some operating point is defined as
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EL 511 VLSI Design
Neglecting the parasitic/diffusion capacitances, a unit-size inverter loaded with another unit-size inverter will lead to a time-constant (3RC) This is a figure of merit for manufacturing and design processes
Load = ONLY capacitive C defined in terms of smallest NMOS transistor R defined in terms of smallest NMOS transistor