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Acknowledgements. Certificate. Introduction to the Project. basics of LCD interfacing Programming code Circuit Diagram. Component List. Hardware Power Supply for the circuit. Integrated Circuits. Transistors. Diode. Relays. Transformer. Resistors. Capacitors.
ACKNOWLEDGEMENT I am highly greatful to the Principal, Bhutta College of Engineering & Technology
(BCET) Ludhiana, for providing this opportunity to carry out the present report/ work. The constant guidance and encouragementrecevied fromEr. Mandeep Kaur HOD of Electronic & CommunicationEngineering Department, BCET Ludhiana has beenof great help in carryingout the present work and is acknowledged with reverential thanks.I would like to express a deep sense of gratitude and thanks profusely to Arun Kumar sir traning co-ordinator of Innovative Project solutions Ludhiana. Without the wise counsel and able guidance, it would have been impossible to complete the report in this manner.I express gratitude to other faculty member of Electronic Engineering Department, for their intellectual support throughout the course of this work.Finally,I indebted to all whosoever have contributed in this report work and friendly stay at BCET.
Chapter 1 : INTRODUCTION
Electronics voting machine is a very interesting and very wonderful project to explain the wotkin of microcontroller and eerom. In this project one LCD is also connected. One keyboard with switchesare connected it to feed the data in the eerom. Here we use ic 89c51 microcontroller as a main processor. Pin no 40 is connected to the positive supply. Pin no 20 is connected to the ground pin. Pin no 18 and pin no 19 is connected to the crystal pin. Here we use crystal 3.58 Mhz. In this microcontroller there is total four ports. Port0, Port1, Port2, Port3. In this project we assign only four candidates. So therefore four switches are connected to the microcontroller to enter the volt for each candidate. Four other switches are connected to the microcontroller to check the individuals vote. One switch for the total vote. Two switches for the reset the processor. Here we use two by 16 line lcd. For the display.
Electronics voting machine is a very interesting and very wonderful project to explain the wotking of microcontroller and eerom. In this project one LCD is also connected. One keyboard with feq switches are connected it to feed the data in the eerom.
Here we use ic 89c51 microcontroller as a main processor. Pin no 40 is connected to the positive supply. Pin no 20 is connected to the ground pin. Pin no 18 and pin no 19 is connected to the crystal pin. Here we use crystal 3.58 Mhz. In this microcontroller there is total four ports. Port0, Port1, Port2, Port3.
In this project we assign only four candidates. So therefore four switches are connected to the microcontroller to enter the volt for each candidate. Four other switches are connected to the microcontroller to check the individuals vote. One switch for the total vote. One switch for the vote enable control. Two switches for the reset the processor. Here we use two by 16 line lcd. For the display.
Frequently, an 8051 program must interact with the outside world using input and output devices that communicate directly with a human being. One of the most common devices attached to an 8051 is an LCD display. Some of the most common LCDs connected to the 8051 are 16x2 and 20x2 displays. This means 16 characters per line by 2 lines and 20 characters per line by 2 lines, respectively. Fortunately, a very popular standard exists which allows us to communicate with the vast majority of LCDs regardless of their manufacturer. The standard is referred to as HD44780U, which refers to the controller chip which receives data from an external source (in this case, the 8051) and communicates directly with the LCD. 2.1.1. 44780 BACKGROUND The 44780 standard requires 3 control lines as well as either 4 or 8 I/O lines for the data bus. The user may select whether the LCD is to operate with a 4-bit data bus or an 8-bit data bus. If a 4-bit data bus is used, the LCD will require a total of 7 data lines (3 control lines plus the 4 lines for the data bus). If an 8-bit data bus is used, the LCD will require a total of 11 data lines (3 control lines plus the 8 lines for the data bus). The three control lines are referred to as EN, RS, and RW. The EN line is called "Enable." This control line is used to tell the LCD that you are sending it data. To send data to the LCD, your program should first set this line high (1) and then set the other two control lines and/or put data on the data bus. When the other lines are completely ready, bring EN low (0) again. The 1-0 transition tells the 44780 to take the data currently found on the other control lines and on the data bus and to treat it as a command. The RS line is the "Register Select" line. When RS is low (0), the data is to be treated as a command or special instruction (such as clear screen, position cursor, etc.). When RS is high (1), the data being sent is text data which sould be displayed on the screen. For example, to display the letter "T" on the screen you would set RS high.
The RW line is the "Read/Write" control line. When RW is low (0), the information on the data bus is being written to the LCD. When RW is high (1), the program is effectively querying (or reading) the LCD. Only one instruction ("Get LCD status") is a read command. All others are write commands--so RW will almost always be low. Finally, the data bus consists of 4 or 8 lines (depending on the mode of operation selected by the user). In the case of an 8-bit data bus, the lines are referred to as DB0, DB1, DB2, DB3, DB4, DB5, DB6, and DB7. 2.1.2. AN EXAMPLE HARDWARE CONFIGURATION As we've mentioned, the LCD requires either 8 or 11 I/O lines to communicate with. For the sake of this tutorial, we are going to use an 8-bit data bus--so we'll be using 11 of the 8051's I/O pins to interface with the LCD. Let's draw a sample psuedo-schematic of how the LCD will be connected to the 8051.
FIG NO.2.1.2 . LCD CONNECTED MICROCONTROLLER As you can see, we've established a 1-to-1 relation between a pin on the 8051 and a line on the 44780 LCD. Thus as we write our assembly program to access the LCD, we are going to equate constants to the 8051 ports so that we can refer to the lines by their 44780 name as opposed to P0.1, P0.2, etc. Let's go ahead and write our initial equates: DB0 EQU P1.0 DB1 EQU P1.1 DB2 EQU P1.2
DB3 EQU P1.3 DB4 EQU P1.4 DB5 EQU P1.5 DB6 EQU P1.6 DB7 EQU P1.7 EN EQU P3.7 RS EQU P3.6 RW EQU P3.5 DATA EQU P1 Having established the above equates, we may now refer to our I/O lines by their 44780 name. For example, to set the RW line high (1), we can execute the following insutrction: SETB RW 2.1.3. HANDLING THE EN CONTROL LINE As we mentioned above, the EN line is used to tell the LCD that you are ready for it to execute an instruction that you've prepared on the data bus and on the other control lines. Note that the EN line must be raised/lowered before/after each instruction sent to the LCD regardless of whether that instruction is read or write, text or instruction. In short, you must always manipulate EN when communicating with the LCD. EN is the LCD's way of knowing that you are talking to it. If you don't raise/lower EN, the LCD doesn't know you're talking to it on the other lines. Thus, before we interact in any way with the LCD we will always bring the EN line high with the following instruction:
SETB EN And once we've finished setting up our instruction with the other control lines and data bus lines, we'll always bring this line back low: CLR EN Programming Tip: The LCD interprets and executes our command at the instant the EN line is brought low. If you never bring EN low, your instruction will never be executed. Additionally, when you bring EN low and the LCD executes your instruction, it requires
a certain amount of time to execute the command. The time it requires to execute an instruction depends on the instruction and the speed of the crystal which is attached to the 44780's oscillator input. 2.1.4 . CHECKING THE BUSY STATUS OF THE LCD As previously mentioned, it takes a certain amount of time for each instruction to be executed by the LCD. The delay varies depending on the frequency of the crystal attached to the oscillator input of the 44780 as well as the instruction which is being executed. While it is possible to write code that waits for a specific amount of time to allow the LCD to execute instructions, this method of "waiting" is not very flexible. If the crystal frequency is changed, the software will need to be modified. Additionally, if the LCD itself is changed for another LCD which, although 44780 compatible, requires more time to perform its operations, the program will not work until it is properly modified. A more robust method of programming is to use the "Get LCD Status" command to determine whether the LCD is still busy executing the last instruction received. The "Get LCD Status" command will return to us two tidbits of information; the information that is useful to us right now is found in DB7. In summary, when we issue the "Get LCD Status" command the LCD will immediately raise DB7 if it's still busy executing a command or lower DB7 to indicate that the LCD is no longer occupied. Thus our program can query the LCD until DB7 goes low, indicating the LCD is no longer busy. At that point we are free to continue and send the next command. Since we will use this code every time we send an instruction to the LCD, it is useful to make it a subroutine. Let's write the code: WAIT_LCD: SETB EN ;Start LCD command CLR RS ;It's a command SETB RW ;It's a read command MOV DATA,#0FFh ;Set all pins to FF initially MOV A,DATA ;Read the return value JB ACC.7,WAIT_LCD ;If bit 7 high, LCD still busy CLR EN ;Finish the command
CLR RW ;Turn off RW for future commands RET Thus, our standard practice will be to send an instruction to the LCD and then call our WAIT_LCD routine to wait until the instruction is completely executed by the LCD. This will assure that our program gives the LCD the time it needs to execute instructions and also makes our program compatible with any LCD, regardless of how fast or slow it is. Programming Tip: The above routine does the job of waiting for the LCD, but were it to be used in a real application a very definite improvement would need to be made: as written, if the LCD never becomes "not busy" the program will effectively "hang," waiting for DB7 to go low. If this never happens, the program will freeze. Of course, this should never happen and won't happen when the hardware is working properly. But in a real application it would be wise to put some kind of time limit on the delay--for example, a maximum of 256 attempts to wait for the busy signal to go low. This would guarantee that even if the LCD hardware fails, the program would not lock up
Programming Tip: The LCD command 38h is really the sum of a number of option bits. The instruction itself is the instruction 20h ("Function set"). However,
to this we add the values 10h to indicate an 8-bit data bus plus 08h to indicate that the display is a two-line display. We've now sent the first byte of the initialization sequence. The second byte of the initialization sequence is the instruction 0Eh. Thus we must repeat the initialization code from above, but now with the instruction. Thus the the next code segment is: SETB EN CLR RS MOV DATA,#0Eh CLR EN LCALL WAIT_LCD Programming Tip: The command 0Eh is really the instruction 08h plus 04h to turn the LCD on. To that an additional 02h is added in order to turn the cursor on. The last byte we need to send is used to configure additional operational parameters of the LCD. We must send the value 06h. SETB EN CLR RS MOV DATA,#06h CLR EN LCALL WAIT_LCD Programming Tip: The command 06h is really the instruction 04h plus 02h to configure the LCD such that every time we send it a character, the cursor position automatically moves to the right. So, in all, our initialization code is as follows: INIT_LCD: SETB EN CLR RS MOV DATA,#38h CLR EN LCALL WAIT_LCD
SETB EN CLR RS MOV DATA,#0Eh CLR EN LCALL WAIT_LCD SETB EN CLR RS MOV DATA,#06h CLR EN LCALL WAIT_LCD RET Having executed this code the LCD will be fully initialized and ready for us to send display data to it.
Programming Tip: Executing the "Clear Screen" instruction on the LCD also positions the cursor in the upper left-hand corner as we would expect.
LCALL WRITE_TEXT MOV A,#'O' LCALL WRITE_TEXT MOV A,#' ' LCALL WRITE_TEXT MOV A,#'W' LCALL WRITE_TEXT MOV A,#'O' LCALL WRITE_TEXT MOV A,#'R' LCALL WRITE_TEXT MOV A,#'L' LCALL WRITE_TEXT MOV A,#'D' LCALL WRITE_TEXT The above "Hello World" program should, when executed, initialize the LCD, clear the LCD screen, and display "Hello World" in the upper left-hand corner of the display. 2.1.9. CURSOR POSITIONING The above "Hello World" program is simplistic in the sense that it prints its text in the upper lefthand corner of the screen. However, what if we wanted to display the word "Hello" in the upper left-hand corner but wanted to display the word "World" on the second line at the tenth character? This sounds simple--and actually, it is simple. However, it requires a little more understanding of the design of the LCD. The 44780 contains a certain amount of memory which is assigned to the display. All the text we write to the 44780 is stored in this memory, and the 44780 subsequently reads this memory to display the text on the LCD itself. This memory can be represented with the following "memory map":
In the above memory map, the area shaded in blue is the visible display. As you can see, it measures 16 characters per line by 2 lines. The numbers in each box is the memory address that corresponds to that screen position. Thus, the first character in the upper left-hanad corner is at address 00h. The following character position (character #2 on the first line) is address 01h, etc. This continues until we reach the 16th character of the first line which is at address 0Fh. However, the first character of line 2, as shown in the memory map, is at address 40h. This means if we write a character to the last position of the first line and then write a second character, the second character will not appear on the second line. That is because the second character will effectively be written to address 10h--but the second line begins at address 40h. Thus we need to send a command to the LCD that tells it to position the cursor on the second line. The "Set Cursor Position" instruction is 80h. To this we must add the address of the location where we wish to position the cursor. In our example, we said we wanted to display "World" on the second line on the tenth character position. Referring again to the memory map, we see that the tenth character position of the second line is address 4Ah. Thus, before writing the word "World" to the LCD, we must send a "Set Cursor Position" instruction--the value of this command will be 80h (the instruction code to position the cursor) plus the address 4Ah. 80h + 4Ah = C4h. Thus sending the command C4h to the LCD will position the cursor on the second line at the tenth character position: SETB EN CLR RS MOV DATA,#0C4h CLR EN LCALL WAIT_LCD The above code will position the cursor on line 2, character 10. To display "Hello" in the upper left-hand corner with the word "World" on the second line at character position 10 just requires us to insert the above code into our existing "Hello World" program. This results in the following: LCALL INIT_LCD LCALL CLEAR_LCD
MOV A,#'H' LCALL WRITE_TEXT MOV A,#'E' LCALL WRITE_TEXT MOV A,#'L' LCALL WRITE_TEXT MOV A,#'L' LCALL WRITE_TEXT MOV A,#'O' LCALL WRITE_TEXT SETB EN CLR RS MOV DATA,#0C4h CLR EN LCALL WAIT_LCD MOV A,#'W' LCALL WRITE_TEXT MOV A,#'O' LCALL WRITE_TEXT MOV A,#'R' LCALL WRITE_TEXT MOV A,#'L' LCALL WRITE_TEXT MOV A,#'D' LCALL WRITE_TEXT
Chapter 5. SUMMARY
This tutorial has presented the underlying concepts of programming an LCD display. Obviously it has not addresses all issues. The 44780 LCD controller offers many other functions which are accessed using other commands, and some of the commands already presented include other
options that were not discussed here. However, this tutorial should get you going in the right direction.
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Port 0.4, p0.5,p0.6.p0.7 is connected to the total vote count for the individuals. Port 2.7, p2.6,p2.5,p2.4 is for cast the vote.. Port2.0,p2.1, p2.2, is connected to the all cleared point and for reset pin. P2.2 and p2.3 is connected to the reset pin. P2.0 and p2.1 is connected to all cleared function. P2.3 is connected to the total vote caste. Lcd is connected to the port 1 and few pins of the lcd is connected to the port 3 also. Port p1.0 to p1.7 is is the data line circuit for the lcd and RS pin of the lcd is connected to the p3.1 R/w pin of the lcd is connected to the p3.2 Enable pin of the lcd is connected to the p3.0 Port p3.4, p3.5, p3.7 is connected to the eerom to store the data .
Ic 24c02 provides bits of serial electrically erasable and programmable read only memory eeprom organized as words of 8 bits each.. this device is optimized for use in many automative application where low-power and low voltage operation are essential. This ic is available in 8 pin package and is accessed via a 2 wire serial interface. In addition, the entire family is available in 5.0 volts and 2.7 volt versions.
Pin no 8 of the 24c02 is connected to the positive supply 5 volt. Pin no 1,2,3, is connected to the ground pin. Pin no 4 of this ic is basically a ground pin. Pin no 1,2,3 is for address input. When we ground all this pin then its mean that we give a zero address to this pin. Pin no 5 is
SDA pin. SDA pin means serial data . pin no 6 of the ic is connected to the scl pin of the serial clock input. Pin no 7 is the ic is w/p write protected pin.
03/19/04 13:21:49
LOC 4 0000 0000 0003 0003 000B 000B 0013 0013 001B 001B 0023 0023
OBJ
020024 32
ORG 0000H LJMP MAIN ORG 0003H RETI ;ljmp ex0_isr ORG 000BH RETI ;ljmp tim0_isr ORG 0013H RETI ;ljmp ex1_isr ORG 001BH RETI ;ljmp tim1_isr ORG 0023H RETI ;ljmp ser_isr MAIN: LCALL LCALL LCALL LCALL DELAY41 DELAY41 DELAY41 DELAY41
32
32
32
32
0030 0033 0036 0039 003C 003F 0042 0045 0048 004B 004E 0051 0054 0056 0059 005B 005D 005F 0061 0063 0065 0067 0069 006B 006E 0070 0072 0074 0076 0078 007B 007D 007F 0081 0083 0085 0088 008A 008C 008E 0090 0092 0095 0097 0099 009B 009D
1204BF 1204BF 758140 758900 758800 75A800 75B800 759800 7580FF 7590FF 75A0FF 75B0FF C2A1 1204BF C2A5 C2A6 C2A7 C2A0 D2A3 D2A2 7400 F52D 7400 1205C0 40F5 F522 7401 F52D 7400 1205C0 40F5 F523 7402 F52D 7400 1205C0 40F5 F524 7403 F52D 7400 1205C0 40F5 F525 7404 F52D 7400
105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161
MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV
129 137 136 168 184 152 128 144 160 176
LCALL DELAY41 LCALL DELAY41 , # 040H , # 00H , # 00H , # 00H , # 00H , # 00H , # 0FFH , # 0FFH , # 0FFH , # 0FFH CLR WP LCALL DELAY41 CLR LCD_RS CLR LCD_RW CLR LCD_EN CLR LED SETB SDA SETB SCL
MAIN1: MOV A , # 0 MOV 45 , A MOV A,#00H CALL READ_RANDOM JC MAIN1 MOV 34 , A MAIN2: MOV A , # 1 MOV 45 , A MOV A,#00H CALL READ_RANDOM JC MAIN2 MOV 35 , A MAIN3: MOV A , # 2 MOV 45 , A MOV A,#00H CALL READ_RANDOM JC MAIN3 MOV 36 , A MAIN4: MOV A , # 3 MOV 45 , A MOV A,#00H CALL READ_RANDOM JC MAIN4 MOV 37 , A MAIN5: MOV A , # 4 MOV 45 , A MOV A,#00H
009F 00A2 00A4 00A6 00A8 00AA 00AC 00AF 00B1 00B3 00B5 00B7 00B9 00BC 00BE 00C0 00C2 00C4 00C6 00C9 00CB 00CD 00CF 00D1 00D3 00D6 00D8 00DA 00DC 00DE 00E0 00E3 00E5 00E7 00E9 00EB 00ED 00EF 00F2 00F5 00F8 00FB 00FE
1205C0 40F5 F526 7405 F52D 7400 1205C0 40F5 F527 7406 F52D 7400 1205C0 40F5 F528 7407 F52D 7400 1205C0 40F5 F529 7408 F52D 7400 1205C0 40F5 F52A 7409 F52D 7400 1205C0 40F5 F52B D2A1 C200 C201 C202 758038 1204A9 1204BF 758038 1204A9 1204BA
162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218
CALL READ_RANDOM JC MAIN5 MOV 38 , A MAIN6: MOV A , # 5 MOV 45 , A MOV A,#00H CALL READ_RANDOM JC MAIN6 MOV 39 , A MAIN7: MOV A , # 6 MOV 45 , A MOV A,#00H CALL READ_RANDOM JC MAIN7 MOV 40 , A MAIN8: MOV A , # 7 MOV 45 , A MOV A,#00H CALL READ_RANDOM JC MAIN8 MOV 41 , A MAIN9: MOV A , # 8 MOV 45 , A MOV A,#00H CALL READ_RANDOM JC MAIN9 MOV 42 , A MAIN10: MOV A , # 9 MOV 45 , A MOV A,#00H CALL READ_RANDOM JC MAIN10 MOV 43 , A SETB WP CLR RST_FLG CLR CLR_FLG1 CLR CLR_FLG2 ;Initialize LCD MOV 128 , # 038H LCALL COMMAND_BYTE LCALL DELAY41 MOV 128 , # 038H LCALL COMMAND_BYTE LCALL DELAY1
010A 758038 010D 1204A9 5x7 char 0110 1204BA 0113 0116 0119 011C 011F 0122 0125 0128 012B 012E 0131 0134 0137 013A 013D 0140 0143 0146 0149 014C 014F 0152 0155 0158 015B 015E 0161 0164 0167 016A 016D 0170 0173 758008 1204A9 1204BA 75800C 1204A9 1204BA 758006 1204A9 1204BA 120478 1204BF 20B303 020290 209003 02017F 209303 0201B3 209503 0201E7 209703 02021B 209103 02024F 209203 02025C 209403 020269 209603 020276 20B003 020283 20B203 0202A7
219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274
MOV 128 , # 038H LCALL COMMAND_BYTE LCALL DELAY1 MOV 128 , # 038H LCALL COMMAND_BYTE LCALL DELAY1 ;1/16 duty,
MOV 128 , # 008H LCALL COMMAND_BYTE LCALL DELAY1 MOV 128 , # 00CH LCALL COMMAND_BYTE LCALL DELAY1 MOV 128 , # 006H LCALL COMMAND_BYTE LCALL DELAY1 LCALL DISPLAY MAIN_LP1: LCALL JB LJMP NXT_KEY1: JB LJMP NXT_KEY2: JB LJMP NXT_KEY3: JB LJMP NXT_KEY4: JB LJMP NXT_KEY5: JB LJMP NXT_KEY6: JB LJMP NXT_KEY7: JB LJMP NXT_KEY8: JB LJMP NXT_KEY9: JB LJMP NXT_KEY10: JB LJMP NXT_KEY11: DELAY41 KEY0,NXT_KEY1 ACT_KEY0 KEY1,NXT_KEY2 ACT_KEY1 KEY2,NXT_KEY3 ACT_KEY2 KEY3,NXT_KEY4 ACT_KEY3 KEY4,NXT_KEY5 ACT_KEY4 KEY5,NXT_KEY6 ACT_KEY5 KEY6,NXT_KEY7 ACT_KEY6 KEY7,NXT_KEY8 ACT_KEY7 KEY8,NXT_KEY9 ACT_KEY8 KEY9,NXT_KEY10 ACT_KEY9 KEY10,NXT_KEY11 ACT_KEY10
0176 0179 017C 017F 0181 0183 0186 0189 018C 018E 0190 0191 0193 0195 0197 0198 019A 019C 019E 019F 01A1 01A3 01A5 01A6 01A8 01AA 01AD 01B0 01B3 01B5 01B7 01BA 01BD 01C0 01C2 01C4 01C5 01C7 01C9 01CB 01CC 01CE 01D0 01D2
20B103 0202B2 020131 C201 C202 752131 200003 0201B0 E522 2401 D4 F522 E523 3400 D4 F523 E52A 2401 D4 F52A E52B 3400 D4 F52B C200 12044A 1204C8 020131 C201 C202 752132 200003 0201E4 E524 2401 D4 F524 E525 3400 D4 F525 E52A 2401 D4
275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331
JB LJMP NXT_KEY12: LJMP ACT_KEY1: CLR CLR MOV 33 , # '1' JB JMP INC_CNT1: MOV A , 34 ADD DA MOV 34 , A MOV A , 35 ADDC DA MOV 35 , A
MOV A , 42 ADD A,#01H DA A MOV 42 , A MOV A , 43 ADDC A,#00H DA A MOV 43 , A CLR RST_FLG LCALL VOTE_CASTED LCALL SAVE_DATA EXIT_KEY1: LJMP MAIN_LP1 ACT_KEY2: CLR CLR MOV 33 , # '2' JB JMP INC_CNT2: MOV A , 36 ADD DA MOV 36 , A MOV A , 37 ADDC DA MOV 37 , A MOV A , 42 ADD DA CLR_FLG1 CLR_FLG2 RST_FLG,INC_CNT2 EXIT_KEY2 A,#01H A A,#00H A
A,#01H A
01D3 01D5 01D7 01D9 01DA 01DC 01DE 01E1 01E4 01E7 01E9 01EB 01EE 01F1 01F4 01F6 01F8 01F9 01FB 01FD 01FF 0200 0202 0204 0206 0207 0209 020B 020D 020E 0210 0212 0215 0218
F52A E52B 3400 D4 F52B C200 12044A 1204C8 020131 C201 C202 752133 200003 020218 E526 2401 D4 F526 E527 3400 D4 F527 E52A 2401 D4 F52A E52B 3400 D4 F52B C200 12044A 1204C8 020131
332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388
MOV 42 , A MOV A , 43 ADDC A,#00H DA A MOV 43 , A CLR RST_FLG LCALL VOTE_CASTED LCALL SAVE_DATA EXIT_KEY2: LJMP ACT_KEY3: CLR CLR MOV 33 , # '3' JB JMP INC_CNT3: MOV A , 38 ADD DA MOV 38 , A MOV A , 39 ADDC DA MOV 39 , A MAIN_LP1 CLR_FLG1 CLR_FLG2 RST_FLG,INC_CNT3 EXIT_KEY3 A,#01H A A,#00H A
MOV A , 42 ADD A,#01H DA A MOV 42 , A MOV A , 43 ADDC A,#00H DA A MOV 43 , A CLR RST_FLG LCALL VOTE_CASTED LCALL SAVE_DATA EXIT_KEY3: LJMP ACT_KEY4: CLR CLR MOV 33 , # '4' JB JMP INC_CNT4: MOV A , 40 ADD DA MOV 40 , A MAIN_LP1
022F 0231 0233 0234 0236 0238 023A 023B 023D 023F 0241 0242 0244 0246 0249 024C
E529 3400 D4 F529 E52A 2401 D4 F52A E52B 3400 D4 F52B C200 12044A 1204C8 020131
389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445
A,#00H A
MOV A , 42 ADD A,#01H DA A MOV 42 , A MOV A , 43 ADDC A,#00H DA A MOV 43 , A CLR RST_FLG LCALL VOTE_CASTED LCALL SAVE_DATA EXIT_KEY4: LJMP MAIN_LP1
;key to see total vote casted for candidate-1 ACT_KEY5: CLR CLR_FLG1 CLR CLR_FLG2 LCALL DISP_CNT1 MOV 33 , # '5' LJMP MAIN_LP1 ;key to see total vote casted for candidate-2 ACT_KEY6: CLR CLR_FLG1 CLR CLR_FLG2 LCALL DISP_CNT2 MOV 33 , # '6' LJMP MAIN_LP1 ;key to see total vote casted for candidate-3 ACT_KEY7: CLR CLR_FLG1 CLR CLR_FLG2 LCALL DISP_CNT3 MOV 33 , # '7' LJMP MAIN_LP1 ;key to see total vote casted for candidate-4 ACT_KEY8: CLR CLR_FLG1 CLR CLR_FLG2 LCALL DISP_CNT4 MOV 33 , # '8' LJMP MAIN_LP1 ;key to see total number of vote casted ACT_KEY9: CLR CLR_FLG1 CLR CLR_FLG2 LCALL DISP_TOTAL
028A 028D
752139 020131
02C1 02C4 02C7 02CA 02CD 02D0 02D3 02D6 02D9 02DB 02DD 02DE 02E0 02E2 02E5 02E7 02E9 02EB 02ED 02F0
758001 1204A9 1204BF 900730 120499 7580C6 1204A9 1204BF E52B 54F0 C4 2430 F580 1204AE E52B 540F 2430 F580 1204AE E52A
446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502
MAIN_LP1
;key to reset all counters ACT_KEY0: JNB CLR_FLG2,SKP_ACT0 LCALL CLR_CNTRS LCALL SAVE_DATA CLR CLR_FLG1 CLR CLR_FLG2 SJMP EXIT_ACT0 SKP_ACT0: SETB CLR_FLG1 MOV 33 , # '0' EXIT_ACT0: LJMP MAIN_LP1 ;key to reset all counters ACT_KEY10: JNB CLR_FLG1,EXIT_ACT10 SETB CLR_FLG2 MOV 33 , # 'a' EXIT_ACT10: LJMP MAIN_LP1 ;reset key for enabling new vote casting ACT_KEY11: CLR CLR_FLG1 CLR CLR_FLG2 MOV 33 , # 62H SETB LCALL LJMP RST_FLG CAST_VOTE MAIN_LP1
DISP_TOTAL: MOV 128 , # 001H LCALL COMMAND_BYTE LCALL DELAY41 MOV DPTR,#MSG_TOTAL LCALL WRITE_MSG MOV 128 , # 0C6H LCALL COMMAND_BYTE LCALL DELAY41 MOV A , 43 ANL A,#0F0H SWAP A ADD A,#30H MOV 128 , A LCALL DATA_BYTE MOV A , 43 ANL A,#0FH ADD A,#30H MOV 128 , A LCALL DATA_BYTE MOV A , 42
02F2 02F4 02F5 02F7 02F9 02FC 02FE 0300 0302 0304 0307 0308 030B 030E 0311 0314 0317 031A 031D 0320 0322 0324 0325 0327 0329 032C 032E 0330 0332 0334 0337 0339 033B 033C 033E 0340 0343 0345 0347 0349 034B 034E 034F 0352 0355 0358 035B 035E 0361 0364 0367 0369 036B
54F0 C4 2430 F580 1204AE E52A 540F 2430 F580 1204AE 22 758001 1204A9 1204BF 9006FE 120499 7580C6 1204A9 1204BF E523 54F0 C4 2430 F580 1204AE E523 540F 2430 F580 1204AE E522 54F0 C4 2430 F580 1204AE E522 540F 2430 F580 1204AE 22 758001 1204A9 1204BF 90070A 120499 7580C6 1204A9 1204BF E525 54F0 C4
503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559
ANL SWAP ADD MOV 128 , A LCALL MOV A , 42 ANL ADD MOV 128 , A LCALL RET
DISP_CNT1: MOV 128 , # 001H LCALL COMMAND_BYTE LCALL DELAY41 MOV DPTR,#MSG_CNT1 LCALL WRITE_MSG MOV 128 , # 0C6H LCALL COMMAND_BYTE LCALL DELAY41 MOV A , 35 ANL A,#0F0H SWAP A ADD A,#30H MOV 128 , A LCALL DATA_BYTE MOV A , 35 ANL A,#0FH ADD A,#30H MOV 128 , A LCALL DATA_BYTE MOV A , 34 ANL A,#0F0H SWAP A ADD A,#30H MOV 128 , A LCALL DATA_BYTE MOV A , 34 ANL A,#0FH ADD A,#30H MOV 128 , A LCALL DATA_BYTE RET DISP_CNT2: MOV 128 , # 001H LCALL COMMAND_BYTE LCALL DELAY41 MOV DPTR,#MSG_CNT2 LCALL WRITE_MSG MOV 128 , # 0C6H LCALL COMMAND_BYTE LCALL DELAY41 MOV A , 37 ANL A,#0F0H SWAP A
036C 036E 0370 0373 0375 0377 0379 037B 037E 0380 0382 0383 0385 0387 038A 038C 038E 0390 0392 0395 0396 0399 039C 039F 03A2 03A5 03A8 03AB 03AE 03B0 03B2 03B3 03B5 03B7 03BA 03BC 03BE 03C0 03C2 03C5 03C7 03C9 03CA 03CC 03CE 03D1 03D3 03D5 03D7 03D9 03DC 03DD 03E0
2430 F580 1204AE E525 540F 2430 F580 1204AE E524 54F0 C4 2430 F580 1204AE E524 540F 2430 F580 1204AE 22 758001 1204A9 1204BF 900716 120499 7580C6 1204A9 1204BF E527 54F0 C4 2430 F580 1204AE E527 540F 2430 F580 1204AE E526 54F0 C4 2430 F580 1204AE E526 540F 2430 F580 1204AE 22 758001 1204A9
560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616
ADD MOV 128 , A LCALL MOV A , 37 ANL ADD MOV 128 , A LCALL MOV A , 36 ANL SWAP ADD MOV 128 , A LCALL MOV A , 36 ANL ADD MOV 128 , A LCALL RET
A,#30H DATA_BYTE A,#0FH A,#30H DATA_BYTE A,#0F0H A A,#30H DATA_BYTE A,#0FH A,#30H DATA_BYTE
DISP_CNT3: MOV 128 , # 001H LCALL COMMAND_BYTE LCALL DELAY41 MOV DPTR,#MSG_CNT3 LCALL WRITE_MSG MOV 128 , # 0C6H LCALL COMMAND_BYTE LCALL DELAY41 MOV A , 39 ANL A,#0F0H SWAP A ADD A,#30H MOV 128 , A LCALL DATA_BYTE MOV A , 39 ANL A,#0FH ADD A,#30H MOV 128 , A LCALL DATA_BYTE MOV A , 38 ANL A,#0F0H SWAP A ADD A,#30H MOV 128 , A LCALL DATA_BYTE MOV A , 38 ANL A,#0FH ADD A,#30H MOV 128 , A LCALL DATA_BYTE RET DISP_CNT4: MOV 128 , # 001H LCALL COMMAND_BYTE
03E3 03E6 03E9 03EC 03EF 03F2 03F5 03F7 03F9 03FA 03FC 03FE 0401 0403 0405 0407 0409 040C 040E 0410 0411 0413 0415 0418 041A 041C 041E 0420 0423 0424 0426 0428 042A 042C 042E 0430 0432 0434 0436 0438 043A 043D 0440 0443 0446 0449 044A 044D 0450 0453 0456 0459 045B
1204BF 900723 120499 7580C6 1204A9 1204BF E529 54F0 C4 2430 F580 1204AE E529 540F 2430 F580 1204AE E528 54F0 C4 2430 F580 1204AE E528 540F 2430 F580 1204AE 22 7400 F522 F523 F524 F525 F526 F527 F528 F529 F52A F52B 758001 1204A9 1204BF 9006EE 120499 22 758001 1204A9 1204BF 9006DE 120499 C2A0 22
617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673
LCALL DELAY41 MOV DPTR,#MSG_CNT4 LCALL WRITE_MSG , # 0C6H LCALL COMMAND_BYTE LCALL DELAY41 41 ANL A,#0F0H SWAP A ADD A,#30H , A LCALL DATA_BYTE 41 ANL A,#0FH ADD A,#30H , A LCALL DATA_BYTE 40 ANL A,#0F0H SWAP A ADD A,#30H , A LCALL DATA_BYTE 40 ANL A,#0FH ADD A,#30H , A LCALL DATA_BYTE RET
CLR_CNTRS: MOV A,#00H MOV 34 , A MOV 35 , A MOV 36 , A MOV 37 , A MOV 38 , A MOV 39 , A MOV 40 , A MOV 41 , A MOV 42 , A MOV 43 , A MOV 128 , # 001H LCALL COMMAND_BYTE LCALL DELAY41 MOV DPTR,#MSG_CLR LCALL WRITE_MSG RET VOTE_CASTED: MOV 128 , # 001H LCALL COMMAND_BYTE LCALL DELAY41 MOV DPTR,#MSG4 LCALL WRITE_MSG CLR LED RET
0478 047B 047E 0481 0484 0487 048A 048D 0490 0493 0496 0498 0499 049B 049C 049F 04A0 04A2 04A5 04A6
758080 1204A9 1204BA 9006AE 120499 7580C0 1204A9 1204BA 9006BE 120499 D2A0 22 7400 93 B42401 22 F580 1204AE A3 020499
674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730
CAST_VOTE: MOV 128 , # 001H LCALL COMMAND_BYTE LCALL DELAY41 MOV DPTR,#MSG3 LCALL WRITE_MSG SETB LED RET CLR_LCD: MOV 128 , # 001H LCALL COMMAND_BYTE LCALL DELAY41 RET DISPLAY: MOV 128 , # 080H LCALL COMMAND_BYTE LCALL DELAY1 MOV LCALL DPTR,#MSG1 WRITE_MSG
MOV 128 , # 0C0H LCALL COMMAND_BYTE LCALL DELAY1 MOV LCALL SETB RET WRITE_MSG: MOV A,#00H MOVC A,@A+DPTR CJNE A,#'$',WRITE_CONT RET WRITE_CONT: MOV 128 , A LCALL DATA_BYTE INC DPTR LJMP WRITE_MSG COMMAND_BYTE: CLR LJMP DATA_BYTE: SETB NOP CMD10: CLR DPTR,#MSG2 WRITE_MSG LED
00 D2A7 00 C2A7 22
04C8 04CA 04CD 04CF 04D1 04D3 04D5 04D7 04DA 04DC 04DF 04E1 04E3 04E5 04E7 04E9 04EC 04EE 04F1 04F3 04F5 04F7 04F9 04FB 04FE 0500 0503 0505 0507 0509
C2A1 1204BF E522 F52C 7400 F52D 7400 120584 40F1 1204BF E523 F52C 7401 F52D 7400 120584 40EE 1204BF E524 F52C 7402 F52D 7400 120584 40EE 1204BF E525 F52C 7403 F52D
731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787
NOP SETB NOP CLR RET DELAY1: MOV DELAY10: DJNZ RET DELAY41: MOV MOV DLP410: DJNZ DJNZ RET
LCD_EN LCD_EN
R0,#00H R0,DELAY10
SAVE_DATA: CLR WP LCALL DELAY41 SAVE1: MOV A , 34 MOV 44 , A MOV A , # 0 MOV 45 , A MOV A,#00H LCALL WRITE_BYTE JC SAVE1 SAVE2: LCALL DELAY41 MOV A , 35 MOV 44 , A MOV A , # 1 MOV 45 , A MOV A,#00H LCALL WRITE_BYTE JC SAVE2 SAVE3: LCALL DELAY41 MOV A , 36 MOV 44 , A MOV A , # 2 MOV 45 , A MOV A,#00H LCALL WRITE_BYTE JC SAVE3 SAVE4: LCALL DELAY41 MOV A , 37 MOV 44 , A MOV A , # 3 MOV 45 , A
050B 050D 0510 0512 0515 0517 0519 051B 051D 051F 0522 0524 0527 0529 052B 052D 052F 0531 0534 0536 0539 053B 053D 053F 0541 0543 0546 0548 054B 054D 054F 0551 0553 0555 0558 055A 055D 055F 0561 0563 0565 0567 056A 056C 056F 0571 0573 0575 0577 0579 057C
7400 120584 40EE 1204BF E526 F52C 7404 F52D 7400 120584 40EE 1204BF E527 F52C 7405 F52D 7400 120584 40EE 1204BF E528 F52C 7406 F52D 7400 120584 40EE 1204BF E529 F52C 7407 F52D 7400 120584 40EE 1204BF E52A F52C 7408 F52D 7400 120584 40EE 1204BF E52B F52C 7409 F52D 7400 120584 40EE
788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844
MOV A,#00H LCALL WRITE_BYTE JC SAVE4 SAVE5: LCALL DELAY41 MOV A , 38 MOV 44 , A MOV A , # 4 MOV 45 , A MOV A,#00H LCALL WRITE_BYTE JC SAVE5 SAVE6: LCALL DELAY41 MOV A , 39 MOV 44 , A MOV A , # 5 MOV 45 , A MOV A,#00H LCALL WRITE_BYTE JC SAVE6 SAVE7: LCALL DELAY41 MOV A , 40 MOV 44 , A MOV A , # 6 MOV 45 , A MOV A,#00H LCALL WRITE_BYTE JC SAVE7 SAVE8: LCALL DELAY41 MOV A , 41 MOV 44 , A MOV A , # 7 MOV 45 , A MOV A,#00H LCALL WRITE_BYTE JC SAVE8 SAVE9: LCALL DELAY41 MOV A , 42 MOV 44 , A MOV A , # 8 MOV 45 , A MOV A,#00H LCALL WRITE_BYTE JC SAVE9 SAVE10: LCALL DELAY41 MOV A , 43 MOV 44 , A MOV A , # 9 MOV 45 , A MOV A,#00H LCALL WRITE_BYTE JC SAVE10
1204BF D2A1 22
845 846 847 848 849 850 851 852 853 854
DELAY41 WP
; AT24Cxx Byte Write function. ; Called with programmable address in A, ; register ADDR_LO, data in register ; Does not wait for write cycle to ; Returns CY set to indicate that the bus ; or that the addressed device failed to ; Destroys A. JC RL ORL A , # 160 CLR LCALL X49 A ACC.0 LCALL JC MOV A , 45 JC MOV A , 44 LCALL JC CLR X48: LCALL X49: RET READ_CURRENT: ; AT24Cxx Current Address Read function. STOP X48 C SHOUT ; ; abort if no ; clear error LCALL X48 SHOUT ; ; abort if no X48 START ; abort if bus ; programmable ; specify write SHOUT ;
byte address in ZDATA. 855 complete. 856 is not available 857 acknowledge. 0584 1205E8 0587 401C not available 0589 23 address to bits 3:1 058A 44A0 058C C2E0 operation 058E 120627 send device address 0591 400F acknowledge 0593 E52D 0595 120627 0598 4008 acknowledge 059A E52C 059C 120627 send data 059F 4001 acknowledge 05A1 flag 05A2 05A5 C3 120610 22 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886
; abort if no
887 Returns data in A. 888 is not available 889 acknowledge. 05A6 1205E8 05A9 4014 not available 05AB 23 address to bits 3:1 05AC 44A0 05AE D2E0 operation 05B0 120627 device address 05B3 4007 acknowledge 05B5 12065A receive data byte 05B8 120698 not acknowledge byte 05BB C3 flag 05BC 05BF 120610 22 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 is not available 915 acknowledge. 05C0 05C2 C0F0 F5F0 916 917 918 919 920 921 922 923 924 925 926
; Called with programmable address in A. ; Returns CY set to indicate that the bus ; or that the addressed device failed to LCALL X45 A ACC.0 LCALL JC X44 LCALL LCALL CLR X44: LCALL X45: RET READ_RANDOM: ; AT24Cxx Random Read function. ; Called with programmable address in A, ; register ADDR_LO. Returns data in A. ; Returns CY set to indicate that the bus ; or that the addressed device failed to PUSH 240 MOV 240 , A ; Send dummy write command to set LCALL X47 A START ; abort if bus ; programmable STOP C SHIN NAK START ; abort if bus ; programmable ; specify read SHOUT ; send
byte address in
internal address. 05C4 1205E8 05C7 401C not available 05C9 23 address to bits 3:1 05CA 44A0 JC RL ORL A , # 160
05CC C2E0 operation 05CE 120627 send device address 05D1 400F acknowledge 05D3 E52D 05D5 120627 05D8 4008 acknowledge function. 05DA 05DC 05DF 05E2 05E5 05E7 E5F0 1205A6 0205E5 120610 D0F0 22
927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 MOV A , 240 MOV A , 45
CLR
ACC.0 LCALL
JC
X46
; abort if no
JC
LCALL X46
SHOUT ; ; abort if no
; Send START, defined as high-to-low SDA ; Return with SCL, SDA low. ; Returns CY set if bus is not available. SETB SETB SDA SCL NOP NOP NOP NOP NOP ; Verify bus available. JNB JNB SDA, X40 SCL, X40 NOP NOP NOP NOP NOP CLR NOP SDA ; NOP NOP NOP NOP ; enforce setup ; jump if not ; jump if not
D2A3 D2A2 00 00 00 00 00
05F1 30A31A high 05F4 30A217 high 05F7 00 05F8 00 05F9 00 05FA 00 05FB 00 delay and cycle delay 05FC C2A3 05FE 00 05FF 00 0600 00 0601 00 0602 00
0603 C2A2 0605 00 0606 00 0607 00 0608 00 0609 00 060A C3 error flag 060B 02060F 060E 060F D3 22
975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 JMP X40: SETB X41: RET STOP:
SCL
; clear
; Send STOP, defined as low-to-high SDA ; SCL expected low on entry. Return with CLR SDA NOP NOP NOP NOP NOP NOP SETB NOP NOP NOP NOP NOP SETB NOP NOP NOP NOP NOP RET SHOUT: ; Shift out a byte to the AT24Cxx, most ; SCL, SDA expected low on entry. Return ; Called with data to send in A. ; Returns CY set to indicate failure by ; Destroys A.
with SCL high. SCL, SDA high. 0610 0612 enforce 0613 0614 0615 0616 0617 0618 061A delay 061B 061C 061D 061E 061F 0621 0622 0623 0624 0625 0626 993 C2A3 994 00 995 SCL low and data setup 00 996 00 997 00 998 00 999 00 1000 D2A2 1001 00 1002 00 00 00 00 D2A3 00 00 00 00 00 22 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 with SCL low. 1020 1021 slave to acknowledge. 1022 1023 ;
SDA
0627 0629 062C CY 062D bit 062F enforce 0630 0631 0632 0633 0634 clock 0636 high 0637 0638 0639 063A 063B clock 063D 0640 ACK 0642 enforce 0643 0644 0645 0646 0647 clock 0649 enforce 064A 064B 064C 064D 064E ACK bit 0650 0652 0653 0654 0655 0656 0657 0659
00 1029 SCL low and data setup 00 1030 00 1031 00 1032 00 1033 D2A2 1034 00 00 00 00 00 C2A2 D5F0EC D2A3 1035 1036 1037 1038 1039 1040 1041 1042 1043 DJNZ 240 , X42 SETB NOP
SCL
SCL
; drop
SDA NOP NOP NOP NOP NOP SETB NOP NOP NOP NOP NOP MOV
00 1044 SCL low and tAA 00 1045 00 1046 00 1047 00 1048 D2A2 1049 00 SCL high 00 00 00 00 A2A3 C2A2 00 00 00 00 00 D0F0 22 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 CLR
SCL
; raise ACK ;
C, SDA
POP 240 RET SHIN: ; Shift in a byte from the AT24Cxx, most
1069 SCL low. 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116
; SCL expected low on entry. Return with ; Returns received data byte in A. PUSH 240 MOV 240 , # 8 X43: SETB NOP NOP NOP NOP NOP SETB NOP NOP NOP NOP NOP MOV RLC CLR A SCL NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP POP 240 RET ACK: ; Clock out an acknowledge bit (low). ; SCL expected low on entry. Return with CLR NOP SDA NOP NOP NOP NOP ; ACK bit ; enforce SCL low
065A 065C
C0F0 75F008
065F D2A3 input 0661 00 and data setup 0662 00 0663 00 0664 00 0665 00 0666 D2A2 clock 0668 00 high 0669 00 066A 00 066B 00 066C 00 066D A2A3 input bit 066F 33 byte 0670 C2A2 0672 00 0673 00 0674 00 0675 00 0676 00 0677 D5F0E5 067A 00 067B 00 067C 00 067D 00 067E 00 067F D0F0 0681 22
SDA
SCL
C, SDA
SCL, SDA low. 0682 C2A3 0684 00 and data setup 0685 00 0686 00 0687 00 0688 00
0689 clock 068B enforce 068C 068D 068E 068F 0690 clock 0692 0693 0694 0695 0696 0697
1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135
SETB NOP NOP NOP NOP NOP CLR NOP NOP NOP NOP NOP RET NAK:
SCL
; raise ;
SCL
; drop
; Clock out a negative acknowledge bit ; SCL expected low on entry. Return with SETB NOP SDA NOP NOP NOP NOP SETB NOP NOP NOP NOP NOP CLR NOP NOP NOP NOP NOP RET MSG1: DB ' VOTING-MACHINE$' ; NAK bit ; enforce SCL low
(high). SCL low, SDA high. 0698 D2A3 069A 00 and data setup 069B 00 069C 00 069D 00 069E 00 069F D2A2 raise clock 06A1 00 high 06A2 00 06A3 00 06A4 00 06A5 00 06A6 C2A2 clock 06A8 00 06A9 00 06AA 00 06AB 00 06AC 00 06AD 22 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159
SCL
; ; enforce SCL
SCL
; drop
1160 1161
MSG2:
06BE 06C2 06C6 06CA 06CE 06D2 06D6 06DA 06DE 06E2 06E6 06EA 06EE 06F2 06F6 06FA 06FE 0702 0706 070A 070E 0712 0716 071A 071E 0722 0723 0727 072B 072F 0730 0734 0738 073C
2A456C65 6374696F 6E203230 30342A24 2A434153 54205448 4520564F 54452A24 2A2A564F 54452043 41535445 442A2A24 2A2A416C 6C20436C 65617265 642A2A24 56697368 7520566F 74657324 4E696468 6920566F 74657324 50726572 6E612056 6F746573 24 44657665 73682056 6F746573 24 546F7461 6C20566F 74652043 61737424
1162
DB
'*Election 2004*$'
MSG_CLR: DB
'**All Cleared**$'
MSG_CNT1: DB
'Vishu Votes$'
MSG_CNT2: DB
'Nidhi Votes$'
MSG_CNT3: DB
'Prerna Votes$'
MSG_CNT4: DB
'Devesh Votes$'
MSG_TOTAL: DB
N A M E X44. . . . . . . . SAVE1. . . . . . . DELAY1 . . . . . . 229 233 738# P0 . . . . . . . . CNT3H. . . . . . . 359 590 KEY7 . . . X45. . . . SAVE2. . . EXIT_ACT0. ACT_KEY10. P1 . . . . CNT4H. . . 392 623 KEY8 . . . FADDR. . . 926 X46. . . . SAVE3. . . ACT_KEY11. P2 . . . . B. . . . . 937 943 1041 1062 . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ATTRIBUTES
REFERENCES 898 903# 756# 763 217 221 225 237 695 702
65# 114 49# 172 356 596 654 802 36# 263 892 905# 764# 772 456 460# 273 464# 66# 115 51# 188 389 629 656 820 37# 266 16# 864 895 929 933 940# 773# 781 276 472# 67# 116 64# 917 918 1024 1025 1073 1074
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
1096 1102 CNT1L. . . . . . . 292 535 KEY9 . . . . . . . SCL. . . . . . . . 963 975 1040 1049 1056 1082 1090 1117 1123 1143 1149 CNT1_ADH . X47. . . . SAVE4. . . NXT_KEY10. SP . . . . P3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . N C C C N N NUMB ADDR ADDR ADDR NUMB NUMB 0001h 05E5H 0500H 0170H 0081h 00B0h A A A 6# 135 768 923 939 942# 782# 790 269 271# 69# 107 68# 117 N NUMB B ADDR B ADDR 0022h 00B0H.0 A 00A0H.2 A 44# 132 289 541 649 757 38# 269 26# 125 954 1001 1034
CNT2L. . . . . . . 323 568 KEY_CODE . . . . . 348 381 438 446 CNT2_ADH . . . . . X48. . . . . . . . 878# SAVE5. . . . . . . NXT_KEY11. . . . . CNT3L. . . . . . . 355 601 CNT3_ADH . X49. . . . SAVE6. . . DISP_CNT1. NXT_KEY12. MAIN . . . CNT4L. . . 388 634 . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N NUMB N NUMB
0024h 0021h
46# 148 320 574 651 775 43# 285 316 414 422 430
N NUMB C ADDR C ADDR C ADDR N NUMB N C C C C C N NUMB ADDR ADDR ADDR ADDR ADDR NUMB
0003h 05A2H 0512H 0176H 0026h 0005h 05A5H 0524H 0308H 017CH 0024H 0028h
A A A
459 467 476 8# 151 786 867 871 875 791# 799 272 274# 48# 164 352 607 653 793 10# 167 804 861 880# 800# 808 413 515# 275 278# 78 100# 50# 180 385 640 655 811 22# 122 732 12# 183 822 879 904 941 809# 817 421 548# 198# 203 5# 127 759 818# 826 662 1170# 429 581# 63# 865 896 28# 118 205 7# 143 777 827# 835 478 675# 437 614# 308 339 371 753# 9# 159 795 11# 175 813 486 1185# 452 647# 60# 207 282
A A A A A
LCD_EN . . . . . . 734 CNT4_ADH . . . . . STOP . . . . . . . 989# SAVE7. . . DISP_CNT2. MAIN10 . . CNT1_ADL . SAVE8. . . MSG_CLR. . DISP_CNT3. ACC. . . . 927 WP . . . . 754 846 CNT2_ADL . SAVE9. . . CAST_VOTE. DISP_CNT4. SAVE_DATA. 404 453 CNT3_ADL . CNT4_ADL . MSG_TOTAL. CLR_CNTRS. CLR_FLG1 . 313 345 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B ADDR N NUMB C ADDR C C C N C C C N ADDR ADDR ADDR NUMB ADDR ADDR ADDR NUMB
00A0H.7 A 0007h 0610H 0536H 034FH 00DAH 0000h 0548H 06EEH 0396H 00E0h A A A A A A A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B ADDR N C C C C N N C C B NUMB ADDR ADDR ADDR ADDR NUMB NUMB ADDR ADDR ADDR
A A A A
378 411 419 427 435 443 454 458 465 473 KEY10. . . . . . . CLR_FLG2 . . . . . 314 346 428 436 444 451 455 466 474 ADDR_HI. . . . . . KEY11. . . . . . . TOTALH . . . . . . 305 333 398 401 491 497 658 838 LCD_DATA . . . . . 219 223 483 488 495 500 506 511 516 521 528 533 539 544 549 554 561 566 572 577 582 587 594 599 605 610 615 620 627 632 638 643 659 667 676 686 693 700 717 DATA_BYTE. . . . . 512 529 562 567 573 578 595 600 606 611 628 633 639 644 START. . . . . . . 947# IE . . . ACK. . . INC_CNT1 SAVE10 . DELAY10. . . . . . . . . . . . . . . . . . . . . . . . . . C ADDR N C C C C NUMB ADDR ADDR ADDR ADDR 05E8H 00A8h 0682H 018CH 056CH 04BCH A 718 726# 860 891 922 70# 110 1106# 286 288# 836# 844 740# 741 C ADDR 04AEH A 496 501 507 534 540 545 N NUMB 0080h 20# 211 215 227 231 235 N NUMB B ADDR N NUMB 002Eh 00B0H.1 A 002Bh 56# 41# 275 53# 204 302 336 365 368 B ADDR B ADDR 00B0H.2 A 0020H.2 A 40# 272 61# 208 283 379 412 420
A A A A
A A
317 319# 243 450# 52# 196 298 332 361 364 502 508 657
829 TOTAL_ADH. . . . . WRITE_MSG. . . . . 586 619 698 705 INC_CNT3 . . . . . VOTE_CASTED. . . . 403 666# ACT_KEY1 . . . . . MAIN_LP1 . . . . . 342 423 431
N NUMB C ADDR
0009h 0499H
A A A A
711# 720 349 351# 307 338 370 246 281# 240# 279 310 374 407 415 439 447 461
469 479 RST_FLG. . . . . . 306 317 382 402 SHIN . . . . EXIT_ACT10 . INC_CNT4 . . ACT_KEY2 . . COMMAND_BYTE 224 228 489 517 522 550 555 583 588 616 621 660 668 677 687 694 701 723# SHOUT. . . . . . . 897 928 CLR_LCD. . DISP_TOTAL EXIT_KEY1. ACT_KEY3 . NXT_KEY1 . SCON . . . EXIT_KEY2. ACT_KEY4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C ADDR C C C C C N C C ADDR ADDR ADDR ADDR ADDR NUMB ADDR ADDR 0627H 046EH 02C1H 01B0H 01E7H 013AH 0098h 01E4H 021BH A A A A A A A A 866 870 874 932 1016# 685# 445 482# 287 309# 252 344# 242 244# 71# 112 318 341# 255 377# . . . . . . . . . . . . . . . C C C C C ADDR ADDR ADDR ADDR ADDR 065AH 02AFH 0228H 01B3H 04A9H A A A A A 477 900 465 382 249 212 1066# 468# 384# 312# 216 220 B ADDR 0020H.0 A 59# 206 286 337 349 369
C ADDR C ADDR
0140H 04BFH
A A
245 247# 101 102 103 106 119 213 490 518 523
551 556 584 589 617 622 661 669 678 688 744# 755 765 774 783 792 801 810 819 828 837 TMOD . . . . . . . TCON . . . . . . . ZDATA. . . . . . . 776 785 821 830 TOTAL_ADL. DLP410 . . CMD10. . . SKP_ACT0 . EXIT_KEY3. ACT_KEY5 . NXT_KEY3 . ADDR_LO. . 144 152 184 192 200 760 769 778 787 796 805 814 823 832 LED. . . . . . . . 681 707 EXIT_KEY4. ACT_KEY6 . NXT_KEY4 . DISPLAY. . MAIN1. . . ACT_KEY7 . NXT_KEY5 . MAIN2. . . LCD_RS . . 727 MSG1 . . . ACT_KEY8 . NXT_KEY6 . MAIN3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B ADDR C C C C C C C C B C C C C ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR 00A0H.0 A 024CH 025CH 014CH 0478H 0065H 0269H 0152H 0072H 00A0H.5 06AEH 0276H 0158H 007FH A A A A A A A A A A A A A 841 869 931 25# 123 672 383 406# 261 418# 251 253# 238 692# 126# 131 264 426# 254 256# 134# 139 23# 120 724 697 1158# 267 434# 257 259# 142# 147 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . N C C C C C C N NUMB ADDR ADDR ADDR ADDR ADDR ADDR NUMB 0008h 04C3H 04B1H 029FH 0218H 024FH 0146H 002Dh A A A A A A 839 873 13# 191 831 747# 748 749 725 729# 451 457# 350 373# 258 410# 248 250# 55# 128 136 160 168 176 N NUMB N NUMB N NUMB 0089h 0088h 002Ch 845 73# 108 72# 109 54# 758 767 794 803 812
B ADDR
00A0H.3 A
1088 1111 MSG2 . . . . ACT_KEY9 . . NXT_KEY7 . . MAIN4. . . . IP . . . . . KEY0 . . . . NAK. . . . . MSG3 . . . . NXT_KEY8 . . MAIN5. . . . FLAG . . . . KEY1 . . . . MSG4 . . . . NXT_KEY9 . . MAIN6. . . . KEY2 . . . . LCD_RW . . . X40. . . . . MSG_CNT1 . . MAIN7. . . . READ_RANDOM. 154 162 194 202 KEY3 . . . . X41. . . . . MSG_CNT2 . . MAIN8. . . . KEY4 . . . . X42. . . . . READ_CURRENT WRITE_BYTE . 789 798 834 843 WRITE_CONT MSG_CNT3 . MAIN9. . . CNT1H. . . 296 524 KEY5 . . X43. . . MSG_CNT4 CNT2H. . 327 557 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C C C N B C C N ADDR ADDR ADDR NUMB ADDR ADDR ADDR NUMB 04A0H 0716H 00CDH 0023h A A A 850# 714 716# 585 1179# 190# 195 45# 140 293 530 650 766 34# 257 1075# 1096 618 1182# 47# 156 324 563 652 784 35# 260 . . . . . . . . . . . . . . . . . . . . . . . . B C C C B C C C ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR 0090H.5 060FH 070AH 00C0H 0090H.7 062CH 05A6H 0584H A A A A A A A A 909# 32# 251 982 985# 552 1176# 182# 187 33# 254 1026# 1041 884# 938 762 771 780 807 816 825 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C C C C N B C C C C N B C C C B B C C C C ADDR ADDR ADDR ADDR NUMB ADDR ADDR ADDR ADDR ADDR NUMB ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR ADDR 06BEH 0283H 015EH 008CH 00B8h 00B0H.3 0698H 06CEH 0164H 0099H 0020h 0090H.0 06DEH 016AH 00A6H 0090H.3 00A0H.6 060EH 06FEH 00B3H 05C0H A A A A A A A A A A A A A A A A A A A 1137 704 1161# 270 442# 260 262# 150# 155 74# 111 39# 242 901 1132# 679 1164# 263 265# 158# 163 58# 59 60 61 30# 245 670 1167# 266 268# 166# 171 31# 248 24# 121 730 962 963 983# 519 1173# 174# 179 130 138 146 170 178 186
KEY6 . . . . . . .
B ADDR
MODULE INFORMATION: STATIC OVERLAYABLE CODE SIZE = 1828 ---XDATA SIZE = ------DATA SIZE = ------IDATA SIZE = ------BIT SIZE = ------END OF MODULE INFORMATION. REGISTER BANK(S) USED : 0 ASSEMBLY COMPLETE. 0 WARNING(S) 0 ERROR(S)
3.1. TRANSFORMER
Transformer works on the principle of mutual inductance. We know that if two coils or windings are placed on the core of iron, and if we pass alternating current in one winding, back emf or induced voltage is produced in the second winding. We know that alternating current always changes with the time. So if we apply AC voltage across one winding, a voltage will be induced in the other winding. Transformer works on this same principle. It is made of two windings wound around the same core of iron. The winding to which AC voltage is applied is called primary winding. The other winding is called as secondary winding.
We know that Power = Current X Voltage. It is to be noted that input power is equal to output power. Power is not changed. If V2 is greater than V1, then I2 will be less than I1. This type of transformer is called as step up transformer. If V1 is greater than V2, then I1 will be less than I2. This type of transformer is called as step down transformer. For step up transformer, N2>N1, i.e., number of turns of secondary winding is more than those in primary. For step down transformer, N1>N2, i.e., numbers of turns of primary winding is more than those in secondary.
3.2. RESISTORS
The flow of charge (or current) through any material, encounters an opposing force similar in many respect to mechanical friction. This opposing force is called resistance of the material. It is measured in ohms. In some electric circuits resistance is deliberately introduced in the form of the resistor. Resistors are of following types: Wire wound resistors. Carbon resistors. Metal film resistors.
binding material (glue) and moduled in the form of rods. Wire leads are inserted at the two ends. After this an insulating material seals the resistor. Resistors are available in power ratings of 1/10, 1/8, 1/4 , 1/2 , 1.2 watts and values from 1 ohm to 20 ohms. Carbon film resistors are made by deposition carbon film on a ceramic rod. They are cheaper than carbon composition resistors. Cement film resistors are made of thin carbon coating fired onto a solid ceramic substrate. The main purpose is to have more precise resistance values and greater stability with heat. They are made in a small square with leads.
Resistance of a wire is directly proportional to its length and inversely proportional to its thickness.
R R
L 1/A
COLOUR Black Brown Red Orange Yellow Green Blue Violet Grey White Gold Silver
NUMBER MULTIPLIER COLOUR TOLERANCE 0 1 2 3 4 5 6 7 8 9 100 101 102 103 104 105 106 107 108 109 10-1 10-2 Gold Silver No colour 5% 10% 20%
3.4. CAPACITORS
A capacitor can store charge, and its capacity to store charge is called capacitance. Capacitors consist of two conducting plates, separated by an insulating material (known as dielectric). The two plates are joined with two leads. The dielectric could be air, mica, paper, ceramic, polyester, polystyrene, etc. capacitor etc. This dielectric gives name to the capacitor. Like paper capacitor, mica
Types of capacitors:
Such capacitors have disc or hollow tabular shaped dielectric made of ceramic material such as titanium dioxide and barium titanate. Thin coating of silver compounds is deposited on both sides of dielectric disc, which acts as capacitor plates. Leads are attached to each sides of the dielectric disc and whole unit is encapsulated in a moisture proof coating. Disc type capacitors
have very high value up to 0.001uf. Their working voltages range from 3V to 60000V. These capacitors have very low leakage current. Breakdown voltage is very high.
The PCB is often marked with a +sign for the cathode end. Diodes come in all shapes and sizes. They are often marked with a type number. Detailed characteristics of a diode can be found by looking up the type number in a data book. If you know how to measure resistance with a meter then test some diodes. A good one has low resistance in one direction and high in other. They are specialized types of diode available such as the zener and light emitting diode (LED).
3.6. IC
IC (Integrated Circuit) means that all the components of the circuit are fabricated on same chip. Digital ICs are a collection of resistors, diodes, and transistors fabricated on a single piece of semiconductor, usually silicon called a substrate, which is commonly referred to as wafer. The
chip is enclosed in a protective plastic or ceramic package from which pins extend out connecting the IC to other device. Suffix N or P stands for dual-in-line (plastic package (DIP)) while suffix J or I stands for dual-in-lime ceramic package. Also the suffix for W stands for flat ceramic package.
The pins are numbered counter clockwise when viewed from the top of the package with respect to an identity notch or dot at one end of the chip.The manufacturers name can usually be guessed from its logo that is printed on the IC. The IC type number also indicates the manufacturers code. For e.g. DM 408 N SN 7404 indicates National Semiconductor and Texas Instruments.
Other examples are: Fair Child National Semiconductor Motorola Sprague Signetic Burr-Brown Texas Instruments : UA, UAF : DM, LM, LH, LF, and TA. : MC, MFC. : UKN, ULS, ULX. : N/s, NE/SE, and SU. : BB. : SN.
The middle portion i.e. the IC type number tells about the IC function and also the family, which the particular IC belongs to.ICs that belongs to standard TTL series have an identification number that starts with 74; for e.g. 7402, 74LS04, 74S04 etc. ICs that belongs to standard CMOS family their number starts with 4, like 4000, 451B, 4724B, 1400. The 74C, 74HC, 74AC & 74ACT series are newer CMOS series.
Standard TTL 74. Schottky TTL 74s. Low power Schottky 74LS.
Also there are various series with CMOS logic family as metal state CMOS 40 or 140.
testing a TTL circuit. A floating TTL input will measure a DC level between 1.4V to 1.8V when checked with VOM as oscilloscope. If a CMOS input is left floating, it may have disastrous results. The IC may become overheated and eventually destroy itself. For this reason, all inputs to CMOS circuit must be connected to a LOW or HIGH level or to the output of another IC.
3.9. RELAYS
A relay is an electrically operated switch. The relay contacts can be made to operate in the prearranged fashion. For instance, normally open contacts close and normally closed contacts open. In electromagnetic relays, the contacts however complex they might be, they have only two position i.e. OPEN and CLOSED, whereas in case of electromagnetic switches, the contacts can have multiple position
1. Electromagnetic relay:
An electromagnetic relay in its simplest form consists of a coil, a DC current passing through which produces a magnetic field. This magnetic field attracts an armature, which in turn operates the contacts. Normally open contacts close and normally closed contacts open. Electromagnetic relays are made in a large variety of contacts forms.
2. Power relays:
Power relays are multi-pole heavy duty lapper type relays that are capable of switching resistive loads of upto 25amp.. These relays are widely used for a variety of industrial application like control of fractional horse power motors, solenoids, heating elements and so on. These relays usually have button like silver alloy contacts and the contact welding due to heavy in rush current is avoided by wiping action of the contacts to quench the arc during high voltage DC switching thus avoiding the contact welding.
4. Latching Relay:
In a Latching Relay, the relay contacts remain in the last energized position even after removal of signal in the relay control circuit. The contacts are held in the last relay-energized position after removal of energisation either electrically or magnetically. The contacts can be released to the normal position electrically or mechanically.
They are so called, as they resemble quartz crystal in external shapes. These are high performance hermetically sealed miniature or sub-miniature relay widely used in aerospace and military application. These relays usually have gold plated contacts and thus have extremely low contact resistance. Due to low moment of inertia of the armature and also due to statically and dynamically balanced nature of armature, these relays switch quite reliably even under extreme condition of shock and vibration.
6. Co-axial Relay:
A Co-axial Relay has two basic parts, an actuator which is nothing but some kind of a coil and a cavity, housing the relay contacts. The co-axial relay are extensively used for radio frequency switching operations of equipment
The light-sensitive part of the LDR is a wavy track of cadmium sulphide. Light energy triggers the release of extra charge carriers in this material, so that its resistance falls as the level of illumination increases.
A light sensor uses an LDR as part of a voltage divider. The essential circuit of a voltage divider, also called a potential divider, is:
In other words, this circuit gives a LOW voltage when the LDR is in the light, and a HIGH voltage when the LDR is in the shade. The voltage divider circuit gives an output voltage which changes with illumination. A sensor subsystem which functions like this could be thought of as a 'dark sensor' and could be used to control lighting circuits which are switched on automatically in the evening. Perhaps this does not seem terribly exciting, but almost every sensor circuit you can think of uses a voltage divider. There's just no other way to make sensor subsystems work. Here is the voltage divider built with the LDR in place of Rtop :
The resistance of most common types of thermistor decreases as the temperature rises. They are called negative temperature coefficient, or ntc, thermistors. Note the -t next to the circuit symbol. A typical ntc thermistor is made using semiconductor metal oxide materials. (Semiconductors have resistance properties midway between those of conductors and insulators.) As the temperature rises, more charge carriers become available and the resistance falls.
Although less often used, it is possible to manufacture positive temperature coefficient, or ptc, thermistors. These are made of different materials and show an increase in resistance with temperature. How could you make a sensor circuit for use in a fire alarm? You want a circuit which will deliver a HIGH voltage when hot conditions are detected. You need a voltage divider with the ntc thermistor in the Rtop position:
Key point: The biggest change in Vout from a voltage divider is obtained when Rtop and Rbottom are equal in value
Another name for a sound sensor is a microphone. The diagram shows a cermet microphone:
Cermet' stands for 'ceramic' and 'metal'. A mixture of these materials is used in making the sound-sensitive part of the microphone. To make them work properly, cermet microphones need a voltage, usually around 1.5 V across them. A suitable circuit for use with a 9 V supply is:
Fig.3.12.1 microphone
The 4.7 and the 1 resistors make a voltage divider which provides 1.6 V across the microphone. Sound waves generate small changes in voltage, usually in the range 10-20 mV. To isolate these small signals from the steady 1.6 V, a capacitor is used.
The pull down resistor in the first circuit forces Vout to become LOW except when the push button switch is operated. This circuit delivers a HIGH voltage when the switch is pressed. A resistor value of 10 is often used. In the second circuit, the pull up resistor forces Vout to become HIGH except when the switch is operated. Pressing the switch connects Vout directly to 0 V. In other words, this circuit delivers a LOW voltage when the switch is pressed. In circuits which process logic signals, a LOW voltage is called 'logic 0' or just '0', while a HIGH voltage is called 'logic1' or '1'. These voltage divider circuits are perfect for providing input signals for logic systems. What kinds of switches could you use. One variety of push button switch is called a miniature tactile switch. These are small switches which work well with prototype board: