MACRO TESTING: By Kshitij Kulshreshtha

Two Important Phases of the Macro Testing

Macro Test uses a data Independent access scheme. It is done is two major stages First Phase is MSV MSV Tool generates the correspondence solutions for all the relevant macros and macro Operations. The Correspondence solutions will comprise of the necessary pre-conditioning data and global pattern templates for the actual test data. Second Phase: MTG Phase MTG (Macro Test Generation) combines the local macro-level test data with the Correspondence solution to generate the global test data for the macros.

Basic Design Flow for MTEST:

1. Read the Netlist 2. Read the MIC file 3. Do the MSV 4. Analyze the MSV messages and Debug in case of errors 5. MTG phase will start 6. Read the MPR file 7. Generate the Macro Test Data

Detailed Description of the MSV Phase

- MSV tool will read the netlist and testmode information. It has to find all the Macros that must be processed for the given test-mode. - Every Macro must be associated with MIC file - MIC file defines the macro-specific operations and access requirements. - MSV will try to find pre-conditioning and correspondence solutions for each macro operation - For each macro data Input/output, the tool will try to find a suitable correspondence point and sensitize a path. - Path Sensitization will be done by an ATPG tool that justifies the path side inputs back to appropriate pre-conditioning values. - MIC file describes the Nature of the senitized or allowed path and pre-conditioning constraints for each macro pin. - Correspondence solutions will be generated in Binary or text formats

Detailed Description of the MTG Phase MTG tool reads the binary form of the correspondence solution and the associates Macro Patter Rule (MPR) file. MPR file contains the macro level test data that are to be plugged into the global pattern templates defined by the correspondence solutions. Resulting Macro test data are then written into the test data file for the chip MPR file

C programs that use MTG specific commands to assign the data values to the PINGROUPS defines in operations for the Algorithm represented by the MPR

Basic Concept of MTEST

To Provide Test Stimuli to the Macro Inputs, a logic path is sensitized between each relevant macro data input and a corresponding controllable Test Port in the top level design. To receive the test responses from the macro outputs, a logic path is sensitized between each macro outputs; a Logic path is sensitized between each macro output and corresponding observable Top in the top level design. Probable Test Sequence The test sequence: 1. Force PI 2. Apply the clocks 3. Drop LTEST: go into the Functional Mode 4. Do the Required Testing in Functional Mode 5. Raise the LTEST and then Scanned out the Responses

MACRO TEST SIMULATION FLOW:

Build a Test Mode ( MACRO_DC_OPP ) -> Define Test Mode -> MACRO_DC_OPP Test Structure Verification ( TSV checks ) -> Define Test Mode -> MACRO_DC_OPP Macro Structure Verification -> Define Test Mode -> MACRO_DC_OPP -> Give MIC file as Input Create_macro_mpr_tests -> MACRO_DC_OPP -> Define Test Mode -> MACRO_DC_OPP -> Give MPR file as Input (for Test Generation) -> Define the experiment name -> Commit the Vectors -> MACRO_DC_OPP -> Define the inexperiment name -> Define Test Mode -> Write Vectors -> MACRO_DC_OPP -> Define Test Mode (MACRO_DC_OPP) -> Define the Test and scan parameters -> Patterns Simulation -> MACRO_DC_OPP -> Compile the Libraries -> Compile the Netlist -> Compile the MACRO test bench including the Patterns File -> Elaborate the Design -> NCSIM Simulation

HSS MPR TESTS

FLOW:

Build a Test Mode ( HSS_OPP ) -> Define Test Mode -> HSS_OPP -> Test Structure Verification (TSV checks) -> Define Test Mode -> HSS_OPP Macro Structure Verification -> Define Test Mode -> HSS_OPP -> Give MIC file as Input Create_macro_mpr_tests -> HSS_OPP -> Define Test Mode -> HSS_OPP -> Give MPR file as Input (for Test Generation) -> Define the experiment name -> Commit the Vectors -> HSS_OPP -> Define the inexperiment name -> Define Test Mode -> Write Vectors -> HSS_OPP -> Define Test Mode (HSS_OPP) -> Define the Test and scan parameters -> Patterns Simulation -> HSS_OPP -> Compile the Libraries -> Compile the Netlist -> Compile the MACRO test bench including the Patterns File -> Elaborate the Design -> NCSIM Simulation