332:463 Analog Electronics Lecture 1 Introduction to CMOS IC Technology

Jeffrey Walling Rutgers University

Analog @ ECE Rutgers

ECE463 Overview Administrative

Teaching Assistant
Sumati Sehajpal (sumati@eden.rutgers.edu)

Computing Support
John Scafidi (scafidi@ece.rutgers.edu)

Course will have large project emphasis 1/3 of the course grade is based on projects: Largest single grade component Information will be updated on the class Sakai
Check the site regularly for updates, homework, projects, etc. I encourage students to participate on the discussion boards, I will try to answer questions on the boards regularly.

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ECE463 Overview - Prerequisites

Course prerequisite knowledge: Basic circuit design Basic device physics and associated small signal models
PN junctions, MOSFET, BJT

Working knowledge of simulation

DC, AC, Transient

Basic linear systems analysis

Frequency response, bode analysis, poles and zeros

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ECE463 Overview Texts

Textbook is:
R.C. Jaeger, Microelectronic Circuit Design, 4th Edition, McGraw-Hill, 2010 Older editions will be fine, but you are responsible for checking content differences

Background and reference texts:

R.J. Baker, CMOS Circuit Design, Layout and Simulation, 2nd Edition, Wiley, 2007 B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2002 P.R. Gray, P.J. Hurst, S.H. Lewis and R.G. Meyer, Analysis and Design of Analog Integrated Circuits, 4th Edition, Wiley, 2001
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Grading/Assignments
Homework (5%)
Assigned weekly on Monday, due in class following Tuesday (Check Sakai) More for you than the me

Weekly Quizzes (10%)

More for me than you, give me feedback of how well I am doing Lowest two quiz scores dropped

Two Midterm Exams (30%) Two Projects (35%)

Amplifier design using Cadence Teams of three competition based

Final Exam (20%)

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Transistor Timeline
Vacuum Tube 1906 (DeForest) Transistor 1947 (Shockly, Bardeen and Brittain) Modern Discrete Packaged Transistors

Integrated Circuit 1958 (Jack Kilby and Robert Noyce) 9/1/2011 332:463

Cross Section Modern Intel 45nm Transistor

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Moores Law

Number of printed transistors doubles every 1.5 years Founded Fairchild and Intel 9/1/2011 332:463
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Modern Integrated Circuit (Cross Section)

Intel CMOS IC (45nm) Digital logic density drives CMOS scaling Scaling Equals:
Faster Transistors, but Noisier and Lower Gain Lower voltage headroom

Source: http://blog.oregonlive.com/o regonianextra/2008/04/july1 5.pdf

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CMOS Evolves - FinFET

Traditional CMOS Transistor

Newest generation grows transistor vertically Restore more control to the transistor gate gate is now 3D
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Where is CMOS technology going?

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Semiconductor Market/Economics

Moores Law leads to increased integration More sales of electronic devices as integration drives price down Growing penetration into large Asian/Pacific market still fueling growth 9/1/2011 332:463
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Why CMOS?
CMOS Device Speed (fT) Noise Transconductance (gm) Intrinsic Gain (Av) Si BJT SiGe HBT

CMOS has low gain and high noise: Question why use it?
Possibility for integration with digital circuits Scaling increases speedcan correct for other problems with fast digital circuits. Costscaling reduces cost of a transistor to almost nothing. SiGe BiCMOS(and other exotics) tend to be expensive.
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Bipolar vs. CMOS (1)

Bipolar advantage: Bipolar disadvantage: Lower process variation Lower density High voltage Higher cost Higher gain (gmro) Higher fT for same feature size
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Bipolar vs. CMOS (2)

A.J. Joseph, et al., "Status and Direction of Communication Technologies - SiGe BiCMOS and RFCMOS," Proceedings of the IEEE, vol.93, pp.1539-1558, September 2005.

CMOS is cheaper for a given lithography, but more costly for the same speedmake up for it with transistor density.
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Discrete vs. Integrated Circuit Design

Discrete Audio Amplifier CMOS IC Audio Amplifier

Must minimize # transistors Devices dont match well no differential circuits Rs and Cs can be large
C~1pF10F
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Unlimited # transistors Good device matching differential circuits Rs and Cs must be small
~100k and 50pF
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What will you learn

Analog circuit design is not black magic Analog Circuit Analysis:
Decompose large circuits into smaller, manageable pieces Use simple, first-order models get reasonable accuracy/designtime tradeoff Each circuit has a unique solution

Analog Circuit Design

Experience based but we will try to craft tools for the less experienced There is no right answer (but many wrong ones) Analog designers learn by doing we will not become SPICE monkeys
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