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NEXGEN PLC
8 Channel Analog Input Module (Ordering Code 4308)
Document No.:ED-2002-015
Version: 1.01
MESSUNG SYSTEMS EL-2, J- Block MIDC Bhosari, Pune 411026.(INDIA) Tel: (+91)-020-2712 0807, 2712 2807. Email : marketing@ms.messung.com WEB: www.messung.com
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1.0
Jun 2003
1.01
Feb 2004
8 Channel, Analog Input Module (Ordering Code4308) NEXGEN Series of PLCs. In the Section 1.3 General Specifications, specifications of accuracy, input impedance for current input and back plane current updated. In the section 4.1 Slot Configuration, Nexgen5000 related PLC Configuration information added. Section 4.4 Programming with Nexgen5000 added.
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INDEX
1. 1.1 1.2 1.3 2. Module Overview ............................................................................................................7 Analog Input Module Overview ...................................................................................7 LED Indications...........................................................................................................9 General Specifications ..............................................................................................10 Module Operation .........................................................................................................11
2.1 Block Diagram...........................................................................................................11 2.2 Analog Input types and range of binary values.........................................................12 2.3 On-Board Processor Operations...............................................................................12 2.3.1 Power On Operations..........................................................................................12 2.3.2 Analog to Digital Conversion...............................................................................13 2.3.3 Averaging ............................................................................................................14 2.4 Module Information ...................................................................................................15 2.4.1 Input Output Image Mapping...............................................................................15 2.4.2 Memory Mapping ................................................................................................16 2.4.3 Commands ..........................................................................................................17 2.4.4 Module Status Bits ..............................................................................................17 3. 3.1 3.2 3.3 4. 4.1 4.2 4.3 4.4 5. 5.1 Installations and Wiring ...............................................................................................18 Module Installation ....................................................................................................18 Connection Details....................................................................................................18 Precautions to be taken ............................................................................................20 Configuration and Programming ................................................................................21 Slot Configuration .....................................................................................................21 Channel Configuration ..............................................................................................22 Programming with Nexgen 4000 CPU ......................................................................26 Programming with Nexgen 5000 CPU ......................................................................30 Troubleshooting ...........................................................................................................35 LED Indications for Diagnostics ................................................................................36
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Index of Figures
Figure 1 : Front View .................................................................................................................8 Figure 2 : Block diagram .........................................................................................................11 Figure 3 : ADC Conversion Cycle ...........................................................................................13 Figure 4 : Input Output Image Mapping...................................................................................15 Figure 5 : Memory Mapping ....................................................................................................16 Figure 6 : Connection diagram ................................................................................................19
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Guidelines for the Safety of the user and protection of I/O Modules. This manual provides information for the use of the I/O Modules. The manual has been written to be used by trained and competent personnel. The definition of such a person or persons is as follows: a) Any engineer who is responsible for the planning, design and construction of automatic equipment using the product associated with this manual should be of a competent nature, trained and qualified to the local and national standards required to fulfill that role. These engineers should be fully aware of all aspects of safety with regards to automated equipment. b) Any commissioning or service engineer must be of a competent nature, trained and qualified to the local and national standards required to fulfill that job. These engineers should also be trained in the use and maintenance of the completed product. This Includes being completely familiar with all associated documentation for the said product. All maintenance should be carried out in accordance with established safety practices. c) All operators of the completed equipment should be trained to use that product in a safe and coordinated manner in compliance to established safety practices. The operators should also be familiar with documentation, which is connected with the actual operation of the completed equipment. Note: The term-completed equipment refers to a third party constructed device, which contains or uses the product associated with this manual. Note on the Symbol used in this Manual At various times through out this manual certain symbols will be used to highlight points of Information, which are Intended to ensure the users personal safety and protect the integrity of equipment. Whenever any of the following symbols are encountered its associated. Note must be read and understood. Each of the symbols used is listed below; with a brief description of its meaning. Warning ! This product can only function correctly and safely if it is transported, stored, setup, and installed correctly, and operated and maintained as recommended.
Warning ! The specifications of product and contents of manual are subject to change without notice.
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1. Module Overview
This chapter describes the following Analog Input Module Overview LED Indications General Specifications
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4308
Terminal Block Fixing Screw
ANALOG INTPUT 8 CH V/I
01 02 03 04 05 06 07 08 09 10 11
CH0
V IN0 V IN1 I IN0 I IN1 COM 0 COM 1 V IN2 V IN3 I IN2 I IN3 COM 2 COM 3 V IN4 V IN5 I IN4 I IN5 COM 4 COM 5 V IN6 V IN7 I IN6 I IN7 COM 6 COM 7 + 24 V GND EARTH
12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
IO Label
36 37 38
LED Indications
Connection Details
Front Door
The module provides LED indications on the front. Brief information about channel can be written on the front door. Below the front door, 38-pin removable terminal block is provided for interfacing analog signals. The connection details are shown on backside of the front door.
Published Feb 2004 Page 8 of 38 8 Ch Analog Input Module (4308) Document No.: ED-2002-015/V1.01
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The analog module can be configured in any IO slot of the PLC. The number of analog input modules is limited by back panel current capacity. In general a channel requires following information registers to hold configuration information (2 words) register to hold data (1 word) and registers to hold status information (1 word)
Green
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Digital output Voltage / Current range -10 to 10 V DC Number of 0 to 10 V DC significant bits 0 to 5 V DC ( With 50 Hz 1 to 5 V DC filter ) 0 to 20 mA 4 to 20 mA Accuracy at filter frequency 50 Hz Channel to channel Channel to internal circuit Absolute maximum Voltage input Current Voltage Input Impedance Current External voltage requirement External supply protection Isolation
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2. Module Operation
This chapter helps in getting started with the analog input module. It describes the basic operation of the module. This chapter explains operational details of: Block Diagram Analog input Types and Range. On-Board Processor Operations Module Information
At the time of application program development, the module can be configured using the programming software so that above special features can be used..
On board Processor
O P T I C A L I S O L A T I O N
Amplifier
Multiplexer
CPU Module
+5V GND
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The module provides eight analog to digital channels for voltage/ current input. CPU bus is optically isolated from ADC circuit. ADC operates on the data from the channels. The enabled channel input signals are multiplexed and then amplified for ADC input. Thus sigma-delta (/ ) ADC converts only enabled analog channels to digital value one by one. The converted count for each channel is manipulated by on-board processor and binary data is transferred to module memory, which holds channel data information. If averaging is required, depending on the averaging count, on-board processor performs averaging of those many previous readings and updates channel data information. The configuration, data, status information is available in dual port RAM on the module. The configuration of all channels is transferred to the module memory using WRITE_W / IM_Write function in the application program. Similarly data and status of all channels can be read by READ_W / IM_Read function in the application program. The module requires external 24 VDC supply for ADC circuit operation. Internally DCto-DC converter generates 15 VDC and 5 VDC as required by each channel. If 24 VDC is absent or on-board glass fuse is blown, module generates 'No 24 V Supply' signal for main CPU. The fuse protection for external 24 VDC supply is provided on module.
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If the module hardware is OK, Ix.0 bit is cleared. The module waits for configuration from the CPU module. After reception of valid configuration of input channels, the module starts sampling and digital conversion cycle of enabled channels. The module continues sampling, converting the channels and updating module memory even after the PLC is put in STOP mode. But In this case, CPU module does not read the channel data and status. 2.3.2 Analog to Digital Conversion The module samples the input channel and converts voltage or current input to its digital value one by one. After power on, as shown in the figure below, only enabled channels are converted. If any error like invalid configuration is detected, channel is not converted. The disabled channels are bypassed retaining earlier values. After one channel conversion, module initiates next channel conversion. During this conversion period, module processes converted data of previous channel. This process includes averaging as per configuration. Thus the processed data for previous channel is made available during this period. After converting all healthy channels, processed data and status information of all the channels is transferred to respective memory area on the module. This cycle continues. Thus when the processor module performs READ_W operation, it reads either old or new information i.e. data and status of channels.
Channel 0 disabled Channel 0 Conversion Update all channel data and status Channel 7 Conversion Channel 7 disabled Channel 6 Conversion Channel 6 disabled Channel 5 Conversion Channel 5 disabled Channel 4 Conversion Channel 4 disabled Channel 1 disabled Channel 1 Conversion Channel 2 disabled Channel 2 Conversion Channel 3 disabled Channel 3 Conversion
The module takes certain time to sample all enabled channels and convert into digital value. The required time is the module update time. The factors affecting module update time is filter frequency selected and number of channels enabled. The module update time is minimum when only one channel is enabled. Likewise the module update time is maximum when all channels are enabled.
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The module incorporates a digital low pass filter to reject noise on the input signal. The digital filter is programmable. It provides better noise rejection for low filter frequencies. Its noise rejection decreases as filter frequency is increased. Also filter frequency affects channel update time. The channel update time reduces as filter frequency is increased. The following shows update times required for different filter frequencies.
Filter Frequency 50 Hz 60 Hz 250 Hz 500 Hz Channel Update time 60 ms 50 ms 12 ms 6 ms
2.3.3
Averaging The module provides user selectable averaging facility so that stable value is available for processing and necessary control action. The module samples and converts enabled channels one by one. The module keeps digital value into different memory locations. Depending on the averaging count, the module performs averaging of those many previous readings and updates channel data information. Thus if the averaging counts of channel 0, 1 and 2 are 0, 4 and 8 respectively, then initially data of channel 0, 1 and 2 are updated after 1, 4 and 8 conversion cycles respectively. After that, it gets updated in every cycle. One conversion cycle means sampling and converting all enabled channels as explained in chapter 2.3.2. Thus combination of filter frequency and averaging count can be selected to get optimum channel update time and stable temperature reading.
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The module consumes 8 input bits (1 byte) of input image and 8 output bits (1 byte) of output image. CPU reads the status of module in input scan. CPU writes user commands to module in output scan. For immediate updation of input and output image in application program, IMM_IN / Refresh_In and IMM_OUT / Refresh_Out functions can be used in application program whenever required. For the details refer chapter 2.4.3 and 2.4.4.
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2.4.2
Memory Mapping The memory mapping related to analog input module is shown in figure below.
CPU Module
16 words hold configuration information of 8 channels
Logic Scan
`
16 words hold configuration information of 8 channels
Logic Scan
READ_W ENO EN SLOT DATA LEN ADDR
Ch 0 Data Ch 7 Data
MW100 MW114
Ch 0 Data Ch 7 Data
MMW00 MMW14
Ch 0 Status Ch 7 Status
MW116 MW134
Ch 0 Status Ch 7 Status
MMW16 MMW30
The configuration from PLC variable area is transferred to module memory when WRITE_W / IM_Write function gets executed in application program i.e. in logic scan. The module takes action on valid configuration information. After power on, the module starts its channel conversion operation only after receiving valid configuration. If channel configuration is modified, it takes effect only in the subsequent conversion cycle. The channel configuration can be modified using WRITE_W / IM_Write function. Similarly channel can be enabled or disabled during normal operation for optimum results. The channel data and status information can be read from the module using READ_W / IM_Read function.
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2.4.3
Commands As discussed in chapter 2.4.1, output image bits are used as user commands to module. User can issue various commands to module through application program. CPU writes commands in output image area of module in output scan. The module reads output image area cyclically and takes appropriate action. If 'IMM_OUT' / Refresh_Out function is executed in logic scan for a particular slot, it stops current logic scan, executes output scan for defined slot and resumes logic scan again. This is useful when ever immediate updation of output image is needed. The functions of output image bits are given below.
No. 1
Status ON OFF
Description It gives command to ADC to calibrate itself. Auto calibration command is OFF.
Note Qxx.1 to Qxx.7 are reserved and should not be used. Normally, ADC is calibrated during self test after power ON and when ever 24 VDC power to the module is switched ON. Also, it is calibrated at regular interval during operation. The output image bit Qxx.0 is additional facility to the user to calibrate ADC when ever required. 2.4.4 Module Status Bits As discussed in chapter 2.4.1, input image bits are used as module status indications. User can check the module status through application program. The module writes status in its input image area cyclically. The CPU reads this input image area in input scan. If 'IMM_IN' / Refresh_In function is executed in logic scan for a particular slot, it stops current logic scan, executes input scan for defined slot and resumes logic scan again. This is useful when ever immediate updation of input image is needed. The functions of input image bits are given below
No. Bit Address Module Status Status ON 1 Ixx.0 Module Not Ready OFF Invalid Configuration or Open circuit ON OFF Description 24 VDC supply to module absent 24 VDC circuit fuse blown. Module CPU watch dog fault. Module not ready. 24 VDC Supply to module healthy Module healthy and ready Invalid static configuration Parameter mismatch Valid static configuration Valid parameters
Ixx.1
Note Ixx.2 to Ixx.7 are reserved and should not be used. Whenever accessing the module, user must check the module status bit Ixx.0.
8 Ch Analog Input Module (4308) Document No.: ED-2002-015/V1.01 Published Feb 2004 Page 17 of 38
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01 02 03 04 05 06
07 08 09 10 11 12 13 14 V IN0 V IN1 I IN0 I IN1 COM 0 COM 1 V IN2 V IN3 I IN2 I IN3 COM 2 COM 3 V IN4 V IN5 I IN4 I IN5 COM 4 COM 5 V IN6 V IN7 I IN6 I IN7 COM 6 COM 7 + 24 V GND EARTH
15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
32 33 34 35 36 37 38
In figure, first channel is configured for voltage input where as fourth channel is configured for current input. For interfacing analog signals, 38 pin removable terminal block is provided. The voltage input is connected to terminals V INn and COMn. Here n is channel number from 0 to 7. Current Input is connected to terminals I INn and COMn. To connect current input, short terminals V INn and I INn for respective channel. This is shown for the channel 3 in figure.
8 Ch Analog Input Module (4308) Document No.: ED-2002-015/V1.01 Published Feb 2004 Page 19 of 38
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Being susceptible to industrial noise, analog signal is to be carried out on the field through shielded twisted cable. Connect both ends of shield to Earth busbar in control panel. For functioning of analog input module, external 24 VDC supply is required. Connect 24 VDC supply between terminals 36 (+ 24 V) and 37 (GND). Connect terminal 38 to earth busbar in the control panel.
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Input module in first slot 0 consumes IB0 to IB3 of input image. Output module in slot 1 consumes QB4 to QB7 of output image. The analog input module consumes IB8 of input image and QB8 of output image.16 DC Output module in slot 3 consumes QB9 and QB10 of output image. The IO byte consumption along with configuration of Nexgen5000 PLC is shown below.
Power Supply Module Nexgen5000 CPU Module Slot 0 32 DC Input Module (4632) %IX0.0 - %IX0.7 %IX1.0 - %IX1.7 %IX2.0 - %IX2.7 %IX3.0 - %IX3.7 Slot 1 32 DC Output Module (4732) Slot 2 Analog Input Module (4308) Slot 3 16 DC Output Module (4716)
%QX0.0 - %QX0.7 %IX4.0 - %IX4.7 %QX5.0 - %QX5.7 %QX1.0 - %QX1.7 %QX4.0 - %QX4.7 %QX6.0 - %QX6.7 %QX2.0 - %QX2.7 %QX3.0 - %QX3.7
Input module in first slot 0 consumes IB0 to IB3 of input image. Output module in slot 1 consumes QB0 to QB3 of output image. The analog input module consumes IB4 of input image and QB4 of output image.16 DC Output module in slot 3 consumes QB5 and QB6 of output image.
8 Ch Analog Input Module (4308) Document No.: ED-2002-015/V1.01 Published Feb 2004 Page 21 of 38
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0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 1 0 1
0 0 1 1
0 1 0 1
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The configuration information for channel 0 is to be written at module memory address MMW#256 and MMW#258 and so on.
MMW#256 MMW#258 Configuration word 1 for channel 0 Configuration word 2 for channel 0
MMW#284 MMW#286
Input type The analog input module supports different types of inputs. The inputs include -10 to 10V 0 to 10 V 0 to 5 V 1 to 5 V 0 to 20 mA 4 to 20 mA Bits 0 to 4 hold input type information. Refer chapter 3.2 for connection of voltage/ current input. Filter frequency Next three Bits, Bit5 to Bit 7 define the low-pass filter frequency. One out of four filter frequencies can be selected for a module. The filter frequency selected for channel 0 is applied for all the channles irrespective of any selection.by user for remaining channels.
Bit7 0 0 0 0 Bit6 0 0 1 1 Bit5 0 1 0 1 Filter Frequency 50Hz 60Hz 250Hz 500Hz Update time for a Channel 60ms 50ms 12ms 6ms
The filter frequency affects noise rejection on incoming analog signal. A lower filter frequency increases noise rejection. Also it affects channel update time. So select a filter frequency considering acceptable noise and channel update time. Open circuit value Next two bits, bit 8 and bit 9 define the value of the channel when the open circuit is detected.
Bit9 0 0 1 1 8 Ch Analog Input Module (4308) Document No.: ED-2002-015/V1.01 Bit8 0 1 0 1 Open Circuit value Zero Upper scale Lower scale Invalid Published Feb 2004 Page 23 of 38
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The module detects open circuit of a channel for 4-20 mA and 1 to 5 V input types. In such open circuit condition, the channel value can be set to any one of above options considering safety in control action. If such open circuit is detected for a channel, corresponding channel LED starts flashing. Channel Enable Bit11 defines the enable status of the channel. If it is 0 Channel is disable and if it is 1 Channel is enable. The module samples only enabled channels and converts into digital value. Thus enabling only used channels can minimize the channel update time. Bit12 to Bit15 are reserved and these must be 0 Averaging Next two Bits, Bit16 and Bit 17 define the selection of sampling value for averaging.
Bit16 0 0 1 1 Bit17 0 1 0 1 Averaging Sample No 4 8 16
The module provides averaging facility so that stable value is available for processing and necessary control action. The module samples and converts enabled channels one by one. The module keeps digital value into different words. Depending on the averaging count, the module performs averaging of those many words and updates channel data information. Thus if the averaging counts of channel 0, 1 and 2 are 0, 4 and 8 respectively, then data of channel 0, 1 and 2 are updated every 1, 4 and 8 conversion cycles respectively. One conversion cycle means sampling and converting all enabled channels. Thus combination of filter frequency and averaging count can be selected to get optimum channel update time. Channel Data The module memory words MMW #0 to MMW #14 are module memory words for channel data. For enabled channels, this information is updated cyclically in module. The data is read and stored in PLC variables using READ_W / IM_Read function in application program.
MMW#0 MMW#2 MMW#12 MMW#14 Channel 0 data Channel 1 data Channel 6 data Channel 7 data
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Channel Status The module continuously updates status of all channels into its memory. The processor module can read the status information as required using READ_W function. This information is also useful to check validity of configuration data. This status information is stored in bit form in one word for each channel starting from module memory address 16. The following table gives status bit information available.
The copy of Bit 0 to Bit 11 from configuration word. Item Description 15 14 13 12 11 10 -10 to +10V 0 to 10V Input 0 to 5V Type 1 to 5V 0 to 20mA 4 to 20mA 50 Hz Filter 60 Hz frequency 250 Hz 500 Hz Zero Open Upper scale Circuit Lower scale Value Invalid Reserved -0 Channel Disabled 0 Status 1 Enabled Config Valid 0 Invalid 1 Open No open circuit 0 Ckt. Open circuit 1 UnderNo under range 0 range Under range 1 Over No over range 0 range Over range 1 9 8 7 6 5 4 0 0 0 0 0 0 3 0 0 0 0 0 0 2 0 0 0 0 1 1 1 0 0 1 1 0 0 0 0 1 0 1 0 1
0 0 0 0 0 0 1 1 0 1 0 1
0 0 1 1
0 1 0 1
The copy of Bit 0 to Bit 11 from configuration word is available in status word as it is. This information is useful to check validity of configuration as written by WRITE_W function when ever configuration is set or modified. The application program should confirm validity of configuration before reading channel data.
MMW#16 MMW#18 Channel 0 status Channel 1 status
MMW#28 MMW#30
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Configuration Error Bit 12 of status word is set if Invalid configuration is written Bit 12 to 15 in configuration word are non zero If configuration error bit is set, configuration Error LED ( yellow colour )on module glows. Open Circuit Error Open circuit detection is applicable for Input type 1 to 5 V Input type 4 to 20 mA Bit 13 of status word is set if Input voltage is less than 0.75 V for input type 1 to 5 V Input current is less than 3 mA for input type 4 to 20 mA If open circuit error bit is set for a channel , corresponding input indication LED (green colour) on module starts flashing. The channel data holds the data as per configuration. It can be zero or upper scale reading or lower scale reading.
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'WRITE_W' function gets executed when condition for enable 'EN' is ON. 'ENO' output becomes ON, when EN is ON and function is executed successfully. ENO is OFF if Parameters of function are invalid or not within specified range. analog input module is not accessible to CPU module
M0.0 ----- WRITE_W ----M0.1 +---| |---+--------- |EN ENO|-+---------+---( )--| | #2 -|SLOT | | | MW50 -|DATA | | | #16 -|LEN | | | #256 -|ADDR | | | -------------------
So 16 words (MW50 to MW80) information from CPU memory is transferred to the memory at address #256 onwards of analog input module fitted in slot 2. The 'READ_W' function below shows data transfer from the analog input module memory to CPU memory. The details of transfer are The analog input module is configured in slot 2 of PLC Address on the analog input module in slot 2 is #0 Start address of memory on the CPU module is MW100 Length of data area to be transferred is 8 words 'READ_W' function gets executed when condition for enable 'EN' is ON. 'ENO' output becomes ON, when EN is ON and function is executed successfully. ENO is OFF if Parameters of function are invalid or not within specified range. The module is not accessible to CPU module
M0.2 ------ READ_W ----M0.3 +---| |---+--------- |EN ENO|-+---------+---( )--| | #2 -|SLOT | | | #0 -|ADDR | | | #8 -|LEN | | | MW100-|DATA | | | -------------------
So 8 words (MMW0 to MMW14) information on analog input module fitted in slot #2 are transferred to the CPU memory words (MW100 to MW114). Example of basic application program is given below. For the same, refer Nexgen PLC configuration shown in chapter 4.1. In the configuration, following points are to be noted.
8 Ch Analog Input Module (4308) Document No.: ED-2002-015/V1.01 Published Feb 2004 Page 27 of 38
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I 8.0 is a module status bit as 'Module Not OK' bit. I8.0 is set if 24 VDC supply to module is not healthy and / or hardware fault, watchdog fault is observed on module. I 8.1 is a channel status bit as. I 8.1 is set if for one or more channels, configuration is invalid and / or any channel error like open circuit is observed. S 4.2 is a 'Module Error' bit for the module fitted in slot 2. While developing application program, first check whether the module is healthy. For the same, check 'Module Error' bit S 4.2 and 'Module Not Ok' bit I8.0. If any bit is set, declare respective fault. In this case, module is not accessible. If both are OFF, then only enable 'WRITE_W' and 'READ_W' functions for analog input module. The configuration information consists of basic attributes like input type, filter (50 Hz, 60 Hz, 250 Hz, 500 Hz), return value in case of open circuit of input signal (zero, upper scale, lower scale) and no. of averaging samples (1, 4, 8, 16). This configuration is to be transferred to module memory MMW#256 to MMW#286, if all the 8 channels are used. In this example, channels are configured for 0 10 VDC 50 Hz filter Return value is of upper scale in case of open circuit of input signal No. of averaging samples is 16 For this configuration, the value $0801 and $0003 should be written to respective module memory word.
Configuration Word 1
$0801
15 0
9 0
8 1
7 0
6 0 50 Hz Filter
5 0
4 0
3 0
2 0
1 0
0 1
Configuration Word 2
$0003
15 0
14 13 12 11 10 0 0 0 0 0
9 0
8 0
7 0
6 0
5 0
4 0
3 0
2 0
1 1
0 1
Reserved
16 averaging samples
So MW50 and MW52 should contain $0801 and $0003 , for the configuration required. This information is transferred to analog module memory MMW#256 to MMW#286, when 'WRITE_W' function is executed.
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When 'WRITE_W' function is executed successfully, ENO output becomes ON, When ENO is ON, set 'Static Configuration Write' command bit informing the module to accept the static configuration or change in configuration. Once this information is transferred to module, it is valid as long as PLC power is present. It is recommended to enable 'WRITE_W function when Warm start is observed i.e. System bit S0.6 is ON Cold start is observed i.e. System bit S0.7 is ON Module Error bit becomes OFF i.e. System bit S4.2 is ON Module Not OK bit becomes OFF i.e. Input bit I8.0 is ON.
S0.6 ------ WRITE_W ---M3.0 +---| |---+---------+---------|EN ENO|-+---(S )--| | | S0.7 | | | +---| |---+---------| #2 -|SLOT | | | | S4.2 M0.4 | | | +---| |---+---|N|---| MW66 -|DATA | | | | I8.0 M0.5 | | | +---| |---+---|N|---+ #16 -|LEN | | | | | #256 -|ADDR | | | ------------------S4.2 M3.4 M3.0 +---| |---+---|P|---+---------|--------|---------|---(R )---| | | I8.0 M3.5 | +---| |---+---|P|---
If 'WRITE_W' function is executed, M3.0 bit is set. If this bit is not ON even if function enable conditions are ON, declare fault and take appropriate action. The bit M3.0 is reset. If any error is detected. After transferring configuration data to analog module memory, module configures the channels and starts functioning accordingly. It takes about 500 ms time for module to take necessary action if configuration is changed. So after a proper delay (say 1 sec), enable 'READ_W' function. When 'READ_W' function is executed, the binary values of channels stored in module memory MMW#0 to MMW#14 are transferred to CPU memory MW#100 to MW#114 respectively.
M3.0 S4.2 I8.0 ---- TON100MS ----M3.1 +---| |---+---|/|---+---|/|---|EN ENO|-+---( )--| | | | #10 -|PT ET | | | | | T#10 -|TNO | | |
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NEXGEN PLC I/O Modules M3.1 S4.2 I8.0 ------ READ_W ----M1.1 +---| |---+---|/|---+---|/|---|EN ENO|-+---( )--| | | | #2 -|SLOT | | | | | #0 -|ADDR | | | | | #8 -|LEN | | | | | MW100 -|DATA | | | -------------------
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If 'READ_W' function is executed successfully, M1.1 bit becomes ON. If this bit is not ON even if function enable conditions are ON, declare fault and take appropriate action. To read the status of channels, read MMW#16 to MMW#30. The status can be read continously or conditionally when input image bit I8.1 is ON.
I8.1 S4.2 I8.0 ------ READ_W ----M1.5 +---| |---+---|/|---+---|/|---|EN ENO|-+---( )--| | | | #2 -|SLOT | | | | | #16 -|ADDR | | | | | #8 -|LEN | | | | | MW116 -|DATA | | | -------------------
With this status, appropriate action can be taken for reporting the error.
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The IM_Write function below shows data transfer from the CPU module's memory to analog input module memory. The details of transfer are The analog input module is configured in slot 2 of PLC The configuration information is stored in an 16 word array Config Length of data area to be transferred is 32 bytes Address on the analog input module in slot 2 is 256 'IM_Write' function gets executed when BOOLean input 'Config_Wr' is TRUE. BOOLean output 'Config_Dn' becomes TRUE, when function is executed successfully. It is is FALSE if Parameters of function are invalid or not within specified range. analog input module is not accessible to CPU module
So 16 words configuration information from CPU memory is transferred to the memory at address 256 onwards of analog input module fitted in slot 2. The 'IM_Read function shows data transfer from the analog input module memory to CPU memory. The details of transfer are The analog input module is configured in slot 2 of PLC Address on the analog input module in slot 2 is 0 The data to be stored in PLC variable array AIData Length of data area to be transferred is 8 words
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'IM_Read' function gets executed when 'RD' is ON. 'Rd_ON' output becomes ON, when EN is ON and function is executed successfully. ENO is OFF if Parameters of function are invalid or not within specified range. The module is not accessible to CPU module
So 8 words (MMW0 to MMW14) information on analog input module fitted in slot 2 are transferred to the PLC variable AIData which is an array of data type INT. Example of basic application program is given below. For the same, refer Nexgen PLC configuration shown in chapter 4.1. In the configuration, following points are to be noted. %IX4.0 is a module status bit as 'Module Not OK' bit. %IX4.0 is set if 24 VDC supply to module is not healthy and / or hardware fault, watchdog fault is observed on module. %IX4.1 is a channel status bit as. %IX4.1 is set if for one or more channels, configuration is invalid and / or any channel error like open circuit is observed. _BRACK_0_IOERR.2 is a 'Module Error' bit for the module fitted in slot 2. While developing application program, first check whether the module is healthy. For the same, check 'Module Error' bit _BRACK_0_IOERR.2 and 'Module Not Ok' bit %IX4.0. If any bit is set, declare respective fault. In this case, module is not accessible. If both are OFF, then only enable 'IM_Write' and 'IM_Read functions for analog input module. The configuration information consists of basic attributes like input type, filter (50 Hz, 60 Hz, 250 Hz, 500 Hz), return value in case of open circuit of input signal (zero, upper scale, lower scale) and no. of averaging samples (1, 4, 8, 16). This configuration is to be transferred to module memory MMW256 to MMW286, if all the 8 channels are used. In this example, channels are configured for 0 10 VDC 50 Hz filter Return value is of upper scale in case of open circuit of input signal No. of averaging samples is 16 For this configuration, the value 16#801 and 16#3 should be written to respective module memory word.
Published Feb 2004 Page 32 of 38 8 Ch Analog Input Module (4308) Document No.: ED-2002-015/V1.01
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Configuration Word 1
16#801
15 0
9 0
8 1
7 0
6 0 50 Hz Filter
5 0
4 0
3 0
2 0
1 0
0 1
Configuration Word 2
16#3
15 0
14 13 12 11 10 0 0 0 0 0
6 0
5 0
4 0
3 0
2 0
1 1
0 1
Reserved
16 averaging samples
So configuration words should contain 2049(16#801) and 3, for the configuration required. This information is transferred to analog module memory MMW256 to MMW286, when 'IM_Write' function is executed. The application program required to handle analog input module is shown below along with comments and PLC variable declaration.
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Once analog input data is read successfully, the data can be processed as the application requirement. If anaolg input data read is to be displayed on HMI or SCADA, the varaible AIData should be mapped to any memory varaible while declaration like
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Here the analog input data for the channels is stored in memory variable %MW100 to %MW114 in integer format. Channel 0 data is stored in %MW100 while channel 7 data is stored in %MW14. If input image bit %IX4.0 or %IX4.1 is TRUE, the appropriate error should be declared and further processing of anaolg input data read should be hold. If input image bit %IX4.1 is TRUE, the status of all the channels can be read and individual channel error and exact cause can be located with the help of an application program as shown below.
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5. Troubleshooting
In this chapter, following points related to analog input module are discussed. LED Indications for diagnostics
Green
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NEXGEN PLC I/O Modules 8 Channels, Analog Input Module (Ordering Code 4308)