You are on page 1of 9

1

Preventing voltage collapse by large SVCs at power system faults.


Ahmed H. Al-Mubarak, Saleh M. Bamsak, Bjorn Thorvaldsson, Mikael Halonen, Member, IEEE, Rolf Grnbaum, Member, IEEE

Abstract-- This paper shows how the performance of a power grid in Saudi Arabia is improved by using SVCs to reduce the risk for voltage collapse at short circuits. Full SVCs capacity is needed during faults and for a short time following fault clearing for system recovery. It is shown that SVCs can handle the phase jumps at fault inception and clearing. The paper also deals with control stability for large SVCs in weak networks. Index TermsControl design, Motor stalling, Operational experience, PLL, Reactive Power, Speed of response, SVC, Temporary overvoltage, Voltage recovery

III. SYSTEM AND PROBLEM DEFINITION A. Saudi System Saudi Electricity Company in the Western Region operates a transmission system comprising 380 kV overhead lines and underground cables. Generation is essentially in a few large plants. There are numerous 380/110 kV bulk supply stations, which feed local 110/13.8 kV substations through mostly underground cable circuits. The major load, the city of Jeddah, is radially fed from some ten bulk supply stations. The grid is shown in a simplified form in fig 1.

I. NOMENCLATURE FACTS SVC TCR TSC PLL RTDS Flexible AC Transmission System Static Var Compensator Thyristor Controlled Reactor Thyristor Switched Capacitor Phase Locked Loop Real Time Digital Simulator

ower systems having large contents of induction motor load are prone to experience difficulties with slow voltage recovery, motor stalling or even voltage collapse in conjunction with short circuits in the transmission or sub-transmission networks. Air conditioners are normally run by induction motors. In the hot part of the world this type of load rapidly increases. In Saudi Arabia the air conditioning load is as high as 80% of the total. Simulations show that the power system may not survive even single line to ground faults close to the load centre during peak load conditions. By applying SVC technology the system will ride through single line to ground faults.

II. INTRODUCTION

Fig. 1. Map and single line diagram.

Measures for voltage control, such as line/bus connected reactors at 380 kV and 110 kV and capacitors/reactors at distribution levels are implemented, to maintain adequate voltages throughout the transmission grid. All power transformers have tap changers. Still, the system continuously shows signs of weaknesses from a reactive power planning point of view. This system has a few specific characteristics: A large difference between minimum and maximum (annual and daily) load. Extremely high concentration of air-conditioning load (Residential & Commercial), about 80% of the total load High impedance in 380/110 kV and 110/13.8 kV power transformers to limit short circuit currents. Somewhat remote generation These characteristics affect the operation of the system. System performance and operational problems experienced are:

A. H. Al-Mubarak is with SEC, Dammam, Kingdom of Saudi Arabia (e-mail:47648@se.com.sa). S. M. Bamsak is with SEC, Jeddah, Kingdom of Saudi Arabia (e-mail: sbamsak@se.com.sa). B. Thorvaldsson is with ABB AB, FACTS, SE-721 64 Vsters, Sweden (e-mail:bjorn.thorvaldsson@se.abb.com). M. Halonen is with ABB AB, FACTS, SE-721 64 Vsters, Sweden (e-mail:mikael.halonen@se.abb.com). R. Grnbaum is with ABB AB, FACTS, SE-721 64 Vsters, Sweden (e-mail: rolf.grunbaum@se.abb.com).

978-1-4244-3811-2/09/$25.00 2009 IEEE


Authorized licensed use limited to: King Abdul Aziz City For Science & Technology. Downloaded on August 9, 2009 at 08:28 from IEEE Xplore. Restrictions apply.

Voltage Control between peak-load and off-peak load conditions Unacceptable Voltage Recovery after faults at medium load conditions Voltage Collapse situations at peak load conditions A comprehensive reactive planning study encompassing 380kV, 110kV and 13.8kV voltage levels was performed. The most important conclusions affecting the system planning and operation are: Faster fault clearing, to the extent possible, reduces the dynamic reactive requirement. A/C motor stalling for single line to ground faults can be avoided by installation of dynamic reactive power support. Dynamic reactive power support necessary only for a short period - during the fault and for about a second following the fault clearing. Reactive power support needed to counteract voltage fluctuations due to daily load variations. The dynamic reactive power demand was calculated to 3000 MVAR. Installing five SVCs with a rating +600/-60 MVAR each at five different 110 kV buses resolves the a/c motor load stalling problem and the daily load voltage control. The first three SVCs at Madinah South, Faisaliyah and Jamia substations were taken into service during the year 2008. The two remaining SVCs are still not purchased. B. Problem Definition The system in the Jeddah, seen from one of the radially fed load zones can be simplified to the following circuit, fig 2.
W
380 kV 110 kV 13.8 kV

1.0000 0.9950 0.9900 0.9850 0.9800 0.9750 0.9700 0.9650 1.75

Speed1

y (pu)

TE_HAM1

TM_HAM1

y (pu)
-0.50 Vpos110 1.050 1.000 0.950 0.900 0.850 0.800 0.750 0.050 0.100 0.150 0.200 0.250 0.300 0.350 0.400 Vpos14

Fig. 3. Motor speed, torque and 110/13.8 kV voltage without SVCs.

C. Counteracting Motor Stalling with SVCs The way to prevent the motors from stalling is obviously to reduce the voltage drop during the fault and to restore the voltage as quickly as possible after fault clearing. Such a task requires a lot of reactive power support during a short period of time. The closer to the motors the voltage support is applied the better. The most efficient locations are in each 110/13.8 distribution substation on the 13.8 kV level. This would, though, result in a very large number of rather small SVCs. The practical solution is a limited numbers of large SVC on the 110 kV level.
Speed1

y (pu)
y (pu)

1.0000 0.9950 0.9900 0.9850 0.9800 0.9750 0.9700 0.9650


1.75

TE_HAM1

TM_HAM1

#1

#2

#1

#2

S T

y (pu)
-0.50
Vpos110
Vpos14

IM

At a fault close to the city of Jeddah, on the 380 kV system or directly in the 110 kV system, the positive sequence voltage initially drops to 0.7-0.8 pu. Induction motors in the air conditioners lose torque. Almost instantaneously the motor speed is brought down when the motors act as generators. The decreased speed, results in large active and reactive currents to the motors. The motor currents give large voltage drops in the source impedances. A large part of the impedance is in the 110/13.8 kV power transformers, the voltage drop causes the machines to lose more speed. In case of peak load condition the motors have lost too much speed to be able to reaccelerate following fault clearing, fig 3.

y (pu)

Fig. 2. Simplified circuit.

1.050 1.000 0.950 0.900 0.850 0.800 0.750

0.050

0.100

0.150

0.200

0.250

0.300

0.350

0.400

Fig. 4. Motor speed and 110 kV voltage with SVCs.

The initial drop in speed for the induction motors cannot be avoided by SVCs. It will take one and a half cycle before the SVCs are fully counteracting the voltage drop. With sufficiently large SVC the voltage can be supported to such an extent that the motors do not lose speed following the initial drop, fig 4. A new stable operating point is reached. It is, during the fault, very difficult to increase the voltage to such an extent that the motors accelerate. It is important to stop the speed drop as quickly as possible. The sooner it stops the easier it becomes to reaccelerate the system following fault clear-

Authorized licensed use limited to: King Abdul Aziz City For Science & Technology. Downloaded on August 9, 2009 at 08:28 from IEEE Xplore. Restrictions apply.

ing. A shorter response time for the SVC means fewer Mvars needed. It has been shown in studies, that the motors are almost impossible to reaccelerate after fault clearing, in case the SVCs were not running during the fault. Directly at fault clearing the voltage jumps upwards in a step. The reactive current to the motors instantaneously increases, in addition a large active current is needed for reacceleration. In case the voltage at the motors remains severely depressed, the active current needed cannot flow and the voltage recovery in the system will be slow. In a worst case the motors will get stuck. Supporting the voltage speeds up the recovery. IV. SVC PERFORMANCE A. Characteristics of Jeddah SVCs The three SVCs have each a rating of 600 Mvar capacitive to 60 Mvar inductive power. They are connected to GIS substations on 110 kV. The nominal voltage on the SVC medium voltage bus is 22.5 kV. There are two TSCs rated 215 Mvar each and one TCR rated 230 Mvar, fig 5. The harmonic filters, totally rated 170 Mvar, are divided in two separate branches. The branches are connected to the MV bus by circuit breakers. Each filter branch is built up by two double tuned filters covering the 3:rd, 5:th, 7:th and 11:th harmonics.

VI-diagram se en from the primary side


1,6 1,5 1,4 1,3 1,2 1,1 Primary voltage (pu) 1 0,9 0,8 0,7 0,6 0,5 0,4 0,3 0,2 0,1 0 -7 -6 -5 -4 -3 -2 SVC current (pu) -1 0 1 2 3 A' A B C A-H design points for: 1 TCR, 2 TSC and 2 filters H M

Q = 6.0 pu Q = 5.5 pu
G F E D I J K L

I-M additional design points f or: 1 TCR, 0 TSC and 1 f ilter

Fig. 6. VI-characteristic.

B. Speed of Response When it comes to the speed of response for an SVC it is important to differentiate between large signal and small signal behavior. The large signal response is when the SVC responds to network faults changing the system voltage significantly. This is typically a line to ground fault in the SVC vicinity or a more distant three phase fault. The small signal response is for minor changes in the system voltage such as the effect from tap changer action or connection/disconnection of a line reactor or a capacitor bank. For the utility type of SVCs it is mainly the large signal speed that is of interest while most specifications deal with the small signal speed. An SVC can be simplified to a model as below, fig 7. It consists of three major parts, voltage and current measuring and processing circuits, an I regulator and finally the thyristor valves and the conventional main circuit equipment.
Vref V

1 1 + sT

1 sT K

e sT

Fig. 5. SVC single line diagram.

The maximum voltage reference is 1.1 pu. A minimum slope of 3.0 % on a 600 MVA base defines the VI diagram, fig 6. In the very leftmost corner of the diagram a secondary voltage limiter is applied. The total current is limited to 6.0 pu. The secondary voltage limiter has 1.0 s time constant and the current limiter 10.0 s. The power transformer is designed according to SEC standard, having a margin to saturation of 10 % in voltage above the secondary voltage limiter setting. This allows unrestricted operation in the leftmost VI diagram corner, determined by the voltage reference, the susceptance and the slope, for the duration needed to restore the system voltage following a severe voltage depression.

Network response (Gain)

Fig. 7. SVC model.

A utility SVC primarily controls the positive sequence voltage and in some special cases the negative sequence voltage. For the control, measured instantaneous voltages have to be separated into sequence values, additionally harmonic components in the voltage must be removed. Both these actions require time. As a first approximation the voltage processing can be seen as a first order low pass filter with a time constant of about 10 ms. Slope is the positive sequence current multiplied with a constant. Control action is by a PI regulator (in many cases just an I regulator). It works on the difference

Authorized licensed use limited to: King Abdul Aziz City For Science & Technology. Downloaded on August 9, 2009 at 08:28 from IEEE Xplore. Restrictions apply.

between a set voltage and the actual voltage modified by the slope. The output is a signal that directly can be seen as a susceptance order to the main circuit. Thyristor valves can switch only once per half cycle and phase. A three phase valve assembly can be modeled by an average time delay. The fastest possible stable SVC response is determined by the network voltage response to a change in SVC susceptance (dV/dB) and the gain in the regulator, considering voltage filtering time and the thyristor valve delay constant. The network may be seen as a Thevenin equivalent with a constant reactance behind a fixed voltage source. In case the SVC rating is small compared with the network short circuit capacity, the network displays constant gain. Later in this paper we will see the effect of a larger SVC. The gain of the regulator is set as high as possible reaching a result as shown in the IEEE Std. 1031-2000 [6]. Typically a response in the range of two cycles is achievable. The stability of the control must be maintained at varying network strength. Typically the short circuit capacity varies a factor two between strong and weak condition. The regulator is trimmed to give its fast response at the weakest network condition. It is accepted that the SVC will be slower at the strongest network. In case the system becomes even weaker, automatic gain reduction algorithms are activated. One common way to make the SVC response equal at varying network strength is to use a slope for the regulator. It is a feedback signal, lowering the voltage reference in proportion to the SVC capacitive output. The function produces a deviation in voltage at a change in SVC current, it can therefore be seen as a reactance in series with the SVC. In case the artificial reactance in the regulator can be made large compared with the network reactance, it will dominate and the SVC becomes insensitive to changes in the network strength. A typical value for the slope (s) is 3% on full SVC capacity. For an SVC being small compared with the network strength (< 5 % of Ssc) the slope reactance is in the same size as the network, eqv 1.
S Slope = 1
s 0.05 S sc

1 V = svc B X net svc + 1 B svc


X net

1 1+ X net svc B

(2 )

dV svc = dB

(1 + X net Bsvc )2

(3)

In the Saudi Arabian case each SVC has a size of 20 % of the network strength. It is required by the utility that the response time should be no longer than 40 ms in a strong network. In case the regulator is tuned to this speed for a small step, close to the inductive limit in the strong system, it becomes unstable for a step at its capacitive limit in the weak grid. The action taken to handle this is to multiply the gain in the regulator with the inverse of network gain in every time step. PSCAD and RTDS simulations, fig 9, show that an almost constant response irrespective of the network strength and SVC operating point is achieved by using an average short circuit power in the equation above.

0.05S s

sc =

0.05 S 0.03 sc

(1)

Fig. 9. Step Response. Subplot 1, 2% voltage change in the weak system, Bsvc and 20 ms/div Subplot 2, 2% voltage change for the strong system, Bsvc and 20 ms/div

When the SVC is large (> 10 % of Ssc) the slope reactance becomes smaller than one third of the network and it starts to become insignificant for the stability of the regulator. More important, the assumption the network gain is constant becomes invalid. The combination SVC and network, more and more, acts like a series resonance circuit. The network gain increases with the SVC output eqv 2 and 3.

The major task for a utility SVC is to quickly supply Mvars at severe voltage drops at network faults. The most frequent fault is a line to ground fault. The positive sequence voltage typically drops to 0.7 pu for a close by fault and gradually higher values for more remote faults. At such a large voltage deviation the SVC regulator very quickly (in about one cycle) reaches its capacity limit. This time is essentially the same irrespective of regulator gain. The TSC valves will switch on at appropriate points on wave and TCRs will cease conducting. The SVC will be fully conducting in one and a half cycle. The TSC switching on time may be longer depending on its precondition (charged or discharged). The most common condition is discharged capacitors.

Authorized licensed use limited to: King Abdul Aziz City For Science & Technology. Downloaded on August 9, 2009 at 08:28 from IEEE Xplore. Restrictions apply.

V. SYSTEM FAULTS A. Dynamic response during faults To efficiently counteract the risk for voltage collapse or stalling motors it is important that the SVC runs fully capacitive already during the fault. The controllable branches in an SVC i.e. TCRs and TSCs are both controlled by point on wave switching. TCRs are fired on a certain voltage angle giving a desired current. TSCs are switched on the voltage angle giving minimal transients in its current. At network fault initiation and clearing the voltage across the TCR and TSC branches makes almost instantaneous angle changes. In addition to this higher order transient voltages appear. Line to line faults are most severe, the three line to line voltages that were 120 degrees apart in steady state, now change to two voltages 180 degrees away from the third, fig 10. This is an almost instantaneous 60 degree jump. The valve firing systems must identify this angular change and move the instants for firing pulses to the valves. In case it fails, the valve will misfire and large transient currents may occur in the TSCs and a large DC current in the TCRs.
50 40 30 20 10 0 -10 -20 -30 -40

The synchronization rapidly tracks changes in the angles for the different phases. During the first half cycle following a short circuit, though, it is a bit unclear what the angles are, this is due to the fact that it takes some time to extract the positive and negative phase sequences in the voltage. The normal situation for the SVC is to run with both TSCs blocked, i.e. it is running with filters and TCR with an output in the range of +160 to -60 Mvar. At a network fault the control system will act and fire the TSCs, the time for this action is about one cycle. At this time the synchronization is perfect. At fault clearing the TSCs are running and must behave properly for the large phase jump. Fig 11 shows the valve behavior at a line to ground fault.
60
40
20
y (kV)

E ab2

FSL : Graphs E bc2

E ca2

0
-20
-40
-60

7.0
6.0
5.0
y (rad)

ArgAB

ArgBC

ArgC A

4.0
3.0
2.0
1.0
0.0

E ab2

FSL : Graphs E bc2

E ca2

y (kV )

3.0
2.0
1.0
y (rad)

P hiAB

P hiBC

P hiC A

0.0
-1.0
-2.0
-3.0
0.100

7.0
6.0
5.0
y (rad)

ArgAB

ArgBC

ArgC A

4.0
3.0
2.0
1.0
0.0

0.120

0.140

0.160

0.180

0.200

Fig. 11. Line to ground fault.


P hiAB

3.0
2.0
1.0
y (rad)

P hiBC

P hiC A

0.0
-1.0
-2.0
-3.0
1.100

1.125

1.150

1.175

1.200

Fig. 10. Line to line fault.

The valve firing synchronization system is based on a phase locked loop (PLL) and a correction signal for negative sequence voltage content and rapid angular changes in the positive sequence voltage. The PLL works on the positive sequence voltage on the SVC MV busbar.
+ V

At a three phase fault the change in positive sequence voltage angle is normally moderate. More interesting is that the positive sequence voltage may become so low that it is impossible to define an angle, fig 12. A voltage below 0.3 pu is considered inconclusive with regard to its angle. At such a situation it is not possible to fire the thyristor valves. All valves are blocked 20 ms after a low voltage is detected, they are deblocked again 15 ms after a voltage recovery above 0.3 pu. At this point the synchronization is perfect again.
FSL : Graphs

40
30
20
10
y (kV)

E ab2

Ebc2

Eca2

0
-10
-20
-30
-40
0.100

DQ

LP

0.120

0.140

0.160

0.180

0.200

PLL

ab bc ca

Fig. 12 Three phase fault.

DQ

LP

Fig 11. Synchronization system

B. New Control Functions for Faster Voltage Recovery During a short circuit in the power grid the positive sequence voltage is depressed. The SVC runs fully capacitive.

Authorized licensed use limited to: King Abdul Aziz City For Science & Technology. Downloaded on August 9, 2009 at 08:28 from IEEE Xplore. Restrictions apply.

y (k A )

In case of a lightly loaded system, a temporary overvoltage may occur at fault clearing. The primary reason for the overvoltage is that the power system cannot absorb the reactive generation from the SVC. A standard control system has to wait until the voltage has exceeded its set voltage until the regulator can start reducing the susceptance order to the main circuit. This inevitably results in an overvoltage with a duration of at least one cycle. In the studied system, voltages in excess of 1.5 pu may occur. Many SVC around the world do not run capacitively until after fault clearing because there were no efficient ways to resolve this problem. In the graph below, fig 13, a simulation of the temporary overvoltage is shown
JAM : G raphs

Fig. 14. New control function.

The result of the action of the new control function is shown below, fig 15.
JAM : Graphs
1.50
Vresp

y (p u )

0.70
6.0
Bprim

y (p u)

-1.0
12.5
C urrent TSC1 - Iab1
Current TSC1- Ibc1
C urrent T SC 1-Ica1

y (k A )

-12.5
12.5
C urrent TSC2 - Iab2
Current TSC2 - Ibc2
C urrent T SC 2 - Ica2

-12.5
5.0
Iba_T CR
Icb_T CR
Iac_TC R

1.50

Vresp

y (p u ,k A )

y (p u )

-6.0

0.100

0.125

0.150

0.175

0.200

0.225

0.70

6.0

Bprim

Fig. 15. New TSC blocking function.

y (p u )

-1.0

12.5

C urrent TSC 1 - Iab1

C urrent TSC1- Ibc1

C urrent TSC1-Ica1

VI. OPERATIONAL EXPERIENCE During the six months operation time elapsed, at the time of writing this paper, the SVCs have experienced three line to ground faults in the system. Two of the faults have been in the Jeddah area, fig 16, 17, and one in Medinah, fig 18, 19. The faults occurred in the summer of 2008 i.e. during the peak load season. The SVC responds quickly to the fault, it goes fully capacitive in one and a half cycle. During the fault the system voltage is constant or even increasing slightly. It can be noted that the unfaulted phase voltages do not drop much. At the fault clearing the faulted phase recovers instantaneously. The SVC reduces its output somewhat (about 100 MVAR) and runs at 500 Mvars for about 4 cycles, thereafter it gradually reduces its output to about 200 Mvars during the next 5 cycles. It stays at this output during the recorded period of 30 s. One interesting thing to note is that the faulted phase does not fully recover to its prefault value within 30 s.

y (k A )

-12.5

12.5

C urrent TSC 2 - Iab2

C urrent TSC2 - Ibc2

C urrent TSC2 - Ica2

y (k A )

-12.5

5.0

Iba_TCR

Icb_TCR

Iac_TC R

y (p u ,k A )

-6.0
0.100

0.125

0.150

0.175

0.200

0.225

Fig. 13. Temporary overvoltage.

The need for faster switching out the TSC at fast voltage recovery is evident. A new control function was developed and implemented in the three Saudi SVCs, fig 14. It is shown to be efficient in simulations, recordings from reality are still to come. The TSCs are blocked at the first current zero crossing following the fault clearing. At short circuits, at least one line to line voltage on the SVC MV bus becomes depressed. This voltage is measured with a minimum time delay on the large capacitors in one conducting TSC. The voltage is measured with a resistive voltage divider. The new function is triggered by the occurrence of a system fault and it is then enabled until the expected backup fault clearing time in the grid. The capacitor voltage is rectified and low pass filtered. An instantaneous capacitor voltage is compared with the one processed. In case the instantaneous value exceeds 0.6 pu and it is at least twice the processed voltage the firing orders for the TSCs are cancelled. There is also a second stage where it is sufficient that the voltage exceeds a certain value.
Vcap
LP

1 K

LP

e sT

A B

B>A

&
B> X

Block

B >Y

Authorized licensed use limited to: King Abdul Aziz City For Science & Technology. Downloaded on August 9, 2009 at 08:28 from IEEE Xplore. Restrictions apply.

Fig. 16. TFR recording, Faisaliyah SVC.

Fig. 17. Zoomed TFR recording, Faisaliyah SVC.

At the instant of the fault the phase B to neutral voltage instantaneously drops. The measured positive sequence voltage in the SVC drops with a time constant of about 10 ms. This is the time needed for phase sequence separation and harmonic filtering. The voltage regulator goes fully capacitive in just a little more than one cycle. The time for the main circuit to run fully capacitive on all three phases is one and a half cycle. The delay is due to the sampling effect, each phase can only start conducting on the zero crossing of their voltages. The TSCs start to conduct with a minimum of transients. At fault clearing the TSCs remain in service. The currents are still with a minimum of transients. The fault in Medinah (fig 18, 19) is similar to the one in Jeddah. The major difference it that the fault occurs at 08.45 in this case compared with 04:45 in the previous. At this later time the load in the system is heavier. There is a larger asymmetry during the faults, one of the unfaulted phases is depressed while the third one remains unaffected. The recovery becomes somewhat slower and the SVC stays at full output for a longer period of time. It should still be noted that full capacity is needed only during some tenths of a second. The sustained asymmetry after the fault is interesting. In the TSC currents a second harmonic current can be seen clearly. The source for this current is a slight saturation in the power transformer. It should then be noted that all transformers in Saudi have a saturation voltage that exceeds the maximum operational by 10%, this is also the case with the SVC transformers.

Fig. 18. TFR recording, Medinah south SVC.

Authorized licensed use limited to: King Abdul Aziz City For Science & Technology. Downloaded on August 9, 2009 at 08:28 from IEEE Xplore. Restrictions apply.

The typical SVC large signal response time (from zero to full output) is 1.5 cycles with discharged capacitors. The typical SVC small signal response time is 2.5 cycles at a strong power system, resulting in 2 cycles in the weak system without retuning. SVCs having a rating larger than 10% of the network strength requires a control gain that varies with the SVC output. VIII. REFERENCES

Periodicals:
[1] [2] Fig. 19. Zoomed TFR recording, Medinah south SVC. J. Shaffer, Air Conditioner Response to Transmission Faults, IEEE Trans. On Power System, Vol. 12, No. 2, May 1997. R. Koessler, W. Qiu, M. Patel and H. Clark ,Voltage Stability Study of the PJM System Following Extreme Disturbances, IEEE Trans. On Power Systems,Vol.22, No.1, February 2007

Books: From the operational experience it can be concluded that the SVCs are efficient in supporting the positive sequence voltage during and following single line to ground faults. The SVC reaction time is short and the TSCs behave correctly during the disturbances. Supporting the positive sequence voltage most efficiently means running all SVC phases fully capacitive. The disadvantage is that also the unfaulted phases may be raised above maximum continuous voltage. Such a rise could saturate the SVC power transformer. During the fault this is shown not to be a problem. The remaining unbalance after the fault was not expected. It can be seen that the SVC transformer saturates slightly. Maybe, it would be advantageous to run the SVC unsymmetrically during a few minutes after fault clearing.
[3] R. Mohan Mathur, R. K. Varma, Thyristor.based FACTS controllers for electrical transmission systems, New York: Wiley, 2002.

Papers from Conference Proceedings (Published):


[4] Saleh M. Bamasak, Rayed A. Al-Harthi and B. Thorvaldsson, Design, operation and protection aspects of the three +600/-60 Mvar SVC project at western network of Saudi Arabia, GCC-Cigr Power 2008, Manama, Bahrain D. Dickmander, B. Thorvaldsson, G Strmberg, D.Osborn, A Poitras, D. Fischer, Control system design and performance verification for the Chester, Maine static var compensator, IEEE /PES 1991 summer meeting, San Diego, California

[5]

Standards:
[6] IEEE Guide for the Functional Specification of Transmission Static Var Compensators, IEEE Standard Std 1031-2000, Jan. 2000

IX. BIOGRAPHIES VII. CONCLUSIONS The most important conclusions drawn from the project are: Motor stalling or voltage collapse problems are evident in power systems with a high degree of induction motor loads such as systems with frequent use of air conditioners. SVCs are efficient in supporting the positive sequence voltage during faults. The speed of induction motors can then be maintained at reasonable levels. It is important that the SVCs run at a high capacity during the faults. The quicker the SVC response the smaller ratings are needed. In case the SVCs becomes active first after fault clearing very large ratings are required. Short time rating is sufficient, only a few seconds operation is needed. SVCs are robust and can run during faults and during fault clearing. The SVCs need to be able to block TSCs immediately after fault clearing in order not to produce temporary overvoltages at light load situations.
Ahmed H. Al Mubarak was born in Al-Hassa, Saudi Arabia in 1970. He did his B.S. Electrical Engineering degree from King Fahd University of Petroleum and Minerals Dhahran, Saudi Arabia in 1994. Mr. Ahmed is presently working as Manager in Transmission Asset Development Dept., Saudi Electricity Company, Dammam Saudi Arabia. Mr. Ahmeds main fields of interests are power system analysis, FACTS devices & control, 380kV Interconnection Study Saleh Bamasak was born in Jeddah, Saudi Arabia in 1977. He received his B.S. and M.S. degree in electrical engineering from KFUPM (Saudi Arabia) in 2001 and 2005 respectively. He joined SEC-East protection engineering division in 2002. Mr. Bamasak is a member of Cigre WG B5.10 and also secretary of GCC-Cigre Study Commettee-3. He has published several papers in different international conferences Cigre, IEEE, UPEC, and PSCC. His research interest includes; Protection systems, Application of FACTS devices, Electricity market and deregulation.

Authorized licensed use limited to: King Abdul Aziz City For Science & Technology. Downloaded on August 9, 2009 at 08:28 from IEEE Xplore. Restrictions apply.

9 Bjrn Thorvaldsson was born in Gteborg, Sweden in 1959. He received his MSEE degree from Chalmers University of Technology in Sweden in 1983. Mr. Thorvaldsson has been with ABB since 1983. He has spent most of his career in ABB FACTSs research and development department in Vsters Sweden. He holds a position as Senior Specialist in Static Var Compensator system design. His main interest is in SVC main circuit and control system design. He has authored a number of technical papers. Mikael Halonen (M2006) was born in Vsters, Sweden, in 1970. He received his M.Sc. degree in Electrical Engineering from the Royal Institute of Technology, Stockholm, Sweden in 1996. He currently is working for ABB within its FACTS Division where he is involved in projects concerning reactive power compensation for voltage stability and control. He has performed numerous systems and design studies to determine SVC size, component rating and SVCs interaction with power systems. At present he is one of the managers of the ABB FACTS System Design group in Sweden. Rolf Grnbaum (M2001), received his M.Sc. degree in Electrical Engineering from Chalmers University of Technology in Gothenburg, Sweden. He is currently working for ABB AB within its Power Systems - FACTS Division, where he is Regional Marketing Manager of FACTS and Reactive Power Compensation Systems. Mr. Grnbaum has been active in ABB and previously in Asea for a number of years. Before that, he was employed by DISA Elektronik in Skovlunde, Denmark, where he was involved in marketing of scientific equipment for fluid flow research. He also has held positions as Scientific Counsellor in the Swedish Foreign Service.

Authorized licensed use limited to: King Abdul Aziz City For Science & Technology. Downloaded on August 9, 2009 at 08:28 from IEEE Xplore. Restrictions apply.

You might also like