BU1924 / BU1924F

Audio ICs

RDS / RBDS decoder

BU1924 / BU1924F
The BU1924 and BU1924F are RDS / RBDS decoders that employ a digital PLL and have a built-in anti-aliasing filter and an eight-stage BPF (switched-capacitor filter). Linear CMOS circuitry is used for low power consumption.

!Applications RDS / RBDS compatible FM receivers for American and European markets, car stereos, high-fidelity stereo systems and components, and FM pagers.

!Features 1) Low current. 2) Two-stage anti-aliasing filter (LPF). 3) 57kHz band-pass filter. 4) DSB demodulation (digital PLL). 5) Quality indication output for demodulated data.

!Absolute maximum ratings (Ta = 25C)

Parameter Power supply voltage Maximum input voltage Maximum output voltage Power dissipation Operating temperature Storage temperature Symbol VDD VMax. IMax. Pd Topr Tstg Limits 0.3~+7.0 0.3~VDD+0.3 4.0 350 40~+85 55~+125 Unit V V mA mW C C Conditions VDD1 VDD2 All input pins All output pins

Reduced by 3.5mW for each increase in Ta of 1C over 25C.

!Recommended operating conditions (Ta = 25C)

Parameter Power supply voltage Symbol VDD1 VDD2 Min. 2.7 2.7 Typ. Max. 5.5 5.5 Unit V V

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BU1924 / BU1924F
Audio ICs
!Block diagram

560p CMP MUX 270p (4) 100k VSS3 (7) (8)

120k

100k

8th Switched capacitor filter comparator

Vref

(3)

anti-aliasing filter

2.2F VDD1 (5) Analog Power supply

(16) RCLK

(1)

QUAL

VSS1

(6)

VDD2

(12) Digital Power supply (11)

PLL 57kHZ RDS/ARI

PLL 1187.5Hz

Bi-phase decoder

Differential decoder

(2)

RDATA

VSS2

Reference clock (13) XI 4.332MHZ (14) XO (10)

Measurement circuit (9) T2

T1

33pF

33pF

1 : VDD1 and VDD2 are separated within the IC. 2 : Have VDD2 (digital power supply) of a sufficiently low impedance. 3 : Match the capacitor constants with the crystal manufacturer.

RCLK

(N.C.)

VDD2

XO

VSS2

T1

XI

16

15

14

13

12

11

10

1 QUAL

2 RDATA

3 Vref

4 MUX

5 VDD1

6 VSS1

7 VSS3

8 CMP

T2 9

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BU1924 / BU1924F
Audio ICs
!Pin descriptions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol QUAL RDATA Vref MUX VDD1 VSS1 VSS3 CMP T2 T1 VSS2 VDD2 XI XO (N.C.) RCLK Crystal oscillator Demodulator clock Digital power supply 2.7V to 5.5V Connects to 4.332MHz oscillator (refer to input/output circuits) 1187.5Hz clock (refer to the timing diagram) Test input Open or connected to ground Type B Analog power supply 2.7V to 5.5V GND Comparator input C-junction (refer to input/output circuits ) Pin name Functions Input/Output type Type C Type C Type E Type F Type D Demodulator quality Good data : High, bad data : Low Demodulator data Reference voltage Input Refer to output data timing 1/2 VDD1 (refer to input/output circuits) Composite signal input (refer to input/output circuits)

Type A Type C

!Input / Output circuits

Type A
10M

Type B

Type C

Type D

Type E

Type F

VREF

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BU1924 / BU1924F
Audio ICs
!Electrical characteristics (unless otherwise noted, Ta = 25C, VDD1 = VDD2 = 5.0V, VSS1 =VSS2 = VSS3 = 0.0V)
Parameter
Operating current Reference voltage Input current 1 Output current 1 Input current 2 Output current 2 Output high level voltage 1 Output low level voltage 1 Filter block Center frequency Gain Attenuation 1 Attenuation 2 Attenuation 3 S / N ratio Demodulator RDS detector sensitivity RDS input level Data rate Clock transient vs. data
Not designed for radiation resistance.

Symbol IDD Vref IIN1 IOUT1 IIN2 IOUT2 VOH1 VOL1

Min. VDD2 1.0

Typ. 6.5 1/2VDD1 VDD2 0.3 0.2

Max. 10.0 1.0 1.0 1.0 1.0 1.0

Unit mA V A A A A V V IDD1+IDD2 Pin 3 MUX MUX XI XI

Conditions

VIN=VDD1 VIN=VSS1 VIN=VDD2 VIN=VSS2 IO=1.0mA IO=1.0mA

RCLK RDATA QUAL RCLK RDATA QUAL

FC GA ATT1 ATT2 ATT3 SN

56.5 20 18 65 35 1.0

57.0 23 22 80 50 35

57.5 26 1.0 300

kHz dB dB dB dB dB F=57.0kHz 57kHz4kHz 38kHz 67kHz 57kHz VIN=3mVrms

SRDS MRDS DRATE CT

0.5 1187.5 4.3

mVrms mVrms Hz s

!Output data timing

RCLK

RDATA

T1 T1=T2=4.3S

T5

T1

T3 T3=T4=421S

T4 T5=T6=416.7S

T2

T6

T2

The clock (RCLK) frequency is 1187.5Hz. Depending on the state of the internal PLL clock, the data (RDATA) is replaced in synchronous with either the rising or falling or falling edge of the clock. To read the data, you may choose either the rising or falling edge of the clock as the reference. The data is valid for 416.7s. after the reference clock edge.

QUAL pin operation : Indicates the quality of the demodulated data. (1) Good data : HI (2) Poor data : LO

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BU1924 / BU1924F
Audio ICs
!Electrical characteristic curves
30 20 10
FILTER GAIN : G (dB)

0 10 20 30 40 50 60 70 10

20

30 40

50

60

70

80

90 100

FREQUENCY : f (kHz)

Fig.1 Band-pass filter characteristics

!External dimensions (Units : mm)

BU1924 BU1924F

19.40.3 16 9

10.00.2
6.50.3

16

6.20.3

8 7.62

0.51Min.

4.40.2

3.20.2 4.250.3

1
0.30.1
2.54 0.50.1 0~15

1.50.1

0.11

1.27

0.40.1

0.3Min. 0.15

DIP16

SOP16

0.150.1

5/5