Analog Electronics - Lab MANUAL

CMR INSTITUTE OF TECHNOLOGY
No.132, AECS Layout, I.T.P.L. Road, Kundalahalli, Bangalore- 560 037

Ph: 080- 28524466, Extn: 213 (EC Dept. HOD)
No.132, AECS Layout, I.T.P.L. Road, Kundalahalli, Bangalore- 560 037
Ph: 080- 28524466, Extn: 213 (EC Dept. HOD)

A LAB MANUAL ON
ANALOG ELECTRONICS
Subject Code: 06ESL37
(As per VTU Syllabus)

PREPARED BY

Staff members - Dept. of E&C

CONTENTS

EXPT.
NO.
NAME OF THE EXPERIMENT
PAGE
NO.
01 Half wave, full wave and bridge rectifier 01
02 Clamping circuits 10
03 Clipping circuits 16
04 RC coupled amplifier using BJT and FET 23
05 Hartley oscillator / Colpitts oscillator 31
06 Crystal oscillator 38
07 RC phase shift oscillator 41
08 Voltage series feedback amplifier using BJT 45
09
Thevenins theorem and maximum power transfer
theorem
51
10 Series and parallel resonance circuits. 55
11 Darlington emitter follower. 59
12 Class-B push pull power amplifier. 63
13 Bibliography 65
14 Vivo-voce questions 66
Analog Electronics Laboratory Manual - 06ESL37

Department of Electronics & Communication Engg. CMRIT 1
Ex.No:01 HALF WAVE, FULL WAVE AND BRIDGE RECTIFIER
HALF WAVE RECTIFIER
AIM:
To study Half Wave Rectifier and to calculate ripple factor, efficiency and
regulation with filter and without filter.
COMPONENTS REQUIRED:
Sl. No. Components Details Specification Qty
1. Diodes BY127 1 No.
2. Capacitor 0.1f, 470f Each 1 No.
3. Power Resistance Board 1 No.
4. Step down Transformer 12 V 1 No.
5. CRO, Multimeter, Milliammeter, Connecting Board

THEORY:
Half wave rectifier circuit consists of resistive load, a diode and source of
ac voltage, all connected in series. In half wave rectifier, rectifying element
conducts only during positive half cycle of input ac supply. The negative half
cycles of ac supply are eliminated from the output. The dc output waveform is
expected to be a straight line but the half wave rectifier gives output in the form
of positive sinusoidal pulses. Thus the output is called pulsating dc.
CIRCUIT DIAGRAM:
HALF WAVE RECTIFIER WITHOUT FILTER CAPACITOR

C2
0.1UF
BY127
A K
RL
AC
(230V/50HZ)
12V
12V
0
Step down
Transformer
A
Ammeter(0-250mA)
+ -
V
ODC
V
OAC

HALF WAVE RECTIFIER WITH FILTER CAPACITOR

DESIGN:
V 12 V
rms
IN
=
V 97 . 16 V 2 V
rms
IN
m
IN
= =
( )
V 4 . 5 / V V
m DC O
= =
Given
( )
V 5 V
DC O
=
( )
mA 100 I
DC O
=
( ) ( )
= = 50 I / V R
DC O DC O L

Ripple = r = Vo rms / V
O DC
= 1.21
Design for the filter capacitor
Ripple = 1/(43 f C R
L
)
Given r = 0.25
C = 1/(43 f r R
L
)
R
L
= 50
f = 50Hz
= 461.88 F 470 F
Efficiency = P
DC
/P
AC
(I
2
DC
* R
L
) / [(Irms)
2
* (R
L
+ R
F
)]
Regulation % Regulation =
100
FL
FL NL
V
V V

C2
0.1UF
BY127
A K
RL
AC
(230V/50HZ)
12V
12V
0
Step down
Transformer
A
Ammeter(0-250mA)
+ -
470UF
+
-
C1
V
ODC

V
OAC


PROCEDURE:
1. Connections are made as shown in the circuit diagram
2. Switch on the AC power supply
3. Observe the wave form on CRO across the load resistor and measure the o/p
amplitude and frequency.
4. Note down R
L,
I
DC,
V
ODC,
V
INAC
, and V
OAC
in the tabular column for different
load resistances.
5. Calculate the ripple and efficiency and Regulation for each load resistance.
6. Repeat the above procedure with filter capacitor.
TABULAR COLUMN:
Sl.
No.
R
L
I
DC

V
O
(DC)

V
IN
(AC)

V
O
(AC)

Ripple Efficiency Regulation

WAVEFORMS:

20

t
0

- 20

0 Vo (Without Filter)

t

Vo (with filter)

t

V
C

V
IN

V
O


FULL WAVE RECTIFIER
AIM:
To study the full wave rectifier and to calculate ripple factor and efficiency
and Regulation with filter and without filter.

1. Diodes BY127 2 Nos.

THEORY:
The center tapped full wave rectifier circuit is similar to a half wave
rectifier circuit, using two diodes and a center tapped transformer. Both the
input half cycles are converted into unidirectional pulsating DC.
CIRCUIT DIAGRAM:
FULL WAVE RECTIFIER WITHOUT FILTER CAPACITOR

FULL WAVE RECTIFIER WITH FILTER CAPACITOR

(230V/50HZ)
C2
0.1UF
BY127
A K
RL
AC
12V
12V
0
Step down
Transformer
A
Ammeter(0-250mA)
+ -
470UF
+
-
C1
V
O(DC)

BY127
A K
V
O(AC)

Step down
C2
0.1UF
BY127
A K
RL
AC
(230V/50HZ)
12V
12V
0
Transformer
A
Ammeter(0-250mA)
+ -
V
O(DC)

BY127
A K
V
O (AC)


DESIGN:
Vin rms = 12V
Vin m = 2Vin rms = 16.97V
V
O DC
= 2Vm/ = 10.8V
Given V
O DC
= 10V
I
O DC
= 100mA
R
L
= V
O DC
/ I
O DC
= 100
O DC
= 0.48
L
)
Given r = .06
C = 1/(43 f r R
L
)
R
L
= 100
f = 50Hz
= 470UF
Efficiency = PDC /PAC (I
2
DC
* R
L
) / [(Irms)
2
* (R
L
+ R
F
)]

100
FL
FL NL
V
V V

PROCEDURE:
3. Observe the wave form on CRO across the load resistor and measure the o/p
amplitude and frequency.
4. Note down R
L
, I
DC,
V
ODC ,
Vinac, Voac in the tabular column for different load
resistances.
5. Calculate the ripple and efficiency and regulation for each load resistance.

TABULAR COLUMN:
Sl.
No.
R
L
I
DC

V
O
(DC)

V
IN
(AC)

V
O
(AC)



WAVEFORMS:

t
0

-


t

Vo (with filter)

t
V
C

V
IN

V
O


BRIDGE RECTIFIER
AIM:
To study the bridge rectifier and to calculate ripple factor and efficiency and
regulation with filter and without filter.
1. Diodes BY127 4 Nos.

THEORY:
The bridge rectifier circuit is essentially a full wave rectifier circuit, using
four diodes, forming the four arms of an electrical bridge. To one diagonal of the
bridge, the ac voltage is applied through a transformer and the rectified dc
voltage is taken from the other diagonal of the bridge. The main advantage of
this circuit is that it does not require a center tap on the secondary winding of
the transformer; ac voltage can be directly applied to the bridge.
The bridge rectifier circuit is mainly used as a power rectifier circuit for
converting ac power to dc power, and a rectifying system in rectifier type ac
meters, such as ac voltmeter in which the ac voltage under measurement is first
converted into dc and measured with conventional meter.
CIRCUIT DIAGRAM:
BRIDGE RECTIFIER WITHOUT FILTER CAPACITOR

RL
- +
BRIDGE
1
4
3
2
C2
0.1UF
AC
(230V/50HZ)
12V
12V
0
Step down
Transformer
Vo
A
Ammeter(0-250mA)
+ -

BRIDGE RECTIFIER WITH FILTER CAPACITOR
C1
470UF
RL
- +
BRIDGE
1
4
3
2
C2
0.1UF
AC
(230V/50HZ)
12V
12V
0
Step down
Transformer
Vo
A
Ammeter(0-250mA)
+ -
+

-

DESIGN:
Vin rms = 12V
Vin m = 2Vin rms = 16.97V
V
O DC
= 2Vm/ = 10.8V
Given V
O DC
= 10V
I
O DC
= 100mA
R
L
= V
O DC
/ I
O DC
= 100
O DC
= 0.48
L
)
Given r = .06
C = 1/(43 f r R
L
)
R
L
= 100
f = 50Hz
= 470UF
Efficiency
= PDC /PAC
= (I
2
DC
* R
L
) / [(Irms)
2
* (R
L
+ R
F
)]
100
FL
FL NL
V
V V


PROCEDURE:
3. Observe the wave form on CRO across the load resistor and measure the
o/p amplitude and frequency.
4. Note down R
L
, I
DC,
V
ODC ,
Vinac, Voac in the tabular column for different
load resistances.
5. Calculate the ripple factor, efficiency and regulation for each load
resistance.

TABULAR COLUMN:
Sl.
No.
R
L

I
DC

V
O
(DC)

V
IN
(AC)

V
O
(AC)


WAVEFORMS:
Vin
20

t
0

- 20

Vo

t

Vo (with filter)
V
C

t
RESULT:


Ex.No:02 CLAMPING CIRCUITS

AIM:
Design a clamping circuit for the given output.
1. Diodes BY127 1 No
2. Capacitors 0.1 F 1 No
Signal generator, Cathode Ray Oscilloscope (CRO) with
Probes, Dual Power Supply, Connecting Board

THEORY:
A clamper is one, which provides a D.C shift to the input signal. The D.C
shift can be positive or negative. The clamper with positive D.C shift is called
positive clamper and clamper with negative shift is called negative clamper.
Consider a clamper circuit shown below.

In the positive half cycle as the diode is forward biased the capacitor charges to
the value ( )
D IN
V V with the polarity as shown in the figure. In the negative half
cycle the diode is reverse biased. Hence the output is
C IN O
V V V = .
Initially let us assume that the capacitor has charged to ( )
D IN
V V
i.e. (5 0.5) = 4.5V
Then in the positive half cycle diode is forward biased and applying KVL to
the loop,
V
in
V
C
V
0
= 0 V
0
=V
in
V
C

When V
in
= 0 V
0
= 0 - 4.5 = - 4.5V
V
in
= 5V V
0
= 5 4.5 = 0.5V
In the negative half cycle
When V
in
= -5V V
0
= -5 4.5 = -9.5V
The output shifts between 0.5V and 9.5V.Here the output has shifted
down by 4.5V
The peak to peak voltage at the output of a clamper is the same as that of
the input.
D1
BY127
0.1u
+ -
Vo Vin
C

CIRCUIT DIAGRAM AND DESIGN:
Given V
in
= 10V (p-p)
A] In the positive half cycle:
Diode is forward biased.
Applying KVL to loop 1
V
in
V
C
V
D
= 0
V
C
= V
in
V
D

= 5 - 0.5 4.5V
In the negative half cycle:
V
in
V
C
V
0
= 0
V
0
= V
in
V
C

When V
in
= 0 V
0
= - 4.5V
When V
in
= 5V V
0
= 0.5V
When V
in
= -5V V
0
= -9.5V
B]In the negative half cycle:
Diode is forward biased
Applying KVL to loop 1
V
in
+ V
C
+ V
D
= 0
V
C
= - ( V
in
+ V
D
)
V
C
= - (-5 + 0.5)
= 4.5V
In the positive half cycle:
Diode is reverse biased.
Apply KVL to the loop
V
in
+ V
C
V
0
= 0
V
0
= V
in
+ V
C

When V
in
= 0 V
0
= 4.5V
When V
in
= 5V V
0
= 5 + 4.5 = 9.5V
When V
in
= - 5V V
0
= - 0.5V
D1
BY127
0.1u
+ -
Vo Vin
C
D1
BY127
0.1u
- +
Vo Vin
C

C] Assume V
R
= 2V
Diode is forward biased.
Apply KVL to loop 1
V
in
V
C
V
D
V
R
= 0
V
C
= V
in
V
D
V
R

= 5 - 0.5 2
= 2.5V
Diode is reverse biased
V
in
V
C
V
0
= 0
V
0
= V
in
V
C

When V
in
= 0V V
0
= - 2.5V
When V
in
= 5V V
0
= 2.5V
When V
in
= -5V V
0
= -7.5V
D] Assume V
R
= 2V
Diode is forward biased and the capacitor charges.
Apply KVL to loop 1
V
in
V
C
V
D
+ V
R
= 0
V
C
= V
in
V
D
+ V
R

= 5 0.5 +2
= 6.5V
V
in
V
C
V
0
= 0
V
0
= V
in
V
C

When V
in
= 0V V
0
= - 6.5V
When V
in
= 5V V
0
= - 1.5V
When V
in
= -5V V
0
= - 11.5V

Vo
0.1u
D1 BY127

+ -
Vin
C
V
R
Vo
D1 BY127

0.1u
C
Vin
- +
V
R

E]In the negative half cycle:
Assume V
R
= 2V
Diode is forward biased and capacitor charges.
Apply KVL to the loop1
V
in
+ V
C
+ V
D
+ V
R
= 0
V
C
= - ( V
in
+ V
R
+ V
D
)
= - (- 5 + 0.5 + 2)
= 2.5V
From the fig. we see that
V
in
+ V
C
V
0
= 0
V
0
= V
in
+ V
C

When V
in
= 0 V
0
= 2.5V
When V
in
= 5V V
0
= 7.5V
When Vin = -5V V0 = -2.5V
F] VR = 2V
Diode is forward biased and capacitor charges.
Apply KVL to loop 1
V
in
+ V
C
+ V
D
- V
R
=0
V
C
= - ( V
in
+ V
D
- V
R
)
= - (- 5 + 0.5 2)
= 6.5V
From the circuit we see that,
V
in
+ V
C
- V
0
=0
V
0
= V
in
V
C

When V
in
=0V V
0
=6.5V
When V
in
= 5V V
0
= 11.5V
When V
in
= - 5V V
0
= 1.5V
PROCEDURE:
1. Rig up the circuit as shown in the circuit diagram.
2. Give a sinusoidal input of 10V peak to peak
3. Check and verify the output.
Vo
0.1u
D1
BY127

VR
C
Vin
- +
Vo
0.1u
D1
BY127

C
Vin
+ -
VR

WAVEFORMS:
V
in

5V

0 t

- 5V

V
0

0.5
0 t
[A]
- 4.5

- 9.5

V
0

9.5

4.5

[B] 0 t
- 0.5

V
0

2.5
0
[C] t
- 2.5

- 7.5


V
0

0 t
[D] - 1.5

- 6.5

- 11.5

V
0

7.5

2.5

[E] 0 t

- 2.5

V
0

11.5

6.5
[F]
1.5
0 t

RESULT:



Ex.No:03 CLIPPING CIRCUITS

AIM:
Design a clipping circuit for the given values.
1. Diodes BY127 1 No
2. Resistors 10 K 1 No

THEORY:
The process by which the shape of a signal is changed by passing the
signal through a network consisting of linear elements is called linear wave
shaping. Most commonly used wave shaping circuit is clipper. Clipping circuits
are those, which cut off the unwanted portion of the waveform or signal without
distorting the remaining part of the signal. There are two types of clippers
namely parallel and series. A series clipper is one in which the diode is
connected in series with the load and a parallel clipper is one in which the diode
is connected in parallel with the load.

CIRCUIT DIAGRAM AND DESIGN:
Assume V
in
= 10V (Peak to Peak)
(a) Consider the circuit in fig. 1
In the positive half cycle D is forward biased
V
0
= V
in
0.5 = 5 0.5 = 4.5 (0.5V is the diode drop)
In the negative half cycle D is reverse biased
V
0
= 0V
(b) Consider the circuit in fig. 2
In the positive half cycle D is reverse biased
V
0
= 0V
In the negative half cycle D is forward biased
Applying KVL to the loop
V
in
+ V
D
V
0
= 0
V
0
= V
in
+ V
D
= -5 + 0.5 = - 4.5V
10k
D1
BY127
Vin
Vo
(a)
10k
D1
BY127
Vin Vo

(c) Consider the circuit in fig. 3
Given V
R
= 2.5V
In the positive half cycle
(i) When |V
in
| > |V
D
+ V
R
|, D is forward biased
Applying KVL, we get
V
in
= V
D
+ V
R
+ V
0

V
0
= V
in
V
D
V
R

V
0
= 5 0.5 2.5
V
0
= 2V
(ii) When |Vin| < |V
D
+ V
R
|, D is reverse biased
V
0
= 0V
In the negative half cycle, D is reverse biased
V
0
= 0V
(d) Consider the circuit in fig. 4
Assume V
R
= 3V
In the positive half cycle, D is reverse biased
V0 = 0V
(i) When |V
in
| > |V
D
+ V
R
|, D is forward biased
V
in
= - V
D
- V
R
+ V
0

V
0
= V
in
+ V
D
+ V
R

V
0
= -5 + 0.5 + 3
V
0
= -1.5V
(ii) When |Vin < |V
D
+ V
R
V
0
= 0V
D1
BY127
10k
VR
Vin
Vo
VR
10k
D1
BY127
Vin Vo

(e) Consider the circuit in fig. 5
Assume V
R1
= 2.5V and V
R2
= 3V
In the positive half cycle, D
2
is reverse biased
(i) When |V
in
| > |V
D1
+ V
R1
|, D
1
is forward biased
V
in
= V
D1
+ V
R1
+ V
0

V
0
= V
in
- V
D1
- V
R1

V
0
= 5 - 0.5 2.5
V
0
= 2V
(ii) When |Vin < |V
D1
+ V
R1
|, D
1
is reverse biased
V
0
= 0V
(i) When |V
in
| > |V
D2
+ V
R2
|, D
2
is forward biased
V
in
= - V
D
- V
R
+ V
0

V
0
= V
in
+ V
D2
+ V
R2

V
0
= -5 + 0.5 + 3
V
0
= -1.5V
(ii) When |Vin < |V
D2
+ V
R2
|, D2 is reverse biased
V
0
= 0V
(f) Consider the circuit in fig. 6
During the positive half cycle, D is forward biased
V
0
= V
D
= 0.5V
During negative half cycle, D is reverse biased
V
0
= V
in

BY127
VR2
10k
BY127 VR1 Vo
D1
Vin
1
2
D2
10k
D1
BY127
Vo
Vin

(g) Consider the circuit in fig. 7
During positive half cycle,
D is reverse biased
V
0
= V
in

During negative half cycle,
D is forward biased
V
0
= -V
D
= -0.5V
(h) Consider the circuit in fig. 8
During positive half cycle
(i) When |V
in
| > |V
D
+ V
R
|,
D is forward biased
V
0
= V
D
+ V
R
= 0.5 + 2.5
V
0
= 3V
(ii) When |V
in
| < |V
D
+ V
R
V
0
= V
in

V
0
= V
in

(i)Consider the circuit in fig. 9
Assume V
R
= 2.5V
During positive half cycle,
D is reverse biased
V
0
= V
in

During negative half cycle
(i) When |V
in
| > |V
D
+ V
R
|,
D is forward biased
Applying KVL to the loop, we get
V
0
= -V
D
- V
R
= - 0.5 - 2.5
V
0
= -3V
(ii) When |V
in
| < |V
D
+ V
R
|,
D is reverse biased
V
0
= V
in

V
0
= V
in

10k
D1
BY127
VR
Vin
Vo
10k
D1
BY127
Vin
Vo
10k
D1
BY127
VR
Vin
Vo
+
-

(j) Consider the circuit in fig. 10
Assume V
R1
= V
R2
= 2.5V
During positive half cycle, D
2
is reverse biased.
(i) When |V
in
| > |V
D1
+ V
R1
|, D
1
is forward biased
V
0
= V
D1
+ V
R1
= 0.5 + 2.5
V
0
= 3V
(ii) When |V
in
| < |V
D1
+ V
R1
|,
D
1
is reverse biased
V
0
= V
in

D
1
is reverse biased
(i)When |V
in
| > |V
D2
+ V
R2
|, D
2
is forward biased
Applying KVL to the loop, we get
V
0
= -V
D2
- V
R2
= -0.5 - 2.5
V
0
= -3V
(ii) When |V
in
| < |V
D2
+ V
R2
|, D
2
is reverse biased
V
0
= V
in

(k) Consider the circuit in fig. 11
Assume V
R1
= 3.5V and V
R2
= 2V
During positive half cycle
(i) When |V
in
| > |V
D1
+ V
R1
|
D
1
is forward biased and
D2 is reverse biased
V
0
= V
D1
+ V
R1
= 0.5 + 3.5 = 4 V
(ii) When |V
in
| < |V
R2
V
D2
|
D
1
is reverse biased and
D
2
is forward biased
V
0
= -V
D2
+ V
R2
= - 0.5 + 2 1.5V
D1 is reverse biased and D2 is forward biased
V
0
= -V
D2
+ V
R2
= - 0.5 + 2 V
0
= 1.5V
PROCEDURE:
1. Rig up the circuit as shown in the fig.
2. Give a sinusoidal input of 10V peak to peak.
3. Check the output at the output terminal.
4. To plot the transfer characteristics, connect channel 1 of the CRO to
the output and channel 2 to the input and press the XY knob
5. Adjust the grounds of both the channels to the centre.
6. Measure the designed values.

D1
BY127
VR1
VR2
10k
BY127
Vin
D2
Vo
1
Vo
Vin
10k
D1
BY127
VR1
BY127
D2
VR2
Vo

WAVEFORMS:
Series Clipper
V
in

5
3
0 t
- 3.5
- 5
Vo
4.5

(a) 0 t

Vo
(b)
0 t

- 4.5

2.0
(c)
0 t

(d) 0 t
-1.5

2
(e) 0 t
-1.5
Vin
Vo
Vin
Vo
Vin
Vo
3
Vin
Vo
-3.5
Vin
Vo
-3.5
3

Shunt Clipper
V
in

+5
0 t

+5

(f) 0.5 t
0.5
-5

4.5

(g) 0 t 0.5

V
O

3
(h) t
-5

+5
(i) 0 t
-3

+3
(j) 0 t
-3
+4
1.5
( k ) 0 t

RESULT:
Vin
Vo
Vin
Vo
Vin
Vo
-3.0
Vin
Vo
3.0
Vin
Vo
Vin
Vo
3.0


Ex.No:04 RC COUPLED AMPLIFIER - BJT

AIM:
Design an RC coupled single stage BJT amplifier and determine its gain
and frequency response, input and output impedances.
1. Transistor SL100 1 No
2. Capacitors 0.1 f , 47f Each 1 No
3. Resistors 22K, 4.7K, 1.2K, 330 Each 1 No
DC Supply, Signal Generator, CRO with Probe

CIRCUIT DIAGRAM:

To Find Input Impedance

To Find the Output Impedance

DRB

RC
COUPLED
AMPLIFIER
I/P V
OUT

D
R
B

RC
COUPLED
AMPLIFIER
I/P

V
OUT
00
R
2

SL100
CB
Cc
R
1
Vcc = 12 v
C
E
R
E
~ Vs
B
Vo
Rc
22K
4.7K
1.2 K
330
47 f
0.1 f
0.1 f

DESIGN:
Given V
CC
= 12V, I
C
= 4mA, = 100.
R
E
: W.K.T. V
RE
= V
CC
/ 10 = 12 / 10 = 1.2V ------for biasing
I
E
I
C
= 4 mA
From the fig. We see that,
I
E
R
E
= V
RE

R
E
= 1.2 / (4 x 10
-3
) = 300
Therefore R
E
330
R
C
: V
CE
= V
CC
/ 2 = 6V ----- for Q point to be in active region.
Applying KVL to output loop
V
CC
I
C
R
C
-V
CE
-V
RE
= 0
12 4 x 10
-3
R
C
6 -1.2 = 0
Therefore R
C
= 1.2k
R
1
& R
2
: From biasing circuit
V
B
= V
BE
+ V
RE

= 0.7 + 1.2
V
B
= 1.9V
Assume 10 I
B
flows through R
1
and 9 I
B
flows through R
2
.
W.K.T. I
C
= I
B

4 x 10
-3
= 100 I
B

Therefore I
B
= 40 A
From the fig. we see that,
R
1
= V
CC
V
B
/ 10 I
B
= 12 1.9 / (10 x 40 x 10
-6
) = 25.25k
Therefore R1 22k
R
2
= V
B
/ 9I
B
= 1.9 / ( 9 x 40 x 10
-6
) = 5.28k
Therefore R
2
4.7k
C
E
, C
C
, C
B
: Let C
B
= C
C
= 0.1F
X
CE
= R
E
/10
Therefore f = 10 / (2 C
E
R
E
)
Let f = 100Hz and W.K.T R
E
= 330
Therefore C
E
= 10 / 2 f.R
E
= 48F
Therefore C
E
47 F.


PROCEDURE:
1) To find Q point:
Connect the circuit without V
s
and capacitors. Set Vcc= 12V. Measure dc
voltages at the base V
B
, collector Vc and V
E
with respect to ground
Determine V
CE
= V
C
V
E
= --------- V
I
C
= (V
CC
-V
C
)/R
C
= -------- mA
Q point is Q(V
CE
,I
C
)
To check biasing conditions:
With V
CC
=12V; V
CE
should be V
CC
/2 = 6V
V
RE
should be V
CC
/10 = 1.2V
V
BE
= 0.6V
2) Connect the circuit of Fig(1)
3) Feed a sine wave of peak to peak amplitude about 40Mv from signal
generator.
4) Vary the input sine wave frequency from 10Hz to 1MHz in steps and
measure the output voltage V
O
of the amplifier. Input voltage Vi should
remain constant throughout the frequency range.
5) Tabulate the results.
6) Plot the graph of frequency f versus Gain in dB and determine the GBW
product
Procedure to measure input impedance Zi:
1) Connect the circuit of Fig(2).
2) Set the following:
DRB to zero.
Input sine wave amplitude of 40Mv
Input sine wave frequency to any mid band frequency.
3) Measure Vop-p.
4) Increase DRB till VO = Vop-p/2. The corresponding DRB value gives the
input impedance Zi.
Procedure to measure output impedance:
1) Connect as in Fig(3).
2) Set the following:
DRB to maximum value.
Input sine wave amplitude to 40mv.
Input sine wave frequency to any mid band frequency
3) Measure Vop-p.

4) Decrease DRB till Vo = Vop-p/2. The corresponding DRB value gives the
output impedance Zo.

WAVEFORM:
V
in

0 t

V
0

0 t

OBSERVATION
Vi = ---------------- mV

Freq.
(Hz)
Output Voltage A
V
= V
0
/ V
i
A
V
(dB) = 20log A
V

100
.
.
.
1 M



FREQUENCY RESPONSE CURVE ( in Semilog )

A
V
(db)

3db

f
1
f
2
f
Bandwidth = f
2
f
1

RESULT:


Ex.No:04 RC COUPLED AMPLIFIER FET

AIM:
Design an RC coupled single stage FET amplifier and determine its gain
and frequency response, input and output impedances.
1. FET BFW10 1 No
2. Capacitors 0.37 f 2 Nos.
100 f 1 No
3. Resistors 2.2 M, 1 K, 330, 10 K Each 1 No

CIRCUIT DIAGRAM:

To Determine Input Impedance:
47k

Vin Vout

To Determine Output Impedance:

Vin Vout

VOLTAGE SERIES
FEEDBACK
AMPLIFIER WITH /
WITHOUT FEEDBACK
~

VOLTAGE SERIES
FEEDBACK
AMPLIFIER WITH /
WITHOUT FEEDBACK
~
D
R
B
0
C1=0.37f
RD =1 K
BFW10
D
G
S
RS
330
C2=0.3f
CS
100f
VINi
RL
10 K
VDD = 12V
RG
2.2M
Vo

DESIGN:
Given V
DD
= 12V, I
Dss
= 10 mA, V
GS
= - 2V, V
P
= -6 V
For proper biasing: V
DD
=12 V; V
DS
= 6 V;
V
RS
= V
DD
/10 = 1.2V
V
GS
= - 0.7 to -2V
To find R
D
:
Applying KVL to the output loop of the circuit
V
DD
= V
DS
+ I
D
R
D
+ V
RS

12 = R
D
(5 x 10
-3

) + 6 + 1.2
R
D
= 960 1 k
I
D
= I
DSS
(1-V
GS
/ V
P
)
2
= 10x10
-3
(1- 2/6)
2

= 4.4 mA 5mA
To find R
S
:
V
RS
= I
S
R
S

R
S
= V
RS
/I
S
= 1.2 / 5x10
-3

240 270
Assume R
S
= 2 M
To find C
S
:
X
S
= 0.1 Rs = 27
X
S
= 1/2fC
S
Let f = 50 Hz Therefore C
S
= 100f
Let C
1
= C
2
= C
X
D
= 10 R
D
= 10K
X
D
= 1/2f
C
therefore C = 0.318f
TABULAR COLUMN:
V
in
= mV
Frequency
(Hz)
V
0
(V) A
V
A
V
(dB)
10
20
.
.
.
.
.
1M



A
V
(db)

3db

f
1
f
2
f
Bandwidth = f
2
f
1

WAVEFORM:
V
in

0 t

V
0

0 t

RESULT:



Ex.No:05
HARTLEY OSCILLATOR / COLPITTS OSCILLATOR

AIM:
Design of Hartley/Colpitts oscillator for a given Radio frequency of
f
0
=100 KHz using BJT.

1. Transistor BC109 1 No
2. Capacitors
0.1 f, 1000 pf 2 No
47f, 0.0023 f Each 1 No
3. Resistors 18K, 1.8K, 3.9K, 4700
1 K Pot
Each 1 No
4. Inductors 100 H, 1mH, 5mH Each 1 No
DC Supply, CRO with Probe

THEORY:
Oscillators are devices, which generate oscillations. The frequency of
oscillations depends on the feedback network. Feedback may be of two types
namely positive and negative. In positive feedback, the feedback signal is
applied in phase with the input signal thus increasing it. In negative feedback,
the feedback signal is applied out of phase with the input thus reducing it. The
feedback used in oscillators is positive feedback. The oscillators work on the
principle of Barkhausen criteria. This states that for sustained oscillations
i) Loop gain Av must be equal to 1.
ii) The phase shift around the loop must be 0 deg of 360 deg.
Here Av is the gain of the amplifier and is the attenuation of the feedback
network. Consider the feedback network shown in the fig (1) below. Assume an
amplifier with input signal Vin. The output signal V
O
will be 180 deg out of phase
with Vin. So to get an in phase output, the feedback network provides 180-deg
phase shift. Therefore the output Vf from the feedback network can be made in
phase and equal in amplitude to Vin and Vin can be removed. Even then the
oscillations continue. Practical oscillations do not need any input signal to start
oscillations. They are self-starting due to thermally produced noise in resistors
and other components. Only one frequency (fo) of noise satisfies, Barkhausen

criteria and the circuit oscillates with that frequency. The magnitude of fo keeps
on increasing each time it goes around the loop. The amplification of fo is limited
by circuits own non-linearities. Therefore to start oscillations Av > 1 and to
sustain it, the loop gain Av = 1.

Fig 1.

The feedback network used here consists of L and C. Consider the circuit
shown below fig 2. This circuit consists of L and C in parallel. The capacitor
stores energy in its electric field whenever there is voltage across it and the
inductor stores energy in its magnetic field whenever there is current through it.
Initially let us assume that the capacitor has charged to V volts. When S is
closed c= 0. When S is closed at t = t
0
, capacitor starts charging through the
inductor. Thus a voltage gets built up across the inductor due to the change in
current through it. If the capacitor was changed with the polarity as shown in
the fig 2 the current starts flowing from the positive plate of the capacitor to the
negativ4 plate of the capacitor. As shown the voltage across the capacitor
reduces during the discharge time v reduces and I increases. At time t1 v will be
0 and I will be maximum as c is fully discharged, the capacitor charges like
sinusoidal oscillations. Thus the circuit oscillates with the frequency
fo = 1/ 2LC

The Hartley oscillator consists of two inductors and a capacitor and Colpitts
oscillator consists of two capacitors and an inductor.

L C
i
+
-
S
t = to
v
B
Av
Vin
Vf
Vo
Amplifier
Fig.2

The resonant frequency fo for Hartley oscillator is

fo =1/ 2 L
eq
C ------where L
eq
= L1 + L2.

The resonant frequency fo for Colpitts oscillator is

fo = 1/ 2LC
eq
------where C
eq
= C1C2/(C1 + C2)

CIRCUIT DIAGRAM:

HARTLEY OSCILLATOR:

47 f
C = 0.0023 f
GND
L1 = 100 H L2 = 1mH
R
2

C
E
R
E
3.9K
470
BC109
C
B
Cc
R
1
Vcc = 9 v
Rc
18K
1.8 K
0.1 f
0.1 f
V
O

Variable
1 K Pot


COLPITTS OSCILLATOR:

DESIGN:
Given VCC = 9V, IC = 2mA, = 50

R
E
: W.K.T. V
RE
= V
CC
/ 10 = 9 / 10 = 0.9V ------for biasing
I
E
I
C
= 2 mA
I
E
R
E
= V
RE

R
E
= 0.9 / (2 x 10
-3
) = 450
Therefore R
E
470

R
C
: V
CE
= V
CC
/ 2 = 4.5V ----- for Q point to be in active region.
V
CC
I
C
R
C
-V
CE
-V
RE
= 0
9 2 x 10
-3
R
C
4.5 -0.9 = 0
Therefore R
C
= 1.8k
47 f
R
2

C
E
R
E

3.9K
470
BC109
C
B
Cc
R
1
Vcc = 9 v
Rc
18K
1.8 K
0.1 f
0.1 f
V
O

Variable
1 K Pot
L = 5mH
GND
C2 = 1000pf
C1 = 1000pf

R
1
& R
2
V
B
= V
BE
+ V
RE

= 0.7 + 0.9
V
B
= 1.6V
Assume 10 I
B
flows through R
1
and 9 I
B
flows through R
2
.
W.K.T. I
C
= I
B

2 x 10
-3
= 50 I
B

Therefore I
B
= 40 A
R
1
= V
CC
V
B
/ 10 I
B
= 9 1.6 / (10 x 40 x 10
-6
) = 18.5k
Therefore R1 18k
R
2
= V
B
/ 9I
B
= 1.6 / ( 9 x 40 x 10
-6
) = 4.44k
Therefore R
2
3.9k
C
E
, C
C
, C
B
: Let C
B
= C
C
= 0.1F
X
CE
= RE/10
E
R
E
)
E
= 470
Therefore C
E
= 10 / 2 f.R
E
= 34F
Therefore C
E
47 F.


HARTLEY OSCILLATOR:

Attenuation = Vf/Vo = IX
L1
/IX
L2
= X
L1
/ X
L2
= 2 foL1/2foL2 = L1/L2

For sustained oscillations Av = 1 -------- Av = 1/ = L2/L1

For oscillations to start Av > 1 -----------Av > L2/L1

COLPITTS OSCILLATOR:

Attenuation = Vf / Vo = IX
C1
/IX
C2
= X
C1
/ X
C2
= (1/ 2foC1)/(1/2foC2) =
C1/C2

For sustained oscillations Av = 1 ---------- Av = C1/C2

For oscillations to start Av > 1----------Av > C1/C2

DESIGN OF TANK CIRCUIT

Assume = fo = 100 KHz

HARTLEY OSCILLATOR

f
o
= 1/ (2 L
eq
C) ------where L
eq
= L1 + L2.

Assume L1 = 100 H, L2 =1mH

L
EQ
=
f
O
=1/ (2 2*10
-3
C)
C = 0.0023 f (Decade capacitance box)

COLPITTS OSCILLATOR

f
O
= 1/ (2LC
eq
)

------where C
eq
= (C1C2)/(C1 + C2)

Assume C1 = C2 = 1000 pF

Ceq =

f
O
= 1/ 2L * .05*10 - 6

L = 5 mH (Use decade inductance box)


PROCEDURE:
2. Before connecting the feedback network, check the circuit for biasing
conditions i.e. check V
CE
, and V
RE
.
3. After connecting the feedback network. Check the output.
4. Check for the sinusoidal waveform at output. Note down the frequency of
the output waveform and check for any deviation from the designed value
of the frequency.
5. To get a sinusoidal waveform adjust 1K potentiometer.
6. DCB/DIB can be varied to vary the frequency of the output waveform.

TABULAR COLUMN

HARTLEY OSCILLATOR

COLPITTS OSCILLATOR
SL NO C fo

SL NO L fo

WAVEFORM:

Vo

0

t

T

frequency fo = 1/T

RESULT:



Ex.No:06 CRYSTAL OSCILLATOR

AIM:
To design a crystal oscillator to oscillate at the specified crystal frequency.
1. Transistor BC109 1 No
2. Capacitors
0.1 f 2 No
47f 1 No
3. Resistors 18K, 1.8K, 3.9K, 470
1 K Pot
Each 1 No
4. Crystal 2 MHz or 1.8 MHz 1 No

CIRCUIT DIAGRAM:

2 MHz

1.8 MHz
47 f
R
2

C
E
R
E
3.9K
470
BC109
C
B
Cc
R
1
Vcc = 9 v
Rc
18K
1.8 K
0.1 f
0.1 f
V
O

Variable
1 K Pot

DESIGN:
Given VCC = 9V, IC = 2mA, = 50

R
E
: W.K.T. V
RE
= V
CC
/ 10 = 9 / 10 = 0.9V ------for biasing
I
E
I
C
= 2 mA
I
E
R
E
= V
RE

R
E
= 0.9 / (2 x 10
-3
) = 450
Therefore R
E
470

R
C
: V
CE
= V
CC
/ 2 = 4.5V ----- for Q point to be in active region.
V
CC
I
C
R
C
-V
CE
-V
RE
= 0
9 2 x 10
-3
R
C
4.5 -0.9 = 0
Therefore R
C
= 1.8k
R
1
& R
2
V
B
= V
BE
+ V
RE

= 0.7 + 0.9
V
B
= 1.6V
Assume 10 I
B
flows through R
1
and 9 I
B
flows through R
2
.
W.K.T. I
C
= I
B

2 x 10
-3
= 50 I
B

Therefore I
B
= 40 A
R
1
= V
CC
V
B
/ 10 I
B
= 9 1.6 / (10 x 40 x 10
-6
) = 18.5k
Therefore R1 18k
R
2
= V
B
/ 9I
B
= 1.6 / ( 9 x 40 x 10
-6
) = 4.44k
Therefore R
2
3.9k
C
E
, C
C
, C
B
: Let C
B
= C
C
= 0.1F
X
CE
= RE/10
E
R
E
)
E
= 470
Therefore C
E
= 10 / 2 f.R
E
= 34F
Therefore C
E
47 F.


PROCEDURE:
2. Before connecting the feedback network, check the circuit for biasing
conditions i.e. check V
CE
, and V
RE
.
3. After connecting the feedback network. Check the output.
4. Check for the sinusoidal waveform at output. Note down the frequency of
the output waveform and check for any deviation from the designed value
of the frequency.
5. To get a sinusoidal waveform adjust 1K potentiometer.

WAVEFORM:

Vo

0

t

T

frequency fo = 1/T

RESULT:



Ex.No:07 RC PHASE SHIFT OSCILLATOR

AIM:
Design a circuit, which generates repetitive waveform (Sinusoidal signal)
of frequency 7 KHz.
1. Transistor SL100 1 No
2. Capacitors 0.02 f 3 NoS.
0.1 f 2 Nos.
47f 1 No
3. Resistors 22K, 4.7K, 1.2K, 330
1 K Pot
Each 1 No
470 3 Nos.

THEORY:
RC Phase shift oscillator consists of a single transistor amplifier and a
RCphase shift network. The Phase shift network consists of three RC sections.
Here a fraction of the output of the amplifier is passed through a phase shift
network before feeding back to the input. The phase shift in each section is 60
0

so that the total phase shift is 180
0
.Another 180
0
phase shift is provided by the
transistor amplifier and therefore the total phase shift of the oscillator is 360
0
.The frequency of oscillations is given by
fo = 1 / [26(RC)]
Let us consider a RC circuit..
Let I be the current flowing through both R and C. Then using I as the
reference vector,Vo is in phase with I while Vc ,the voltage across the capacitor
is 90
0
behind as shown in the figure.
Vi is the sum of Vo and Vc.Hence Vc is degrees ahead of Vi and represents a
phase shift of degrees
Vo = IR, Vc =IXc
Tan =Vc/Vo =Ixc/IR = Xc/R = 1/(2 fCR)
Therefore f = 1/(2 fCR Tan )
If there are 3 sections each must give approximately 60
0

i.e. = 60
0
Tan = 3 =1.73
f= 1/(2 CR 3)

The above phase discussion ignored the additional current I that flows
through C for other sections, so that Vc is actually larger than the value
indicated,which means f is smaller.
More accurately f = 1/26(RC)
CIRCUIT DIAGRAM:

DESIGN:
Given VCC = 12V, IC = 4mA, = 100.
R
E
: W.K.T. V
RE
= V
CC
/ 10 = 12 / 10 = 1.2V ------for biasing
I
E
I
C
= 4 mA
I
E
R
E
= V
RE

R
E
= 1.2 / (4 x 10
-3
) = 300
Therefore R
E
330
R
C
: V
CE
= V
CC
V
CC
I
C
R
C
-V
CE
-V
RE
= 0
12 4 x 10
-3
R
C
6 -1.2 = 0
Therefore R
C
= 1.2k
R
1
& R
2
V
B
= V
BE
+ V
RE

= 0.7 + 1.2
Q1
1
2
3
R 470
0.1u
1k
V
CC
(12V)
A B C
R1=22K
R2=4.7 K
RC=1.2K
RE=330
CE=47f
Cc
CC=0.1f
SL100
0.02f
C
0.02f
C
0.02f
C
R 470
R 470
D

V
B
= 1.9V
Assume 10 I
B
flows through R
1
and 9 I
B
flows through R
2
.
W.K.T. I
C
= I
B

4 x 10
-3
= 100 I
B

Therefore I
B
= 40 A
R
1
= V
CC
V
B
/ 10 I
B
= 12 1.9 / (10 x 40 x 10
-6
) = 25.25k
Therefore R1 22k
R
2
= V
B
/ 9I
B
= 1.9 / ( 9 x 40 x 10
-6
) = 5.28k
Therefore R
2
4.7k
C
E
, C
C
, C
B
: Let C
B
= C
C
= 0.1F
X
CE
= RE/10
E
R
E
)
E
= 330
Therefore C
E
= 10 / 2 f.R
E
= 48F
Therefore C
E
47 F.

DESIGN OF TANK CIRCUIT:
We know that f=1/(2 RC6)
Given f
O
= 7 KHz
Assume C = 0.02 F
R = 1/(2 x 0.02 x 10
-6
x 7 x 10
+3
x 6) =527 470

PROCEDURE:
1. Make the connections as shown in the circuit diagram.
2. Check the circuit for biasing.
3. Adjust the 1k potentiometer to get sinusoidal waveform at the output.
4. To measure the phase shift
Method 1:
Connect the channel 1 of the CRO to point D and channel 2 to point A.
We will get two sine waves with a phase difference
Measure the difference by converting the time into angle.



Method 2:
a] Connect channel 1 to point D and channel 2 to point A.
Press the XY knob and measure the phase shift.
=Sin
-1
(a/b) (approx.=60
0
)

b] Connect channel 2 to point B the graph is as shown

= Sin
-1
(a/b)
Phase angle =180
0
- (approx. = 120
0
)
C] Connect channel 2 to point C
The transfer function will be almost a straight line and =0
0
and
therefore phase angle =180
0
- 0
0
= 180
0

WAVEFORM:

0 t

f = 1 / T

RESULT:

b
a

b
a


Ex.No:08 VOLTAGE SERIES FEEDBACK AMPLIFIER
USING BJT

AIM:
To design and test a two stage voltage series feedback amplifier using BJT
and to determine gain, frequency response, input and output impedance with
and without feedback.
1. Transistor SL100 2 Nos.
2. Capacitors 0.47 f 3 Nos
10f 2 Nos
3. Resistors 12K, 2.7K, 2.2K, 560 Each 2 No
4.7 K, 100 Each 1 No
4. Variable Resistor 1K Pot 1 No.

THEORY:
The high gain amplifier is widely used in analog circuit design and will
serve as the step to the next higher level of complex analog systems. The
philosophy behind the high gain amplifier is based on the concept of feedback.
In analog circuits we must be able to precisely define transfer function. A
familiar representation of this concept is illustrated in the block diagram below:

x
s
+ x
i
A x
0

_

x
f

Here x voltage or current
A High Gain Amplifier
Feedback Network
x
s
Input signal (source)
x
i
Input signal to amplifier
x
f
Feedback signal


The overall gain of the amplifier with feedback is given by
A
f
= x
0
/ x
s
= A / (1 + A)
The high gain amplifier is defined by
A = x
0
/ x
i

The gains defined above may be current gain or voltage gain.
In the circuit shown below, the feedback signal is the voltage V
f
across R
1

and the sampled signal is the output voltage V
0
across R. It is called voltage
series feedback amplifier because a part of the output voltage is fed back in
series with the input.
CIRCUIT DIAGRAM:
WITHOUT FEEDBACK

WITH FEEDBACK

10 K
10 f
R
2
SL100
Cc
R
1
C
E
R
E
B
Vo
Rc
12K
2.7K
2.2 K
560
0.47 f
R
2

SL100
Cc
R
1
CB
Vcc = 12 v
C
E
R
E
Rc
12K
2.7K
2.2 K
560
0.47 f
0.47 f
Vcc = 12 v
10 f
~ Vs
10 f
R
2

SL100
Cc
R
1
C
E
R
E
B
Vo
Rc
12K
2.7K
2.2 K
560
0.47 f
R
2
SL100
CB
Cc
R
1
C
E
R
E
Rc
12K
2.7K
2.2 K
560
0.47 f
0.47 f
100
R
F

R
~ Vs

To Determine Input Impedance
47k

Vin Vout

To Determine Output Impedance

Vin Vout

DESIGN:
Given V
CC
= 12V, I
C
= 2mA, = 25.
R
E
: W.K.T. V
RE
= V
CC
/ 10 = 12 / 10 = 1.2V ------for biasing
I
E
I
C
= 2 mA
I
E
R
E
= V
RE

R
E
= 1.2 / (2 x 10
-3
)
R
E
560
R
C
: V
CE
= V
CC
V
CC
I
C
R
C
-V
CE
-V
RE
= 0
12 2 x 10
-3
R
C
6 -1.2 = 0
Therefore R
C
= 2.2k
R
1
& R
2
V
B
= V
BE
+ V
RE

= 0.7 + 1.2
V
B
= 1.9V
Assume 10 I
B
flows through R
1
and 9 I
B
flows through R
2
.
W.K.T. I
C
= I
B

2 x 10
-3
= 100 I
B

Therefore I
B
= 20 A
VOLTAGE SERIES
FEEDBACK
AMPLIFIER WITH /
WITHOUT FEEDBACK
~

VOLTAGE SERIES
FEEDBACK
AMPLIFIER WITH /
WITHOUT FEEDBACK
~
D
R
B

R
1
= V
CC
V
B
/ 10 I
B
= 12 1.9 / (10 x 20 x 10
-6
)
Therefore R1 12k
R
2
= V
B
/ 9I
B
= 1.9 / ( 9 x 20 x 10
-6
)
R
2
2.7k
C
E
, C
C
, C
B
: Let C
B
= C
C
= 0.1F
X
CE
= RE/10
E
R
E
)
E
= 560
Therefore C
E
= 10 / 2 f.R
E
= 10f
Therefore C
E
10 f.

DESIGN FEED BACK CIRCUIT
Let = 0.02
= R
f
/ R
f
+ R
R
f
= R / 1
Let R = 4.7 K
Therefore R
f
= 100

PROCEDURE:
1. Rig the circuit as shown in the fig.
2. Check the circuit for biasing i.e. check V
DD
, V
DS
and VRS.
3. Give a sinusoidal input of 10kHz from signal generator. Adjust the
amplitude of this sine wave such that the output doesnt get clipped.
4. Observe the output waveform on the CRO.
5. Measure the output voltage using AC milli voltmeter.
6. Measure the output voltage for different frequencies of the input and
tabulate the readings as shown in the tabular column.
7. Plot the graph of gain vs frequency on a semilog graph sheet as shown
in the fig.
8. To measure input impedance connect a resistor of 47k in series with
the signal generator.
9. Measure the voltage at the input point (VS) and at the point after the
resistor (Vin).
10.Current through the resistor is given by the expression
I = ( VS Vin ) / 47k
11.Input impedance is given by Zin = Vin / 47k

12.To measure output impedance connect a DRB in parallel with the
output.
13.Adjust all the knobs of the DRB to maximum.
14.Start reducing the resistance in the DRB from a large value until the
output reduces to half.
15.The resistance in the DRB is the output impedance.

TABULAR COLUMN:
Without Feedback
V
in
= constant

Frequen
cy (Hz)
V
0
(V) A
V
A
V
(dB)
10
20
.
.
.
.
.
1M

With Feedback
V
in
= constant

Frequen
cy (Hz)
V
0
(V) A
V
A
V
(dB)
10
20
.
.
.
.
.
.
1M



EXPECTED GRAPH:

A
V

Without feedback
With feedback

0 f
WAVEFORM:
V
in

0 t

V
0

0 t

RESULT:


Ex.No:09
THEVININS THEOREM AND
MAXIMUM POWER TRANSFER THEOREM

AIM: To State and verify the thevenins theorem for the given circuit.

1. Resistors 1 K 4 Nos.
DC Supply, Multimeter, Ammeter (0-10)mA

THEORY:
Any Linear, bilateral network containing energy sources and impedances
can be replaced with equivalent circuit consisting of a voltage source in series
with an impedance.
The Value of voltage source is open circuit voltage between terminals of a
network and value of impedance is the impedance measured between the two
terminal of a network with all energy sources eliminated.
Circuit diagram:

RL
+
R3
1k
R1
1k
R2
-
B
1k
FIG 1
A
5v
1k

R1
Vo
1k
R2
A
A
0-10mA
IL
FIG 2
1k
B
+
1k
1k
-
5v
-
R3 + RL

Vo -
+
-
FIG 3
+
-
0-10mA
I
-
A
+
B
R1
1k
R2
5v
A
+
1k
1k
R3


Procedure:

1. Connection are made as shown in the fig(2).
2. Supply voltage is adjusted to 5v and the ammeter reading I
L
is noted
down.
3. Open circuit the terminal A & B , Voltmeter reading Vo is measure which is
the thevenins voltage. Vo=V
TH
= ___________Volts .
4. To find the Thevenins impedance, connections are made as shown in the
fig (3)
5. The reading of voltmeter V and ammeter I are noted . the thevenins
Impedance
Z
TH
=V/I W
Z
TH
=_____________ W
6. Thevenins equivalent circuit connection are made as shown in the fig (4)
7. The supply voltage is set to V
th
as measured above.
8. The ammeter reading I
th
is noted.
If I
th
=I
L
, Thevenins theorem is verified.

0-10mA
RL
1k
VTH
ZTH
A
+
Ith
_

(2) MAXIMUM POWER TRANSFER THEOREM:
Aim: (i) To state and verify maximum power transfer theorem.
(ii) To determine maximum power and the value of R
L
for Maximum
power transfer.

1. Resistors 1 K 1 No.
DC Supply, DRB, Multimeter, Ammeter (0-10)mA

Circuit diagram:

I 10v
Rs
0-10mA
-
A
_
- +
1k
V
Rl
10k pot
+

Circuit for measuring source resistance:

Rs
A
1k
-
0-10mA
Is
+
_
-
Vs
+
+
10v



Procedure:
1. Connection are made as shown in the fig(i).
2. Supply voltage V is set to 10V, the potentiometer R
L
is kept at maximum.
3. The readings of voltmeter (V) and ammeter (I) are noted down in the
table.
4. R
L
is decreased in steps and at each steps readings of V and I are
tabulated in the table.
5. A graph of R
L
versus power is plotted, the maximum power Pmax and
value of R
L
for maximum power transfer are noted from graph P
MAX
=_______W, R
L
= .
6. To measure source resistance the connection are made as shown in the fig
(2)
7. Supply is set to 10V, the ammeter reading I and voltmeter reading are
noted down.
The source resistance R
S
=V/I =__________
If R
S
= R
L
, MPT Theorem is verified

V (volts) I mAmps P = VI in W R
L
= V/I

RESULT :
R
L
,
R
L
, for P
MAX

P
MAX

Power ,
Watts



Ex.No: 10 SERIES AND PARALLEL RESONANCE
SERIES RESONANCE CIRCUIT

Aim : To obtain the frequency response of an RLC series circuit and hence to
determine
a) Resonance frequency fo
b) Band width ,Upper and Lower half power frequency
c) Q-factor.

1. Resistors 100 1 No.
2. Capacitor 0.22f 1 No.
3. Inductor 1 mH 1 No.
Signal generator, Multimeter

Circuit diagram:

DESIGN:

fo = 1/2LC
Let L = 1mH
C = 1/4
2
Lfo
2

C = 0.22f
R = 100
Find fo

Procedure:
1. Connections are made as shown in the circuit diagram.
2. AC Supply is switched on. oscillator output voltage is adjusted to about
maximum i.e 10V P-P
3. The frequency is gradually varied from zero hertz and for different value
of f, voltage is noted down. The results are tabulated in the tabular
column.
4. Frequency response i.e a graph of frequency versus voltage is drawn.

L
C
R
V
O



5. From the graph , resonant frequency fo is noted down at which voltage
is maximum(Vo).
6. Lower half power frequency f1 and upper half power frequency f2 are
noted corresponding to a voltage of Vo/ 2
Band width=f2-f1=_____________ hertz

7. The Q-factor =fo/f2-f1

Tabular column

f in hz V in
VOLTS

0
BW
f
1
f
0
f
2
f, Hz
V
O

V
O
max

V
O
max/2

PARALLEL RESONANCE CIRCUIT:
Aim : To obtain the frequency response of an RLC series circuit and
hence to determine

a) Resonance frequency fo
b) Band width ,upper and lower half power frequency
c) Q-factor.

1. Resistors 100 1 No.
2. Capacitor 0.22f 1 No.
3. Inductor 1 mH 1 No.
Signal generator, Multimeter

Circuit diagram:

Frequency response

Vo

Vomin x 2

Vomin

f
1
f
O
f
2
fin Hz
BW
0
L
C
R
V
O


Procedure:
1. Connections are made as shown in the circuit diagram.
2. AC Supply is switched on. oscillator output voltage is adjusted to about
maximum i.e 10V P-P
3. The frequency is gradually varied from zero hertz and for different value
of f, voltage is noted down. The results are tabulated in the tabular
column.
4. Frequency response i.e a graph of frequency versus voltage is drawn.
5. From the graph , resonant frequency fo is noted down at which voltage
is minimum (Vo).
6. Lower half power frequency f1 and upper half power frequency f2 are
noted corresponding to a voltage of V
O
min x 2.
a. Band width = f
2
- f
1
=_____________ Hz
7. The Q-factor =fo/f2-f1

RESULT:


Ex.No: 11 DARLINGTON EMITTER FOLLOWER

AIM:
To design and test a Darlington emitter follower circuit with and without
boot strapping and determine the gain, input and output impedance for both the
circuits.
1. Transistor SL100 2 Nos.
2. Capacitors
10 f 1 No
0.47f 2 Nos.
3. Resistors 1 M, 2.2 M, 1.5 K, 10 K, 47K Each 1 No
DC Supply, CRO with Probe, Signal generator,
AC millivoltmeter

THEORY:
Normally transistors are used as amplifiers. But there are some
applications in which, matching of impedance is required between two circuits
without any gain or attenuation. In such applications emitter followers are used.
Emitter followers have large input impedance and small output impedance.
Darlington emitter follower has two transistors connected in cascade such that
the emitter of first transistor is connected to the base of second transistor. The
voltage gain of the darlington emitter follower is close to unity. The major
drawback of this circuit is that the second transistor amplifies leakage current of
the first transistor and overall leakage current becomes high. The output is
observed at the emitter terminal of the second transistor. Hence it is called an
emitter follower.

CIRCUIT DIAGRAM:
Darlington emitter follower without bootstrapping

Darlington emitter follower with bootstrapping

DESIGN:
Given I
C
= 4mA, V
CC
= 12V, V
BE
= 0.6V,
1
=
2
= 100
To find R
E
:
Applying KVL to the output loop of the second transistor, we get
V
CC
= V
CE
+ V
RE

Therefore V
RE
= V
CC
V
CE
= 12 6
Therefore V
RE
= 6V
W.K.T R
E
= V
RE
/ I
E2

Here I
E2
= I
C2

Therefore R
E
= 6 / 4 x 10
-3

R
E
= 1.5k

R1
QSL100
Cb = 0.47f
RE
R2
SL100
Vin
Vcc = 12V
Q1
Vo

1 M
2.2 M
1.5 K
CE = 0.47f

QSL100
RE
SL100
Vin
Vcc = 12V
Q1
Vo
R1
Cb = 0.47f
1 M
R2
2.2 M

1.5 K
C
E
= 0.47f
C
E
= 0.47f
R3


To find R
1
& R
2
:
From the circuit we have
V
A
= V
BE1
+ V
BE2
+ V
RE

= 0.6 + 0.6 + 6 = 7.2V
W.K.T. I
C
= IB
Therefore I
B
= (4 x 10
-3
)/ 100 = 40 A
Let 10I
B
be the current through R
1
and 9I
B
be the current through R
2
.
From the fig. we see that
R
1
= (V
CC
V
A
) / 10I
B

Therefore R
1
= 12K
From the fig. R
2
= V
A
/ 9I
B

Therefore R
2
= 20 K 22K
W.K.T. C
C
= 10 / X
RE
= 10 / ( 2..f.R
E
)
Assume f = 50Hz
Therefore C
C
= 21.2 F 47 F
W.K.T. C
b
= 10 / X
RB
= 10 / ( 2..f.R
B
) where R
B
= R
1
|| R
2
= 7.5k
Therefore C
b
= 4.2 F 4.7 F
Chose R
3
= 10 K , C
B
= 10f for bootstrapping
PROCEDURE:
1. Rig up the circuit as shown in the fig.
2. Check the circuit for biasing, i.e. check V
CE
, V
CC
and V
RE
.
3. Give a sinusoidal input signal of 1KHz from a signal generator.
4. Set the input signal to a value such that the output doesnt get clipped.
5. For different frequencies of the input signal, read the output on the
voltmeter and verify that the gain is 1.
6. To measure input impedance, connect a resistor of 47k in series with
the signal generator.
7. Measure the voltage at the input point (V
S
) and at the point after the
resistor (V
IN
).
8. Current through the resistor is given by the expression
I = (V
S
- V
IN
) / 47K.
9. Input impedance is given by Z
IN
= V
IN
/ 47 K
10.To measure output impedance, connect a DRB in parallel with the
output.
11.Adjust all the knobs of the DRB to maximum.
12.Start reducing the resistance in the DRB from a large value until the
output reduces to half.
13.The resistance in the DRB is the output impedance.

TABULAR COLUMN:
V
IN
= __________ constant
Frequency
(Hz)
V
0
(V) A
V
A
V
(dB)

WAVEFORM:
V
in

V
in
0 t

V
0

0 t
V
in

RESULT:



Ex.No: 12 TRANSFORMERLESS CLASS-B PUSH PULL
POWER AMPLIFIER

Aim: Testing of a transformer less class-B push pull power amplifier and
determination of its conversion efficiency.

1. Transistor
SL100 1 No.
SK100 1 No.
2. Diode BY127 2 Nos.
3. Capacitors
47 f 2 Nos.
470 f 1 No.
4. Resistors
220 2 No
DRB 1 No
DC Supply, CRO with Probe, Signal generator,
AC millivoltmeter

Theory: In class B operation, to obtain output for the full cycle of signal, it is
necessary to use two transistors and have each conduct on opposite half cycle,
the combined operation providing a full cycle of output signal. Since one part of
the circuit pushes the signal high during one half cycle and the other part pulls
the signal low during the other half cycle, the circuit is referred to as a push pull
circuit.

Circuit diagram:

VO
Vi=50mV
CO
Q1
SL100
D1

D2
V
CC

RL
10 .
Ci
Ci
R2
R1
Q2
SK100



A
V
12v
0-500A
SL100
SK100

DESIGN:

Given Vcc =2.5V; R
L
= 10 ; I
DC
= 3mA

To Find R
1
& R
2
:
Applying KVL at the input circuit;
We get ; Vcc = 2VR1 + 1.4
Therefore; VR
1
= 0.55V;
VR
1
=I
DC
R
1
= 0.55V; R1 = 183.
Choose; R
1
= R
2
= 220.

To Find Ci :
Input coupling capacitor is given by, Xci >Zieff/10 >1.1K/10
Xci > 1/2fCi ;Ci >28F; Choose Ci = 47F

To Find C
O
:
Output coupling capacitor is given by, Xco = 10
Xco > 1/2fCo
Co > 318F; Choose; Co = 470F
Po
ac
=Vo
2
/8R
L
Pi
dc
=V
cc
I
dc

Calculate circuit efficiency, = Po (ac)/Pi(dc) = (/4)Vo/Vcc = ?

Procedure:
1. Connect the circuit as per the circuit diagram.
2. Set V
I
= 3V, using the signal generator.
3. Keeping the input voltage constant, vary the load resistor and note down
the readings of the ammeter and peak to peak output voltage.
4. Calculate P
DC
, P
AC
and % efficiency .
5. Draw the plot of resistance versus output power.
Resistance()
Po (watts)


Tabulation
Vi = ----------------
R
L
() V
O
(v) I
DC
(mA) P
AC

P
DC

%

Result:

BIBLIOGRAPHY
1. Electronic devices and circuit theory, Robert L.Boylestad and
Louis Nashelsky.
2. Integrated electronics, Jacob Millman and Christos C Halkias.
3. Electronic devices and circuits, David A. Bell.
4. Electronic devices and circuits, G.K.Mittal.


VIVA-VOCE QUESTIONS
1. What are conductors, insulators, and semi-conductors? Give egs.
2. Name different types of semiconductors.
3. What are intrinsic semiconductors and extrinsic semiconductors?
4. How do you get P-wpe and N-type semiconductors?
5. What is doping? Name different levels of doping.
6. Name different types of Dopants. .
7. What do you understand by Donor and acceptor atoms?
8. What is the other name for p-type and N-type semiconductors?
9. What are majority carriers and minority carriers?
10. What is the effect of temperature on semiconductors?
11. What is drift current? .
12. What is depletion region or space charge region?
13. What is junction potential or potential barrier in PN junctioI).?
14. What is a diode? Name different types of diodes and name its applications
15. What is biasing? Name different types w.r.t. Diode biasing
16. How does a diode behave in its forward and reverse biased conditions?
17. What is static and dyriantic resistance of diode?
18. Why the current in the fo~ard biased diode takes exponential path?
19. What do you understand 1?y AvaJanche breakdown and zener breakdown?
20. Why diode is called unidirectional device.
21. What is PIV of a diode
22. What is knee voltage or cut-in voltage?
23. What do you mean by transition capacitance or space charge capacitor?
24. What do you mean by diffusion capacitance or storage capacitance?
25. What is a transistor? Why is it called so? .
26. Name different types, of transistors?
27. Name different configurations in which the transistor is operated
28. Mention the applications of transistor. Explain how transistor is used as switch
29. What is transistor biasing? Why is it necessary?
30. What are the three different regions in which the transistor works?
31. Why trmisistor is called current controlled device?
32. What is FET? Why it is called so?
33. What are the parameters ofFET?
34. What are the characteristics of FET?
35. Why FET is known as voltage controlled device?
36. What are the differences between BJT and FET?
37. Mention applications ofFET. What is pinch offvQltage, VGS(ofJ) and lDss
38. What is an amplifier? What is the need for an amplifier circuit?
39. How do you classify amplifiers? ,
40. What is faithful amplification? How do you achieve this?
41. What is coupling? Name different type.s of coupling
42. What is operating point or quiescent point?
43. What do you mean by frequency response of an amplifier?
44. What are gain, Bandwidth, lower cutoff frequency and upper cutoff frequency?
45. What is the figure of merit of an amplifier circuit?
46. What are the advantages of RC coupled amplifier?
47. Why a 3db point is taken to calculate Bandwidth?
48. What is semi-log graph sheet? Why it is used to plot frequency response?
49. How do you test a diode, transistor, FET?
50. How do you identify the tenninals of Diode, Transistor& FET? Mention the type
number of the devices used in your lab.

51. Describe the operation ofNPN transistor. Define reverse saturation current.
52. Explain Doping w.r.t. Three regions of transistor
53. Explain the terms hie/hib, hoelhob, hre/hrb, hre/hfb.
54. Explain thermal run-.taway. How it can'be prevented.
55. Define FET parameters and write the relation between them.
56. What are Drain Characteristics and transfer characteristics?
57. Explain the construction and working of FET
58. What is feedback? Name different types.
59. What is the effect of negative feedback on the characteristics of an amplifier?
60. Why common collector amplifier is known as emitter follower circuit?
61. What is the application of emitter follower ckt?
62. What is cascading and cascoding? Why do you cascade the amplifier ckts.?
63. How do you determine the value of capacitor?
64. Write down the diode current equation.
65. Write symbols of various passive and active components
66. How do you determine th~value of resistor by colour code method?
67. What is tolerance and power rating of resistor?
68. Name different types of resistors.
69. How do you c1assify resistors?
70. Name different types of capacitors..
71. What are clipping circuits? Classify them.
72. Mention the application of clipping circuits.
73. What are clamping circuits? Classify them
74. What is the other name of clamping circuits?
75. Mention the applications of clamping circuits.
76. 'What is Darlington emitter follower circuit?
77. Can we increase the number of transistors in Darlington emitter follower circuit?
Justify your answer.
78. What is the different between Darlington emitter follower circuit & Voltage
follower circuit using Op-Amp. Which is better.
79. Name different types of Emitter follower circuits.
80. What is an Oscillator? Classify them.
81. What ar~ The Blocks, which fonns an Oscillator circuits?
82. What are damped & Un-damped Oscillations?
83. What are Barkhausen's criteria?
84. What type of oscillator has got frequency stability?
85. What is the disadvantage of Hartley & Colpiit's Oscillator?
86. Why RC tank Circuit Oscillator is used for AF range?
87. Why LC tank Circuit Oscillator is used for RF range?
88. What type of feedback is used in Oscillator circuit?
89. In a Transistor type No. SL 100 and in Diode BY 127, what does SL and BY
stands for
90. Classify Amplifiers based on: operating point selection.
91. What is the efficiency of Class B push pull amplifier?
92. What is the drawback of Class B Push pull Amplifier? How it is eliminated.
93. What is the advantage of having complimentary symmetry push pull amplifier?
94. What is Bootstrapping? What is the advantage of bootstrapping?
95. State Thevenin's Theorem and Max.power transfer theorem.
96. What is the figure of merit of resonance circuit?
97. What is the application of resonant circuit?
98. What is a rectifier? Classify.
99. What is the efficiency of half wave and full wave rectifier?
100. What is the advantage of Bridge rectifier of Centre tapped type FWR

101. What is the disadvantage of Bridge rectifier?
102. What is a filter?
103. Name different types of filter ckts.
104. Which type of filter is used in day to day application and why?
105. What is ripple and ripple factor? .
106. What is the theoretical value of ripple for Half Wave and .Full wave rectifier?
107. What is need for rectifier ckts.
108. Why a step down transformer is used at the input of Rectifier ckt.
109. What is TUF? .
110. What is regulation w.r.t rectifier? And how it is calculated?
111. What is figure of merit of Rectifier ckt.

Analog Electronics - Lab MANUAL

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