ARM Exercises:

1. Write a program to calculate the factorial of a number

2. Write a program to swap the contents of 2 registers using
XOR
Swap instruction
3. What is the output of this code:
MOV r0, 0X11
MOV r1,r0,LSL#1
MOV r2,r1,LSL#1
stop B stop
4. What is the output of this code:
MOV r0, 0X11
MOV r1,r0,LSL#1
ADD r2,r1,r1,LSL#2
stop B stop
5. Write a program that computes 6x
2
9x + 2 and stores the result in register r2. Assume x is
stored in register r3.
6. What are the different ways by which all bits in register r12 can be cleared? No other
register is to be used.
7. Assuming some small numerical values for registers, find the output for the following
instructions
MOVS r6,r6,LSL#5
ADD r9,r8,r8,LSL #2
RSB r10,r9,r9, LSL #3
8. What is another way of writing this line of code:
MOV PC, LR
9. Describe the contents of register r13 after the following instruction complete, assuming that
memory contains the values shown below. Register r0 contains 0x24 and the memory
system is little endian.

0x24 0x06
0x25 0xFC
0x26 0x03
0x27 0xFF
LDRSB r13,[r0]
LDRSH r13, [r0]
LDR r13, [r0]
LDRB r13, [r0]

10. Indicate whether the following instructions use pre- or port indexed addressing modes:
STR r6, [r4, #4]
LDR r3, [r12], #6
LDRB r4, [r3, r2]!
LDRSH r12, [r6]
11. What is wrong with this instruction:
LDRSB r1, [r6], r3, LSL#4
12. Assume register r3 contains 0x8000. What would the register contain after executing the
following instructions:
STR r6, [r3, #12]
STRB r7, [r3], #4
LDRH r5, [r3], #8
LDR r12, [r3, #12]!
13. Write a program to calculate the absolute value of any number by using only two
instructions (HINT: Check CMP and RSB)
14. Write a program to divide two numbers. Store one number in register r1, and the other
number in register r2. Store the result of the operation(quotient) in register r3 and the
remainder in register r4.
15. Without using MUL instruction, give instructions that multiply a register, r3 by
135
255
18
16384
16. We know shift operations that happen in a 32 bit register. Assuming a 64 bit value is stored
in 2 32-bit registers, how will you do the shifting operations?
17. Write a program to calculate the number of ones in a 32 bit value. Store the result in register
r3.
18. Write four different instructions that clear register r7 to zero
19. Write instructions that set bits 0, 4,and 12 in register r6 and leave the remaining bits
unchanged.
20. Can you attempt to add two 128-bit numbers? Assume one number is stored in r4, r5, r6, r7
registers and the other stored in r8, r9, r10, r11. Store the result in r0, r1, r2, r3.
21. Give the different methods to test the equivalence of two values held in registers r0 and r1.
22. Write the equivalent assembly program for this piece of code in C
for (i=0; i<8; i++){
a[i] = b[7-i];
}
23. Write a program that reverses the bits in a register, such that the register containing
d31,d30,d29...d1,d0 now contains d0,d1,...d29,d30,d31
24. Write a program to calculate the GCD (Greatest Common Divisor) between two positive
integers. Use the Euclids algorithm as given below.
while (a!=b) {
if (a>b) a = a-b;
else b = b-a;
}
25. Translate the following into ARM instructions:
add registers r3 and r6 only if N is clear. Store the result in register r7.
Multiply registers r7 and r12, put the results in register r3 only if C is set and Z is clear
Compare registers r6 and r8 only if Z is clear
26. Translate the following program into assembly. This returns 0 if (x+y) <0 and returns 1
otherwise:
int foo(int x, int y) {
if ((x+y) < 0)
return 0;
else return 1;
}




27. Assume that memory and registers r0 through r3 appear as follows.

Address Register
0x8010 0x00000001 0x13 r0
0x800c 0xFEEDDEAF 0xFFFFFFFF r1
0x8008 0x00008888 0xEEEEEEEE r2
0x8004 0x12340000 0x8000 r3
0x8000 0xBABE0000

Describe the memory and register contents after executing the instruction:

LDMIA r3!, {r0, r1, r2}

28. Name three ways in which FIQ interrupts are handled more quickly than IRQ interrupts
29. Describe the operations that are normally performed by a reset handler
30. Why cannot we have SWI and an undefined instruction exception occur at the same time?
31. Explain the steps when ARM7TDMI processor takes when handling an exception.
32. What mode does the processor have to be in, to move the contents of the SPSR into CPSR?
What instruction is used to do this?
33. When handling interrupts, why must the link register be adjusted before returning from the
exception?
34. How many SPSRs are there on the ARM7TDMI?
35. What is MMU used for?
36. How is MMU different from MPU?
37. How to switch to THUMB state?
38. Which bit in CPSR indicates whether we are in ARM state of THUMB state?
39. Give the equivalent THUMB instruction for the following ARM instruction:
SUB r0, r3, r2, LSL#2
40. Can we talk to a floating point coprocessor in THUMB state?