A microcontroller is an economical computer-on-a-chip built for dealing with specific tasks, such as

displaying or receiving information through LEDs or remote controlled devices. The most commonly
used set of microcontrollers belong to 8051 Family. 8051 Microcontrollers continue to remain a
preferred choice for a vast community of hobbyists and professionals. Through 8051, the world became
witness to the most revolutionary set of microcontrollers.
AT89C51 from Atmel Corporation Atmel fabricated the flash ROM version of 8051 which is popularly
known as AT89C51 (C in the part number indicates CMOS). The flash memory can erase the contents
within seconds which is best for fast growth. Therefore, 8751 is replaced by AT89C51 to eradicate the
waiting time required to erase the contents and hence expedite the development time. To build up a
microcontroller based system using AT89C51, it is essential to have ROM burner that supports flash
memory. Note that in Flash memory, entire contents must be erased to program it again. The contents
are erased by the ROM burner. Atmel is working on a newer version of AT89C51 that can be
programmed using the serial COM port of IBM PC in order to get rid of the ROM burner.
The P89V51RD2 are 80C51 microcontrollers with 16/32/64 kB flash and 1024 B of data RAM.
A key feature of the P89V51RB2/RC2/RD2 is its X2 mode option. The design engineer can choose to run
the application with the conventional 80C51 clock rate (12 clocks per machine cycle) or select the X2
mode (six clocks per machine cycle) to achieve twice the throughput at the same clock frequency.
Another way to benefit from this feature is to keep the same performance by reducing the clock
frequency by half, thus dramatically reducing the EMI. The flash program memory supports both parallel
programming and in serial ISP. Parallel programming mode offers gang-programming at high speed,
reducing programming costs and time to market. ISP allows a device to be reprogrammed in the end
product under software control. The capability to field/update the application firmware makes a wide
range of applications possible.

The P89V51RB2/RC2/RD2 is also capable of IAP, allowing the flash program memory to
be reconfigured even while the application is running.
Feature of 89C51

Compatible with MCS-51 Products
4K Bytes of In-System Reprogrammable Flash Memory
Endurance: 1,000 Write/Erase Cycles
Fully Static Operation: 0 Hz to 24 MHz
Three-level Program Memory Lock
128 x 8-bit Internal RAM
32 Programmable I/O Lines
Two 16-bit Timer/Counters
Six Interrupt Sources
Programmable Serial Channel
Low-power Idle and Power-down Modes


Pin Description:


VCC : Supply voltage.
GND : Ground.
Port 0 Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL
inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 can
also be configured to be the multiplexed low-order address/data bus during accesses to external
program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes
during Flash programming and outputs the code bytes during program verification.
Port 1 Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can
sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the inter-nal
pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source
current (IIL) because of the internal pull-ups. In addition, P1.0 and P1.1 can be configured to be the
timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX),
respectively.
Port 2 Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can
sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the inter-nal
pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source
current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches
from external program memory and during accesses to external data memory that use 16-bit addresses
(MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During
accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of
the P2 Special Function Register.
Port 3 Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can
sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the inter-nal
pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source
current (IIL) because of the pull-ups. Port 3 receives some control signals for Flash programming and
verification. Port 3 also serves the functions of various special features of the AT89S52, as shown in the
fol-lowing table.
RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the
device. This pin drives high for 98 oscillator periods after the Watchdog times out. The DISRTO bit in SFR
AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET
HIGH out feature is enabled.
ALE/PROG Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.
In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used
for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each
access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location
8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is
weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external
execution mode.
PSEN Program Store Enable (PSEN) is the read strobe to external program memory. When the AT89S52
is executing code from external program memory, PSEN is activated twice each machine cycle, except
that two PSEN activations are skipped during each access to external data memory.
EA/VPP External Access Enable. EA must be strapped to GND in order to enable the device to fetch code
from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1
is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal
program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash
programming.
XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2 Output from the inverting oscillator amplifier.

Applications
The 8051 has been in use in a wide number of devices, mainly because it is easy to integrate into a
project or build a device around. The following are the main areas of focus:
i. Energy Management:Efficient metering systems help in controlling energy usage in homes and
industrial applications. These metering systems are made capable by incorporating microcontrollers.
ii. Touch screens:A high number of microcontroller providers incorporate touch-sensing
capabilities in their designs. Portable electronics such as cell phones, media players and gaming devices
are examples of microcontroller-based touch screens.
iii. Automobiles: The 8051 finds wide acceptance in providing automobile solutions. They are widely
used in hybrid vehicles to manage engine variants. Additionally, functions such as cruise control and
anti-brake system have been made more efficient with the use of microcontrollers.
iv. Medical Devices:Portable medical devices such as blood pressure and glucose monitors use
microcontrollers will to display data, thus providing higher reliability in providing medical results
5.1.2 Oscillator Characteristics:
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be configured
for use as an on-chip oscillator, as shown in Figure 7. Either a quartz crystal or ceramic resonator may be
used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1
is driven, as shown in Figure 8. There are no requirements on the duty cycle of the external clock signal,
since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and
maximum voltage high and low time specifications must be observed.














Figure 5.2: Crystal arrangement