Octasic WhiteStar

Deltenna Limited, Registered in England, Number 04385166. Registered Office: Deltenna Ltd.
d., First Floor, Unit 2, Greenways Business Park, Bellinger Close,

Chippenham, Wiltshire SN15 1BN United Kingdom.
GEN30v1 Basic Word Report Template
Deltenna Ltd.
First Floor, Unit 2
Greenways Business Park
Bellinger Close
Chippenham, Wiltshire
SN15 1BN
United Kingdom

Tel: +44 (0)1249 450910
Fax: +44 (0)1249 656549
www.deltenna.com

Whitestar Connector
Specification

Document Number: DLT-00037
Version Number: 001
Issue: A
Project Reference: DLT11004
Restricted List:

Only the electronic file of this item, stored and controlled on the Deltenna Ltd. network is the Master.
Unless otherwise specified, all other copies are uncontrolled documents.
Deltenna Ltd. Confidential

Deltenna Limited 2012
Whitestar Connector Specification
DLT-00037-001A

Printed on: 06 January 2012 Page 2 of 15
Page 2 of 15
Table of Contents
Table of Contents .................................................................................................................... 2
Version History ........................................................................................................................ 3
Related Documents ................................................................................................................. 4
Terms and Acronyms .............................................................................................................. 4
1 Whitestar Board Overview ............................................................................................... 5
2 Whitestar Connectivity ..................................................................................................... 7
2.1 Whitestar Connection Architecture .......................................................................................... 7
2.2 Whitestar Digital Comms & DC Power Connections ................................................................ 8
2.2.1 Gig Ethernet (J48) ............................................................................................................................. 8
2.2.2 Digital Comms (J62) .......................................................................................................................... 8
2.2.3 Console Port (UART) & DC Power (J61) ........................................................................................... 9
2.2.4 Digital Comms to RF Systems (J38)................................................................................................ 10
2.2.5 High Speed GPIO to RF Systems (J36 & J37) ................................................................................ 11
2.2.6 JTAG/Debug (J63) ........................................................................................................................... 12
2.3 Whitestar RF Connections .................................................................................................... 14

DLT-00037-001A

Version History
Version
Number
Issue
Version
Date
Auth
or(s)
Change Notes
Approv
er(s)
Approval
Date
001 A YY-MM-DD YY-MM-DD

DLT-00037-001A

Related Documents
Ref. Title Number Version & Date
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]

Terms and Acronyms
Term / Acronym Definition

DLT-00037-001A

1 Whitestar Board Overview
The main connections for the Whitestar board are shown in the figures below.

DLT-00037-001A

Figure 1 - Whitestar Top Layer Overview

Figure 2 - Whitestar Board Bottom Overview

DLT-00037-001A

2 Whitestar Connectivity
2.1 Whitestar Connection Architecture
The Whitestar module has the connectivity as shown in the architecture below:
PICOBLADE
CONNS
WHITESTAR CORE MODULE
TRx
TRx
SPI
SPI
POWER
EHTERNET
SWITCH
PSU
5V5 IN
(TBC)
GPS Rx
MODULE
1 PPS
DIRECT INPUT
REFERENCE
ETHERNET
BASEBAND PROC
DDR3
MEM
ETHERNET
ETHERNET
SD
CARD
JTAG
(HEADER)
USB HUB
(WITH
ETHERNET)
ETH
MAGJACK
MMC2
MINBARI
OMAP LGA
Ext
Comms
SPI
SPI
EXT
UART
(CONSOLE
PORT)
UART
GPS
ACTIVE ANT PWR
EXT
USB
EXT
USB
USB
SPI
Ext
Comms
I2C
Ext
Comms
SPI
SPI
I2C
EXT
GPIO
GPIO
EXT
GPIO
(PICO
BLADE)
GPIO
G
P
S
1
P
P
S
UART
JTAG
JTAG
JTAG
UART
R
E
F
E
R
E
N
C
E
USB
PICOBLADE
CONNS
P
W
R

I
N
PICOBLADE
CONNS SIM
CARD
MPD
MCU
TEMP
SENSORS
I2C
I2C
MMCX
MMCX
MMCX
MMCX
(TX x2
RX x2
EXT TX
LO x1)
MMCX
(TX x2
RX x2
EXT TX
LO x1)
RF
RF
PICOBLADE
CONNS
USB
USB
DATA/CLK/FRAME
DATA/CLK/FRAME

Figure 3 - Whitestar External Connectivity Architecture
The digital connectivity includes the following:
Gig Ethernet
USB (2 ports, all host only TBC).
UART Console port to the OMAP4430
SPI x2 (one for comms with the external RF systems such as Vorlon, one directly to the OMAP
module)
I2C (intended for comms with the external RF systems such as Vorlon)
JTAG & Debug JTAG to the OCT2224, CPLD, Minbari module, OCT2224 SBDI port, MPD
MCU.

The RF connectivity uses MMCX connectors to provide the following connectivity:
RF connections to the 2 transceiver modules
GPS
DLT-00037-001A

Clock and timing (eg 1PPS in/out, external reference input/output)
These connections are detailed in the following sections.
2.2 Whitestar Digital Comms & DC Power Connections
2.2.1 Gig Ethernet (J48)
This is a Magjack that has all the required integrated magnetic. It connects as the external port to the
on-board Ethernet switch which facilitates direct connection to the OCT2224 and OMAP4430 (on the
Minbari module).
2.2.2 Digital Comms (J62)
This 12-pin Picoblade connector provides digital communications to the Whitestar board.
Pin
No
Signal Bus Volts
(V)
Src Dest Speed
(MHz)
Notes
1
MBAR_SPI1_CLK
SPI 1.8 Minbari Ext Sys 10
(TBC)
OMAP SPI1 bus SPI CLK. Note that
the Minbari is the Bus Master.
2
MBAR_SPI1_MISO
(TBC)
OMAP SPI1 bus Master input. Note
that the Minbari is the Bus Master.
3
MBAR_SPI1_MOSI
(TBC)
OMAP SPI1 bus Master output.
Note that the Minbari is the Bus
Master.
4
MBAR_SPI1_EN
SPI 1.8 Minbari Ext Sys DC OMAP SPI1 bus Enable. Note that
the Minbari is the Bus Master.
5
USBHUB_USB_VBUS
USB 5V WS Ext Sys N/A Bus power output from Whitestar for
the High speed USB 2.0 connection
to the Whitestar USB Hub.
Note the supply can be split to
either of the USB busses at 500
mA, or can supply both busses at
250mA depending on the hardware
configuration.
6
USBHUB_USB_DP
USB USB
HUB
Ext Sys 480 High speed USB 2.0 connection to
the Whitestar USB Hub which
allows connection to the OCT2224
& Minbari module. Note the
OCT2224 is the Host on this bus.
7
USBHUB_USB_DM
USB USB
HUB
Ext Sys 480 High speed USB 2.0 connection to
the Whitestar USB Hub which
allows connection to the OCT2224
& Minbari module. Note the
OCT2224 is the Host on this bus.
8
GND
GROU
ND
Connector ground.
9
MBAR-EXT_USB_VBUS
USB 480 Bus power output from Whitestar for
the High speed USB 2.0 connection
to the Minbari module (OMAP4430)
USBB2.
Note the supply can be split to
either of the USB busses at 500
mA, or can supply both busses at
250mA depending on the hardware
configuration.
10
MBAR-EXT_USB_DM
USB Minbari Ext Sys 480 High speed USB 2.0 connection to
DLT-00037-001A

the Minbari module (OMAP4430)
USBB2. Note the OMAP4430 is the
Host on this bus.
11
MBAR-EXT_USB_DP
Host on this bus.
12
MBAR-EXT_USB_ID
Host on this bus.

2.2.3 Console Port (UART) & DC Power (J61)
This 12-pin Picoblade connector provides the Minbari module Console port (UART) communications
and DC power input to the Whitestar board.
Pin
No
Signal Bus Volts
(V)
Src Dest Speed
(MHz)
Notes
1
PWR_GND PWR 0 Ext DC
input
WS PSU N/A Power ground for the main DC input.
2
VIN_MAIN PWR 8 17
(TBC)
Ext DC
input
WS PSU N/A Main DC power feed for the Whitestar
board. Nominal input = 12V.
3
VIN_MAIN PWR 8 17
(TBC)
Ext DC
input
4
VIN_MAIN PWR 8 17
(TBC)
Ext DC
input
5
input
6
input
7
MBAR_UART3_RX
(TBC)

UART 3.3 Minbari
module
OMAP
Ext Sys 3.6 UART connection to the Minbari module
(OMAP4430) intended for use as a
Console port.
Note the OMAP4430 is the Master.
Nominal = 115.2 KBaud.
8
MBAR_UART3_CTS
(TBC)

UART 3.3 Minbari
module
OMAP
Ext Sys 3.6 UART connection from the Minbari
module (OMAP4430) intended for use
as a Console port.
Nominal = 115.2 KBaud.
9
MBAR_UART3_TX
(TBC)

UART 3.3 Minbari
module
OMAP
Console port.
Nominal = 115.2 kBaud.
10
MBAR_UART3_RTS
(TBC)

UART 3.3 Minbari
module
OMAP
Console port.
Nominal = 115.2 kBaud.
11
GND 0 N/A Connector ground
12
EXT_MASTER_RESETn 3.3 Ext Sys WS N/A External Master Rest signal used in
place of the on-board reset switch for the
DLT-00037-001A

external system to reset the board if
required.
Active low.

2.2.4 Digital Comms to RF Systems (J38)
This 8-pin Picoblade connector is intended to provide digital communications to external RF systems
(ie comms with temperature sensors, I/O expanders, MCUs etc).
Pin
No
Signal Bus Volts
(V)
Src Dest Speed
(MHz)
Notes
1
WS_EXTSYS_I2C_SDA I2C 1.8/3.3 OCT2224/
OMAP
Ext RF
systems
0.4 I2C data intended to control external RF
systems (eg Vorlon).
Can be hardware configured for
OCT2224 (3.3V signalling) or
OMAP/Minbari module (1.8V)
connection.
Current config = OCT2224.
2
WS_EXTSYS_I2C_SCK I2C 1.8/3.3 OCT2224/
OMAP
Ext RF
systems
0.4 I2C clock intended to control external RF
systems (eg Vorlon).
connection.
3
4
WS_EXTSYS_SPI_CLK SPI 1.8/3.3 OCT2224/
OMAP
Ext RF
systems
10
(TBC)
Whitestar SPI clock intended to control
external RF systems (eg Vorlon).
connection. Note these devices are the
bus Masters.
5
WS_EXTSYS_SPI_MOSI SPI 1.8/3.3 OCT2224/
OMAP
Ext RF
systems
10
(TBC)
Whitestar SPI Master data output
intended to control external RF systems
(eg Vorlon).
bus Masters.
6
WS_EXTSYS_SPI_MISO SPI 1.8/3.3 OCT2224/
OMAP
Ext RF
systems
10
(TBC)
Whitestar SPI Master data input
intended to control external RF systems
(eg Vorlon).
bus Masters.
7
WS_EXTSYS_SPI_CS SPI 1.8/3.3 OCT2224/
OMAP
Ext RF
systems
10
(TBC)
Whitestar SPI Chip Select intended to
control external RF systems (eg Vorlon).
DLT-00037-001A

bus Masters.
8

2.2.5 High Speed GPIO to RF Systems (J36 & J37)
These 5-pin Picoblade connectors provide the fast switching GPIO under the control of the
Transceivers. This signalling is intended to connect to external RF systems (eg Vorlon) and is targeted
at fast response requirements such as TDD switching, fast attack AGC attenuator etc.
TRx_1 uses J36, TRx_2 uses J37 with the pin outs being the same for both connectors.
Pin
No
Signal Bus Volts
(V)
Src Dest Speed
(MHz)
Notes
1
TRXn_GPIO3 GPIO 2.5 TRx Ext RF
systems
TBC GPIO signal under the control of the TRx
IC.
2
systems
IC.
3
systems
IC.
4
TRXn_GPIO0 GPIO 2.5 TRx TRx Tx
power ctl/
Ext RF
systems
IC.
Note this signal is also used by the
TRx for Tx power control on the design
cell.
Current config = N/A for Ext Systems
5

DLT-00037-001A

2.2.6 JTAG/Debug (J63)
This 40-pin miniature Hirose connector provides JTAG and Debug functionality to the Whitestar board.
Pin
No
Signal Volt
(V)
Src Dest Func Notes
1
OCT2224_ARM_DBG_TRST-
2.5 Ext JTAG OCT2224 ARM
Debug
OCT2224 ARM subsystem
debug TRST signal.
2
GROUND
0 Connector Ground.
3
OCT2224_ARM_DBG_TMS
Debug
debug TRST signal.
4
OCT2224_JT_TDO
3.3 OCT2224 Ext JTAG JTAG OCT2224 boundary scan data
output.
5
OCT2224_ARM_DBG_TCK
Debug
debug Clock signal.
6
OCT2224_JT_TDI
3.3 Ext JTAG OCT2224 JTAG OCT2224 boundary scan data
input.
7
OCT2224_ARM_DBG_TDI
Debug
debug data input signal.
8
OCT2224_JT_TCK
3.3 Ext JTAG OCT2224 JTAG OCT2224 boundary scan clock.
9
OCT2224_ARM_DBG_TDO
2.5 OCT2224 Ext JTAG ARM
Debug
debug data output signal.
10
OCT2224_JT_TMS
3.3 Ext JTAG OCT2224 JTAG OCT2224 boundary scan TMS
signal.
11
OCT2224_ARM_DBG_RTCK
2.5 OCT2224 Ext JTAG ARM
Debug
debug return clock signal.
12
OCT2224_JT_TRST-
3.3 Ext JTAG OCT2224 JTAG OCT2224 boundary scan TRST
signal.
13
GROUND
0 Connector Ground.
14
MPD_3V3
3.3 WS PSU Ext Prog PIC Debug This is an output from the
Whitestar board to the PIC
programmer.
15
MBAR_JTAG_NRST
1.8 Ext JTAG OMAP
(Minbari)
OMAP
JTAG
OMAP4430 (Minbari) boundary
scan TRST signal.
16
GROUND
0 Connector Ground.
17
MBAR_JTAG_TMS
1.8 Ext JTAG OMAP
(Minbari)
OMAP
JTAG
scan TMS signal.
18
MBAR_JTAG_TDO
1.8 OMAP
(Minbari)
Ext JTAG OMAP
JTAG
scan data output.
19
MPD_PGC
3.3 Ext Prog MPD MCU PIC Debug This is the clock from the PIC
programmer to the Whitestar
MPD MCU.
20
MBAR_JTAG_TCK
1.8 Ext JTAG OMAP
(Minbari)
OMAP
JTAG
scan clock.
21
MPD_MCLRn
3.3/
9
Ext Prog MPD MCU PIC Debug This is the debug clear signal
and the on-chip EEPROM
programming voltage from the
PIC programmer to the
Whitestar MPD MCU.
22
MBAR_JTAG_TDI
1.8 Ext JTAG OMAP
(Minbari)
OMAP
JTAG
scan data in.
DLT-00037-001A

23
MPD_PGC
3.3 Ext Prog MPD MCU PIC Debug This is the data from the PIC
programmer to the Whitestar
MPD MCU.
24
MBAR_JTAG_RTCK
1.8 OMAP
(Minbari)
Ext JTAG OMAP
JTAG
scan return clock.
25
GROUND
0 Connector Ground.
26
GROUND
0 Connector Ground.
27
OCT_POD_SPI_MOSI
3.3 SBDI
debugger
OCT2224 OCT2224
SBDI
Debug
OCT2224 System Background
Debug Interface (SBDI)
debugger Slave data input.
28
CPLD_VCC_IO_BNK1
2.5 CPLD Ext JTAG CPLD
JTAG
CPLD interface voltage for
JTAG programming.
29
OCT_POD_SPI_MISO
3.3 OCT2224 SBDI
debugger
OCT2224
SBDI
Debug
debugger Slave data output.
30
CPLD_JT_TMS
2.5 Ext JTAG CPLD CPLD
JTAG
CPLD JTAG TMS signal
31
OCT_POD_SPI_CLK
3.3 OCT2224 SBDI
debugger
OCT2224
SBDI
Debug
debugger Slave clock.
32
CPLD_JT_TDI
JTAG
CPLD JTAG data input
33
OCT_POD_SPI_CS0n
3.3 OCT2224 SBDI
debugger
OCT2224
SBDI
Debug
debugger Slave select signal
active low.
34
CPLD_JT_TCK
JTAG
CPLD JTAG clock
35
OCT_POD_OCT_MA
3.3 OCT2224 SBDI
debugger
OCT2224
SBDI
Debug
debugger Octasic Maintenance
Access Enable. Normally
connected to ground.
36
CPLD_JT_TD
2.5 CPLD Ext JTAG CPLD
JTAG
CPLD JTAG data output
37
OCT_POD_CST_MA
3.3 OCT2224 SBDI
debugger
OCT2224
SBDI
Debug
debugger Customer
Maintenance Access Enable.
Normally connected to ground.
38
GROUND
0 Connector Ground.
39
GROUND
0 Connector Ground.
40
GROUND
0 Connector Ground.

DLT-00037-001A

2.3 Whitestar RF Connections
The RF connections are all provided by MMCX connectors on the Whitestar board.
RF
Conn
No.
Signal Spec Src Dest Freq
Range
(MHz)
Notes
J1
TRX1_TX1_OUT
CW
P1dB
+20 dBm
TRX1
TX1
Ext Sys 700 -
2700
This is Transceiver 1 Tx 1 output.
The RMS output power will
depend on the standard and the
required power class.
J3
TRX1_RX1_IN
TBC Ext Sys TRX1 RX1 400 -
3000
This is Transceiver 1 Rx 1 input.
The sensitivty will depend on the
standard, the required power
class and the Rx configuration.
J7
TRX1_EXT_TX_LO_IN
0 dBm
(nom)
Ext Sys TRx1 140
8000
(TBC)
This is Transceiver 1 external Tx
LO input (used in place of the
internal LO).
Note that the freq is 2x the
required Tx freq.
J4
TRX1_TX2_OUT
CW
P1dB
+20 dBm
TRX1
TX2
Ext Sys 700 -
2700
This is Transceiver 1 Tx 2 (MIMO)
output. The RMS output power will
J46
TRX1_RX2_IN
3000
This is Transceiver 1 Rx 2 (MIMO)
input. The sensitivty will depend
on the standard, the required
power class and the Rx
configuration.
J9
TRX2_TX1_OUT
CW
P1dB
+20 dBm
TRX2
TX1
Ext Sys 700 -
2700
This is Transceiver 2 Tx 1 output.
The RMS output power will
J11
TRX2_RX1_IN
3000
This is Transceiver 2 Rx 1 input.
The sensitivty will depend on the
standard, the required power
class and the Rx configuration.
J15
TRX2_EXT_TX_LO_IN
0 dBm
(nom)
Ext Sys TRx2 140
8000
(TBC)
This is Transceiver 2 external Tx
LO input (used in place of the
internal LO).
Note that the freq is 2x the
required Tx freq.
J12
TRX2_TX2_OUT
CW
P1dB
+20 dBm
TRX2
TX2
Ext Sys 700 -
2700
This is Transceiver 2 Tx 2 (MIMO)
output. The RMS output power will
J14
TRX2_RX2_IN
3000
This is Transceiver 2 Rx 2 (MIMO)
input. The sensitivty will depend
on the standard, the required
power class and the Rx
configuration.
J54
EXT_1PPS_IN
3.3
(TBC)
Ext Sys GPS
Module
1 Hz External 1PPS input to the GPS
module. This is currently 3.3V but
may change.
J60
EXT_REF_CLK_OUT
3.3
(TBC)
GPS
Module
Ext Sys 30.72
(TBC)
This is the RF reference output
from the clock generator.
DLT-00037-001A

Currently 30.72 MHz, 3.3V.
J51
GPS_RF_IN
-157
dBm
Ext Sys GPS
Module
1575.42 GPS Rx RF input.
This also has the active bias (3
5V) for connection to an active
GPS antenna.
Currently configured for 3.3V.

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Deltenna Limited, Registered in England, Number 04385166. Registered Office: Deltenna Ltd.

d., First Floor, Unit 2, Greenways Business Park, Bellinger Close,

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