A High-Efficiency Diode-Clamped Linear Amplifier

HIDEAKI FUJITA
Tokyo Institute of Technology, Japan
SUMMARY
This paper proposes a new power converter without
any switching operation and which works as a linear am-
plifier. The main circuit of the proposed converter consists
of series-connected MOSFETs, series-multi DC power
supplies, and clamping diodes. The circuit configuration is
similar to a diode-clamped multi-level inverter, except for
using complementary power devices, which are n- and
p-channel MOSFETs. One of the series-connected MOS-
FETs operates in an active state just like a linear amplifier,
while the other MOSFETs operate in on or off states like
an inverter circuit. As a result, the proposed converter
achieves an acceptable efficiency as high as 90% without
any ripples or harmonics caused by switching operation.
Experimental results demonstrate that the proposed con-
verter has the capability to drive a 2.2-kW three-phase
induction motor. 2008 Wiley Periodicals, Inc. Electron
Comm Jpn, 91(6): 4756, 2008; Published online in Wiley
InterScience (www.interscience.wiley.com). DOI
10.1002/ecj.10120
Key words: PWM inverter; linear amplifier; class
B amplifier; class D amplifier; EMI; conversion efficiency;
diode-clamping circuit.
1. Introduction
In recent years, voltage-type PWM inverters have
been widely used in motor drives in household appliances
and industrial equipment. A PWM inverter regulates output
voltage using the ratio of on and off times in its switching
elements, and as a result can perform as a highly efficient
power converter. With the advent of IGBT, MOSFET, and
other high-speed switching elements for electric power,
higher switching frequencies are appearing, and improve-
ments in the output current waveform, decreased noise, and
decreased size have been achieved. However, along with the
increase in switching frequencies have come problems such
as EMI and high-frequency leak current generated by
abrupt changes (high dv/dt) in the output voltage of the
PWM inverter. When using a motor drive system, a high-
frequency leak current in which the high-frequency current
flows into the ground line via the static capacity between
the stator winding and the boom occurs. Moreover, insula-
tion breakdown occurs due to the generation of excessive
surge voltage in the motor input terminal, and electric
corrosion of the bearings results [1].
On the other hand, a linear amplifier circuit (class A
and class B amplifier) uses the dynamic state of a bipolar
transistor and MOSFET, and can control output voltage by
continuously adjusting the applied voltage (or the pass-
through voltage) in the terminals. Therefore, a linear am-
plifier does not result in the problems of EMI which
accompany high-speed switching as seen in PWM in-
verters. However, the theoretical maximum efficiency of a
class A amplifier is 25%, and of a class B amplifier is 78.5%
[2], a low efficiency compared to that of a PWM inverter.
As a result, the applications for a linear amplifier circuit are
limited to special areas such as equipment with relatively
low capacity and high-frequency power sources in the range
of several megahertz. They cannot be used in motor drives
or other applications above several kilowatts.
Recently, a switching amp (class D amplifier circuit)
has been developed and deployed as a highly efficient
amplifier circuit. This represents one type of PWM or PDM
inverter which uses an approach that improves the switch-
ing frequency from several hundred kilohertz to several
megahertz, and eliminates the ripple in the voltage and
current by using an LC filter. However, when creating a
converter in the range of several kilowatts, the switching
frequency is limited to several tens of kilohertz, and as a
result the LC filter is large [3]. In contrast, there are reports
on approaches [46] to suppress the voltage and current
ripple remaining in the LC filter by connecting the switch-
ing amp output to the linear amplifier circuit in series or in
parallel. Moreover, research on decreasing the size of the
LC filter by using a circuit configuration for a cascade
2008 Wiley Periodicals, Inc.
Electronics and Communications in Japan, Vol. 91, No. 6, 2008
Translated from Denki Gakkai Ronbunshi, Vol. 127-D, No. 1, January 2007, pp. 916
47
inverter or a multi-level inverter in the switching amp has
also been performed [79]. Reference 9 reports on a 10-kW
switching amplifier circuit with a carrier (dither signal)
frequency of 200 kHz under PWM control. This reduces
the switching frequency per single element by having neu-
tral point clamp-type inverters overlapping in parallel, and
achieves both a reduction in switching loss and a decrease
in the size of the LC filter.
In this paper the authors propose a diode-clamped
linear amplifier circuit that can achieve high conversion
efficiency. The linear amplifier circuit proposed in this
paper has the advantage of being composed of a circuit that
is connected in series to several MOSFETs and has the
source terminal of each MOSFET clamped to the power
source using a diode. Therefore, the circuit configuration
resembles a diode-clamped multi-level inverter [10], but is
different in that complementary elements are used in the
MOSFET. A single terminal in the MOSFET connected in
series is used in a dynamic state, as is the case in a linear
amplifier circuit, and the other elements are used in the on
or off state, as in a PWM inverter. As the number of series
connections in the MOSFET is increased, the voltage ap-
plied to each element drops, and the loss in the MOSFET
operating in a dynamic state can be greatly reduced com-
pared to conventional linear amplification. Moreover, be-
cause no abrupt changes occur in the output terminal
voltage, as happens in a PWM inverter, problems such as
EMI and surge voltage, and high-frequency leak current do
not occur.
The methods in Refs. 7 through 9 also use a multi-
level converter circuit configuration. However, because
they operate as a switching amp, an LC filter is needed on
the output terminal. In contrast, the circuit proposed in this
paper can yield sinusoidal output voltage without being
connected to an output filter because it operates as a linear
amplifier circuit. Therefore, the proposed circuit can be
smaller and denser because no inductor is used.
Below, the authors describe the operating principles
of the diode-clamped linear amplification circuit and con-
firm its theoretical validity through experiments using a
prototype three-phase, 12-step diode-clamped linear ampli-
fication circuit. The results show that the proposed circuit
can produce ideal sinusoidal voltage output, and can
achieve a power conversion efficiency above 90% with
respect to a resistance load. Moreover, the authors test a
2.2-kW three-phase induction electric motor and confirm
that it can be used over a relatively wide range of capacities
as a motor drive.
2. A Conventional Class B Push-Pull Amplifier
Figure 1 shows the circuit configuration for a conven-
tional class B push-pull amplifier. The n-type and p-type
MOSFET source and gate terminals are both connected,
and the train terminal is connected to the DC power source.
The source terminal voltage v
out
tracks the gate terminal
voltage v
in
, and functions as a current amplifier with a
voltage amplification factor of 1. At this point, the differ-
ence between the power source voltage V
dc
/2 and the
output voltage v
out
is applied to each MOSFET. Therefore,
a maximum of the voltage V
dc
is applied to each MOSFET.
Moreover, because the drain current flows in the state in
which voltage is applied to the MOSFET, loss in principle
does occur.
The sinusoidal voltage for V
dc
/2 is taken to be
for the output voltage v
out
, and the sinusoidal current with
a power factor of 1 for the load current i
out
is assumed to be
At this point, the average value P
out
of the output power is
On the other hand, the power P
dc
supplied from the DC
power source is
Therefore, the efficiency is
This is the theoretical maximum efficiency for a conven-
tional class B push-pull amplifier, and cannot be exceeded
because of the conductive loss in a MOSFET. P
out
in Eq.
(3) has a power factor of 1, which is to say that it is the
power factor when a resistance load is assumed. When a
load with a low power factor is connected, the output power
drops in proportion to the load power factor. However, in a
linear amplifier, when the output current is positive, it flows
via the n-type MOSFET (upper arm), and when negative,
(2)
(1)
(3)
(4)
(5)
Fig. 1. Class-B push-pull amplifier.
48
it flows via the p-type MOSFET (lower arm). As a result,
if the current amplification is the same, then the power P
dc
supplied from the DC power source does not change. There-
fore, if a load with a low power factor is connected to the
linear amplifier, then the MOSFET loss increases.
3. Diode-Clamped Linear Amplifier
3.1 Principles of operation
Figure 2 shows the main circuit configuration for a
four-series diode-clamped linear amplifier. The eight ele-
ments MOSFET Q
1
through Q
8
are connected in series, and
then clamped to the DC power supplies E
1
through E
4
divided four ways via the clamp diodes. Therefore, the
circuit configuration resembles a diode-clamped five-level
inverter. However, in a typical five-level inverter, the same
elements are used for all the MOSFET, while in Fig. 2, the
upper four elements Q
1
through Q
4
are used for the n-type
MOSFET, and the lower four elements Q
5
through Q
8
are
used for the p-type MOSFET. Because the clamp diodes are
connected, the maximum voltage applied to each MOSFET
is V
dc
/4. The MOSFETs can be used for voltage tolerance,
and so the voltage usage factor does not decrease.
Figure 3 shows the operating principle for the four-
series diode-clamped linear amplifier. Figure 3 represents
the operating state for each MOSFET when the output
voltage v
out
is sinusoidal. The black regions in the figure
represent the on state (saturated regions) for the MOSFET,
and the white regions represent the off state, and the regions
with horizontal bars represent the dynamic state (linear
regions). The operating state of each MOSFET varies de-
pending on the range for the output voltage v
out
. However,
for any voltage range, each two elements among the n-type
and p-type MOSFET operate in the dynamic state, and the
three elements between the two elements in the dynamic
state are in the on state, and the other three elements are in
the off state. At this point, among the MOSFETs operating
in the dynamic state, when the current is positive it flows
to the n-type MOSFET, and when negative, it flows to the
p-type MOSFET depending on the polarity of the output
current. Therefore, if the on resistance of the MOSFET in
the on state is ignored, then loss occurs only in the one
element among the MOSFET operating in the dynamic
state. Compared to a conventional class B push-pull ampli-
fier, the voltage applied to each MOSFET is low, and as a
result, the loss caused by operation in the dynamic state can
be reduced.
Figure 4 shows the current pathway in the diode-
clamped linear amplifier. Power flows out from the DC
power source during the period in which v
out
and i
out
in (a)
are both positive. On the other hand, in the period in which
v
out
and i
out
have their polarity inverted, as seen in (b) and
(c), power is recycled through the DC power supply via the
clamped diode. Therefore, the diode-clamped linear ampli-
fier proposed in this paper not only can provide a high
conversion efficiency, but also has less loss when used in a
load with a low power factor, and can be used for motor
drive applications.
Fig. 3. Operating principle of a diode-clamped linear
amplifier.
Fig. 2. A four-series diode-clamped linear amplifier.
49
3.2 Conversion efficiency
The theoretical efficiency for an n-series diode-
clamped linear amplifier is calculated in this section. Here,
the following assumptions are made.
Only the loss that occurs when the MOSFET is
operating in the dynamic state is taken into con-
sideration, and the conductive loss resulting from
a forward voltage drop in the clamp diode and the
on resistance in the MOSFET are ignored.
The DC power source voltage is divided propor-
tionally into V
dc
/n.
The output voltage and current are assumed to be
ideal sine waves without distortion.
The series number is even given the symmetry of
the circuit.
The output voltage and current are assumed to be as given
in Eqs. (1) and (2). The circuit and voltage and current
waveforms are symmetrical, and as a result the power for
the DC power source E
1
through E
n/ 2
on the positive side
can be found. The current flowing to each DC power source
represents a portion of the output current i
out
, and the current
i
k
flowing to the k-th power source E
k
given by
However,
k
= sin
1
(n 2k)/n.
The power p
k
supplied by the DC power source E
k
is
and as a result the average power P
k
is
Given the symmetry of the circuit, the power supplied by
E
n/ 2
from the DC power source E
1
and the power supplied
by E
n
from E
(n / 2+1)
are equivalent. As a result, the total sum
of the power supplied by all the DC power sources is
The average P
out
for the output power is the same as given
in Eq. (3). As a result, the efficiency for an n-series
diode-clamped linear amplifier is
Table 1 lists the theoretical efficiency given by Eq.
(10), the number of devices, and the number of elements
for the diode-clamped linear amplifier. As the number of
devices rises, the efficiency increases. The efficiency
exceeds 90% when there are 10 devices, and reaches 95%
when there are 20. This efficiency is a theoretical value, and
loss caused by on resistance in the MOSFET is not taken
into consideration. However, when the number of devices
is increased, the voltage applied to the MOSFET decreases.
As a result, a MOSFET with a lower voltage tolerance can
be used. A MOSFET with a lower voltage tolerance also
has a lower on resistance, and so loss caused by on resis-
tance does not increase even when the number of devices is
increased.
3.3 Loss in each MOSFET
When considering the cooling of elements, the loss
caused by each MOSFET must be understood. Below, the
authors derive the loss generated by each MOSFET in the
Fig. 4. Current path when the diode-clamped linear
amplifier operates under regenerative conditions.
(6)
(7)
(8)
(9)
(10)
Table 1. Series number, number of devices, and
efficiency
50
dynamic state. For an n-type MOSFET Q
k
(k = 1, 2, . . . ,
n/2), the dynamic state is in the period
k
< <
k1
.
Therefore, the voltage v
k
between the drain and source for
Q
k
is
On the other hand, the current i
k
in Eq. (6) flows to the drain
for Q
k
. Equation (11) only considers the period from 0 to
/2, but the n-type MOSFET Q
k
is present in the period in
which current flows, including the period from /2 to .
Therefore, the average time for the Q
k
loss is
Table 2 lists the rate P
lossk
/ P
dc
for the theoretical loss
generated by each MOSFET in a 12-series diode-clamped
linear amplifier. Here, when the load power factor is 1, a
theoretical loss is not generated between Q
7
and Q
18
. As a
result, Table 2 only shows the loss for Q
1
through Q
6
and
Q
19
through Q
24
. The greatest loss is 1.74% for the n-type
MOSFET Q
1
and the p-type MOSFET Q
24
, and the loss for
the other MOSFETs is below 1%.
4. Experimental Circuit
4.1 Main circuit configuration
Figure 5 shows a circuit diagram for a single phase
of the three-phase 12-series diode-clamped linear amplifier
used in the experiment. The experimental circuit is com-
prised of 24 MOSFET elements per phase, and 22 clamped
diodes. In the experiment, the authors used an n-type MOS-
FET (2SK2266: Toshiba) and a p-type MOSFET (2SJ401:
Toshiba). Table 3 lists the basic electrical characteristics and
ratings for the MOSFETs used in the experiment. Because
the voltage applied to each clamped diode is different, a
Schottky barrier diode with a withstand voltage of 60 V was
used for D
1
, D
2
, D
21
, and D
22
, a withstand voltage of 120 V
was used for D
3
, D
4
, D
19
, and D
20
, and a pin diode with a
withstand voltage of 500 V was used for D
5
through D
18
.
The authors assumed a DC link voltage in a 200-V capacitor
smoothing and rectifying circuit, and used V
dc
= 288 V with
12 DC power sources at 24 V each.
Figure 6 is a photograph of the three-phase 12-series
diode-clamped linear amplifier used in the experiment. The
72 MOSFETs and the 66 clamped diodes are arranged on
a printed circuit board. The proposed circuit fundamentally
operates as a linear amplifier, and so no abrupt changes in
voltage or current occur. As a result, even if the wiring
inductance were assumed to increase a little, no surge
voltage would occur, and so there is some freedom in the
arrangement of the MOSFETs and the clamped diode ele-
ments. Moreover, the total number of devices, including the
MOSFETs and clamped diodes, is 138, making the use of
a heat sink for each element problematic. As a result, each
element does not have a heat sink; rather the circuit overall
was immersed in coolant, and the experiment performed in
this fashion. In the future the authors hope to make cooling
the elements simpler if the MOSFET and clamped diodes
in the proposed circuit can be made into a module.
(11)
(12)
Table 2. Theoretical losses in a 12-series
diode-clamped linear amplifier
Fig. 5. Single-phase circuit diagram for the experimental setup.
51
4.2 Gate circuit
Figure 7 shows the gate circuit used in the experi-
ment. The diode-clamped linear amplifier in this paper
fundamentally operates as a source follower with a voltage
amplification factor of 1. As a result, in principle a voltage
command value v
in
should be given to the gate terminal
voltage in all of the MOSFETs. However, if the gate termi-
nals in all of the MOSFETs are connected directly, then
V
dc
/n is applied between the drain and source in the MOS-
FETs in the off state, and as a result, the voltage between
the gate and drain may exceed the withstand voltage. In the
experimental circuit, a 20-V Zener diode is connected
between the gate and drain in each MOSFET, as can be seen
in Fig. 7, and a voltage command value v
in
is passed to the
gate terminal via a resistance of R
G
= 100 k. The gate
terminal voltage in the n-type MOSFET is clamped at 0 to
20 V, and in the p-type MOSFET is clamped at 20 to 0 V,
thus keeping the voltage between the gate and source below
the withstand voltage. At this point, a phase delay occurs in
the gate terminal voltage due to the time constant R
G
and
the input capacity C
iss
of the MOSFET, and the frequency
characteristics of the proposed circuit are limited. The time
constants C
iss
and R
G
for the experimental circuit are
At a commercial frequency of 50 to 60 Hz, this is not a
problem.
5. Experimental Results
5.1 Input and output waveforms
Figure 8 shows the experimental waveforms for the
input voltage v
in
, the output voltage v
out
, and the output
current i
out
when a resistive load is connected. Here, a 30-
Table 3. Electrical characteristics of MOSFETs
Fig. 6. A three-phase twelve-series diode-clamped
linear amplifier.
Fig. 7. Gate circuit.
Fig. 8. Experimental waveforms for a single-phase
resistive load.
52
resistive load is connected between the single-phase output
terminal and clamp, and a sinusoidal voltage of 100 V at 50
Hz is passed to the input voltage v
in
.
The output voltage v
out
nicely tracks the input voltage
v
in
, with an almost sinusoidal output voltage being ob-
tained. Because the MOSFET operating in the dynamic
state switches, distortion appears in the output voltage
waveform at every 24 V of DC voltage. In particular, when
the current switches polarity, the elements operating in the
dynamic state between the n-type and p-type MOSFETs
switch, and the largest distortion appears. This is voltage
distortion equivalent to the cross-over distortion in a con-
ventional class B push-pull amplifier, and is not thought to
be a problem in practice. Moreover, if the offset for the
threshold voltage in the MOSFET is added to the gate
terminal voltage, then this type of voltage distortion can be
reduced.
The power P
dc
provided by the DC power source at
this point is 358 W, and the output power P
out
is 325 W.
Therefore, the conversion efficiency is = 90.6%, repre-
senting a high conversion efficiency above 90% for a linear
amplifier without performing switching.
5.2 MOSFET source voltage
Figure 9 shows the experimental waveforms for the
source terminal voltage in the MOSFET under no-load
conditions. In the experiment, the source terminal voltage
for each MOSFET was measured using the neutral point
GND for the DC power source voltage as the standard. The
source terminals for Q
12
and Q
13
are connected to the output
terminal, and the source terminal voltage is v
out
. Moreover,
the drain terminals for the n-type MOSFETs other than Q
1
and Q
24
are connected to the upper source terminals, and
for the p-type MOSFETS are connected to the lower source
terminals. In the period in which each MOSFET is in the
on state or is operating dynamically, the source terminal
voltage is equivalent to the output voltage, and in the off
state, it is maintained at the clamp voltage for the clamp
circuit.
Figure 10 shows the experimental waveforms for the
voltages v
DS1
through v
DS12
between the drain and source in
Q
1
through Q
24
. Although each waveform includes about 1
V of noise, the waveforms were found using the voltage
between the drain and source based on the voltage differ-
ence with the source terminals in Fig. 9. As a result, the
resolution is from a digital oscilloscope. In the on state, the
voltage between the drain and source is 0, and in the off
state and dynamic state, a voltage between 0 and 24 V
appears. There is virtually no surge voltage, and so a MOS-
FET with a low withstand voltage of about 30 V can be used.
Fig. 9. Experimental waveforms of source voltages
under no-load conditions.
53
5.3 DC power source current
Figure 11 shows the current for the DC power source.
As was the case in Fig. 8, a resistor at 30 is connected to
only one phase. At this point, it is clear that current is
flowing from the DC power source via the clamped diode
connected to the drain in the MOSFETs operating in the
dynamic state. The product of each current and DC power
source voltage is the power supplied from the DC power
source. The main current is supplied from i
d1
through i
d13
,
and the current supplied from i
d2
through i
d12
is relatively
low. Moreover, a Schottky barrier diode with a low with-
stand voltage is used in the clamped diodes D
1
and D
22
where i
d2
and i
d12
are flowing. As a result, the loss due to a
forward voltage drop in the clamped diode is not problem-
atic.
5.4 Induction motor experiment
Figure 12 shows the experimental waveforms for an
induction drive. In the experiment, a 2.2-kW, 200-V, four-
pole three-phase induction motor was connected to a 12-se-
ries diode-clamped linear amplifier. A balanced three-phase
DC current at 100 V and 50 Hz was supplied to the voltage
command value v
in
in each phase. Therefore, the output line
voltage was approximately 173 V, lower than even the
motor rating. The output voltage v
out
nicely tracks the
voltage command value v
in
, and is sinusoidal. The output
current i
out
is a good current waveform with minimal dis-
tortion. Although a small unbalanced component is in-
cluded in the output current i
out
, this is because the
reverse-phase impedance in the induction motor is low, and
is thought to result from the small reverse-phase voltage
included in the output voltage v
out
. Moreover, when the
polarity of the output current i
out
is inverted, distortion is
Fig. 11. Experimental waveforms of supply currents
when connected to a resistive load.
Fig. 10. Experimental waveforms for drain-to-source
voltages under no-load conditions.
54
seen in the output voltage v
out
, though this is not thought to
represent a problem in practice. As shown above, the
authors confirmed that their proposed circuit can also be
used for an induction load.
6. Conclusion
In this paper the authors proposed a diode-clamped
linear amplifier that can perform at a high conversion
efficiency. The diode-clamped linear amplifier can reduce
loss by lowering the voltage applied to each MOSFET by
connecting the MOSFETs in series. Moreover, because it
operates as a linear amplifier, no output filter is used at all,
and sinusoidal voltage and current can be output. The
authors created a three-phase, 12-series diode-clamped lin-
ear amplifier, and confirmed the operating principles
through experiments. The results confirmed that when con-
nected to a resistive load, the conversion efficiency was
90.6%. Moreover, the authors confirmed experimentally
that a three-phase induction motor could be driven.
The proposed circuit methodology can reduce the
loss generated in the dynamic state by increasing the num-
ber of devices, but the circuit is complex. In the future, if
the MOSFETs and clamped diodes can be made modular,
then the problems of circuit complexity and heat dissipation
can be resolved.
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55
AUTHOR
Hideaki Fujita (member) completed a masters in electrical and electronics system engineering at Nagaoka Institute of
Technology in 1990 and started his doctoral studies in energy and environmental engineering. He became a lecturer in electrical
and electronics engineering at Okayama University in 1991. He was appointed an assistant professor at Tokyo Institute of
Technology in 2002. He is pursuing research related to harmonic inverters and active filters for electric power. He received the
2003 IEEE/IAS IPPC Prize Paper Award and the 2005 Isao Takahashi Power Electronics Award. He holds a D.Eng. degree.
56