QUESTION BANK

UNIT - 1
Q1. Derive the input zero error for the single ended inverting dc amplifier.
Q2. Find the OZE for the differential voltage integrator in terms of IZE of
instrumentation amplifier and Voltage Feedback Amplifier.
Q3. What do mean by impedance gyration and simulate the inductive input
impedance in a voltage buffer.
Q4. In case of single ended voltage addition using non inverting voltage
amplifier, what is the effect on gain due to resisters tolerance? Derive the
expression for the same.
Q5. Derive the expression of transfer function of single ended integrator and
explain its frequency response. Comment on the OZE and IZE for the same.
Q6. Derive an expression for the output voltage for a high frequency integrator
using current feedback amplifier.
Q7. Explain the quantitative analysis of operational amplifier
Q8. Explain the D.C analysis of operational amplifier
Q9. Explain the A.C analysis of operational amplifier
Q10. Explain the frequency response of operational amplifier in detail.
Q11. If two 60 Hz, 100mV(P-P) single ended voltages with 100 source
resistance is added, the peak value detected and converted to digital using a
10b A/D converter with 0V to 1V input range. Find the requirements for the
op-amp and resistor if error is not greater than 1/8 LSB for good
performance.

Q12. Find out the bandwidth of an op amp when we are using VFA and same
signal is applied to all inputs. Provided open loop gain

, R=R
1
=R
2
=R
3


Q13. Let a sawtooth signal with slope

is applied to an inverting
differentiator to get an output of

. Determine the input zero error(IZE).

It is given that V
io
= 10 microvolt, f
T
=.6 MHz, I
b
=2nA, I
io
=1.5nA.

Q14. Let an opamp is having a dc gain of 1 V/V with the integration time 20 ms.
Find the frequencies f
i
and f
t
to get relative error smaller than .1%
UNIT2
Q15. Explain the working of op-amp as an amplitude demodulator?
Q16. Explain the working of op-amp as peak detector?
Q17. Draw the circuit diagram of full wave precision rectifier using op amp, also
plot its V-I characteristics.
Q18. Give the principal difference between operational amplifier and operational
Transconductance amplifier.
Q19. Explain the operation of a precision AC/DC converter with the help of a
diagram.
Q20. With the help of a nearly labeled circuit explain the operation of an rms to dc
converter and an envelope detector.
Q21. Draw the circuit of capacitance multiplier and find the equivalent circuit of
the impedance you obtain
Q22. Explain the working of the op-amp as valley detector
Q23. Design a buffer with 50M input impedance at 50Hz, for a voltage with
capacitive output impedance. If stray capacitance is 5pF, calculate the
maximal impedance and the impedance at 205 Hz.

Q24. Determine the offset errors allowable for the op amp whose integration time
is 10 ms with dc gain A
do
=1V/V and relative error smaller than .1%. The
saturation is at 12V and maximal output current is 12 mA.

Q25. If a voltage with Capacitive output impedance has to be designed at 60 Hz
and input impedance of 100 ohm. Let the stray capacitance be 3 pf.
Determine the maximal impedance and the impedance at 200 Hz.

Q26. A coherent demodulator is used to demodulate the signal it has a first order
LPF. Signal which are detecting by this has .2Hz and its having an amplitude
error smaller than 1LSB for a 12b ADC and it is rejecting 80db for a 60 Hz
interference signal

Q27. Calculate the carrier frequency for a system whose AM output will be
demodulated by synchronous sampling and ZOH, and whose maximal
frequency is 30 Hz if the error accepted for a full scale sample amplitude is

for a 16b ADC

Q28. Design an AC/MAV converter for a 500 mV(peak). 60hz signal with a
maximal ripple of 1% of 2V full scale output



UNIT 3
Q29. Design the circuit of a logarithmic multiplier which gives an output voltage
given by the equation

Q30. Design the circuit of an analog multiplier which gives an output voltage
given by the equation

Q31. Explain the operation of a voltage limiter circuit with the help of a neatly
labeled circuit diagram
Q32. Explain the circuit of op amp as zero crossing detectors
Q33. Explain the working of op-amp based Schmitt trigger and explain how its
provides noise immunity. Also explain how Schmitt trigger cab be used for
eliminating comparator chatter.
Q34. Explain the working of log amplifier in transdiode configuration and obtain
the expression output voltage
Q35. Give the draw backs of zener based clamping amplifier. Explain the circuit
techniques to overcome these drawbacks
Q36. Determine the Crest factor and Form factor for a
a. Sine wave
b. Full wave rectified sine wave
c. Half wave rectified sine wave

Q37. Design R and C for an envelope detector able to monitor impedance
fluctuation whose maximum frequency is 10 Hz when the impedance is
measured at 50 kHz.

Q38. What are the value of R and C for envelope detector which are using to
detect the 20Hz message signal and frequency of carrier is 70kHz.

Q39. Consider the data provided: frequency of input signal = 10khz; range of
output voltage = 0v to 2.4v, peak amplitude = 1v.
The provided op-amps are OP07 and OP37C. Determine a) transition time
uncertainty b) delay.

Q40. A voltage comparator whose output level are 5v and -5v was connected to
5v peak, 1 khz signal through inverting zero crossing detector. Design a
circuit to avoid a chatter at zero crossing when there is a 100mV P-P, 60 Hz
interference riding on the input signal

Q41. What will be the value of resistors for a Schmitt trigger based on
comparator whose output voltages are 6 V and 0 volt, if the ref voltage
available is -10 v and the trigger point must be +60mv and -60 mv.