Module Handbook FACULTY OF INFORMATION TECHNOLOGY

Computer Architecture & Digital Logic NC20-2 DipHE/BSC (HONS) CAP/NETWORKING

February 2014
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Dear Students,
Welcome to the new semester and to your new module Computer Architecture and Digital Logic (CADL).
The module will be delivered via lectures and tutorials. Students are also expected to undertake self-
study time for in-course work and class test preparation. This handbook will give you an overall picture of
the plan that is going to be followed. It introduces you to the rationale and the set of objectives that will
guide teaching and learning. You will have a fairly good idea about the teaching schedule, the supporting
materials and the assessments. You will also understand what you are expected to do in order to perform
well in this module. This handbook is designed to provide with some of the information you need to work
effectively over the coming semester. It will give you answers to many of the basic questions you might
have about the module and about the resources you are required to consult over the next 15 weeks.
I wish you all the best,
Ijaz Ahmad

1. Timetable and Consultation Hours
Timetable Time Group Venue
Lectures
Sunday
Tuesday
1:00 PM 02:55 PM
1:00 PM 02:55 PM
T3N
N 102
N 203
Wednesday 5:00 PM - 08:30 PM PN3 M 101
Tutor Office
Hours
Sunday 12:00 Noon - 01:00 PM T3N
N 211 Wednesday 04:00 PM - 05:00 PM PN3
Anytime by Appointment
Tutor Contact:
Email:
Tel:
ijaz.ahmad@majancollege.edu.om
24730477

2. Attendance
You are required to attend at least 80% of the class sessions. If your attendance is less than 80%,
you will not be allowed to sit for the final exam.
You are required to come to class on time. Failure to do so may result in you being marked
absent for that session.

3. The Module
3.1 What it about?
The Computer Architecture and Digital Logic module introduces the fundamental principles and features
that support all modern computing systems design.
Module Handbook FACULTY OF INFORMATION TECHNOLOGY
Computer Architecture & Digital Logic NC20-2 DipHE/BSC (HONS) CAP/NETWORKING
February 2014
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This module prepares you for fundamental principles of digital devices and their applications in
Computer Architecture. These principles are generic and can be critically used to evaluate and
understand modern systems, and therefore appreciate how they impact on the software process.
Architecture and Digital Logic concepts are essential because these helps you to understand how a
computer works and executes a program which is in fact the fundamental requirements for all students
undertaking a degree in networking.

3.2 Module Aims
This module aims to:
Provide an understanding of the fundamental concepts and architectural principles of computer
architectures.
Introduce the concept of logic systems and their implementation using electronic devices.
Describe, manipulate and simplify logic expressions.
Introduce electronics terminology and devices and elementary circuits.

3.3 Prerequisites
Computer Systems (CSY)

3.4 What will I be able to do by the end of the course?
By the end of the course, you will have acquired a range of skills which will enable you to:
Describe, manipulate and simplify logic expressions.
Determine the behaviour of a logic circuit and design basic digital electronic circuits and systems.
Translate the description of logical problems to efficient digital logic circuits (synthesis).
Explain the concept of a Von Neumann machine and its major functional units.
Explain how an instruction is fetched from memory and executed.
Explain how interrupts are used to implement I/O control and data transfers.

3.5 MOVE Support
The module will be supported through MOVE ((Majan Online Virtual Environment). Weekly outlines,
handouts, presentations, announcements and any other module activities will be regularly uploaded on
MOVE. Moreover, Exercises and Quizzes will be posted on MOVE to support your learning. Though these
quizzes will not count as part of your assessment, they will nonetheless help to consolidate what you
learn in class.

4 Assessing Your Performance
4.1 Assessment Details
Your performance will be evaluated by two assessments, the details of which are as follows:
Assessment Task Weightage
Exam
Duration
Exam Week
Assessment 1
In-class Test 1(A) 30% 1 hour Week 6
In-class Test 1(B) 30% 1 hour Week 9
Module Handbook FACULTY OF INFORMATION TECHNOLOGY
Computer Architecture & Digital Logic NC20-2 DipHE/BSC (HONS) CAP/NETWORKING
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Assessment 2 End of Semester Exam 40% 1.5 hours Week 15


4.2 Marking Scheme for Assessment
The overall grade you will receive is guided by the following description:
Grade Description
A > 70% An excellent piece of work. Shows evidence of relevant reading; illustrates and
applies appropriate examples; constructs logical analysis and argument; draws
to an appropriate conclusion.
B > 60% As for A grade but lacks in comparison, either in terms of depth of argument,
the appropriateness of examples, or the logic and conclusion; evidence of
relevant reading must be shown.
C > 50% Demonstrates good knowledge of some of the principles and theories involved.
Limited analysis, evaluation and research.
D > 40% Worthy of a pass but is weaker in terms of depth, logic and conclusion to the
argument used; no/poor examples and illustrations; tends to be more
descriptive rather than analytical; limited evidence of relevant reading
E > 30% Not worthy of a pass but does contain some relevant argument; tends to be
descriptive.
F < 25% Work of little academic merit.

5 Scheme of Work
Week Main Topic Details
1 Introduction & Recall
Introduction To Boolean Logic, Common Logic Gates, Truth Tables
Recall Number Systems & Inter-Conversion
2 Complements
1's Complement, 2's Complement, Applications of Compliments
(Subtraction)
3 Binary Algebra
Introduction to Boolean algebra, Symbolic Representations, Binary
Operations, Arithmetic Operations, Rules and Laws of Algebra
4 Logic Simplification
Using Boolean Algebra Rules, Identities and laws such as De
Morgan's, Associative, Distributive, Commutative etc.
5 Karnaugh Maps Karnaugh Maps, Dont Care Conditions
6 In-class Test 1(A)
7
Combinational Logic
Circuits
Decoders, Encoders, Binary Adders (Half Adder & Full Adder)
8 Multiplexers & De-Multiplexers
9
Sequential Logic
Circuits
Memory Elements, Flip-flops, Registers
Module Handbook FACULTY OF INFORMATION TECHNOLOGY
Computer Architecture & Digital Logic NC20-2 DipHE/BSC (HONS) CAP/NETWORKING
February 2014
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In-class Test 1(B)
10
Computer Working
Model
Von Neumann machine & components, working of memory,
Arithmetic Logic Unit, Control Unit, I/O, Registers
11
Instruction: Types &
Cycle
0-Address, 1-Address, 2-Address, 3-Address Instructions
Fetch, Decode, Execute with examples
12 Interrupts Interrupt Classes, Handlers, Interrupt Cycle
13
Memory: Access
Techniques &
Addressing Modes
DMA, Common Addressing modes
14
Instruction Set
Architecture
CISC, RISC, Recent Trends and Developments
15 End-of-semester Examination

6 References
[1] Tanenbaum A., Austin T., (2013), Structured Computer Organization, 6
th
ed., Pearson.
[2] Stallings W., (2013), Computer Organization and Architecture, 9
th
ed., Pearson.
[3] ROGER L TOKHEIM, M.S., A. B., Shaums Outline of Theory and Problem of Logic Principles, 3
rd
Edition
[4] Mano, M., (2008), Logic and Computer Design Fundamentals, 4
th
ed., Prentice Hall.
[5] Roth, H. C., (2008), Fundamentals of Logic Design, 6
th
ed., PWS.
[6] Green, D.C., (2001), Digital Electronics, 5th ed., Longman.
[7] Floyd, T.L., (2000), Digital Fundamentals, 7th ed., Merrill.
[8] Hill, F.J., Peterson, G.R., (1993), Computer Aided Logical Design with Emphasis on VLSI, 4th ed., John
Wiley.
[9] Steen M., Sips H., (1995), Computer and Network Organization, Prentice Hall.
[10] M. Murducca, V. Heuring., (2007), Computer Architecture and Organization.

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