CpE 272 Digital Logic Laboratory

Lab #3
Introduction to the Gal/Three bit adder
Fall 2007
Introduction:
GAL (Generic Array Logic)
Programmable Logic Devices (PLs! are chi"s that house a large number o# basic logic
gates$ These gates can be con#igured in an% user s"eci#ied order (limited b% the chi"&s
im"lementation! via so#t'are$ (ince a PL is a single chi" alternative #or large
combinational / se)uential net'or* s%stems+ the% tend to be immensel% "o"ular among
develo"ers$
Generic Arra% Logic (G,L! devices can be "rogrammed to emulate most commonl%
used t%"es o# PLs+ thus #urther sim"li#%ing design "rocess$ These devices are
electronicall% erasable and ma% be reused -.00 times$ /ach G,L usuall% holds .00 basic
gates that ma% be net'or*ed in an% user s"eci#ied order via so#t'are$ Toda%&s lab 'ill
#ocus on the "rogramming and a""lication o# G,L .012 as a decoder$ This device has
.0 "ins that are e3clusivel% in"ut and 2 additional "ins that ma% be con#igured as in"ut or
out"ut as needed$ 4ere is the PI5 diagram #or the G,L .012$
,s %ou can see #rom this diagram+ Pins .67 can onl% be used as in"uts 'hile "ins .26.7
can be either in"uts or out"uts$ Let us loo* at some e3am"le code #rom a "rogram called
8I59:PL to see ho' 'e can use this device$
sample.pld
Name sample; /** Name of the File **/
Part no G16V8; /** Name of the Part Number **/
Devie G16V8; /** Name of the Devie **/
Date !!/!!/!!; /** Follo"in# lines are not
important **/ $evision !!; /** for the devie to
operate **/
Desi#ner !!;
%ompan& !!;
'ssembl& !!;
(oation !!;
/** )nputs **/
/** )nputs are delared li*e this+ Pin ,Pin Number- . ,)nput Name-; **/
Pin 1 . ';
Pin / . 0;
Pin 1 . %;
Pin 2 . D;
/** 3utputs **/
/** 3utputs are delared li*e+ Pin ,Pin Number- . ,3utput Name-; **/
Pin 1/ . 'ND;
Pin 11 . 3$;
Pin 12 . N34;
Pin 15 . !3$;
Pin 16 . 3utput;
/** Delarations and )ntermediate Variable Definitions **/
/** (o#i 67uations **/
/** &ou define &our lo#i here "ith the follo"in# format **/
/** ,3utput Name- . ...; **/
'ND . ' 8 0;
3$ . % 9 D;
N34 .: ';
!3$ . ' ; %;
3utput . <<' 9 0= 8 <:%== 9 <'8<:0==;
The #irst thing %ou should notice is the #irst three lines$ The% must be de#ined each time
%ou com"ile code #or the G,L chi"$ Name should have the #ilename 'ritten as its
argument$ Deice and Part no should have the name o# the "art %ou 'ill be com"iling
the code #or (;;G.012&& is the name o# the G,L 'e 'ill be using!$ The rest o# the headers
have no im"act o# the com"iling o# the code so the% are not necessar% to #ill out$ The ne3t
section to the G,L code is the declaration o# in"uts and out"uts$ The% are both de#ined
the same 'a%<Pin ,Pin Number- . ,)nput/3utput Name-;< The "in number is the
number o# the "in that %ou 'ish to declare as an in"ut or out"ut (ma*e sure %ou chec* the
"in diagram o# the G,L.012 to ma*e sure %ou are using valid "ins!$ The #inal section
is the declaration o# the out"ut #unctions$ To do so+ %ou start o## the e)uation 'ith an
=ut"ut 5ame de#ined above then #ollo' it 'ith an ;;>&& sign$ ,#ter that %ou must 'rite a
logic e3"ression that #ollo's the 8I59:PL language$ Luc*il% 8I59:PL has all the
basic logic #unctions available in its language the% are re"resented li*e this+ the order o#
o"erations is retained and dis"la%ed belo'$
9=??=5 ,5=/ T@P/ I(PL,@A
76(egment dis"la%s use 2 L/&s to dis"la% numbers and characters b% lighting in an%
desired combination$ These dis"la%s re)uire drivers or decoders that must be either
"urchased as chi"s or designed$ To light u" a segment in a seven segment dis"la%+ a logic
lo' must be su""lied to the corres"onding segment i# %ou are using a common anode
t%"e dis"la%$
Part . 66 Testing (even (egment is"la%A
Place a seven segment dis"la% on a "roto6board and connect "o'er to it$ is"la% the
number B on the 76(egment dis"la% b% hard'iring the correct segments to ground
through 330 =hm resistors$
Part 2 66 esigning a ecoderA
For this lab %ou 'ill be designing a seven segment decoder to dis"la% he3adecimal
numbers$ 4e3adecimal numbers are base .0 numbers and there#ore have .0 di##erent
s%mbols to re"resent one digit$ The #ollo'ing table ma"s he3adecimal numbers to there
binar% e)uivalent$
@ou 'ill design the logic to decode a #our bit (he3adecimal number! so that it 'ill dis"la%
the correct digit on a seven segment dis"la%$ First #ill out the table to ma*e sure that the
correct segments are turned o##/on so that the correct number is dis"la%ed given the #our
in"ut bits (8+C+@+D!$ ,lso a bloc* diagram o# the decoder is included$
From the above table 'rite the logic e3"ressions #or ever% column$
a >
b >
c >
d >
e >
# >
g >
Part 3 66 9om"iling G,L code and emonstration
5o' insert the e)uations that %ou derived #rom the last "art into %our 8I59:PL code
and declare all in"uts and out"uts$ 5o' %ou are read% to com"ile %our code and "rogram
a G,L chi"$ First #ollo' these directions to com"ile %our code$
!" #tart $inCupl on t%e PC"
2$ &ile '( Ne) , #ile 'ill be generated 'ith a tem"late on it$ 5ame the #ile and enter the
device 5ame as g.0v2$ 5o' %ou are read% to 'rite %our G,L "rogram$ ,ssign in"ut and
out"ut "ins$ ,lso 'rite the logic e3"ressions$
*" #ae your +ile on t%e %ard drie a, a "pld +ile"
-" #elect t%e +ollo)ing option +rom t%e menu, .ption '
( #elect Deice '( double clic/ on !01
E$ Compile your code by c%oo,ing t%e menu option:
2un '( Deice #peci+ic Compile
I# no error messages are received then the com"iled $Fed #ile should in the same
director% as the $"ld #ile$
0$ #ae t%i, "3ed +ile on +loppy$
=nce %ou have the F/ #ile read% %ou 'ill need to ta*e that #lo""% over to the com"uter
that is on a cart$ 5e3t to it is a G,L "rogrammer$ Insert %our G,L into the "rogrammer+
and then #ollo' the o"tions #rom the menus on the screen$
.$ Load your "3ed +ile into t%e bu++er +rom t%e +loppy"
4u++er '( Load '( your compiled +ile"5ed
2$ Era,e and program t%e c%ip a, +ollo),
Deice'(&unction'(Era,e
,#ter the data has been erased #rom the chi" %ou have to "rogram the chi"$
Deice'(&unction'(Program
@our chi" is no' "rogrammed unless an error code a""ears$
emonstrate to %our instructor %our 'or*ing ;;4e3adecimal to (even
(egment is"la%&& ecoder once %ou have #inished$
Part B 66 Three bit adder
,ddersA
igital 9om"uters "er#orm a variet% o# in#ormation "rocessing tas*s$ The basic #unctions
encountered are arithmetic o"erations$ The most Gasic ="eration is the ,ITI=5 o#
binar% digits$ The sim"le addition consists o# #our "ossible elementar% o"erations$
, combinational circuit that "er#orms the addition o# t'o bits is called 4al#6,dder$ ,nd
the circuit that "er#orms the addition o# 3 bits is called Full ,dder$
>alf 'dder+
For the 4al#6,dder the circuit needs t'o binar% in"uts and t'o binar% out"uts$ The in"ut
variables are onl% the t'o bits , and G$ The out"ut variables "roduce the sum and carr%$
.!ra' the truth Table #or 4al#6 ,dderA
2! 8rite the e)uations #or 9arr% and (um and minimiHe them using I6?a"s$
9arr%>
(um>
3! ra' the circuit iagram #or the above hal#6adderA
Full 'dder+
, Full6adder is a combinational circuit that "er#orms the arithmetic sum o# three in"ut
bits$ It is ver% similar to the hal# adder e3ce"t that there is a third in"ut$ This in"ut is the
carr% #rom the "revious adder$
.! ra' the Truth table #or Full adder 9ircuit$
2! 8rite the e)uations #or 9arr% and (um and minimiHe using I6?a"s$
9arr% >
(um >
3! ra' the circuit diagram o# Full adderA
Lab 3 #inal designA
For the #inal design in this lab %ou 'ill combine all %ou have learned to im"lement a
three bit adder+ using the decoder and 7 segment dis"la% to sho' %our results$
8hen %ou come into lab this 'ee* %ou should have a good start 'ith %our design to start
building %our circuit$ @ou 'ill run into man% "roblems 'hen 'iring %our design+ so it
'ould be a good idea to be started on %our design be#ore %our lab time ne3t 'ee*$