Preface

The purposes of finishing this report are to fulfill the condition of Industrial Engineering
course. Besides fulfilling the requirement this project has help us to implement or practice the
theoretical aspect that we had learn during classes.
We like to thanks all the group members because of the effort and commitment given to
complete this task, without the necessary cooperation given this task cant be done properly. We
also like to give full appreciation to Texas Instrument especially En. Z because has given us
chance and opportunity to implement the knowledge that we had learn about the company. He
has given us full cooperation and believes in us while we recommend some aspect that can help
improve her workstation thus making our project something to learn about.
We also like to thanks Dr. Ibrahim Masood because of the knowledge that he has taught
during learning this Industrial course. Industrial Engineering has helped us to see the engineering
aspect in any of business thus give scientifically prove on how things can be improve.
We hope that the content of this report is sufficient enough to fulfill the aspect that we
needed to grab during these courses. Any imperfection during completing this report is because
our own insufficient knowledge and experiences that we hope to be forgiven. Thank You

TEXAS INSTRUMENTS MALAYSIA SDN.BHD

Company Background

Texas Instrument (TI) has literally transformed the world in 75 years. From humble
beginnings in Texas oil fields to leadership in global markets, TI has thrived by developing the
ideas of its people. Built by the determination of founders Eugene McDermott, Erik Jonsson,
Cecil Green and Pat Haggerty, this company not only survived, but changed the world through
risk taking and innovation.

Company contributions to communities and industries around the world are unmatched
because of thousands of TI people, including inventors such as Nobel Prize-winner Jack Kilby.
The history includes inventions such as the first commercial silicon transistors, the first
integrated circuits and the first electronic hand-held calculator.

As TI begin their second 75 years, TI leads the way in digital signal processing and
analog technologiesthe semiconductor engines of the Internet age. TI and its people are setting
the pace in global markets such as wireless and broadband access, as well as a variety of
emerging markets that include digital projection systems and digital audio.

Company story offers a window into a corporate culture that fosters the creativity and
mental toughness needed to succeed in a competitive world. TI also has demonstrated how a
company can become a true member of the communities it serves through fiscal responsibility,
civic mindedness, high ethical standards, support for education and leadership in research and
development.

TI Malaysia Management Leadership Team

Managing Director
Tim Ingersoll

Digital Light
Processor (DLP)
Operation

Assembly and RFID

Operation (Acting)

Test and Post Test

Operation

Iszharudin Hassan

Harith Alvin Cyril

Quality, Reliability
and Assurance (QRA)
& Package
Development

Michael Chin
Mohammad Yunus

Planning

Human Recourses

Finance

David Hsiao

Reha Abdul Razak

Zuraida Ghazali

Worldwide
Procurement and
Logistic (WPL)
(Acting)
Keith Melcher

Site Services

Asia Subcon

Baksaran
Balasubramaniam

Indran Nair

The job description of the Managing Director:

1. Setting the culture of the company
2. Developing strategy and direction for the company
3. Leading the executive/senior management of the company (including firing and hiring)
4. Managing Financial and Physical resources

The job description of the Digital Light Processor (DLP) Operation:

1. Ensure the continuous production and improvement production rate.
2. Research and upgrade currently used technologies.

The job description of the Test and Post Test Operation:

1.

Taking care/improvement of Overall Equipment Efficiency such as OEE, MCBJ, Index

time (Sprint Rate), Test SPC pass rate, mis-contact and Quality related issues.

2.

Maintaining, repairing tester handlers and packaging machines and time to time problem
solving as well as implementation of appropriate machine update.

3.

Ensure continuous production of IC and the improvement on the current system of the
machines.

The job description of the Quality, Reliability and Assurance (QRA) & Package
Development:
1. Developing, debugging and maintaining test programs for use in the various facets of the
QRA processes
2. Coordinating package qualification efforts for new products and when new designs,
materials, or processes are introduced; and providing recommendations on product
release based on package reliability test results.

The job description of the Planning:

1. Establish the activities and budgets for each part of the company for the next few years.
They link the strategic plan with the activities the organization will deliver and the
resources required to deliver them.
2. Describes short-term ways of achieving milestones and explains how, or what portion of,
a strategic plan will be put into operation during a given operational period

The job description of the Human Recourses:

1. Interviewing interns, hiring people, and posting advertisements.
2. Consults with and advises administrators and employee representatives on personnelrelated policies and procedures.
3. Develops and implements personnel rules and regulations, and interprets and administers
human resources-related provisions of collective bargaining agreements.

The job description of the Finance:

1. To lead the annual budget setting process and ensure that financial and budgetary
information is available to all levels of the organization in a timely and accurate manner.
2. To support to the TI in securing financial balance which will include the determination
and establishment of cash releasing efficiency savings required to ensure financial
balance and to advise the TI on strategic and operational matters relating to finance.

The job description of the Worldwide Procurement and Logistic (WPL) (Acting):
1. Consults with customer groups to understand demand forecasts; schedules material lots
and reviews pricing.
2. Plans, implements and controls the efficient, effective forward and reverse flow and
storage of goods, services and related information between the point of origin and the
point of consumption in order to meet customer and legal requirements.

Texas Instrument Product & Application

TI Products

TI Applications

ASIC

Automotive

Amplifiers & Linear

Communications & Telecom

Audio

Computers & Peripherals

Automotive

Consumer Electronics

Broadband RF/IF & Digital Radio

Energy

Clocks & Timers

Industrial

Data Converters

Medical

Die/Wafer Solutions

Security

DLP & MEMS

Space, Avionics, & Defense

High-Reliability

Video and Imaging

Interface

Logic

OMAP Mobile Processors

Power Management

Processors

Digital Signal Processing (DSP)

Microcontrollers (MCU)

Space Products

Standard Linear

Storage Products Group

Switches & Multiplexers

Temperature Sensors & Control ICs

New! Wireless Connectivity

DLP - TV, Projectors, & Cinema

Calculators & Education Technology

Texas Instrument Priorities

Growth: Invest where Growth will be.

Key Technology Qual: 52um scribe qual in 2Q09

Yield: CWAITY 98.5%

REDUCE Cost: 5% non-Gold OM per pin + Cu savings and 8% CLAM

SWR Cycle Time 21 days full turn key

Analog: Accelerate Analog as our Foundation.

HPA/ PWR CWAITY/ Yield 97.7%

90% compliance Test Lots RTD

IT Projects: MTVS Phase 3 Implementation, Common Outlier program

Customer: Solve customer problem

Zero Customer Disruptions, 365 Days without Major Event.

Sustain and extent 5S: Zero Customer Complains due to Human Errors Zero low tech
errors.

Customer complaints 50% reduction over 2011

Improve Cycle Time: 99% all flows turnkey 22 days, Multi Factory Flow(MFF) 10 days.

Foundation: One Make Mindset

Zero turnover of high performers/potential

100% development plan in place for everyone

Safety: 90% Non-hazardous Recycle Rate, Pass Corporate and ISO audits.
Environmental, Safety, Health (ESH): Policy & Beliefs

Texas Instrument Malaysia Environment, Safety, and Health Policy

Texas instruments responsible create, makes and markets technology for innovators
around the world.

TI consistently complies with applicable regulations and customer requirements.

TI commits to continual improvement of its operations, progressively reducing the

potential impacts of its activities, by focusing on employee health and safety, productivity
and pollution prevention.

This commitment is tracked through the setting and reviewing of relevant objectives and
targets for TI operations.

Texas Instrument Malaysia Environment, Safety, and Health Belief

Nothing is more important than working safely. Safety comes first in everything we do.

Every employee is responsible for working safely by following procedures and being
aware of hazards in their surroundings.

Every level of management will integrate Environment, Safety, and Health as core values
into their organizations.

All accidents are preventable.

TEXAS INSTRUMENT ETNICS & VALUES

Know whats right.

Value whats right
Do whats
right

Integrity
We respect and Value People By:
Threating others as we want to be treated.
We are Honest By:
Representing ourselves and our intentions truthfully.

Innovation
We Learn and Create By:
Understanding that impatience with the status quo drives
business and personal growth.
We act Boldly By:
Pioneering new business directions and opportunities.

Commitment
We take Responsibility By:
Being at our competitive best for TI.
We Commit to Win By:
Being personally dedicated to making TI a winner.

WORK SCHEDULE
The following is the principle work schedule to be followed:

Administrative:
5 days work week/non-shift

Flexi time is extended to Administrative Personnel who work on a 5-day workweek.

The established core and flexi time are as below:

Monday - Friday
Flexi

Core

Flexi

7.30am 9.00am

9.00am 5.00pm

5.00pm 6.30pm

Flexi Time - Employees can choose to be present at work any time during these hours but shall
work the normal number of hours or work per day.
Core Time All employees must be present for work during these hours. However, due to
operational needs and job functions, employees may be required to come to work at specific time
within the flexi time of 7.30am to 9.00am.

BREAK TIME
Administrative Personnel:
Monday Thursday:
Morning Tea Break

- 15minutes

Lunch Break

- 45minutes

Friday:
Morning Tea Break

- 15minutes

Lunch Break

- 1 hour 45minutes

PRODUCTION OR QUALITY CONTROL USED

PRODUCTION

Semiconductor device fabrication is the process used to create the integrated circuits that are
present in everyday electrical and electronic devices. It is a multiple-step sequence of
photolithographic and chemical processing steps during which electronic circuits are gradually
created on a wafer made of pure semiconducting material. Silicon is almost always used, but
various compound semiconductors are used for specialized applications.

In semiconductor device fabrication, the various processing steps fall into four general
categories: deposition, removal, patterning, and modification of electrical properties.

Deposition is any process that grows, coats, or otherwise transfers a material onto the
wafer. Available technologies consist of physical vapor deposition (PVD), chemical
vapor deposition (CVD), electrochemical deposition (ECD), molecular beam epitaxy
(MBE) and more recently, atomic layer deposition (ALD) among others.

Removal processes are any that remove material from the wafer either in bulk or
selectively and consist primarily of etch processes, either wet etching or dry etching.
Chemical-mechanical planarization (CMP) is also a removal process used between
levels.

Patterning covers the series of processes that shape or alter the existing shape of the
deposited materials and is generally referred to as lithography. For example, in
conventional lithography, the wafer is coated with a chemical called a photoresist. The
photoresist is exposed by a stepper, a machine that focuses, aligns, and moves the
mask, exposing select portions of the wafer to short wavelength light. The unexposed
regions are washed away by a developer solution. After etching or other processing,
the remaining photoresist is removed by plasma ashing.

Modification of electrical properties has historically consisted of doping transistor

sources and drains originally by diffusion furnaces and later by ion implantation. These
doping processes are followed by furnace anneal or in advanced devices, by rapid
thermal anneal (RTA) which serve to activate the implanted dopants. Modification of
electrical properties now also extends to reduction of dielectric constant in low-k
insulating materials via exposure to ultraviolet light in UV processing (UVP).

Modern chips have up to eleven metal levels produced in over 300 sequenced
processing steps.

Front-end-of-line (FEOL) processing

FEOL processing refers to the formation of the transistors directly in the silicon. The raw wafer
is engineered by the growth of an ultrapure, virtually defect-free silicon layer through epitaxy. In
the most advanced logic devices, prior to the silicon epitaxy step, tricks are performed to
improve the performance of the transistors to be built. One method involves introducing a
straining step wherein a silicon variant such as silicon-germanium (SiGe) is deposited. Once the
epitaxial silicon is deposited, the crystal lattice becomes stretched somewhat, resulting in
improved electronic mobility. Another method, called silicon on insulator technology involves
the insertion of an insulating layer between the raw silicon wafer and the thin layer of subsequent
silicon epitaxy. This method results in the creation of transistors with reduced parasitic effects.

Gate oxide and implants

Front-end surface engineering is followed by: growth of the gate dielectric, traditionally silicon
dioxide (SiO2), patterning of the gate, patterning of the source and drain regions, and subsequent
implantation or diffusion of dopants to obtain the desired complementary electrical properties. In
dynamic random access memory (DRAM) devices, storage capacitors are also fabricated at this
time typically stacked above the access transistor.

Back-end-of-line (BEOL) processing

Metal layers

Once the various semiconductor devices have been created, they must be interconnected to form
the desired electrical circuits. This occurs in a series of wafer processing steps collectively
referred to as BEOL (not to be confused with back end of chip fabrication which refers to the

packaging and testing stages). BEOL processing involves creating metal interconnecting wires
that are isolated by dielectric layers. The insulating material was traditionally a form of SiO2 or a
silicate glass, but recently new low dielectric constant materials are being used. These dielectrics
presently take the form of SiOC and have dielectric constants around 2.7 (compared to 3.9 for
SiO2), although materials with constants as low as 2.2 are being offered to chipmakers.

Interconnect

Historically, the metal wires consisted of aluminium. In this approach to wiring often called
subtractive aluminium, blanket films of aluminium are deposited first, patterned, and then
etched, leaving isolated wires. Dielectric material is then deposited over the exposed wires. The
various metal layers are interconnected by etching holes, called vias, in the insulating material
and depositing tungsten in them with a CVD technique. This approach is still used in the
fabrication of many memory chips such as dynamic random access memory (DRAM) as the
number of interconnect levels is small, currently no more than four.

More recently, as the number of interconnect levels for logic has substantially increased due to
the large number of transistors that are now interconnected in a modern microprocessor, the
timing delay in the wiring has become significant prompting a change in wiring material from
aluminium to copper and from the silicon dioxides to newer low-K material. This performance
enhancement also comes at a reduced cost via damascene processing that eliminates processing
steps. As the number of interconnect levels increases, planarization of the previous layers is
required to ensure a flat surface prior to subsequent lithography. Without it, the levels would
become increasingly crooked and extend outside the depth of focus of available lithography,
interfering with the ability to pattern. CMP (chemical mechanical planarization) is the primary
processing method to achieve such planarization although dry etch back is still sometimes
employed if the number of interconnect levels is no more than three.

QUALITY CONTROL SYSTEM USED

There are a few quality control system used by the company that were explained:-

Quality Control Team (QC)

Is a team that consists of women that monitors all the tested or packaged IC for any possible
failure. This team conducts a checking with their naked eye and/or with the aid of tools. Usual
detected failure includes that of a lead bent, strength of the plastic seal, missing unit in packaged
reel and etcetera. All tested IC will be send to this QC team for a final check. This particular
team ensures that there is no room for error and that the quality of items to be delivered is up to
the standard.

SPC Rate (machine)

Statistical Process Control (SPC) rate or SPC pass rate is a system integrated within the testing
machine and the computer system that is linked together. This system will monitor the pass and
failure rate of the tested IC and governs it with a program by which if the SPC number falls
below the designated limit of allowable SPC limit, the tested lot will be rejected and retest
should be conducted. This is of course includes the number of jamming of the tested machine
into consideration. This system also observers the before and after quantity of the tested lot of IC
by which, if the after number of total IC reduced/missing significantly, SPC fail will occur.

OEE
OEE stands for Overall Equipment Efficiency that monitors all the equipment working
effectiveness of tester involved in chip testing during a set of time. In TI, OEE is measured in 24
hours during of which data of equipment jam per down time is recorded and will be evaluated
before the next day.

Offline team
Is a special group of machine specialist which is gathered and work together as a team. Offline
team works in an isolated room and performs a routine Preventive Maintenance (PM) of
machines. Their other tasks includes that of an emergency repair request, assembling new
machines, and implementing as well as testing a new found technology system. Offline team

helps improve the MCBJ, Index Time (sprint rate), and OEE of machines thus decreasing the
number of jam rate and fail lot hence the improve in quality.