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KEEE 2224
Lecture 9(b)
Junction Field-Effect Transistor
(JFET)
Dr. Ghafour Amouzad Mahdiraji
December 2012
One can derive the ideal DC current-voltage relationship for both devices
by simply considering the two-sided device to be two JFETs in parallel.
We ignore any depletion region at the substrate of the one-sided device in
the ideal case.
At pinchoff, h = a and the total potential across the p+n junction is called
the internal pinchoff voltage, denoted by Vp0.
a is the channel thickness between the p+ gate region and the substrate
define as
(13.3)
Internal pinchoff voltage is the total potential drop across the gate junction
at pinchoff and it is defined as a positive quantity.
The internal pinchoff voltage Vp0 is not the gate-to-source voltage to
achieve pinchoff.
The pinchoff voltage must also be less than the breakdown voltage of the
junction.
Example 13.1
Assuming a simplified one-sided p-channel pn JFET with zero drain-tosource voltage, the same geometry as the n-channel JFET we considered.
If we assume the abrupt depletion approximation, then the induced
depletion region width for the one-sided n+p junction is
Example 13.2
So far, we have determined the pinchoff voltage for both n- and p-channel
JFETs considering zero drain-to-source voltage.
Now consider the case when both gate and drain voltage are applied.
In this case, the depletion region width will wary with distance through the
channel.
The depletion width h1 at the source end
is a function of Vbi and VGS but is not a
function of drain voltage.
The depletion width at the drain terminal
is given by
In a p-channel JFET, the voltage polarities are the reverse of those in the
n-channel device.
We can show that, in the p-channel JFET at saturation
(13.3)
The pinchoff current would be the maximum drain current in the JFET if the zerobiased depletion regions could be ignored or if VGS and Vbi were both zero.
Equations (13.29) and (13.35) are rather cumbersome to use in any hand
calculations.
With a good approximation, when the JFET is biased in the saturation
region, the I-V characteristics is given by
2
VGS
I D I DSS 1
VP
JFET Transconductance
Example 13.4
MESFET
(13.3)
In considering the enhancement mode JFET,
the term threshold voltage is commonly used
in place of pinchoff voltage. For this reason, we shall use the term threshold
voltage in our discussion of MESFETs.
(13.4)
MESFET
For the n-channel MESFET, the threshold voltage is defined from Eq. (13.4)
as
Example 13.5
MESFET
The design of enhancement mode JFETs implies the use of narrow channel
thicknesses and low channel doping concentration to achieve the low
internal pinchoff voltage.
The precise control of the channel thickness and doping concentration
necessary to achieve internal pinchoff voltage of a few tenths of a volt
makes the fabrication of enhancement mode MESFETs difficult.
Example 13.6
Ideally, the I-V characteristics of the enhancement mode device are the same
as the depletion mode device; the only difference is the relative values of the
internal pinchoff voltage.
Example 13.7
MESFET Transconductance