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Introduction to VLSI Design

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Subject
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Introduction to VLSI
Design
VLSI Design
Kiran Kumar V G
Sanguine Technical
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19/451

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Introduction to IC Technology
Integrated circuit era, VLSI Design Flow, Why CMOS?, Comparison between
MOSFET and BJT, Gorden Moore's Law, Basic MOS Transistors, Enhancement
mode transistor, nMOS depletion mode transistor, p-MOS Enhancement mode
transistor, Enhancement mode transistor action, Depletion mode transistor
action, Introduction, Fabrication Process Flow - Basic Steps, nMOS Fabrication,
CMOS Fabrication, The p-well pr......

Pages: 28

Total views (655)

Price: Rs 55.44

Fabrication Technology
Material Preparation, Purification of silicon, Crystal growth, Crystal slicing and
wafer preparation, FABRICATION PROCESSES, Thermal Oxidation, Diffusion, Ion
implantation,Epitaxial growth, Other deposited layers, Masking and
lithography, Pattern definition, Metallisation and Interconnection, Fabrication
process sequence for basic devices, Sequence of diode fabrication, Sequence
of discrete BJT fa......

Total views (656)

Price: Rs 84.48

Pages: 38

MOS Transistor Theory

Introduction, nMOS transistor, Principle of operation of nMOS transistor,
Influence of drain to source bias VDS, 3.2.3 Factors affecting the drain current,
Derivation of drain current, The non saturated region, The saturated region,
Channel length modulation, Threshold voltage (Vt ), MOS transistor
transconductance gm and output conductance gds

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Price: Rs 39.54

Pages: 13

Inverter Circuits
nMOS inverter, Resistive load inverter circuit, nMOS inverter with depletion
nMOS as a load transistor, CMOS inverter, Latch up in CMOS circuits, CMOS
Transmission Gate (CMOS TG), Tristate inverter, Power Dissipation in CMOS
circuits

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Price: Rs 31.68

Pages: 17

Circuit Design Processes

MOS Layers, Stick diagrams, CMOS Design Style, Stick diagrams for Basic
Gates, Design Rules and Layout, Lambda-Based Design Rules, Lambda-Based
Design Rules for conducting paths (wires), Lambda-Based Design Rules for
transistor, Lambda-Based Design Rules for Contact cuts, Lambda-Based Design
Rules for VDD and VSS contacts, Basic Physical Design of Simple logic gates,
Simple Layout Guidelines, Desi......

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Price: Rs 44.16

Pages: 15

Appendix A
CMOS Layers, CMOS Design Rules, CMOS Layout Design for Logic Gates,

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Price: Rs 26.34

Designing FET Arrays, Basic Gate Designs, Layout design for CMOS NOT gate,
Layout design for CMOS NAND2 and NOR2 gate, Complex Logic Gate, General
Discussion

Pages: 13

Appendix B
Introduction, CMOS Stick diagrams for Logic Gates, Euler graphs, Steps for
drawing Euler graphs, Eulers path

Total views (655)

Price: Rs 14.64

Pages: 7

Scaling of MOS Circuits

Scaling models and scaling factors, Scaling factors for device parameters, Gate
area Ag, Gate capacitance per unit area Co or Cox, Gate capacitance Cg,
Parasitic Capacitance Cx, Carrier density in channel Qon, Channel Resistance
RS, Gate Delay Td, Maximum operating frequency f0, Saturation current IDSS,
Current density J, Switching energy per gate Eg, Power dissipation per gate Pg,
Power dissipati......

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Price: Rs 38.88

Pages: 14

CMOS Logic Structures

CMOS Complimentary logic, Pseudo nMOS logic, Psuedo nMOS inverter,
Dynamic CMOS logic circuits, Charge sharing problem, Advantages,
Disadvantages, CMOS Domino logic, Clocked CMOS (C2MOS) logic, Pass
transistor logic, Cascode Voltage Switch logic (CVSL), BiCMOS Logic, Driver
Circuits, BiCMOS inverter

Total views (730)

Price: Rs 30.24

Pages: 15

Basic Circuit Concepts

Sheet Resistance Rs, Sheet Resistance in MOS transistors, Inverter Resistance
Calculation, nMOS inverter, CMOS inverter, Capacitance Calculations Cg,
Standard unit of capacitance Cg, The Delay Unit , Driving Large Capacitive
Loads, Cascaded Inverters as drivers, Propagation Delays, Cascaded pass
transistors, Design of long polysilicon wires, Writing capacitances, Fringing
fields, Interlayer ......

Pages: 20

Total views (731)

Price: Rs 37.44

CMOS Subsystem Design

Architectural Issues, Switch Logic, Gate (restoring) Logic, Combinational
(Structured Design) Logic, Parity Generator, Multiplexers (Data Selectors), A
General Logic function block, A Four line Gray code to binary code converter,
Clocking strategies, Pseudo Two Phase Clocking, Two Phase Clock Generator
using D Flip Flops, Two phase clock generator Basic form, Other forms of
Clock, Other system con......

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Price: Rs 52.74

Pages: 21

CMOS Subsytem Design Processes

Some general considerations, Some problems associated with VLSI design, An
illustration of design processes, General arrangements of a 4 - bit arithmetic
processor, Observations, Some observations on the design process, Design of
an ALU subsystem, Design of 4-bit adder, Implementing ALU functions with an
adder, Further consideration of adders, Manchester carry - chain, Adder
Enhancement techniques......

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Price: Rs 58.44

Pages: 30

Memory, Registers and Clock

System timing Considerations, Four bit Dynamic Register, Dynamic Shift
Register (Ratioed Logic), Ratioless dynamic enhancement shift register, CMOS
shift register (CMOS TG logic), Semiconductor Memories, DRAM: -RD/WR, One
transistor DRAM Cell, Three transistor DRAM, Memory cells, SRAM Cells,
Pseudo Static RAM

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Price: Rs 23.76

Pages: 12

Semiconductor Integrated Circuit Design

Introduction, The masked gate array asic, The evolution of programmable
devices, Advantages of PLDs, Programmable Read Only Memories (PROMs),
ROM used as PLD, Programmable Logic Arrays (PLAs), Programmable Array
Logic (PALs), Comparison of PROM, PLA and PAL, CPLDs, Complex
Programmable Logic Devices (CPLDs), CPLD Architectures, Function Blocks, I/O
Blocks, Interconnect, Programmable Elements, CPLD......

Pages: 67

Total views (731)

Price: Rs 104.58

Design Methodologies
Design Strategies, Introduction, Structured Design Strategies, Design
Hierarchy, Concepts of Regularity, Modularity and Locality, Design Methods,
Design Synthesis, Behavioral Synthesis, RTL Synthesis, Logic optimization,
Structural-to-Layout Synthesis, Layout Synthesis, Design- capture Tools, HDL
Design, Schematic Design, Layout Design, Floor Planning, Chip Composition,
Design Verification Tools, ......

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Price: Rs 21.66

Pages: 23

Practical Aspects, Testing and Testability

Practical aspects in VLSI Design, Performance parameters, Optimization of
nMOS and CMOS inverters, Noise margins, Floorplan, Design for Testability,
Introduction, Fault Types and Models, Controllability and Observability, System
Partioning, Ad Hoc Testable Design Techniques, Scan-Based Techniques, BuiltIn Self Test (BIST) Techniques, Level Sensitive scan Design, Boundary Scan Test
(BST), Built-In......

Total views (734)

Price: Rs 106.26

Pages: 25

Trends in Low-Power VLSI Design

Introduction, Importance of Low-Power CMOS Design, Sources of Power
Consumption in CMOS, Dynamic Power Dissipation, Short Circuit Power
Dissipation, Static Power Dissipation, Power Consumption Considerations,
Supply Voltage Level, Device Threshold Voltage, Physical Capacitance,
Switching Frequency, Energy versus Power, Optimization Metrics, Techniques
for Power Reduction, System Level, Architectur......

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Price: Rs 32.58

Pages: 26

Field Programmable Gate Arrays and Applications

Introduction, FPGA Structural Classification, Symmetrical arrays, Row based
architecture, Hierarchical PLDs, FPGA Classification on user programmable
switch technologies, SRAM Based, Antifuse Based, EEPROM Based, Logic Block
and Routing Techniques, Xilinx Logic block, Altera Logic Block, FPGA Design
Flow, System Design, I/O integration with rest of the system, Design
Description, Synthesis, Desig......

Pages: 17

Total views (737)

Price: Rs 28.32

Introduction to VHDL
Introduction to VHDL, VHDL versus conventional programming languages, The
VHDL Design Flow, Levels of representation and abstraction, Basic Structure of
a VHDL file, Entity, Entity Declaration, Architecture body, Behavioral model,
Concurrency, Event Scheduling, Structural Method, Dataflow Method, SwitchLevel Description, VHDL signal and signal assignment, Selected signal
assignment, Delays, VHDL ......

Pages: 50

Total views (736)