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5. Vary load resistance and measure input current, load current, input voltage output
dv
voltage and turn off time ' t q 's ' and
of reapplied forward voltage.
dt
6. Repeat B1 and B5 with an inductance in series with the load.
Study of effect of Isolating diodes
1. Connect the isolating diodes as shown in fig. 2.
2. Connect a resistive load (50) and repeat B5. Observe also the voltage across the
commutation Capacitor C1 and C2 . Compare t of B-5 & C-2 the equal value of
DC supply voltage and load resistance.
3. Repeat B-6.
To study the off set of the commutation inductance
1. Connect a variable inductance L in series with the DC. Supply voltage, 0.1 ohm
shunt is connected in series. Connect the Power circuit as in Fig. 1.
dv
2. With load resistance and DC supply voltage kept constant observe t q and
for
dt
dv
. (Ground leads of
various values of the inductance. Tabulate t q Vs
dt
oscilloscope probes are connected to Z and Live1 to P and Live2 to X to
simultaneously observe the two quantities).
Study of a Voltage source Inverter (VSI)
1. Connect up power circuit as per fig. 3. The load is the 50 resistance.
2. Observe voltage waveform across the capacitors, the load resistance and the
thyristor. Note dv/dt of reapplied forward voltage.
3. Measure di/dt through any of the thyristors by connecting the 0.1 ohm in series
with it and observing voltage waveform across it.
Questions:
1. Why do the firing pulse at the gate of the thyristor change their shape and
amplitude when the thyristor conducts?
2. Why does the load voltage increase when the load is reduced?
3. What is the relationship between the triggering period T and the R-C time
constant it the maximum voltage across the capacitor (C.S.I.) is twice the supply
voltage?
di dv
4. Compare the
ratings of the thyristors in similarly rated C.S.I. and V.S.I.
,
dt dt
Suppose initially load current was flowing through Th2, D2, D2 and Th2.i.e
.
Here we have assumed vL is remaining constant at vL0 in the commutation period. As the
load is of lagging power factor vL0 is negative. Now Th1 and Th1 are triggered. For
making those on C1 and C2 should have the polarity shown below.
Fig.2:
As soon as Th1 and Th1 are on negative voltage will come across Th2 and Th2. So
these will stop conducting.
Mode I
Fig.3:
Current will follow this path until D1 and D1 are forward biased. Capacitor voltage will
decrease linearly as discharge current is constant.
Here
as
and
diodes will start conducting.
Mode II
Fig.4:
and
; as C1=C2.Now,
When
current starts flowing through Th1, D1, D1 and Th1.Capacitor voltage
remains fixed at that value.
Fig.5:
Resistive load:
Fig.6:
Fig.7:
Here,
Fig.8:
R-L load:
1. Connect inductance in series with the R load.
2. Check the waveforms stated above. Commutation time will increase in
this case.
Mode I
Fig.9:
When
Mode II
Fig.10:
Here,