Fluctuation Voltage Control and Fault-Tolerant Operation of Modular Multilevel Converters With Zero-Sequence Injection

INTERNATIONAL TRANSACTIONS ON ELECTRICAL ENERGY SYSTEMS
Int. Trans. Electr. Energ. Syst. 2014; 24:944959

Published online 17 April 2013 in Wiley Online Library (wileyonlinelibrary.com). DOI: 10.1002/etep.1743
Fluctuation voltage control and fault-tolerant operation of modular

multilevel converters with zero-sequence injection
Shuang Li*,, Zhixin Wang and Guoqiang Wang
School of Electronic, Information and Electrical Engineering, Shanghai Jiaotong University, Minhang District 200240,
Shanghai, China
SUMMARY
This paper focuses on voltage uctuation mitigation and fault-tolerant control methods for modular multilevel
converters (MMC). The reason for MMC output uctuation caused by the oating capacitor voltage uctuation
at low frequency is carefully analyzed. To reduce voltage uctuation, two control freedom degrees of highfrequency zero-sequence voltage and phase-to-phase circulating current are proposed. In fully implementing
MMC functionalities, we comprehensively investigated its fault-tolerant operation without redundant
submodules for fail-safe energy transfer. A fundamental-frequency zero-sequence-based neutral-shift method
is adopted to enable continuous operation and avoid complete shutdown of the MMC system. These methods
enhance both the reliability and availability of MMC while avoiding the undesired unbalanced stresses among
the healthy submodules. Rigorous simulation studies are performed to demonstrate the validity and effectiveness of the proposed control methods. Copyright 2013 John Wiley & Sons, Ltd.
key words:
modular multilevel converters (MMCs); oating capacitor voltage uctuation; zero sequence;
circulating current; fault-tolerant operation; VSC-HVDC
1. INTRODUCTION
Advanced power electronic equipment has been increasingly demanded, along with the deregulation of
the international electricity market and the trend of distributed power generation [14]. Modular
multilevel converters (MMCs) have become a highly attractive topology in medium-power and
high-power energy conversions. Because of its modular structure, it can reach high-voltage conversion
with high quality of the output voltage/current waveforms without using line-frequency transformers
or series-connected switching devices. Thus, the semiconductor stresses are reduced signicantly.
Furthermore, the considerably lower switching frequency of MMC provides lower losses compared
with the two-level converter. A schematic of three-phase MMC is shown in Figure 1.
The concept of MMC was rst introduced by Marquardt and Lesnicar [5], and several research
teams studied its operation principles lately [69]. MMC is much suitable for voltage-sourced
converter high-voltage direct-current and wind power generation applications compared with other
multilevel topologies, because it can control the power ow accurately with high efciency and reduce
operating costs and environmental impact [1013].
A linear time-varying model [14] has been developed to analyze the steady-state performance of
MMC, whereas its dynamic behavior was presented in [15]. A continuous mathematical model of
MMC was established in [9], and inner energy controllers were proposed to stabilize the oating
capacitor (FC) voltage. The balance of capacitor voltage among the submodules (SMs) is one of the
key problems in MMC, because the FC voltage variation could lead to circulating current among
*Correspondence to: Shuang Li, School of Electronic, Information and Electrical Engineering, Shanghai Jiaotong
University, Minhang District 200240, Shanghai, China.
E-mail: cooleels@126.com
Copyright 2013 John Wiley & Sons, Ltd.
FLUCTUATION VOLTAGE CONTROL AND FAULT-TOLERANT OPERATION OF MMC
945
Figure 1. Schematic of a three-phase modular multilevel converter and its submodule.
the three phase legs, which distorts the sinusoidal arm current and increases the power loss. Averaging
and balancing control methods for the FCs of MMCs were veried by theoretical analysis and experiments in [11]. Reference [16] introduced a new pulse width modulation (PWM) scheme for an
arbitrary number of MMC voltage levels and illustrated semiconductor losses. A reduced switchingfrequency voltage-balancing algorithm was proposed in [17]; meanwhile, a new circulating currentsuppressing controller was designed to suppress the circulating current of MMC. However, the method
of eliminating the FC voltage uctuation, which will suppress the output power uctuation at low frequency [18] and decrease the cost of MMC with small capacitance of capacitors, is rarely mentioned.
There are a large number of SMs in each arm of MMC with redundancy, which is one of the most
prominent features in MMC topology [6,9]. If there are one or more faulty SMs, they can just be
bypassed by the bypassing switches as shown at the right of Figure 1, and the MMCs can continue
to operate with the redundant SMs. However, when an extreme emergency or catastrophic failure
happens, the number of faulty SMs will exceed the designed redundancy. Therefore, we need to design
an effective control strategy to maintain the operation without interruption.
The so-called fault tolerance for a cascade H-bridge multilevel converter has been investigated in
literature [1921]. Generally, to keep feeding balanced line voltages to the load under fault conditions,
two control strategies can be achieved. The rst one is to bypass an equal number of the faulty power
cell per phase. However, the output voltage level and power rating are decreased. Thus, this approach
is often used in critical applications at the expense of cost and efciency. To overcome this limitation,
the second strategy is to bypass the faulty power cell only, without needing the redundant power cell.
The second category can tolerate a fault of a few faulty power cells and achieve maximized amplitude
of the output line voltage. Despite the tolerable degree of reduction in voltage and power being different in various applications, it is better in terms of avoiding complete shutdown. In [20], several
operation methods for fault conditions are compared, such as neutral shift and peak reduction with
common-mode voltage injection. Fault-tolerant control with zero-sequence injection for multilevel
STATCOM is discussed in [22]. Most literatures have been limited to the cascade H-bridge multilevel
topology. There is no report addressing the balancing of output line voltage during the occurrence of
fault in the MMC without redundancy yet.
Therefore, this paper addresses the two issues of MMC mentioned before (i.e., the FC voltage
uctuation suppression and fault-tolerant operation). Both of them are approached by zero-sequence
injection [23]. The fault-tolerant control method proposed in this paper belongs to the second category

DOI: 10.1002/etep
946
S. LI ET AL.
with an appropriate neutral shift, which can balance the output line voltage. This can be used for the
MMC conguration in combination with the techniques developed in this paper.
This paper is organized as follows. Section 2 briey describes the structure of MMCs and the concept of the zero-sequence signal injection. The characteristic of SM voltage uctuation is investigated
in Section 3, and the mitigation process of voltage uctuation has been studied carefully. The zerosequence injection method has been proposed to control the MMC under fault conditions in Section 4.
Section 5 provides simulation results. Finally, the conclusion is drawn in Section 6.
2. BASIC MODULAR MULTILEVEL CONVERTER STRUCTURE AND THE CONCEPT OF

ZERO SEQUENCE
2.1. Basic structure of modular multilevel converter
Six identical arms comprise the three-phase MMC as shown in Figure 1. The upper (positive) and
lower (negative) arms have the same number of n SMs and one noncoupled buffer inductor Lz. The
two strictly symmetrical arms comprise one phase leg [24].
A single SM consists of one FC (CSM) and two insulated-gate bipolar transistor switches (T1 and T2)
that form a bidirectional buck-boost power unit as shown on the right side of Figure 1. The working
states of switches T1 and T2 are complementary. When T1 is switched on (T2 switched off), the SM output voltage is USM = Uc, and USM = 0 when T1 is switched off. This means that every SM has two normal working states: switched on (USM = Uc) or switched off (USM = 0) [25].
In Figure 1, P and N stand for the positive and negative poles of a direct current (DC) bus, and point
O is the hypothetical neutral point of the DC bus. The maximum output voltage level for each phase is
n + 1, and the line-to-line voltage is 2n + 1 with an equivalent carrier frequency of 2n fs [26]. The
topology structure of MMCs is highly modular, and the SMs can be used as a redundancy backup with
strong scalability and exibility. In the following analysis, attention is paid to phase leg A because the
operating principle in each phase leg is identical and independent of each other [11].
With Kirchhoffs voltage law, the following circuit equation exists:
Udc
2n
X
ujk Lz
j1

d
ipk ink
dt
(1)
where Udc is the DC bus voltage and Udc = nUc. ipk and ink (k = a, b, c) are the upper and lower arm
currents of three phases, respectively. ujk is the output voltage of SM numbered j in phase leg k.
The inner circulating current iza along phase leg A and DC loop can be dened as

1
ipa iao =2 iza
(2)
iza ipa ina
ina iao =2 iza
2
where iao is the output line current of phase leg A.
Similarly, the voltages of positive and negative arms in phase leg A can be expressed as

upa udc =2 uao
una udc =2 uao
(3)
where uao is the output phase voltage corresponding to the hypothetical neutral point O.
2.2. The principle of zero-sequence signal injection
Generally, the reference modulation signals uref-i(t) (i = a, b, c) for the three-phase carrier-based PWM
can be expressed as [23]
uref -i t ui t ci t
(4)
where ui t is the fundamental component and ci(t) is the zero-sequence component. ui t stands for
either voltage or current of a symmetrical three-phase sinusoidal signal. When the zero-sequence components are injected into the three-phase modulation signal at the same time, they will not appear in the

DOI: 10.1002/etep
947
line voltages and can be used as a lever to achieve different control objectives. It can be used to, for
example, reduce the circulating current, eliminate harmonics, balance the neutral-point potential, and
suppress common-mode voltage [2729].
For an n + 1-level MMC, it can take the negative DC bus point N as the zero potential and 1/n of the
DC link voltage as the base value; the phase voltage reference with respect to the zero potential can be
normalized within the range [0, n]. Therefore, the range of zero-sequence signal is derived as [23]
umin t ci t n umax t

where umin t min ua t ; ub t ; uc t and umax t max ua t ; ub t ; uc t .
(5)
3. THE MITIGATION METHOD FOR FLOATING CAPACITORS SYSTEM VOLTAGE

FLUCTUATION
The stability and economy of MMC are affected by the parameters of SMs strongly [24]. The method
of FC voltage-balancing control has been studied in technical literature [11,25]. Here, the FC voltage
uctuation will be investigated carefully.
Assuming that the phase A (Figure 2) output voltage is uao = Umsinot = (mUdcsinot)/2 and the corresponding output current is iao = Imsin(ot ) (Um is the peak voltage, Im is the peak current, and is the
phase difference between uao and iao, when = 0; it is in unit power factor mode; the modulation ratio is
m = Um/(Udc/2), and o is the grid frequency), thus, the instantaneous output power of phase leg A is
Pao uao iao Um Im sinot sinot
(6)
The power transmits from the DC bus to the three-phase load through the FCs of the arms, and the
circulating current in each phase leg provides the charging/discharging current to FCs. Assuming that
the instantaneous total energy stored in the FCs is constant, with the energy conservation law, the circulating current for phase A can be obtained:
Pao Um Im sinot sinot
(7)
Udc
Udc
Meanwhile, the instantaneous output powers of the positive and negative arms can be derived from (2)
and (3):
2

Im sinot Udc
4Um2 sin2 ot
(8)
Ppa upa ipa
4Udc

2
Im sinot 4Um2 sin2 ot Udc
Pna una ina
(9)
4Udc
2

4Um2 sin2 ot 0.
As the feature of MMCs mentioned in Section 2, there is Um udc/2, so Udc
From (8) and (9), two conclusions can be drawn:
iza
Figure 2. Equivalent circuit of modular multilevel converter phase A.


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S. LI ET AL.
(1) The output powers of upper and lower arms are complementary, and the total energy stored in
the FCs of one phase leg remains constant.
(2) The FCs in the upper and lower arms are charged and discharged periodically, but the total
power is balanced within a period.
Therefore, the periodic uctuation of output energy of the arms caused by the stored energy variation of FCs can be integrated from (8) or (9) as
2

Z t2
Z t2
Im 3 Udc
4Um2 1 cos2
(10)
Ppa dt
Pna dt
w
6Udc o
t1
t1
where t1 and t2 are the zero crossing points of the half uctuation cycle,

ot1
ot2 p
2

2
4Um2 1 cos2 Udc
; thus,
Similarly as before, there exists 3Udc
(11)
Im Udc
(12)
6o
From (12), it is clear that w is proportional to the output current Im (or the output power rating) and
inversely proportional to the frequency o, when the parameter of output DC link voltage Udc of MMC
is preset. In other words, the higher the output current (or power rating) of MMC, the more is the
output power and the FC voltage, and conversely for the frequency o.
If we combine the voltage ripple coefcient e of the FCs, the following relationship can be obtained:
h
i w
1
CSM Uc2 1 e2 1 e2
(13)
2
n
where e = |Uc|/Uc and UC is the voltage uctuation of FC.
Thus, the voltage ripple coefcient e can be derived as
2

Im 3Udc
4Um2 1 cos2
w
Im Udc
4Um2 1 cos2
(14)
3

e
2
12nUdc oCSM Uc2
12noCSM Uc2
2nCSM Uc2
Udc
w
The analytical expression of e in (14) gives the same conclusion about the inuences of Im and o to
the uctuation as shown in (12). As is known, the FC is one of the key factors that determine the total
cost and the space occupation of the MMCs. The voltage uctuation of FCs will affect its performance
and stability.
To mitigate the voltage uctuation of the FCs, one effective way is to increase the output frequency
o when the number of SMs and the current (or power) rating of MMC are already set. However, the
output voltage frequency of MMC is maintained at a x value, such as 50 Hz for grid connection.
Alternatively, to increase the uctuation frequency of output power is an equivalent method although
some other control degrees of freedom (DOF) are needed.
As mentioned in Section 2.2, the zero-sequence component will not affect the output line voltage of
the balanced three-phase MMC. Therefore, a high-frequency zero-sequence voltage uz can be used as
one DOF [18]. On the other hand, the circulating current exists not only within the phase leg and the
DC link (iz) but also between the phase-to-phase currents (ipcc) [17]. Meanwhile, the phase-to-phase
circulating current (PPCC) ows among the three phase legs; it affects neither the output current nor
the DC-to-phase circulating current. Therefore, high-frequency ipcc can be injected into the phase legs
as the second DOF to mitigate the uctuation.
Therefore, the uctuation frequency of output power can be increased by superimposing the two
control DOFs (uz and ipcc) proposed earlier. The voltage and current of upper and lower arms in phase
leg A can be rewritten as
h
upa udc =2 uao uz
(15)
uhna udc =2 uao uz
h
ipa iao =2 iza ipcc
(16)
ihna iao =2 iza ipcc

DOI: 10.1002/etep
949
where the superscript h stands for the high-frequency variable, and the zero-sequence voltage uz can be
dened as
uz Uz sinoh t
(17)
where Uz is the amplitude of the high-frequency zero-sequence voltage.

From (7) and (15)(17), the output powers of the positive and negative arms can be rewritten as

1
Phpa uhpa ihpa Im sinot 2Um Im sinot sinot =Udc 2 ipcc
(18)
4
Udc 2Um sinot 2uz Ph1 Ph2 Ph3
Phna uhna ihna Ph1 Ph2 Ph3
where the Ph1 ; Ph2 ; Ph3 are the desired high-frequency components of output power as follows:

Udc Um2 sin2 ot
h

P1 ipcc uz Im sinot
4
Udc

Im uz sinot
Ph2 U m sinot ipcc
Udc

h
P3 Im uz sinot ipcc Udc =2
(19)
(20)
(21)
(22)
There are high-frequency uctuations in Ph2 and Ph3 obviously. If the output powers Phpa and Phna are
high-frequency components, Ph1 should also be a high-frequency component the same as Ph2 and Ph3 ;
otherwise, it should be equal to 0. However, there exists a low-frequency component in Ph1 (second part
of Equation (20)). We assume that the product of ipcc uz contains the low-frequency component,
which exactly eliminates the low-frequency component in Ph1 . Therefore, with (17) and (20), ipcc can
be given as
"
#
"
#

Udc Im sinot 2Um sinot 2
Udc iao
2uao 2
ipcc
1
1
(23)
4Uz sinoh t
Udc
4Uz sinoh t
Udc
Then, by substituting (17) and (23) into (20), Ph1 can be obtained as a zero component
Ph1 0
(24)
However, the PPCC is harmful to the stability of MMC [17], for the reason that it increases the loss,
reduces the safety margin of the switching device, shortens the lifetime of FCs, and so on. Thus, the
magnitude of ipcc should be minimized by increasing the zero-sequence voltage amplitude Uz in (23).
To avoid overmodulation, the maximal magnitude of Uz can be chosen as follows:
Udc
; with m 2 0; 1
(25)
U z 1 m
2
Thereby, the FC voltage uctuation problem can be solved by injecting the two control DOFs, uz
and ipcc, as shown in Figure 3. The DC energy storage requirement is decreased. Therefore, the cost
and space occupation of FCs are reduced.
4. MODULAR MULTILEVEL CONVERTER FAULT-TOLERANT CONTROL

Because of numerous electrical or environmental factors in operation, the SMs of MMC are vulnerable
to certain types of failures [30]. However, it is highly desired that the operation (i.e., energy transfer)
continues until the next shutdown schedule for maintenance, even if an individual SM malfunctions
[31]. Once either an insulated-gate bipolar transistor switch or a FC failure is detected, the corresponding defective SM is bypassed immediately by a set of two thyristor switches or a bypass contactor to
short circuit its alternating current (AC) terminals [5] (as shown in the SM of Figure 1). During this
period, the SM terminal voltage is 0 regardless of the gate trigger signals. Meanwhile, the redundant
SMs within the corresponding arms are cut in instantaneously. They can keep the MMC operating
at the voltage/power rating without interruption as shown in Figure 4(a).

DOI: 10.1002/etep
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S. LI ET AL.
(a)
(c)
(b)
Figure 3. Equivalent circuit for phase leg A of modular multilevel converter. (a) Without injection of the
high-frequency zero-sequence voltage and phase-to-phase circulating current (PPCC); (b) only the highfrequency zero-sequence voltage and PPCC; (c) with injection of the high-frequency zero-sequence voltage
and PPCC.
C
C
.O(M)
B
zero-sequence voltage
injection
. .M
(a)
(b)
Figure 4. Phasor diagram of submodel voltage with n = 4. (a) Normal operation, (b) one SM fault in the
phase leg A with the injection of zero-sequence voltage (O, neutral point of modular multilevel converter;
M, neutral point of the load).
Even though the redundant SMs are exhausted by one SM fault after another, the system must continue to operate. To make the following fault-tolerant analysis more clear, a ve-level (n = 4), threephase MMC without redundant SMs is taken as an example, and there is a single SM fault in the upper
arm A. The MMC with a higher level count can be analyzed with the same procedure.
It is assumed that the FC voltages of the healthy SMs are balanced. When one upper faulty SM is
bypassed, another healthy SM in the corresponding lower arm should be bypassed for the balance
of output phase voltage. Because the DC link voltage Udc depends on the number of SMs, Udc = nUc
as mentioned before, and the modulation index m of the phase leg A should be increased by a factor of
n/(n 2) so as to maintain a three-phase balanced line-to-line voltage [19].
Udc
Uc
n
Uc
sinot mn
sinot
sinot
(26)
mn 2
uao m
2
2
2
n2
However, this will increase the 3n 2 healthy SM burden. Maharjan et al. [19] used zero-sequence
voltage injection for clustered balancing control of a battery energy storage system based on a cascade
PWM converter. Moreover, Betz et al. [22] studied the zero-sequence injection for capacitor voltage
balancing in a cascaded converter-based STATCOM. Therefore, it can adopt the neutral-shift method
based on zero-sequence voltage injection to share the burden of all the other 3n 2 healthy SMs of

DOI: 10.1002/etep
951
MMCs. The control method for the half-bridge module topology of MMC is based on [19], but rather
than using separated converter cell energies, the total energy stored in an arm is used instead.
The injected fundamental-frequency zero-sequence voltage uof is chosen to be out of phase by 180
with the phase containing the fault SM as shown in Figure 4(b). Then, from (3) and (4), the arm
voltage with the rest of the healthy SMs can be expressed as follows:

upi udc =2 uio uof
i a; b; c
(27)
uni udc =2 uio uof
where uof = Ufmsinot.
With the similar method as described in Section 3, the electric energy stored in the phase legs can be
calculated with (2) and (27) as follows:
Z 2p=o
Z 2p=o
upi ipi dt
uni ini dt
i a; b; c
(28)
wi
0
The energy stored in each phase leg should be equal to avoid increasing the PPCC and to balance the
burden of the rest of the SMs. Thus, from (28), the following equation can be obtained:
2
Ufm
mudc
(29)
n 2n
This means that the modulation index m is increased equally to the rest of healthy SMs of the phase
legs. Therefore, with the neutral-shift method proposed earlier, the output line-to-line voltage can be
operated at the rated voltage or power even during one SM failure without the redundant SMs.
5. MODULAR MULTILEVEL CONVERTER CONTROL SYSTEM AND SIMULATION

RESULTS
5.1. Control system of modular multilevel converter
The strategy of a double-closed-loop vector control is commonly used for PWM converters [32].
Usually, the outer loops are DC voltage or power loop where proportional integral regulators are used.
The outputs of the proportional integral regulators in the outer loop are the current inner-loop inputs.
However, there exists current coupling between the active current (in d-axis orientation) and reactive
current (in q-axis orientation). Here, the feed-forward decoupling strategy is adopted to decouple the
dq-axis currents, which can improve the system dynamic response [4]. Its mathematical expression
in a synchronous rotating dq frame is [33]
8
di
u ucq
R
>
< q iq og id sq
dt
L
L
(30)
>
: did R id og iq usd ucd
dt
L
L
where og is the synchronous speed of the grid, usd and usq are grid side voltages, ucd and ucq are converter side voltages, and id and iq are line currents in dq-axes, respectively.
The control block diagram is shown in Figure 5. Zs is the equivalent impedance of the AC system.
R1 and L1 are the equivalent resistance and inductance of input reactors, respectively. uu,v,w and iu,v,w are
the three-phase AC voltage and current, respectively. usd and usq are the grid voltage and id and iq are
the converter currents in two-phase synchronous rotating reference. id and id are their reference values.

Udc, P, and Q are the DC voltage, active power, and reactive power, respectively, and Udc
; P ; and Q are
their reference values.
With the analog-to-digital sampling, the AC voltage/current of MMC is measured by its control system. With the phase lock loop, the voltage angle can be obtained. From the DC bus voltage outer loop,
we can obtain the real power P. After the Clark transform, the voltage and current in the dq-axes are
sent into the current inner loop with their reference values. The output of the inner current loop is the
voltage vector reference. Then they are injected with the zero-sequence voltage after the inverse Clark
transform. At last, the trigger pulses for each SM are generated by the modulator with the voltage uctuation mitigation method proposed in this paper.

DOI: 10.1002/etep
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S. LI ET AL.
Figure 5. Structure of the modular multilevel converter control system. PI, proportional integral; PLL,
phase-lock-loop.
5.2. Simulation results and analysis

To validate the effectiveness of the proposed control method in this paper, the MMC system described
previously was built and simulated using the power system blockset (PSB) under the MATLAB/
Simulink environment. However, considering the limitation of the simulation speed, the number of
SMs is reduced. The parameter normalization is based upon the system power rating (1 MVA) and
AC line voltage (2 kV). According to the assumption before, the number of SMs per arm is four without any redundancy. The output line-to-line voltage is a nine-level (2n + 1 = 9) waveform. The objective of the simulation is to demonstrate the performance of the double-closed-loop vector-controlled
MMC with the proposed voltage uctuation mitigation technology and the fault-tolerant control
method.
To verify the voltage uctuation mitigation technology for the MMC, we rst use a typical MMC
system, connected between one DC voltage source and a three-phase balanced load. The DC bus
voltage is set to 4 kV, the FC voltage of MMCs are precharged to 1 kV, and the reactive power reference is 0. With the control structure specied in Figure 5, the steady-state simulation waveforms of the
MMC without mitigation control of the FC voltages are shown in Figure 6.
The waveforms of AC side voltage and current in Figure 6(a) are out of phase, and MMC is operated
under an inverter mode. The output of AC voltage and current is nearly pure sine wave without a passive lter. Because of the good feature of MMCs, the output line-to-line voltage is a nine-level waveform as shown in Figure 6(b), and the equivalent switching frequency is increased. Figure 6(c) shows
the ve-level PWM waveforms of three phase-to-neutral voltages. The voltages of each FC maintained
their balance, depending on the capacitor sorting strategy [11], without voltage uctuation mitigation
technology as shown in Figure 6(d). The FC voltages of phase leg A, Usm1~sm4 in the upper arm and
Usm5~sm8 in the lower arm, are kept consistent. Namely, the FC voltages are kept balanced within their
respective arms, but there are about 80 V uctuations. The uctuation can affect the system
performance.
Figure 7 shows the injection of the two control DOFs proposed in this paper. At t = 0, the aforementioned two control DOFs of high-frequency zero-sequence voltage and phase-to-phase circulating current are injected. After 0.1 s, the amplitude of uctuation decreased to 20 V or less.
Figure 8 shows the step response of P* changes from 0.4 pu to 0.4 pu with the voltage uctuation mitigation method. During this step changes, the phase between voltage and current is
reversed smoothly as shown in Figure 8(a). The PWM waveform of the line-to-line voltage is
shown in Figure 8(b). The voltage uctuations of the eight FCs in phase leg A increase to
40 V during the transient process as shown in Figure 8(c). When the periods around t = 0 of
Figure 8(c, d) are compared, the corresponding modulation ratio in Figure 8(d) is larger than 1,
which means overmodulation. Thus, neither high-frequency zero-sequence voltage nor PPCC was

DOI: 10.1002/etep
953
(a)
(b)
(c)
(d)
Figure 6. Output waveforms of modular multilevel converter during normal operation. (a) Phase A output
voltage and current (pu). (b) Nine-level pulse width modulation waveform of line-to-line voltage (pu). (c)
Five-level pulse width modulation waveform of three line-to-neutral voltages (pu). (d) Voltage uctuation
of oating capacitors in phase leg A.
Figure 7. Floating capacitor voltage of phase leg A with voltage uctuation control at t = 0. SM, submodel.

DOI: 10.1002/etep
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(a)
(b)
(c)
(d)
Figure 8. Output waveforms of modular multilevel converter with voltage uctuation mitigation. (a) Phase
A output voltage and current (pu). (b) Pulse width modulation waveform of line-to-line voltage (pu).
(c) Voltage uctuation of oating capacitors in phase leg A. (d) Modulation ratio.
injected into the control system. Fortunately, the capacitor sorting strategy still works during this
short period (about 90 ms), and it can maintain the voltage balance within 55 V before the modulation ratio returns to normal range and the mitigation strategy functions again. There are many

DOI: 10.1002/etep
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(a)
(b)
Figure 9. Alternating current side voltage waveforms of the modular multilevel converter during faulttolerant operations. (a) Line-to-neutral voltages. (b) Line-to-line voltages.
control strategies about overmodulation, and a detailed explanation is beyond the scope of this
paper. These simulation results show the correctness and effectiveness of the proposed uctuation
mitigation method for FCs of MMC.
In the following, simulation was carried out under the same conditions as before to test the faulttolerant method. According to the assumption of this paper, there are four SMs in each arm, without
redundant SMs. Assuming time t = 0, SM1 in the upper arm of phase leg A was bypassed for fault condition, and one SM (such as SM8) in the corresponding lower arm should be bypassed also. Figure 9
shows different voltage waveforms during a fault-tolerant operation. Because two SMs in phase leg A
were bypassed, the rest of the six healthy SMs can only form four-level output phase-to-neutral voltage
as shown in the upper part of Figure 9(a). The other two phase legs have ve-level output phase-toneutral voltage as shown in the bottom part of Figure 9(a). Meanwhile, the corresponding three lineto-line voltages are shown in Figure 9(b). The voltage level of Uab and Uca is degraded during the
fault-tolerant operation, whereas the Ubc has nine levels as well. Although the fundamental components of the line-to-neutral voltages are not balanced, those of line-to-line voltages with zero-sequence
injection in Figure 9(b) were well balanced.
Figure 10 shows the transient waveform after the two SMs bypassed during the fault-tolerant operation. The three balanced line-to-line voltages and currents are shown in Figure 10(a). Although the
currents are uctuant and unbalanced at the beginning of t = 0 for the increase of PPCC among three
phase legs, the currents return back to the balanced state (within 60 ms) smoothly with the help of
the voltage uctuation mitigation and neutral-shift methods proposed in this paper. The FC voltages
of phase leg A were enlarged in Figure 10(b). There are some increases of voltage uctuation during
this transition as shown in Figure 10(b). Because two SMs were bypassed, the burden was equally
increased among the rest of the healthy SMs. Note that the two bypassed SMs were discharged to
0 in Figure 10(b). These simulation results show that the neutral-shift method with zero-sequence voltage injection has the ability of improving the reliability without redundant SMs; it can maintain the
MMC continuous operation just by bypassing the faulty SM and its corresponding SM in the complementary arm.

DOI: 10.1002/etep
956
S. LI ET AL.
(a)
(b)
Figure 10. Transient waveforms when the SM1 and SM8 of phase leg A were bypassed at t = 0. (a) Corresponding phase voltage, line current, and oating capacitor voltages (from top to bottom). (b) Zoomed-in
image of oating capacitor voltage uctuations in phase leg A.
6. CONCLUSION
In this paper, the FC voltage uctuation problem of MMC is comprehensively studied. The uctuation magnitude of capacitor can be reduced by injecting two control DOFs of high-frequency
zero-sequence voltage and phase-to-phase circulating current. Meanwhile, the fault-tolerant operation
of the MMC without redundant SMs was specically investigated in this paper. It can be achieved by
injecting the fundamental-frequency zero-sequence voltage during one SM fault. With the proposed
methods in this paper, the MMC can maintain continuous operation with balanced line-to-line voltage.
It can improve the MMC system performance and reduce the occupied space signicantly.
Simulation results conrm the validity and effectiveness of the zero-sequence injection methods
proposed in this paper. The conclusion is benecial to further studies such as implementation in a digital process system base on digital signal processing and eld-programmable gate arrays. It may also
provide a feasible cost-effective solution for the MMC engineering because it can reduce the capacitance of FCs and the number of SMs in each arm.
7. LIST OF SYMBOLS
n
Lz
CSM
T1,2
Uc
USM
fs
number of submodules per arm

noncoupled buffer inductor
oating capacitor of submodule
insulated-gate bipolar transistor switches of submodule
submodule oating capacitor voltage
submodule terminal voltage
switching frequency of each submodule

DOI: 10.1002/etep
Udc

Udc
ipa,b,c, ina,b,c
ujk
iza
iao
uao
upa,una
uref-a,b,c
ui
ci
Um
Im
m
o
Pao
Ppa, Pna
w
e
Uc
h
Uz
uof
usd,usq
ucd, ucq
id,iq
id ; iq
og
Zs
R1, L1
uu,v,w,iu,v,w
P, Q
P*, Q*
Usm1~sm4, Usm5~sm8
MMC
FC
SMs
DOF
PPCC
957
DC bus voltage
reference of DC bus voltage
three-phase positive and negative arm currents
output voltage of SM numbered j in phase leg k
inner circulating current along phase leg A and DC loop
output line current of phase leg A
output phase voltage
voltages of positive and negative arms in phase leg A
reference modulation signals
voltage or current of symmetrical three-phase sinusoidal signal
zero-sequence component
peak amplitude of phase voltage
peak amplitude of current
phase difference between uao and iao
modulation ratio
grid frequency
instantaneous output power of phase leg A
instantaneous output power of the positive and negative arms
instantaneous output energy
voltage ripple coefcient of FC
voltage uctuation of FC
superscript stands for the high-frequency variable
amplitude of high-frequency zero-sequence voltage
fundamental-frequency zero-sequence voltage
grid voltages in dq-axes
input voltages of converter in dq-axes
line currents in dq-axes
reference of line currents in dq-axes
synchronous speed of network
impedance of an AC system
equivalent resistance and inductance of input reactors, respectively
three-phase AC voltage and current
active power and reactive power, respectively
given values of active and reactive power, respectively
the FC voltages of the upper and lower arms, respectively
modular multilevel converter
oating capacitor
submodules
degrees of freedom
phase-to-phase circulating current
ACKNOWLEDGEMENTS
This work was supported in part by the Key Program of National Natural Science Foundation of China
(60934005), The National High Technology Research and Development of China 863 Program
(2011AA05AA103), the Key Program of Shanghai Commercialization of High and Innovative Technologies
(2009-041), Foundation of Shanghai Education Development (2010LM26), the six talents peak project of
Jiangsu Province (2010-XNY-001), and the Science and Technology Development Foundation of Shanghai
(11195802100).
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DOI: 10.1002/etep

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