Professional Documents
Culture Documents
DATE: 01/02/2015
Section Name :
01.
General Aptitude
04.
Fill
in
the
blank
with
the
correct
idiom/phrase.
That
boy
from
the
town
was
02.
05.
matches?
(A) 20
(B) 10
(C) 8
(D) 5
Ans: (B)
03.
(A) True
(B) False
(C) Uncertain
Ans: (B)
06.
two
conclusions.
Assuming
these
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:3:
1. No manager is a leader.
2. All leaders are executives.
Conclusions:
1 No manager is an executive.
2 No executive is a manager.
(A) Only conclusion I follows.
(B) Only conclusion II follows.
(C) Neither conclusion I nor II follows.
(D) Both conclusions I and II follows.
Ans: (C)
07.
(A) 110
(B) 1,100
(C) 9,900
(D) 10,000
Ans: (C)
10.
U
P
T
S
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:4:
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Section Name :
01.
Instrumentation Engineering
04.
reverse
transfer to RL is
current,
the
average
power
RS
(A) 0
Ans: 0.25W
A light detector circuit using an ideal photodiode is shown in the figure. The sensitivity
of the photo-diode is 0.5A/W, with
Vr = 6V, the output voltage Vo = 1.0V for
10 w of incident light. If Vr is changed to
3 V, keeping all other parameters the same,
the value of Vo in volts is ___________ V.
R
Vr
Ans: 1.0V
05.
Ans: (B)
06.
Incident
Light
100
(D) RL + Ri
system
with
transfer
function
1
has zero initial conditions.
G s 2
s 1
The percentage overshoot in its step
response is ___________ %
Ans: 100%
03.
10sint ~
(B) RL Ri
(C) RL
Ans: (A)
02.
RL
V0
1
T2
(C) E o T
Ans: (C)
(B) E O
1
T
(D) E o T 2
:6:
07.
10.
figure is given by
+
Vi sin(t)
I:N
output
Vo
(A) XY YX
(C) (XY ) XY
Ans: (A)
11.
(B) (X Y )XY
(D) XY XY X Y
s 2 bs c
is
s 2 bs c
form G (s)
OUTPUT
TEST
12.
solutions, where p is
(A) r
(B) n
(C) n r
(D) n + r
Ans: (C)
13.
(B) a pyrometer
Ans: (C)
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:7:
14.
f ( x , y) dx dy is
equivalent to
x
band
(A)
(B)
f (x, y) dx dy
(C)
f (x, y) dy dx
(D)
f ( x , y) dx dy
Ans: (A)
17.
f ( x , y) dx dy
Ans: (C)
time t = 10 ms is _____ V.
_____ %.
t=0
Source Vi
C=1F
VC(t)
+
Voltmeter V
A Ammeter
R = 10 k
Ans: 3%
18.
Ans: 3.678V
16.
appears to be stationary is
(A) 5/
(B) 15/
(C) 35/
(D) 50/
Ans: (C)
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:8:
19.
20.
(A) 45
(C) 90
(B) 60
(D) 180
temperature is _______ .
Ans: 1020
Ans: (A)
21.
Ans: (D)
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:9:
22.
(A)
X and Y are
(D) 4fmax
Ans: (C)
26.
(B) fmax
(C) 2fmax
Assuming the logic gates to have equal nonzero delay, at steady state, the logic states of
1
f max
2
10V
ohms is _______ k.
RB
VE = 0V
1K
Ans: (D)
23.
Let 3 + 4j be zero of a fourth order linearphase FIR filter. The complex number
Ans: 93k
27.
(C)
3
4
(B)
jf
25 25
3
4
j
25 25
(D)
1 1
j
3 4
Ans: (D)
24.
The value of
1
z 2 dz , where the contour is
(B) 0
(C) 2i
(D) 4i
Ans: (B)
25.
-10V
(A) 1 (1)M
(B) M
(C) (1 M)
(D) (1 )M
Ans:
28.
liquid
level
measurement
system
by
the
detector,
neglecting
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: 10 :
absorption of the radiation by air, is
_____%.
(D) decreasing
the
slit-width
of
the
collimator
Ans: (C)
32.
Water
Source
Ans: 8.5%
29.
V0
RT
_____A.
1V +
1
1=R
Ans: 1.39V
33.
1A
Ans: 1 A
30.
becomes _______kHz.
Ans: 95.34kHz
Ans: 4
34.
31.
1 2
X = AX + Bu, where A
and
6
1
B = . The value of for which the
1
system is not controllable is _______.
Ans: 3
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: 11 :
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: 12 :
35.
1
||
1
]
||
0.1 H
Ans: (A)
1V
0.1F
Vc
fc Hz
38.
Ans: 100V
36.
100
100
200
100
50
G
100
Rx
39.
ADC
is
interfaced
with
1
(A) || < |z| <
||
(B) |z| >
the
T1=00C
Ans: 1.236 mV
is
37.
An
Constantan
2V
Ans: 33.33
analog
input
signal
by
the
microprocessor involves
Data
bus
D7
D0
Address
Bus
A15
A0
Data lines D0 to D7
RD
Address
Decode
logic
WR
INT
Microprocessor
D7
D0
Data
Buffers
Analog
input
Enable
Buffers
Start
conversions
End of converstion
ADC
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: 13 :
(C) one WRITE cycle followed by one
READ cycle
(D) one READ cycle followed by one
WRITE cycle
Ans: (C)
41.
40.
30V
NMOS
V0
10V
Ans: 20V
NMOS
0.3
0.2
Im(G(j))
5j
4j
3j
2j
1j
0
0.1
1j
Re(G(j))
0.1
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: 14 :
43.
(B) sin(n/3)/(n)
(C) [sin(n/6)/(n)]2
(D) sin(n/6)/(n)
Ans: (D)
47.
Source Y
3
2
1
0
Source Y
+
Source X
+
Source X
0 1 2 3 4 5
Voltage(V)
+
Vx
Ans: 1.75A
44.
(A) (12)V
(B) (1)V
(C) (1)V
(D) V
Ans: (A)
5
4
I1
2V
I2
4
2V
Ans: 1A
45.
G s
s 2 6s 10
. The angle of arrival of
s 2 2s 2
(B)
5
(C)
(D)
3
2
6
D1
10 mm
Photo
detector
Ans: (A)
46.
48.
D2
Spot of light
Ans: 40 A
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: 15 :
49.
51.
N-digit display
Ans: 0.75
Latch
52.
Clock
Generator
DC 1
E/ R
DC 2
E/ R
DC N
E/ R
2
t
Ans: 6sec
Pulse
shaping
E/ R : Enable/ Re set
53.
Input pulse
1
2N 1
(A) and
f
f
1
10 N 1
(B) and
f
f
10 N
10 N 1
(C)
and
f
f
2N
2N 1
(D)
and
f
f
Ans: (B)
50.
HIGH
Vs
CLK
1A
output
2F
0.1
NMOS
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: 16 :
(A)
(A) 102
(B) 103
(C) 104
(D) 106
Ans: (D)
(B)
55.
In
the
circuit
shown,
the
voltage
(C)
(D)
Ans: (A)
54.
point
being
1mA/V.
Other
rad/s, is
Vi
PMOS
+
A
V
V0
V(t)
9k
1k
2nF
2k
Ans: 1 M
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